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srcclean (nw)

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This commit is contained in:
Vas Crabb 2019-06-23 18:02:43 +10:00
parent 12561ec937
commit d3af11cb11
55 changed files with 137405 additions and 137405 deletions
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20
hash/leapfrog_leappad_cart.xml
View File

@ -241,10 +241,10 @@
</software> </software>
<!-- Also found as: <!-- Also found as:
Description: Phonics - Leap's Friends From A to Z Description: Phonics - Leap's Friends From A to Z
Year: 2001 Year: 2001
Serial: 500-00263 Serial: 500-00263
U1: MX23L8111 U1: MX23L8111
--> -->
<software name="prlpfrnds" supported="no"> <software name="prlpfrnds" supported="no">
<description>Pre Reading - Leap's Friends From A to Z (UK)</description> <description>Pre Reading - Leap's Friends From A to Z (UK)</description>
@ -490,12 +490,12 @@
</software> </software>
<!-- Also found as: <!-- Also found as:
Description: Phonics Programme - Lesson 2 - Short Vowels a and i - Tad's Good Night Description: Phonics Programme - Lesson 2 - Short Vowels a and i - Tad's Good Night
Year: 2003 Year: 2003
Serial: 500-01367 Serial: 500-01367
PCB: 57000-003-3317 PCB: 57000-003-3317
PCB Rev: REV.03 PCB Rev: REV.03
U1: HY23V16202 U1: HY23V16202
--> -->
<software name="tadsgngt" supported="no"> <software name="tadsgngt" supported="no">
<description>Tad's Good Night (UK)</description> <description>Tad's Good Night (UK)</description>

10
hash/pc98.xml
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@ -13931,8 +13931,8 @@ only have some part of Windows file and a Video driver(CLGD?).
</software> </software>
<!-- <!--
Doesn't recognize disk changes, but it's possible to install the game to HDD. Doesn't recognize disk changes, but it's possible to install the game to HDD.
Also, This game is supposed to play voice samples, but in MAME it just outputs a constant beep. Also, This game is supposed to play voice samples, but in MAME it just outputs a constant beep.
--> -->
<software name="diadrum" supported="partial"> <software name="diadrum" supported="partial">
<!-- Origin: Neo Kobe Collection --> <!-- Origin: Neo Kobe Collection -->
@ -17034,9 +17034,9 @@ only have some part of Windows file and a Video driver(CLGD?).
</software> </software>
<!-- <!--
This is a revised edition that adds: This is a revised edition that adds:
- An optional 16-color compatible graphics driver, for older PC-9801 computers - An optional 16-color compatible graphics driver, for older PC-9801 computers
- An updated installer that can use SMARTDRV.EXE instead of SMARTDRV.SYS, hence allowing DOS versions newer than 5.0 - An updated installer that can use SMARTDRV.EXE instead of SMARTDRV.SYS, hence allowing DOS versions newer than 5.0
--> -->
<software name="dhack"> <software name="dhack">
<!-- Origin: Neo Kobe Collection --> <!-- Origin: Neo Kobe Collection -->

197866
hash/spectrum_cass.xml
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File diff suppressed because it is too large Load Diff

362
src/devices/bus/gio64/newport.cpp
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@ -24,7 +24,7 @@
#define LOG_XMAP0 (1 << 4) #define LOG_XMAP0 (1 << 4)
#define LOG_XMAP1 (1 << 5) #define LOG_XMAP1 (1 << 5)
#define LOG_REX3 (1 << 6) #define LOG_REX3 (1 << 6)
#define LOG_RAMDAC (1 << 7) #define LOG_RAMDAC (1 << 7)
#define LOG_COMMANDS (1 << 8) #define LOG_COMMANDS (1 << 8)
#define LOG_REJECTS (1 << 9) #define LOG_REJECTS (1 << 9)
#define LOG_ALL (LOG_UNKNOWN | LOG_VC2 | LOG_CMAP0 | LOG_CMAP1 | LOG_XMAP0 | LOG_XMAP1 | LOG_REX3 | LOG_RAMDAC | LOG_COMMANDS | LOG_REJECTS) #define LOG_ALL (LOG_UNKNOWN | LOG_VC2 | LOG_CMAP0 | LOG_CMAP1 | LOG_XMAP0 | LOG_XMAP1 | LOG_REX3 | LOG_RAMDAC | LOG_COMMANDS | LOG_REJECTS)
@ -1843,7 +1843,7 @@ READ64_MEMBER(newport_base_device::rex3_r)
uint32_t newport_base_device::do_endian_swap(uint32_t color) uint32_t newport_base_device::do_endian_swap(uint32_t color)
{ {
return (color >> 24) | (color << 24) | ((color >> 8) & 0x0000ff00) | ((color << 8) & 0x00ff0000); return (color >> 24) | (color << 24) | ((color >> 8) & 0x0000ff00) | ((color << 8) & 0x00ff0000);
} }
uint32_t newport_base_device::get_host_color() uint32_t newport_base_device::get_host_color()
@ -1862,47 +1862,47 @@ uint32_t newport_base_device::get_host_color()
{ {
default: default:
// No conversion needed // No conversion needed
break; break;
case 1: // 4bpp -> 8bpp case 1: // 4bpp -> 8bpp
color = convert_4bpp_bgr_to_8bpp((uint8_t)color); color = convert_4bpp_bgr_to_8bpp((uint8_t)color);
break; break;
case 2: // 4bpp -> 12bpp case 2: // 4bpp -> 12bpp
color = convert_4bpp_bgr_to_12bpp((uint8_t)color); color = convert_4bpp_bgr_to_12bpp((uint8_t)color);
break; break;
case 3: // 4bpp -> 24bpp case 3: // 4bpp -> 24bpp
color = convert_4bpp_bgr_to_24bpp((uint8_t)color); color = convert_4bpp_bgr_to_24bpp((uint8_t)color);
break; break;
case 4: // 8bpp -> 4bpp case 4: // 8bpp -> 4bpp
color = convert_8bpp_bgr_to_4bpp((uint8_t)color); color = convert_8bpp_bgr_to_4bpp((uint8_t)color);
break; break;
case 6: // 8bpp -> 12bpp case 6: // 8bpp -> 12bpp
color = convert_8bpp_bgr_to_12bpp((uint8_t)color); color = convert_8bpp_bgr_to_12bpp((uint8_t)color);
break; break;
case 7: // 8bpp -> 24bpp case 7: // 8bpp -> 24bpp
color = convert_8bpp_bgr_to_24bpp((uint8_t)color); color = convert_8bpp_bgr_to_24bpp((uint8_t)color);
break; break;
case 8: // 12bpp -> 4bpp case 8: // 12bpp -> 4bpp
color = convert_12bpp_bgr_to_4bpp((uint16_t)color); color = convert_12bpp_bgr_to_4bpp((uint16_t)color);
break; break;
case 9: // 12bpp -> 8bpp case 9: // 12bpp -> 8bpp
color = convert_12bpp_bgr_to_8bpp((uint16_t)color); color = convert_12bpp_bgr_to_8bpp((uint16_t)color);
break; break;
case 11: // 12bpp -> 24bpp case 11: // 12bpp -> 24bpp
color = convert_12bpp_bgr_to_24bpp((uint16_t)color); color = convert_12bpp_bgr_to_24bpp((uint16_t)color);
break; break;
case 12: // 32bpp -> 4bpp case 12: // 32bpp -> 4bpp
color = convert_24bpp_bgr_to_4bpp(color); color = convert_24bpp_bgr_to_4bpp(color);
break; break;
case 13: // 32bpp -> 8bpp case 13: // 32bpp -> 8bpp
color = convert_24bpp_bgr_to_8bpp(color); color = convert_24bpp_bgr_to_8bpp(color);
break; break;
case 14: // 32bpp -> 12bpp case 14: // 32bpp -> 12bpp
color = convert_24bpp_bgr_to_12bpp(color); color = convert_24bpp_bgr_to_12bpp(color);
break; break;
} }
if (BIT(m_rex3.m_draw_mode1, 11)) if (BIT(m_rex3.m_draw_mode1, 11))
color = do_endian_swap(color); color = do_endian_swap(color);
return color; return color;
} }
void newport_base_device::write_pixel(uint32_t color) void newport_base_device::write_pixel(uint32_t color)
@ -2024,11 +2024,11 @@ void newport_base_device::blend_pixel(uint32_t *dest_buf, uint32_t src)
switch (m_rex3.m_plane_depth) switch (m_rex3.m_plane_depth)
{ {
case 0: // 4bpp (not supported) case 0: // 4bpp (not supported)
break; break;
case 1: // 8bpp case 1: // 8bpp
sb = (0xaa * BIT(src, 7)) | (0x55 * BIT(src, 6)); sb = (0xaa * BIT(src, 7)) | (0x55 * BIT(src, 6));
sg = (0x92 * BIT(src, 5)) | (0x49 * BIT(src, 4)) | (0x24 * BIT(src, 3)); sg = (0x92 * BIT(src, 5)) | (0x49 * BIT(src, 4)) | (0x24 * BIT(src, 3));
sr = (0x92 * BIT(src, 2)) | (0x49 * BIT(src, 1)) | (0x24 * BIT(src, 0)); sr = (0x92 * BIT(src, 2)) | (0x49 * BIT(src, 1)) | (0x24 * BIT(src, 0));
if (BIT(m_rex3.m_draw_mode1, 25)) if (BIT(m_rex3.m_draw_mode1, 25))
{ {
@ -2258,58 +2258,58 @@ uint32_t newport_base_device::get_rgb_color(int16_t x, int16_t y)
{ {
static const uint8_t s_bayer[4][4] = { { 0, 12, 3, 15 },{ 8, 4, 11, 7 },{ 2, 14, 1, 13 },{ 10, 6, 9, 5 } }; static const uint8_t s_bayer[4][4] = { { 0, 12, 3, 15 },{ 8, 4, 11, 7 },{ 2, 14, 1, 13 },{ 10, 6, 9, 5 } };
uint32_t red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff); uint32_t red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff);
uint32_t green = ((m_rex3.m_curr_color_green >> 11) & 0x1ff); uint32_t green = ((m_rex3.m_curr_color_green >> 11) & 0x1ff);
uint32_t blue = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff); uint32_t blue = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff);
uint32_t alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff); uint32_t alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff);
if (red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31)) if (red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31))
{ {
red = 0; red = 0;
} }
else if (red > 0xff) else if (red > 0xff)
{ {
red = 0xff; red = 0xff;
} }
if (green >= 0x180 || BIT(m_rex3.m_curr_color_green, 31)) if (green >= 0x180 || BIT(m_rex3.m_curr_color_green, 31))
{ {
green = 0; green = 0;
} }
else if (green > 0xff) else if (green > 0xff)
{ {
green = 0xff; green = 0xff;
} }
if (blue >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31)) if (blue >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31))
{ {
blue = 0; blue = 0;
} }
else if (blue > 0xff) else if (blue > 0xff)
{ {
blue = 0xff; blue = 0xff;
} }
if (alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31)) if (alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31))
{ {
alpha = 0; alpha = 0;
} }
else if (alpha > 0xff) else if (alpha > 0xff)
{ {
alpha = 0xff; alpha = 0xff;
} }
alpha <<= 24; alpha <<= 24;
if (!BIT(m_rex3.m_draw_mode1, 15)) // RGB if (!BIT(m_rex3.m_draw_mode1, 15)) // RGB
{ {
switch (m_rex3.m_plane_depth) switch (m_rex3.m_plane_depth)
{ {
case 0: // 4bpp case 0: // 4bpp
return (m_rex3.m_curr_color_red >> 11) & 0x0000000f; return (m_rex3.m_curr_color_red >> 11) & 0x0000000f;
case 1: // 8bpp case 1: // 8bpp
return (m_rex3.m_curr_color_red >> 11) & 0x000000ff; return (m_rex3.m_curr_color_red >> 11) & 0x000000ff;
case 2: // 12bpp case 2: // 12bpp
return (m_rex3.m_curr_color_red >> 9) & 0x00000fff; return (m_rex3.m_curr_color_red >> 9) & 0x00000fff;
case 3: // 24bpp case 3: // 24bpp
// Not supported // Not supported
return 0; return 0;
@ -2915,66 +2915,66 @@ uint64_t newport_base_device::do_pixel_word_read()
void newport_base_device::iterate_shade() void newport_base_device::iterate_shade()
{ {
if (m_rex3.m_slope_red & 0x7fffff) if (m_rex3.m_slope_red & 0x7fffff)
m_rex3.m_curr_color_red += (m_rex3.m_slope_red << 8) >> 8; m_rex3.m_curr_color_red += (m_rex3.m_slope_red << 8) >> 8;
if (m_rex3.m_slope_green & 0x7ffff) if (m_rex3.m_slope_green & 0x7ffff)
m_rex3.m_curr_color_green += (m_rex3.m_slope_green << 12) >> 12; m_rex3.m_curr_color_green += (m_rex3.m_slope_green << 12) >> 12;
if (m_rex3.m_slope_blue & 0x7ffff) if (m_rex3.m_slope_blue & 0x7ffff)
m_rex3.m_curr_color_blue += (m_rex3.m_slope_blue << 12) >> 12; m_rex3.m_curr_color_blue += (m_rex3.m_slope_blue << 12) >> 12;
if (m_rex3.m_slope_alpha & 0x7ffff) if (m_rex3.m_slope_alpha & 0x7ffff)
m_rex3.m_curr_color_alpha += (m_rex3.m_slope_alpha << 12) >> 12; m_rex3.m_curr_color_alpha += (m_rex3.m_slope_alpha << 12) >> 12;
if (BIT(m_rex3.m_draw_mode0, 21)) // CIClamp if (BIT(m_rex3.m_draw_mode0, 21)) // CIClamp
{ {
if (BIT(m_rex3.m_draw_mode1, 15)) // RGBMode if (BIT(m_rex3.m_draw_mode1, 15)) // RGBMode
{ {
const uint32_t val_red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff); const uint32_t val_red = ((m_rex3.m_curr_color_red >> 11) & 0x1ff);
const uint32_t val_grn = ((m_rex3.m_curr_color_green >> 11) & 0x1ff); const uint32_t val_grn = ((m_rex3.m_curr_color_green >> 11) & 0x1ff);
const uint32_t val_blu = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff); const uint32_t val_blu = ((m_rex3.m_curr_color_blue >> 11) & 0x1ff);
const uint32_t val_alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff); const uint32_t val_alpha = ((m_rex3.m_curr_color_alpha >> 11) & 0x1ff);
if (val_red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31)) if (val_red >= 0x180 || BIT(m_rex3.m_curr_color_red, 31))
m_rex3.m_curr_color_red = 0; m_rex3.m_curr_color_red = 0;
else if (val_red > 0xff) else if (val_red > 0xff)
m_rex3.m_curr_color_red = 0x7ffff; m_rex3.m_curr_color_red = 0x7ffff;
if (val_grn >= 0x180 || BIT(m_rex3.m_curr_color_green, 31)) if (val_grn >= 0x180 || BIT(m_rex3.m_curr_color_green, 31))
m_rex3.m_curr_color_green = 0; m_rex3.m_curr_color_green = 0;
else if (val_grn > 0xff) else if (val_grn > 0xff)
m_rex3.m_curr_color_green = 0x7ffff; m_rex3.m_curr_color_green = 0x7ffff;
if (val_blu >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31)) if (val_blu >= 0x180 || BIT(m_rex3.m_curr_color_blue, 31))
m_rex3.m_curr_color_blue = 0; m_rex3.m_curr_color_blue = 0;
else if (val_blu > 0xff) else if (val_blu > 0xff)
m_rex3.m_curr_color_blue = 0x7ffff; m_rex3.m_curr_color_blue = 0x7ffff;
if (val_alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31)) if (val_alpha >= 0x180 || BIT(m_rex3.m_curr_color_alpha, 31))
m_rex3.m_curr_color_alpha = 0; m_rex3.m_curr_color_alpha = 0;
else if (val_alpha > 0xff) else if (val_alpha > 0xff)
m_rex3.m_curr_color_alpha = 0x7ffff; m_rex3.m_curr_color_alpha = 0x7ffff;
} }
else else
{ {
switch ((m_rex3.m_draw_mode1 >> 3) & 3) switch ((m_rex3.m_draw_mode1 >> 3) & 3)
{ {
case 0: // 4bpp case 0: // 4bpp
if (BIT(m_rex3.m_color_red, 15)) if (BIT(m_rex3.m_color_red, 15))
m_rex3.m_color_red = 0x00007fff; m_rex3.m_color_red = 0x00007fff;
break; break;
case 1: // 8bpp case 1: // 8bpp
if (BIT(m_rex3.m_color_red, 19)) if (BIT(m_rex3.m_color_red, 19))
m_rex3.m_color_red = 0x0007ffff; m_rex3.m_color_red = 0x0007ffff;
break; break;
case 2: // 12bpp case 2: // 12bpp
if (BIT(m_rex3.m_color_red, 21)) if (BIT(m_rex3.m_color_red, 21))
m_rex3.m_color_red = 0x001fffff; m_rex3.m_color_red = 0x001fffff;
break; break;
case 3: // 24bpp case 3: // 24bpp
// No clamping on CI // No clamping on CI
break; break;
} }
} }
} }
} }
void newport_base_device::do_rex3_command() void newport_base_device::do_rex3_command()
@ -3197,10 +3197,10 @@ void newport_base_device::do_rex3_command()
if ((dx > 0 && start_x >= end_x) || (dx < 0 && start_x <= end_x) || lr_abort) if ((dx > 0 && start_x >= end_x) || (dx < 0 && start_x <= end_x) || lr_abort)
{ {
m_rex3.m_curr_color_red = m_rex3.m_color_red; m_rex3.m_curr_color_red = m_rex3.m_color_red;
m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha; m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha;
m_rex3.m_curr_color_green = m_rex3.m_color_green; m_rex3.m_curr_color_green = m_rex3.m_color_green;
m_rex3.m_curr_color_blue = m_rex3.m_color_blue; m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
start_x = m_rex3.m_x_save; start_x = m_rex3.m_x_save;
start_y += dy; start_y += dy;
} }
@ -3519,48 +3519,48 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
} }
m_rex3.m_draw_mode1 = data32; m_rex3.m_draw_mode1 = data32;
static const uint32_t s_store_shift[8][4][2] = { static const uint32_t s_store_shift[8][4][2] = {
{ { 0, 0 }, // None, 4bpp, Buffer 0/1 { { 0, 0 }, // None, 4bpp, Buffer 0/1
{ 0, 0 }, // None, 8bpp, Buffer 0/1 { 0, 0 }, // None, 8bpp, Buffer 0/1
{ 0, 0 }, // None, 12bpp, Buffer 0/1 { 0, 0 }, // None, 12bpp, Buffer 0/1
{ 0, 0 }, // None, 24bpp, Buffer 0/1 (not valid) { 0, 0 }, // None, 24bpp, Buffer 0/1 (not valid)
}, },
{ { 0, 0 }, // RGB/CI, 4bpp, Buffer 0/1 { { 0, 0 }, // RGB/CI, 4bpp, Buffer 0/1
{ 0, 8 }, // RGB/CI, 8bpp, Buffer 0/1 { 0, 8 }, // RGB/CI, 8bpp, Buffer 0/1
{ 0, 12 }, // RGB/CI, 12bpp, Buffer 0/1 { 0, 12 }, // RGB/CI, 12bpp, Buffer 0/1
{ 0, 0 }, // RGB/CI, 24bpp, Buffer 0/1 (not valid) { 0, 0 }, // RGB/CI, 24bpp, Buffer 0/1 (not valid)
}, },
{ { 0, 0 }, // RGBA, 4bpp, Buffer 0/1 { { 0, 0 }, // RGBA, 4bpp, Buffer 0/1
{ 0, 8 }, // RGBA, 8bpp, Buffer 0/1 { 0, 8 }, // RGBA, 8bpp, Buffer 0/1
{ 0, 12 }, // RGBA, 12bpp, Buffer 0/1 { 0, 12 }, // RGBA, 12bpp, Buffer 0/1
{ 0, 0 }, // RGBA, 24bpp, Buffer 0/1 (not valid) { 0, 0 }, // RGBA, 24bpp, Buffer 0/1 (not valid)
}, },
{ { 0, 0 }, // Invalid, 4bpp, Buffer 0/1 { { 0, 0 }, // Invalid, 4bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 8bpp, Buffer 0/1 { 0, 0 }, // Invalid, 8bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 12bpp, Buffer 0/1 { 0, 0 }, // Invalid, 12bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid) { 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid)
}, },
{ { 8, 16 }, // Overlay, 4bpp, Buffer 0/1 { { 8, 16 }, // Overlay, 4bpp, Buffer 0/1
{ 8, 16 }, // Overlay, 8bpp, Buffer 0/1 { 8, 16 }, // Overlay, 8bpp, Buffer 0/1
{ 8, 16 }, // Overlay, 12bpp, Buffer 0/1 { 8, 16 }, // Overlay, 12bpp, Buffer 0/1
{ 8, 16 }, // Overlay, 24bpp, Buffer 0/1 (not valid) { 8, 16 }, // Overlay, 24bpp, Buffer 0/1 (not valid)
}, },
{ { 0, 0 }, // Popup, 4bpp, Buffer 0/1 { { 0, 0 }, // Popup, 4bpp, Buffer 0/1
{ 0, 8 }, // Popup, 8bpp, Buffer 0/1 { 0, 8 }, // Popup, 8bpp, Buffer 0/1
{ 0, 12 }, // Popup, 12bpp, Buffer 0/1 { 0, 12 }, // Popup, 12bpp, Buffer 0/1
{ 0, 0 }, // Popup, 24bpp, Buffer 0/1 (not valid) { 0, 0 }, // Popup, 24bpp, Buffer 0/1 (not valid)
}, },
{ { 0, 0 }, // CID, 4bpp, Buffer 0/1 { { 0, 0 }, // CID, 4bpp, Buffer 0/1
{ 0, 8 }, // CID, 8bpp, Buffer 0/1 { 0, 8 }, // CID, 8bpp, Buffer 0/1
{ 0, 12 }, // CID, 12bpp, Buffer 0/1 { 0, 12 }, // CID, 12bpp, Buffer 0/1
{ 0, 0 }, // CID, 24bpp, Buffer 0/1 (not valid) { 0, 0 }, // CID, 24bpp, Buffer 0/1 (not valid)
}, },
{ { 0, 0 }, // Invalid, 4bpp, Buffer 0/1 { { 0, 0 }, // Invalid, 4bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 8bpp, Buffer 0/1 { 0, 0 }, // Invalid, 8bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 12bpp, Buffer 0/1 { 0, 0 }, // Invalid, 12bpp, Buffer 0/1
{ 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid) { 0, 0 }, // Invalid, 24bpp, Buffer 0/1 (not valid)
}, },
}; };
m_rex3.m_plane_enable = m_rex3.m_draw_mode1 & 7; m_rex3.m_plane_enable = m_rex3.m_draw_mode1 & 7;
m_rex3.m_plane_depth = (m_rex3.m_draw_mode1 >> 3) & 3; m_rex3.m_plane_depth = (m_rex3.m_draw_mode1 >> 3) & 3;
@ -3879,30 +3879,30 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
LOGMASKED(LOG_REX3, "REX3 Red/CI Full State Write: %08x\n", (uint32_t)(data >> 32)); LOGMASKED(LOG_REX3, "REX3 Red/CI Full State Write: %08x\n", (uint32_t)(data >> 32));
m_rex3.m_color_red = (int32_t)((data >> 32) & 0xffffff); m_rex3.m_color_red = (int32_t)((data >> 32) & 0xffffff);
m_rex3.m_curr_color_red = m_rex3.m_color_red; m_rex3.m_curr_color_red = m_rex3.m_color_red;
if (!BIT(m_rex3.m_draw_mode1, 15)) if (!BIT(m_rex3.m_draw_mode1, 15))
{ {
switch (m_rex3.m_plane_depth) switch (m_rex3.m_plane_depth)
{ {
case 0: // 4bpp case 0: // 4bpp
m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xf); m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xf);
break; break;
case 1: // 8bpp case 1: // 8bpp
m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xff); m_rex3.m_color_i = (uint32_t)((data >> 43) & 0xff);
break; break;
case 2: // 12bpp case 2: // 12bpp
m_rex3.m_color_i = (uint32_t)((data >> 41) & 0xfff); m_rex3.m_color_i = (uint32_t)((data >> 41) & 0xfff);
break; break;
case 3: // 32bpp case 3: // 32bpp
// Invalid for CI mode // Invalid for CI mode
break; break;
} }
} }
} }
if (ACCESSING_BITS_0_31) if (ACCESSING_BITS_0_31)
{ {
LOGMASKED(LOG_REX3, "REX3 Alpha Full State Write: %08x\n", (uint32_t)data); LOGMASKED(LOG_REX3, "REX3 Alpha Full State Write: %08x\n", (uint32_t)data);
m_rex3.m_color_alpha = (int32_t)(data & 0xfffff); m_rex3.m_color_alpha = (int32_t)(data & 0xfffff);
m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha; m_rex3.m_curr_color_alpha = m_rex3.m_color_alpha;
} }
break; break;
case 0x0208/8: case 0x0208/8:
@ -3910,13 +3910,13 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
{ {
LOGMASKED(LOG_REX3, "REX3 Green Full State Write: %08x\n", (uint32_t)(data >> 32)); LOGMASKED(LOG_REX3, "REX3 Green Full State Write: %08x\n", (uint32_t)(data >> 32));
m_rex3.m_color_green = (int32_t)((data >> 32) & 0xfffff); m_rex3.m_color_green = (int32_t)((data >> 32) & 0xfffff);
m_rex3.m_curr_color_green = m_rex3.m_color_green; m_rex3.m_curr_color_green = m_rex3.m_color_green;
} }
if (ACCESSING_BITS_0_31) if (ACCESSING_BITS_0_31)
{ {
LOGMASKED(LOG_REX3, "REX3 Blue Full State Write: %08x\n", (uint32_t)data); LOGMASKED(LOG_REX3, "REX3 Blue Full State Write: %08x\n", (uint32_t)data);
m_rex3.m_color_blue = (int32_t)(data & 0xfffff); m_rex3.m_color_blue = (int32_t)(data & 0xfffff);
m_rex3.m_curr_color_blue = m_rex3.m_color_blue; m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
} }
break; break;
case 0x0210/8: case 0x0210/8:
@ -4004,16 +4004,16 @@ WRITE64_MEMBER(newport_base_device::rex3_w)
{ {
LOGMASKED(LOG_REX3, "REX3 Packed Color Write: %08x\n", (uint32_t)data); LOGMASKED(LOG_REX3, "REX3 Packed Color Write: %08x\n", (uint32_t)data);
m_rex3.m_color_i = (uint32_t)data; m_rex3.m_color_i = (uint32_t)data;
if (BIT(m_rex3.m_draw_mode1, 15)) if (BIT(m_rex3.m_draw_mode1, 15))
{ {
m_rex3.m_color_red = (data & 0xff) << 11; m_rex3.m_color_red = (data & 0xff) << 11;
m_rex3.m_color_green = (data & 0xff00) << 3; m_rex3.m_color_green = (data & 0xff00) << 3;
m_rex3.m_color_blue = (data & 0xff0000) >> 5; m_rex3.m_color_blue = (data & 0xff0000) >> 5;
m_rex3.m_curr_color_red = m_rex3.m_color_red; m_rex3.m_curr_color_red = m_rex3.m_color_red;
m_rex3.m_curr_color_green = m_rex3.m_color_green; m_rex3.m_curr_color_green = m_rex3.m_color_green;
m_rex3.m_curr_color_blue = m_rex3.m_color_blue; m_rex3.m_curr_color_blue = m_rex3.m_color_blue;
} }
} }
break; break;
case 0x0228/8: case 0x0228/8:

20
src/devices/bus/gio64/newport.h
View File

@ -73,16 +73,16 @@ protected:
enum enum
{ {
STATUS_GFXBUSY = (1 << 3), STATUS_GFXBUSY = (1 << 3),
STATUS_BACKBUSY = (1 << 4), STATUS_BACKBUSY = (1 << 4),
STATUS_VRINT = (1 << 5), STATUS_VRINT = (1 << 5),
STATUS_VIDEOINT = (1 << 6), STATUS_VIDEOINT = (1 << 6),
STATUS_GFIFOLEVEL_SHIFT = 7, STATUS_GFIFOLEVEL_SHIFT = 7,
STATUS_GFIFOLEVEL_MASK = (0x3f << STATUS_GFIFOLEVEL_SHIFT), STATUS_GFIFOLEVEL_MASK = (0x3f << STATUS_GFIFOLEVEL_SHIFT),
STATUS_BFIFOLEVEL_SHIFT = 13, STATUS_BFIFOLEVEL_SHIFT = 13,
STATUS_BFIFOLEVEL_MASK = (0x1f << STATUS_BFIFOLEVEL_SHIFT), STATUS_BFIFOLEVEL_MASK = (0x1f << STATUS_BFIFOLEVEL_SHIFT),
STATUS_BFIFO_INT = 18, STATUS_BFIFO_INT = 18,
STATUS_GFIFO_INT = 19 STATUS_GFIFO_INT = 19
}; };
struct vc2_t struct vc2_t

10
src/devices/cpu/jaguar/jaguar.cpp
View File

@ -6,11 +6,11 @@
Core implementation for the portable Jaguar DSP emulator. Core implementation for the portable Jaguar DSP emulator.
Written by Aaron Giles Written by Aaron Giles
TODO: TODO:
- Implement pipeline, actually instruction cycles; - Implement pipeline, actually instruction cycles;
Currently implementation is similar to single stepping Currently implementation is similar to single stepping
with single cycle with single cycle
- Implement and acknowlodge remain registers - Implement and acknowlodge remain registers
***************************************************************************/ ***************************************************************************/

2
src/devices/cpu/m6502/xavix.cpp
View File

@ -19,7 +19,7 @@
of banking of banking
0x8000-0xffff is a banked area with individual code and data banks 0x8000-0xffff is a banked area with individual code and data banks
Zero Page notes: Zero Page notes:
0x00ff contains the DATA bank, set manually in code 0x00ff contains the DATA bank, set manually in code
0x00fe appears to be the current CODE bank, set with either the 0x00fe appears to be the current CODE bank, set with either the

2
src/devices/cpu/sh/sh2.cpp
View File

@ -131,7 +131,7 @@ void sh2_device::sh7604_map(address_map &map)
// TODO: cps3boot breaks with this enabled. Needs callback // TODO: cps3boot breaks with this enabled. Needs callback
// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array // AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
// map(0xe0000000, 0xe00001ff).mirror(0x1ffffe00).rw(FUNC(sh2_device::sh7604_r), FUNC(sh2_device::sh7604_w)); // map(0xe0000000, 0xe00001ff).mirror(0x1ffffe00).rw(FUNC(sh2_device::sh7604_r), FUNC(sh2_device::sh7604_w));
// TODO: internal map takes way too much resources if mirrored with 0x1ffffe00 // TODO: internal map takes way too much resources if mirrored with 0x1ffffe00
// we eventually internalize again via trampoline & sh7604_device // we eventually internalize again via trampoline & sh7604_device
// Also area 0xffff8000-0xffffbfff is for synchronous DRAM mode, // Also area 0xffff8000-0xffffbfff is for synchronous DRAM mode,

2
src/devices/cpu/sh/sh2.h
View File

@ -157,7 +157,7 @@ public:
sh2_recalc_irq(); sh2_recalc_irq();
} }
template <int Channel> READ8_MEMBER(drcr_r) { return m_dmac[Channel].drcr & 3; } template <int Channel> READ8_MEMBER(drcr_r) { return m_dmac[Channel].drcr & 3; }
template <int Channel> WRITE8_MEMBER(drcr_w) { m_dmac[Channel].drcr = data & 3; sh2_recalc_irq(); } template <int Channel> WRITE8_MEMBER(drcr_w) { m_dmac[Channel].drcr = data & 3; sh2_recalc_irq(); }
template <int Channel> READ32_MEMBER(sar_r) { return m_dmac[Channel].sar; } template <int Channel> READ32_MEMBER(sar_r) { return m_dmac[Channel].sar; }
template <int Channel> WRITE32_MEMBER(sar_w) { COMBINE_DATA(&m_dmac[Channel].sar); } template <int Channel> WRITE32_MEMBER(sar_w) { COMBINE_DATA(&m_dmac[Channel].sar); }

12
src/devices/cpu/sh/sh2comn.cpp
View File

@ -907,12 +907,12 @@ READ8_MEMBER( sh2_device::ccr_r )
WRITE8_MEMBER( sh2_device::ccr_w ) WRITE8_MEMBER( sh2_device::ccr_w )
{ {
/* /*
xx-- ---- Way 0/1 xx-- ---- Way 0/1
---x ---- Cache Purge (CP), write only ---x ---- Cache Purge (CP), write only
---- x--- Two-Way Mode (TW) ---- x--- Two-Way Mode (TW)
---- -x-- Data Replacement Disable (OD) ---- -x-- Data Replacement Disable (OD)
---- --x- Instruction Replacement Disable (ID) ---- --x- Instruction Replacement Disable (ID)
---- ---x Cache Enable (CE) ---- ---x Cache Enable (CE)
*/ */
m_ccr = data; m_ccr = data;
} }

48
src/devices/machine/am2910.cpp
View File

@ -5,21 +5,21 @@
am2910.cpp am2910.cpp
AMD Am2910 Microprogram Controller emulation AMD Am2910 Microprogram Controller emulation
TODO: TODO:
- Check /RLD behavior - Check /RLD behavior
- Find and fix bugs that almost surely exist - Find and fix bugs that almost surely exist
***************************************************************************/ ***************************************************************************/
#include "emu.h" #include "emu.h"
#include "am2910.h" #include "am2910.h"
#define LOG_INSN (1 << 0) #define LOG_INSN (1 << 0)
#define LOG_STACK (1 << 1) #define LOG_STACK (1 << 1)
#define LOG_ERROR (1 << 2) #define LOG_ERROR (1 << 2)
#define LOG_ALL (LOG_INSN | LOG_STACK | LOG_ERROR) #define LOG_ALL (LOG_INSN | LOG_STACK | LOG_ERROR)
#define VERBOSE (0) #define VERBOSE (0)
#include "logmacro.h" #include "logmacro.h"
/*****************************************************************************/ /*****************************************************************************/
@ -162,12 +162,12 @@ void am2910_device::execute()
m_pc += (uint16_t)m_ci; m_pc += (uint16_t)m_ci;
switch (m_i) switch (m_i)
{ {
case 0: // JZ, Jump Zero case 0: // JZ, Jump Zero
LOGMASKED(LOG_INSN, "%04x: JZ\n", m_pc); LOGMASKED(LOG_INSN, "%04x: JZ\n", m_pc);
m_pc = 0; m_pc = 0;
m_sp = 0; m_sp = 0;
break; break;
case 1: // CJS, Conditional Jump-To-Subroutine PL case 1: // CJS, Conditional Jump-To-Subroutine PL
LOGMASKED(LOG_INSN, "%04x: CJS\n", m_pc); LOGMASKED(LOG_INSN, "%04x: CJS\n", m_pc);
if (test_pass()) if (test_pass())
{ {
@ -175,22 +175,22 @@ void am2910_device::execute()
m_pc = m_d; m_pc = m_d;
} }
break; break;
case 2: // JMAP, Jump Map case 2: // JMAP, Jump Map
LOGMASKED(LOG_INSN, "%04x: JMAP\n", m_pc); LOGMASKED(LOG_INSN, "%04x: JMAP\n", m_pc);
m_pc = m_d; m_pc = m_d;
break; break;
case 3: // CJP, Conditional Jump PL case 3: // CJP, Conditional Jump PL
LOGMASKED(LOG_INSN, "%04x: CJP\n", m_pc); LOGMASKED(LOG_INSN, "%04x: CJP\n", m_pc);
if (test_pass()) if (test_pass())
m_pc = m_d; m_pc = m_d;
break; break;
case 4: // PUSH, Push / Conditional Load Counter case 4: // PUSH, Push / Conditional Load Counter
LOGMASKED(LOG_INSN, "%04x: PUSH\n", m_pc); LOGMASKED(LOG_INSN, "%04x: PUSH\n", m_pc);
push(m_pc); push(m_pc);
if (test_pass()) if (test_pass())
m_r = m_d; m_r = m_d;
break; break;
case 5: // JSRP, Conditional JSB R/PL case 5: // JSRP, Conditional JSB R/PL
LOGMASKED(LOG_INSN, "%04x: JSRP\n", m_pc); LOGMASKED(LOG_INSN, "%04x: JSRP\n", m_pc);
push(m_pc); push(m_pc);
if (test_pass()) if (test_pass())
@ -198,21 +198,21 @@ void am2910_device::execute()
else else
m_pc = m_r; m_pc = m_r;
break; break;
case 6: // CJV, Conditional Jump Vector case 6: // CJV, Conditional Jump Vector
LOGMASKED(LOG_INSN, "%04x: CJV\n", m_pc); LOGMASKED(LOG_INSN, "%04x: CJV\n", m_pc);
if (test_pass()) if (test_pass())
{ {
m_pc = m_d; m_pc = m_d;
} }
break; break;
case 7: // JRP, Conditional Jump R/PL case 7: // JRP, Conditional Jump R/PL
LOGMASKED(LOG_INSN, "%04x: JRP\n", m_pc); LOGMASKED(LOG_INSN, "%04x: JRP\n", m_pc);
if (test_pass()) if (test_pass())
m_pc = m_d; m_pc = m_d;
else else
m_pc = m_r; m_pc = m_r;
break; break;
case 8: // RFCT, Repeat Loop, Counter != 0 case 8: // RFCT, Repeat Loop, Counter != 0
LOGMASKED(LOG_INSN, "%04x: RFCT\n", m_pc); LOGMASKED(LOG_INSN, "%04x: RFCT\n", m_pc);
if (m_r != 0) if (m_r != 0)
{ {
@ -220,7 +220,7 @@ void am2910_device::execute()
m_pc = m_stack[m_sp]; m_pc = m_stack[m_sp];
} }
break; break;
case 9: // RPCT, Repeat PL, Counter != 0 case 9: // RPCT, Repeat PL, Counter != 0
LOGMASKED(LOG_INSN, "%04x: RPCT\n", m_pc); LOGMASKED(LOG_INSN, "%04x: RPCT\n", m_pc);
if (m_r != 0) if (m_r != 0)
{ {
@ -228,12 +228,12 @@ void am2910_device::execute()
m_pc = m_d; m_pc = m_d;
} }
break; break;
case 10: // CRTN, Conditional Return case 10: // CRTN, Conditional Return
LOGMASKED(LOG_INSN, "%04x: CRTN\n", m_pc); LOGMASKED(LOG_INSN, "%04x: CRTN\n", m_pc);
if (test_pass()) if (test_pass())
m_pc = m_stack[m_sp]; m_pc = m_stack[m_sp];
break; break;
case 11: // CJPP, Conditional Jump PL & Pop case 11: // CJPP, Conditional Jump PL & Pop
LOGMASKED(LOG_INSN, "%04x: CJPP\n", m_pc); LOGMASKED(LOG_INSN, "%04x: CJPP\n", m_pc);
if (test_pass()) if (test_pass())
{ {
@ -241,19 +241,19 @@ void am2910_device::execute()
pop(); pop();
} }
break; break;
case 12: // LDCT, Load Counter & Continue case 12: // LDCT, Load Counter & Continue
LOGMASKED(LOG_INSN, "%04x: LDCT\n", m_pc); LOGMASKED(LOG_INSN, "%04x: LDCT\n", m_pc);
m_r = m_d; m_r = m_d;
break; break;
case 13: // LOOP, Test End Loop case 13: // LOOP, Test End Loop
LOGMASKED(LOG_INSN, "%04x: LOOP\n", m_pc); LOGMASKED(LOG_INSN, "%04x: LOOP\n", m_pc);
if (!test_pass()) if (!test_pass())
m_pc = m_stack[m_sp]; m_pc = m_stack[m_sp];
break; break;
case 14: // CONT, Continue case 14: // CONT, Continue
LOGMASKED(LOG_INSN, "%04x: CONT\n", m_pc); LOGMASKED(LOG_INSN, "%04x: CONT\n", m_pc);
break; break;
case 15: // TWB, Three-Way Branch case 15: // TWB, Three-Way Branch
LOGMASKED(LOG_INSN, "%04x: TWB\n", m_pc); LOGMASKED(LOG_INSN, "%04x: TWB\n", m_pc);
if (!test_pass()) if (!test_pass())
{ {

10
src/devices/machine/am2910.h
View File

@ -24,11 +24,11 @@ public:
// construction/destruction // construction/destruction
am2910_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); am2910_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE_LINE_MEMBER(cc_w); // !CC DECLARE_WRITE_LINE_MEMBER(cc_w); // !CC
DECLARE_WRITE_LINE_MEMBER(ccen_w); // !CCEN DECLARE_WRITE_LINE_MEMBER(ccen_w); // !CCEN
DECLARE_WRITE_LINE_MEMBER(ci_w); // CI DECLARE_WRITE_LINE_MEMBER(ci_w); // CI
DECLARE_WRITE_LINE_MEMBER(rld_w); // !RLD DECLARE_WRITE_LINE_MEMBER(rld_w); // !RLD
DECLARE_WRITE_LINE_MEMBER(cp_w); // CP DECLARE_WRITE_LINE_MEMBER(cp_w); // CP
void d_w(uint16_t data); void d_w(uint16_t data);
void i_w(uint8_t data); void i_w(uint8_t data);

6
src/devices/machine/upd7004.cpp
View File

@ -6,9 +6,9 @@
10-bit 8 Channel A/D Converter 10-bit 8 Channel A/D Converter
TODO: TODO:
- Serial modes - Serial modes
- 2s complement output - 2s complement output
***************************************************************************/ ***************************************************************************/

6
src/frontend/mame/clifront.cpp
View File

@ -68,7 +68,7 @@
#define CLICOMMAND_VERIFYSOFTWARE "verifysoftware" #define CLICOMMAND_VERIFYSOFTWARE "verifysoftware"
#define CLICOMMAND_GETSOFTLIST "getsoftlist" #define CLICOMMAND_GETSOFTLIST "getsoftlist"
#define CLICOMMAND_VERIFYSOFTLIST "verifysoftlist" #define CLICOMMAND_VERIFYSOFTLIST "verifysoftlist"
#define CLICOMMAND_VERSION "version" #define CLICOMMAND_VERSION "version"
// command options // command options
#define CLIOPTION_DTD "dtd" #define CLIOPTION_DTD "dtd"
@ -112,7 +112,7 @@ const options_entry cli_option_entries[] =
{ CLICOMMAND_VERIFYSOFTWARE ";vsoft", "0", OPTION_COMMAND, "verify known software for the system" }, { CLICOMMAND_VERIFYSOFTWARE ";vsoft", "0", OPTION_COMMAND, "verify known software for the system" },
{ CLICOMMAND_GETSOFTLIST ";glist", "0", OPTION_COMMAND, "retrieve software list by name" }, { CLICOMMAND_GETSOFTLIST ";glist", "0", OPTION_COMMAND, "retrieve software list by name" },
{ CLICOMMAND_VERIFYSOFTLIST ";vlist", "0", OPTION_COMMAND, "verify software list by name" }, { CLICOMMAND_VERIFYSOFTLIST ";vlist", "0", OPTION_COMMAND, "verify software list by name" },
{ CLICOMMAND_VERSION, "0", OPTION_COMMAND, "get MAME version" }, { CLICOMMAND_VERSION, "0", OPTION_COMMAND, "get MAME version" },
{ nullptr, nullptr, OPTION_HEADER, "FRONTEND COMMAND OPTIONS" }, { nullptr, nullptr, OPTION_HEADER, "FRONTEND COMMAND OPTIONS" },
{ CLIOPTION_DTD, "1", OPTION_BOOLEAN, "include DTD in XML output" }, { CLIOPTION_DTD, "1", OPTION_BOOLEAN, "include DTD in XML output" },
@ -1585,7 +1585,7 @@ const cli_frontend::info_command_struct *cli_frontend::find_command(const std::s
{ CLICOMMAND_ROMIDENT, 1, 1, &cli_frontend::romident, "(file or directory path)" }, { CLICOMMAND_ROMIDENT, 1, 1, &cli_frontend::romident, "(file or directory path)" },
{ CLICOMMAND_GETSOFTLIST, 0, 1, &cli_frontend::getsoftlist, "[system name|*]" }, { CLICOMMAND_GETSOFTLIST, 0, 1, &cli_frontend::getsoftlist, "[system name|*]" },
{ CLICOMMAND_VERIFYSOFTLIST, 0, 1, &cli_frontend::verifysoftlist, "[system name|*]" }, { CLICOMMAND_VERIFYSOFTLIST, 0, 1, &cli_frontend::verifysoftlist, "[system name|*]" },
{ CLICOMMAND_VERSION, 0, 0, &cli_frontend::version, "" } { CLICOMMAND_VERSION, 0, 0, &cli_frontend::version, "" }
}; };
for (const auto &info_command : s_info_commands) for (const auto &info_command : s_info_commands)

6
src/mame/drivers/4enlinea.cpp
View File

@ -472,7 +472,7 @@ void _4enlinea_state::k7_io_map(address_map &map)
map(0x0100, 0x0100).w(m_ay, FUNC(ay8910_device::address_w)); map(0x0100, 0x0100).w(m_ay, FUNC(ay8910_device::address_w));
map(0x0101, 0x0101).r(m_ay, FUNC(ay8910_device::data_r)); map(0x0101, 0x0101).r(m_ay, FUNC(ay8910_device::data_r));
map(0x0102, 0x0102).w(m_ay, FUNC(ay8910_device::data_w)); map(0x0102, 0x0102).w(m_ay, FUNC(ay8910_device::data_w));
// 0x03bf W (0x40) // 0x03bf W (0x40)
} }
@ -679,8 +679,8 @@ ROM_START( k7_olym )
ROM_REGION( 0x10000, "maincpu", 0 ) ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "odk7_v3.11_27c512.ic18", 0x00000, 0x10000, CRC(063d24fe) SHA1(ad4509438d2028ede779f5aa9a918d1020c1db41) ) ROM_LOAD( "odk7_v3.11_27c512.ic18", 0x00000, 0x10000, CRC(063d24fe) SHA1(ad4509438d2028ede779f5aa9a918d1020c1db41) )
// The EEPROM contains a custom message (operators can set on-screen messages). // The EEPROM contains a custom message (operators can set on-screen messages).
// A clean one for default need to be created... // A clean one for default need to be created...
ROM_REGION( 0x0800, "eeprom", 0 ) ROM_REGION( 0x0800, "eeprom", 0 )
ROM_LOAD( "x24c16p.bin", 0x0000, 0x0800, CRC(4c6685b2) SHA1(38c4f64f038d7ce185d6fd0b6eec4c9818f64e8e) ) ROM_LOAD( "x24c16p.bin", 0x0000, 0x0800, CRC(4c6685b2) SHA1(38c4f64f038d7ce185d6fd0b6eec4c9818f64e8e) )

24
src/mame/drivers/argus.cpp
View File

@ -107,18 +107,18 @@ Note :
- Information about the internal ROM tests (see also MT03219): - Information about the internal ROM tests (see also MT03219):
* argus: Checksum routine at $7fc9 (for banks at $7fc0). Checksum is a * argus: Checksum routine at $7fc9 (for banks at $7fc0). Checksum is a
simple sum of the contents. Our dump gives a result of 0x95 while the simple sum of the contents. Our dump gives a result of 0x95 while the
game expects 0x9b, therefore it displays a checksum error. Checksums for game expects 0x9b, therefore it displays a checksum error. Checksums for
the banked ROMs match. the banked ROMs match.
* valtric: Checksum routine at $987c (for banks at $f000). Checksum is a * valtric: Checksum routine at $987c (for banks at $f000). Checksum is a
XOR over the contents. The expected checksums are stored in ROM vt_06.bin XOR over the contents. The expected checksums are stored in ROM vt_06.bin
starting at $d000 (main ROM first, then banks). For our dump, the starting at $d000 (main ROM first, then banks). For our dump, the
expected checksums are all 0x00, but the calculated checksums differ, expected checksums are all 0x00, but the calculated checksums differ,
therefore displays a checksum error for all ROMs. This has been validated therefore displays a checksum error for all ROMs. This has been validated
on real hardware to also fail there. on real hardware to also fail there.
* butasan: Checksum routine is at $e0a8 (for banks at $ec74). Checksum is a * butasan: Checksum routine is at $e0a8 (for banks at $ec74). Checksum is a
simple sum over the contents. The test seems to be broken (or hacked) as simple sum over the contents. The test seems to be broken (or hacked) as
it will only fail when the checksum is exactly 0x00. it will only fail when the checksum is exactly 0x00.
Known issues : Known issues :

2
src/mame/drivers/bagman.cpp
View File

@ -249,7 +249,7 @@ static INPUT_PORTS_START( pickin )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
PORT_MODIFY ("P2") PORT_MODIFY ("P2")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL

16
src/mame/drivers/bbusters.cpp
View File

@ -182,15 +182,15 @@ If you calibrate the guns correctly the game runs as expected:
2) Using P2 controls fire at the indicated spots. 2) Using P2 controls fire at the indicated spots.
3) Using P3 controls fire at the indicated spots. 3) Using P3 controls fire at the indicated spots.
The locations of the shots fired in attract mode are defined by a table The locations of the shots fired in attract mode are defined by a table
starting at $65000. The value taken from there is combined with data from starting at $65000. The value taken from there is combined with data from
the gun calibration to calculate the final position of the shots. the gun calibration to calculate the final position of the shots.
Unexpected calibration values will therefore cause the game to show the Unexpected calibration values will therefore cause the game to show the
shots in weird positions (see MT07333). shots in weird positions (see MT07333).
The EEPROM data starts with the 16 bit calibration values for all six axes The EEPROM data starts with the 16 bit calibration values for all six axes
in the order: Minimum axis 0, middle axis 0, maximum axis 0 (repeat for in the order: Minimum axis 0, middle axis 0, maximum axis 0 (repeat for
the other 5 axes). the other 5 axes).
***************************************************************************/ ***************************************************************************/

12
src/mame/drivers/bigkarnk_ms.cpp
View File

@ -2,15 +2,15 @@
// copyright-holders:David Haywood // copyright-holders:David Haywood
/* /*
Big Karnak (Modular System) Big Karnak (Modular System)
this appears to be a different revision than the gaelco.cpp version, so could be original code, or this appears to be a different revision than the gaelco.cpp version, so could be original code, or
based off one that is otherwise undumped. based off one that is otherwise undumped.
as with most of the 'Modular System' setups, the hardware is heavily modified from the original as with most of the 'Modular System' setups, the hardware is heavily modified from the original
and consists of a multi-board stack in a cage, hence different driver. and consists of a multi-board stack in a cage, hence different driver.
TODO: PCB list TODO: PCB list
*/ */

10
src/mame/drivers/cntsteer.cpp
View File

@ -23,11 +23,11 @@
We currently have slave CPU irq hooked up to vblank, might or might not be correct. We currently have slave CPU irq hooked up to vblank, might or might not be correct.
- invert order between maincpu and subcpu, subcpu is clearly the master CPU here. - invert order between maincpu and subcpu, subcpu is clearly the master CPU here.
- understand why background mirroring causes wrong gfxs on title screen_device. - understand why background mirroring causes wrong gfxs on title screen_device.
Probably area 0x2000-0x2fff enables tile bank bit 8 and write addresses have same mapping as reading. Probably area 0x2000-0x2fff enables tile bank bit 8 and write addresses have same mapping as reading.
A preliminary decoding is in tilelayout_swap; A preliminary decoding is in tilelayout_swap;
- tilemap flashing when gameplay timer is running out; - tilemap flashing when gameplay timer is running out;
- tilemap scrolling, correct only for title screen. - tilemap scrolling, correct only for title screen.
Maybe upper scroll bits also controls startdx/dy? Maybe upper scroll bits also controls startdx/dy?
cleanup cleanup
- split into driver/video; - split into driver/video;

6
src/mame/drivers/dfruit.cpp
View File

@ -350,10 +350,10 @@ ROM_END
ROM_START( gemcrush ) ROM_START( gemcrush )
ROM_REGION( 0x40000, "tc0091lvc", ROMREGION_ERASE00 ) ROM_REGION( 0x40000, "tc0091lvc", ROMREGION_ERASE00 )
ROM_LOAD( "gcj_00.ic2", 0x000000, 0x040000, CRC(e1431390) SHA1(f1f63e23d4b73cc099adddeadcf1ea3e27688bcd) ) /* ST M27C2001 EPROM */ ROM_LOAD( "gcj_00.ic2", 0x000000, 0x040000, CRC(e1431390) SHA1(f1f63e23d4b73cc099adddeadcf1ea3e27688bcd) ) /* ST M27C2001 EPROM */
ROM_REGION( 0x80000, "tc0091lvc:gfx", ROMREGION_ERASE00 ) ROM_REGION( 0x80000, "tc0091lvc:gfx", ROMREGION_ERASE00 )
ROM_LOAD( "gcj_01.ic10", 0x000000, 0x080000, CRC(5b9e7a6e) SHA1(345357feed8e80e6a06093fcb69f2b38063d057a) ) /* HN27C4096 EPROM */ ROM_LOAD( "gcj_01.ic10", 0x000000, 0x080000, CRC(5b9e7a6e) SHA1(345357feed8e80e6a06093fcb69f2b38063d057a) ) /* HN27C4096 EPROM */
ROM_END ROM_END
GAME( 1993, dfruit, 0, dfruit, dfruit, dfruit_state, empty_init, ROT0, "Nippon Data Kiki / Star Fish", "Fruit Dream (Japan)", 0 ) GAME( 1993, dfruit, 0, dfruit, dfruit, dfruit_state, empty_init, ROT0, "Nippon Data Kiki / Star Fish", "Fruit Dream (Japan)", 0 )

108
src/mame/drivers/dpb7000.cpp
View File

@ -26,21 +26,21 @@
#include "screen.h" #include "screen.h"
#include <deque> #include <deque>
#define LOG_UNKNOWN (1 << 0) #define LOG_UNKNOWN (1 << 0)
#define LOG_UCODE (1 << 1) #define LOG_UCODE (1 << 1)
#define LOG_MORE_UCODE (1 << 2) #define LOG_MORE_UCODE (1 << 2)
#define LOG_CSR (1 << 3) #define LOG_CSR (1 << 3)
#define LOG_CTRLBUS (1 << 4) #define LOG_CTRLBUS (1 << 4)
#define LOG_SYS_CTRL (1 << 5) #define LOG_SYS_CTRL (1 << 5)
#define LOG_FDC_CTRL (1 << 6) #define LOG_FDC_CTRL (1 << 6)
#define LOG_FDC_PORT (1 << 7) #define LOG_FDC_PORT (1 << 7)
#define LOG_FDC_CMD (1 << 8) #define LOG_FDC_CMD (1 << 8)
#define LOG_OUTPUT_TIMING (1 << 9) #define LOG_OUTPUT_TIMING (1 << 9)
#define LOG_BRUSH_ADDR (1 << 10) #define LOG_BRUSH_ADDR (1 << 10)
#define LOG_ALL (LOG_UNKNOWN | LOG_UCODE | LOG_MORE_UCODE | LOG_CSR | LOG_CTRLBUS | LOG_SYS_CTRL | LOG_FDC_CTRL | LOG_FDC_PORT | LOG_FDC_CMD | \ #define LOG_ALL (LOG_UNKNOWN | LOG_UCODE | LOG_MORE_UCODE | LOG_CSR | LOG_CTRLBUS | LOG_SYS_CTRL | LOG_FDC_CTRL | LOG_FDC_PORT | LOG_FDC_CMD | \
LOG_OUTPUT_TIMING | LOG_BRUSH_ADDR) LOG_OUTPUT_TIMING | LOG_BRUSH_ADDR)
#define VERBOSE (LOG_ALL &~ LOG_FDC_CTRL) #define VERBOSE (LOG_ALL &~ LOG_FDC_CTRL)
#include "logmacro.h" #include "logmacro.h"
class dpb7000_state : public driver_device class dpb7000_state : public driver_device
@ -111,11 +111,11 @@ private:
enum : uint16_t enum : uint16_t
{ {
SYSCTRL_AUTO_START = 0x0001, SYSCTRL_AUTO_START = 0x0001,
SYSCTRL_REQ_B_EN = 0x0020, SYSCTRL_REQ_B_EN = 0x0020,
SYSCTRL_REQ_A_EN = 0x0040, SYSCTRL_REQ_A_EN = 0x0040,
SYSCTRL_REQ_A_IN = 0x0080, SYSCTRL_REQ_A_IN = 0x0080,
SYSCTRL_REQ_B_IN = 0x8000 SYSCTRL_REQ_B_IN = 0x8000
}; };
DECLARE_READ16_MEMBER(cpu_sysctrl_r); DECLARE_READ16_MEMBER(cpu_sysctrl_r);
@ -172,31 +172,31 @@ private:
enum : uint8_t enum : uint8_t
{ {
DSEQ_STATUS_READY_BIT = 0, // C5 DSEQ_STATUS_READY_BIT = 0, // C5
DSEQ_STATUS_FAULT_BIT = 1, // C6 DSEQ_STATUS_FAULT_BIT = 1, // C6
DSEQ_STATUS_ONCYL_BIT = 2, // C7 DSEQ_STATUS_ONCYL_BIT = 2, // C7
DSEQ_STATUS_SKERR_BIT = 3, // C8 DSEQ_STATUS_SKERR_BIT = 3, // C8
DSEQ_STATUS_INDEX_BIT = 4, // C9 DSEQ_STATUS_INDEX_BIT = 4, // C9
DSEQ_STATUS_SECTOR_BIT = 5, // C10 DSEQ_STATUS_SECTOR_BIT = 5, // C10
DSEQ_STATUS_AMFND_BIT = 6, // C11 DSEQ_STATUS_AMFND_BIT = 6, // C11
DSEQ_STATUS_WTPROT_BIT = 7, // C12 DSEQ_STATUS_WTPROT_BIT = 7, // C12
DSEQ_STATUS_SELECTED_BIT = 8, // C13 DSEQ_STATUS_SELECTED_BIT = 8, // C13
DSEQ_STATUS_SEEKEND_BIT = 9, // C14 DSEQ_STATUS_SEEKEND_BIT = 9, // C14
DSEQ_STATUS_SYNC_DET_BIT = 10, // C15 DSEQ_STATUS_SYNC_DET_BIT = 10, // C15
DSEQ_STATUS_RAM_ADDR_OVFLO_BIT = 11, // C16 DSEQ_STATUS_RAM_ADDR_OVFLO_BIT = 11, // C16
DSEQ_CTRLOUT_CK_SEL_1 = (1 << 0), // S40 DSEQ_CTRLOUT_CK_SEL_1 = (1 << 0), // S40
DSEQ_CTRLOUT_CK_SEL_0 = (1 << 1), // S41 DSEQ_CTRLOUT_CK_SEL_0 = (1 << 1), // S41
DSEQ_CTRLOUT_ADDR_W_PERMIT = (1 << 2), // S42 DSEQ_CTRLOUT_ADDR_W_PERMIT = (1 << 2), // S42
DSEQ_CTRLOUT_ZERO_RAM = (1 << 3), // S43 DSEQ_CTRLOUT_ZERO_RAM = (1 << 3), // S43
DSEQ_CTRLOUT_WRITE_RAM = (1 << 4), // S44 DSEQ_CTRLOUT_WRITE_RAM = (1 << 4), // S44
DSEQ_CTRLOUT_WORD_READ_RAM = (1 << 5), // S45 DSEQ_CTRLOUT_WORD_READ_RAM = (1 << 5), // S45
DSEQ_CTRLOUT_WRITE_SYNC = (1 << 6), // S46 DSEQ_CTRLOUT_WRITE_SYNC = (1 << 6), // S46
DSEQ_CTRLOUT_SYNC_DET_EN = (1 << 7), // S47 DSEQ_CTRLOUT_SYNC_DET_EN = (1 << 7), // S47
DSEQ_CTRLOUT_WRITE_ZERO = (1 << 5), // S53 DSEQ_CTRLOUT_WRITE_ZERO = (1 << 5), // S53
DSEQ_CTRLOUT_LINE_CK = (1 << 6), // S54 DSEQ_CTRLOUT_LINE_CK = (1 << 6), // S54
DSEQ_CTRLOUT_DISC_CLEAR = (1 << 7), // S55 DSEQ_CTRLOUT_DISC_CLEAR = (1 << 7), // S55
}; };
// Computer Card // Computer Card
@ -207,17 +207,17 @@ private:
int m_diskseq_cp; int m_diskseq_cp;
bool m_diskseq_reset; bool m_diskseq_reset;
bool m_diskseq_halt; bool m_diskseq_halt;
uint8_t m_diskseq_line_cnt; // EF/EE uint8_t m_diskseq_line_cnt; // EF/EE
uint8_t m_diskseq_ed_cnt; // ED uint8_t m_diskseq_ed_cnt; // ED
uint8_t m_diskseq_head_cnt; // EC uint8_t m_diskseq_head_cnt; // EC
uint16_t m_diskseq_cyl_from_cpu; // AE/BH uint16_t m_diskseq_cyl_from_cpu; // AE/BH
uint16_t m_diskseq_cmd_from_cpu; // DD/CC uint16_t m_diskseq_cmd_from_cpu; // DD/CC
uint8_t m_diskseq_cyl_to_ctrl; uint8_t m_diskseq_cyl_to_ctrl;
uint8_t m_diskseq_cmd_to_ctrl; uint8_t m_diskseq_cmd_to_ctrl;
uint8_t m_diskseq_status_in; // CG uint8_t m_diskseq_status_in; // CG
uint8_t m_diskseq_status_out; // BC uint8_t m_diskseq_status_out; // BC
uint8_t m_diskseq_ucode_latch[7]; // GG/GF/GE/GD/GC/GB/GA uint8_t m_diskseq_ucode_latch[7]; // GG/GF/GE/GD/GC/GB/GA
uint8_t m_diskseq_cc_inputs[4]; // Inputs to FE/FD/FC/FB uint8_t m_diskseq_cc_inputs[4]; // Inputs to FE/FD/FC/FB
// Output Timing Card // Output Timing Card
uint16_t m_cursor_origin_x; uint16_t m_cursor_origin_x;
@ -786,10 +786,10 @@ WRITE16_MEMBER(dpb7000_state::cpu_ctrlbus_w)
{ {
static const char* const s_func_names[16] = static const char* const s_func_names[16] =
{ {
"Live Video", "Brush Store Read", "Brush Store Write", "Framestore Read", "Live Video", "Brush Store Read", "Brush Store Write", "Framestore Read",
"Framestore Write", "Fast Wipe Video", "Fast Wipe Brush Store", "Fast Wipe Framestore", "Framestore Write", "Fast Wipe Video", "Fast Wipe Brush Store", "Fast Wipe Framestore",
"Draw", "Draw with Stencil I", "Draw with Stencil II", "Copy to Framestore", "Draw", "Draw with Stencil I", "Draw with Stencil II", "Copy to Framestore",
"Copy to Brush Store", "Paste with Stencil I", "Paste with Stencil II", "Copy to same Framestore (Invert)" "Copy to Brush Store", "Paste with Stencil I", "Paste with Stencil II", "Copy to same Framestore (Invert)"
}; };
LOGMASKED(LOG_CTRLBUS | LOG_BRUSH_ADDR, "%s: Brush Address Card, Function Select: %04x\n", machine().describe_context(), data); LOGMASKED(LOG_CTRLBUS | LOG_BRUSH_ADDR, "%s: Brush Address Card, Function Select: %04x\n", machine().describe_context(), data);
LOGMASKED(LOG_CTRLBUS | LOG_BRUSH_ADDR, " Function: %s\n", s_func_names[(data >> 1) & 0xf]); LOGMASKED(LOG_CTRLBUS | LOG_BRUSH_ADDR, " Function: %s\n", s_func_names[(data >> 1) & 0xf]);

56
src/mame/drivers/elan_eu3a14.cpp
View File

@ -30,33 +30,33 @@
The Basketball camera also uses an ETOMS CU5502. It’s different from the others (XaviXport + Real Swing Golf) in that the sensor is on a small PCB with The Basketball camera also uses an ETOMS CU5502. It’s different from the others (XaviXport + Real Swing Golf) in that the sensor is on a small PCB with
a 3.58MHz resonator with 16 wires going to another small PCB that has a glob and a 4MHz resonator. 6 wires go from that PCB to the main game PCB. a 3.58MHz resonator with 16 wires going to another small PCB that has a glob and a 4MHz resonator. 6 wires go from that PCB to the main game PCB.
To access hidden test mode in Football hold enter and right during power on. To access hidden test mode in Football hold enter and right during power on.
Football test mode tests X pos, Y pos, Z pos, direction and speed. This data must all be coming from the camera in the unit as the shinpads are simply Football test mode tests X pos, Y pos, Z pos, direction and speed. This data must all be coming from the camera in the unit as the shinpads are simply
reflective objects, they don't contain any electronics. It could be a useful test case for better understanding these things. reflective objects, they don't contain any electronics. It could be a useful test case for better understanding these things.
To access hidden test mode in Golden Tee Home hold back/backspin and left during power on. To access hidden test mode in Golden Tee Home hold back/backspin and left during power on.
To access hidden test mode in Basketball hold left and Button 1 during power on. To access hidden test mode in Basketball hold left and Button 1 during power on.
To access hidden test mode in Real Swing Golf hold left and down during power on. To access hidden test mode in Real Swing Golf hold left and down during power on.
- test mode check - test mode check
77B6: lda $5041 77B6: lda $5041
77B9: eor #$ed 77B9: eor #$ed
77BB: beq $77be 77BB: beq $77be
To access hidden test mode in Baseball 3 hold down during power on. To access hidden test mode in Baseball 3 hold down during power on.
- test mode check - test mode check
686E: lda $5041 686E: lda $5041
6871: eor #$f7 6871: eor #$f7
6873: bne $68c8 6873: bne $68c8
It is not clear how to access Huntin'3 Test Mode (if possible) there do appear to be tiles for it tho It is not clear how to access Huntin'3 Test Mode (if possible) there do appear to be tiles for it tho
Huntin'3 makes much more extensive use of the video hardware than the other titles, including Huntin'3 makes much more extensive use of the video hardware than the other titles, including
- Table based Rowscroll (most first person views) - Table based Rowscroll (most first person views)
- RAM based tiles (status bar in "Target Range", text descriptions on menus etc.) - RAM based tiles (status bar in "Target Range", text descriptions on menus etc.)
- Windowing effects (to highlight menu items, timer in "Target Range") NOT YET EMULATED / PROPERLY UNDERSTOOD - Windowing effects (to highlight menu items, timer in "Target Range") NOT YET EMULATED / PROPERLY UNDERSTOOD
*/ */
@ -589,11 +589,11 @@ void radica_eu3a14_state::draw_background_ramlayer(screen_device& screen, bitmap
// this register use is questionable // this register use is questionable
if (m_ramtilecfg[0] & 0x80) if (m_ramtilecfg[0] & 0x80)
{ {
int rtm_size;; int rtm_size;;
int rtm_pagewidth; int rtm_pagewidth;
int rtm_pageheight; int rtm_pageheight;
int rtm_yscroll; int rtm_yscroll;
int rtm_bpp; int rtm_bpp;
int rtm_bytespertile = 2; int rtm_bytespertile = 2;
uint8_t palettepri = m_ramtilecfg[1]; uint8_t palettepri = m_ramtilecfg[1];
@ -738,7 +738,7 @@ void radica_eu3a14_state::draw_background(screen_device &screen, bitmap_ind16 &b
} }
else if ((m_tilecfg[0] & 0x03) == 0x03) // individual tilemaps? multiple layers? else if ((m_tilecfg[0] & 0x03) == 0x03) // individual tilemaps? multiple layers?
{ {
// popmessage("m_tilecfg[0] & 0x03 multiple layers config %04x", base); // popmessage("m_tilecfg[0] & 0x03 multiple layers config %04x", base);
ramstart = m_tilerambase + pagesize * 0; ramstart = m_tilerambase + pagesize * 0;
ramend = m_tilerambase + pagesize * 1; ramend = m_tilerambase + pagesize * 1;
@ -853,7 +853,7 @@ void radica_eu3a14_state::draw_sprite_line(screen_device &screen, bitmap_ind16 &
if (flipx) { mask = 0x0f; shift = 0; } else { mask = 0xf0; shift = 4; } if (flipx) { mask = 0x0f; shift = 0; } else { mask = 0xf0; shift = 4; }
draw_sprite_pix(cliprect, dst, pridst, realx, priority, pix, mask, shift, palette); draw_sprite_pix(cliprect, dst, pridst, realx, priority, pix, mask, shift, palette);
realx++; realx++;
if (flipx) { mask = 0xf0; shift = 4; } else { mask = 0x0f; shift = 0; } if (flipx) { mask = 0xf0; shift = 4; } else { mask = 0x0f; shift = 0; }
draw_sprite_pix(cliprect, dst, pridst, realx, priority, pix, mask, shift, palette); draw_sprite_pix(cliprect, dst, pridst, realx, priority, pix, mask, shift, palette);
} }
else if (bpp == 3) else if (bpp == 3)
@ -1181,7 +1181,7 @@ void radica_eu3a14_state::radica_eu3a14_map(address_map &map)
map(0x511a, 0x511e).ram().share("rowscrollsplit"); // hnt3 (60 68 78 90 b8 - rowscroll position list see note below map(0x511a, 0x511e).ram().share("rowscrollsplit"); // hnt3 (60 68 78 90 b8 - rowscroll position list see note below
// register value notes for 511a-511e and how they relate to screen // register value notes for 511a-511e and how they relate to screen
// 00-6f normal scroll reg // 00-6f normal scroll reg
// 60-67 is where the first extra scroll reg (rowscrollregs) is onscreen // 60-67 is where the first extra scroll reg (rowscrollregs) is onscreen
// 68-77 is the 2nd // 68-77 is the 2nd
// 78-8f is the 3rd // 78-8f is the 3rd

44
src/mame/drivers/galpanic_ms.cpp
View File

@ -2,22 +2,22 @@
// copyright-holders:David Haywood, Nicola Salmoria // copyright-holders:David Haywood, Nicola Salmoria
/* /*
Gals Panic (Modular System bootleg) Gals Panic (Modular System bootleg)
PCB stack was marked as 'New Quiz' (aka New Qix?) PCB stack was marked as 'New Quiz' (aka New Qix?)
this is a clone of the expro02.cpp version of Gals Panic this is a clone of the expro02.cpp version of Gals Panic
the hardware changes make it messy enough to have its own driver tho the hardware changes make it messy enough to have its own driver tho
The Modular System cage contains 6! main boards for this game. The Modular System cage contains 6! main boards for this game.
MOD-6M - 68k board (CPU + 6 ROMs + RAM) MOD-6M - 68k board (CPU + 6 ROMs + RAM)
COMP MOD-A - RAM board for Framebuffer gfx, 24Mhz XTAL COMP MOD-A - RAM board for Framebuffer gfx, 24Mhz XTAL
MOD1/5 - Sound board (Z80, 2xYM2203C) (various wire mods and small sub-boards) Dipswitches also on here (same/similar to the Euro League Modular board?) MOD1/5 - Sound board (Z80, 2xYM2203C) (various wire mods and small sub-boards) Dipswitches also on here (same/similar to the Euro League Modular board?)
MOD51/3 - Sprite board (ROM sockets used for plug in board below) MOD51/3 - Sprite board (ROM sockets used for plug in board below)
COMP AEREO MOD/5-1 (MODULAR SYSTEM 2) - Sprite ROM board, plugs into above, 24 sprite ROMs COMP AEREO MOD/5-1 (MODULAR SYSTEM 2) - Sprite ROM board, plugs into above, 24 sprite ROMs
MOD 4/3 - Tilemap board, has logic + 4 tilemap ROMs, long thin sub-board (CAR-0484/1 SOLD) with no chips, just routing along one edge MOD 4/3 - Tilemap board, has logic + 4 tilemap ROMs, long thin sub-board (CAR-0484/1 SOLD) with no chips, just routing along one edge
*/ */
@ -154,7 +154,7 @@ uint32_t galspanic_ms_state::screen_update_backgrounds(screen_device &screen, bi
uint32_t galspanic_ms_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) uint32_t galspanic_ms_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{ {
screen_update_backgrounds(screen, bitmap, cliprect); screen_update_backgrounds(screen, bitmap, cliprect);
// m_kaneko_spr->render_sprites(bitmap,cliprect, screen.priority(), m_spriteram, m_spriteram.bytes()); // m_kaneko_spr->render_sprites(bitmap,cliprect, screen.priority(), m_spriteram, m_spriteram.bytes());
return 0; return 0;
} }
@ -276,17 +276,17 @@ void galspanic_ms_state::newquiz(machine_config &config)
GFXDECODE(config, m_gfxdecode, "palette", gfx_galspanic_ms); GFXDECODE(config, m_gfxdecode, "palette", gfx_galspanic_ms);
// does not use original video hardware, will implement different hardware in driver instead // does not use original video hardware, will implement different hardware in driver instead
// KANEKO_TMAP(config, m_view2); // KANEKO_TMAP(config, m_view2);
// m_view2->set_colbase(0x400); // m_view2->set_colbase(0x400);
// m_view2->set_offset(0x5b, 0x8, 256, 224); // m_view2->set_offset(0x5b, 0x8, 256, 224);
// m_view2->set_palette(m_palette); // m_view2->set_palette(m_palette);
// m_view2->set_tile_callback(kaneko_view2_tilemap_device::view2_cb_delegate(FUNC(galspanic_ms_state::tile_callback), this)); // m_view2->set_tile_callback(kaneko_view2_tilemap_device::view2_cb_delegate(FUNC(galspanic_ms_state::tile_callback), this));
// KANEKO_VU002_SPRITE(config, m_kaneko_spr); // KANEKO_VU002_SPRITE(config, m_kaneko_spr);
// m_kaneko_spr->set_priorities(8,8,8,8); // above all (not verified) // m_kaneko_spr->set_priorities(8,8,8,8); // above all (not verified)
// m_kaneko_spr->set_offsets(0, -0x40); // m_kaneko_spr->set_offsets(0, -0x40);
// m_kaneko_spr->set_palette(m_palette); // m_kaneko_spr->set_palette(m_palette);
// m_kaneko_spr->set_color_base(0x100); // m_kaneko_spr->set_color_base(0x100);
/* sound hardware */ /* sound hardware */
SPEAKER(config, "mono").front_center(); SPEAKER(config, "mono").front_center();

2
src/mame/drivers/goldart.cpp
View File

@ -14,7 +14,7 @@
| 74HCT373N||74HC04B1| _________ 74HCT245N | | 74HCT373N||74HC04B1| _________ 74HCT245N |
| ________ _____________ | | _________ | | ________ _____________ | | _________ |
| __ |74F112N| | ROM U11 | TPC1020BFN-084C 74HCT245N | | __ |74F112N| | ROM U11 | TPC1020BFN-084C 74HCT245N |
| | | _____ |____________| | | _________ | | | | _____ |____________| | | _________ |
| |J| |XTAL| _________ _________ |________| 74HCT273E | | |J| |XTAL| _________ _________ |________| 74HCT273E |
| |P| |____| |SN74F32N||74LS257_| _________ | | |P| |____| |SN74F32N||74LS257_| _________ |
| |1| ______ _________ _________ _____________ 74HCT273E | | |1| ______ _________ _________ _____________ 74HCT273E |

4
src/mame/drivers/gticlub.cpp
View File

@ -148,10 +148,10 @@ Notes:
CN11/12 - Power connectors CN11/12 - Power connectors
CN8/9 - 6-pin analog control connectors (to CCD cameras) CN8/9 - 6-pin analog control connectors (to CCD cameras)
CN10 - 4-pin power connector for IR emitters CN10 - 4-pin power connector for IR emitters
CN4/5 - Pin jack/network connectors (to cpu board) CN4/5 - Pin jack/network connectors (to cpu board)
NRPS11 - Idec NRPS11 PC Board circuit protector NRPS11 - Idec NRPS11 PC Board circuit protector
LM1881 - Video sync separator (DIP8) LM1881 - Video sync separator (DIP8)
056230 - Konami Custom (QFP80) 056230 - Konami Custom (QFP80)

14
src/mame/drivers/jazz.cpp
View File

@ -270,14 +270,14 @@ void jazz_state::jazz(machine_config &config)
pc_kbdc_slot_device &kbd(PC_KBDC_SLOT(config, "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)); pc_kbdc_slot_device &kbd(PC_KBDC_SLOT(config, "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL));
kbd.set_pc_kbdc_slot(&kbd_con); kbd.set_pc_kbdc_slot(&kbd_con);
// auxiliary connector // auxiliary connector
pc_kbdc_device &aux_con(PC_KBDC(config, "aux_con", 0)); pc_kbdc_device &aux_con(PC_KBDC(config, "aux_con", 0));
aux_con.out_clock_cb().set(m_kbdc, FUNC(ps2_keyboard_controller_device::aux_clk_w)); aux_con.out_clock_cb().set(m_kbdc, FUNC(ps2_keyboard_controller_device::aux_clk_w));
aux_con.out_data_cb().set(m_kbdc, FUNC(ps2_keyboard_controller_device::aux_data_w)); aux_con.out_data_cb().set(m_kbdc, FUNC(ps2_keyboard_controller_device::aux_data_w));
// auxiliary port // auxiliary port
pc_kbdc_slot_device &aux(PC_KBDC_SLOT(config, "aux", ps2_mice, STR_HLE_PS2_MOUSE)); pc_kbdc_slot_device &aux(PC_KBDC_SLOT(config, "aux", ps2_mice, STR_HLE_PS2_MOUSE));
aux.set_pc_kbdc_slot(&aux_con); aux.set_pc_kbdc_slot(&aux_con);
// keyboard controller // keyboard controller
PS2_KEYBOARD_CONTROLLER(config, m_kbdc, 12_MHz_XTAL); PS2_KEYBOARD_CONTROLLER(config, m_kbdc, 12_MHz_XTAL);

20
src/mame/drivers/mindset.cpp
View File

@ -103,7 +103,7 @@ void mindset_state::machine_reset()
int mindset_state::sys_t0_r() int mindset_state::sys_t0_r()
{ {
// logerror("SYS: %d read t0 %d (%03x)\n", m_kbdcpu->total_cycles(), (m_kbd_p2 & 0x40) != 0, m_syscpu->pc()); // logerror("SYS: %d read t0 %d (%03x)\n", m_kbdcpu->total_cycles(), (m_kbd_p2 & 0x40) != 0, m_syscpu->pc());
return (m_kbd_p2 & 0x40) != 0; return (m_kbd_p2 & 0x40) != 0;
} }
@ -115,25 +115,25 @@ int mindset_state::sys_t1_r()
u8 mindset_state::sys_p1_r() u8 mindset_state::sys_p1_r()
{ {
// logerror("SYS: read p1\n"); // logerror("SYS: read p1\n");
return 0xff; return 0xff;
} }
u8 mindset_state::sys_p2_r() u8 mindset_state::sys_p2_r()
{ {
// logerror("SYS: read p2 (%03x)\n", m_syscpu->pc()); // logerror("SYS: read p2 (%03x)\n", m_syscpu->pc());
return 0xff; return 0xff;
} }
void mindset_state::sys_p1_w(u8 data) void mindset_state::sys_p1_w(u8 data)
{ {
// logerror("SYS: write p1 %02x\n", data); // logerror("SYS: write p1 %02x\n", data);
} }
void mindset_state::sys_p2_w(u8 data) void mindset_state::sys_p2_w(u8 data)
{ {
m_maincpu->int3_w(!(data & 0x80)); m_maincpu->int3_w(!(data & 0x80));
// logerror("SYS: write p2 %02x\n", data); // logerror("SYS: write p2 %02x\n", data);
} }
void mindset_state::kbd_p1_w(u8 data) void mindset_state::kbd_p1_w(u8 data)
@ -143,8 +143,8 @@ void mindset_state::kbd_p1_w(u8 data)
void mindset_state::kbd_p2_w(u8 data) void mindset_state::kbd_p2_w(u8 data)
{ {
// if((m_kbd_p2 ^ data) & 0x40) // if((m_kbd_p2 ^ data) & 0x40)
// logerror("KBD: %d output bit %d\n", m_kbdcpu->total_cycles(), (m_kbd_p2 & 0x40) != 0); // logerror("KBD: %d output bit %d\n", m_kbdcpu->total_cycles(), (m_kbd_p2 & 0x40) != 0);
m_kbd_p2 = data; m_kbd_p2 = data;
} }
@ -505,7 +505,7 @@ void mindset_state::blit(u16 packet_seg, u16 packet_adr)
res = (dst & ~cmask) | (res & cmask); res = (dst & ~cmask) | (res & cmask);
// logerror("GCO: %04x * %04x = %04x @ %04x\n", src, dst, res, cmask); // logerror("GCO: %04x * %04x = %04x @ %04x\n", src, dst, res, cmask);
m_gcos->write_word((dst_seg << 4) + dst_cadr, sw(res)); m_gcos->write_word((dst_seg << 4) + dst_cadr, sw(res));
if(mode & 0x100) if(mode & 0x100)
@ -594,9 +594,9 @@ void mindset_state::mindset(machine_config &config)
m_screen->set_screen_update(FUNC(mindset_state::screen_update)); m_screen->set_screen_update(FUNC(mindset_state::screen_update));
m_screen->scanline().set([this](int scanline) { m_maincpu->int2_w(scanline == 198); }); m_screen->scanline().set([this](int scanline) { m_maincpu->int2_w(scanline == 198); });
// This is bad and wrong and I don't yet care // This is bad and wrong and I don't yet care
// m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int0_w)); // m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int0_w));
m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int1_w)); m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int1_w));
// m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int2_w)); // m_screen->screen_vblank().set(m_maincpu, FUNC(i80186_cpu_device::int2_w));
} }
static INPUT_PORTS_START(mindset) static INPUT_PORTS_START(mindset)

8
src/mame/drivers/newbrain.cpp
View File

@ -432,11 +432,11 @@ READ8_MEMBER( newbrain_state::cop_g_r )
// Therefore the motors are left permanently on until the above issues can be fixed. // Therefore the motors are left permanently on until the above issues can be fixed.
void newbrain_state::tm() void newbrain_state::tm()
{ {
// cassette_state tm1 = (!m_cop_g1 && !m_cop_k6) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED; // cassette_state tm1 = (!m_cop_g1 && !m_cop_k6) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED;
// cassette_state tm2 = (!m_cop_g3 && !m_cop_k6) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED; // cassette_state tm2 = (!m_cop_g3 && !m_cop_k6) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED;
// m_cassette1->change_state(tm1, CASSETTE_MASK_MOTOR); // m_cassette1->change_state(tm1, CASSETTE_MASK_MOTOR);
// m_cassette2->change_state(tm2, CASSETTE_MASK_MOTOR); // m_cassette2->change_state(tm2, CASSETTE_MASK_MOTOR);
} }
WRITE8_MEMBER( newbrain_state::cop_g_w ) WRITE8_MEMBER( newbrain_state::cop_g_w )

8
src/mame/drivers/nforcepc.cpp
View File

@ -751,10 +751,10 @@ void nforcepc_state::nforcepc(machine_config &config)
PCI_BRIDGE(config, ":pci:08.0", 0, 0x10de01b8, 0); // 10de:01b8 NVIDIA Corporation nForce PCI-to-PCI bridge PCI_BRIDGE(config, ":pci:08.0", 0, 0x10de01b8, 0); // 10de:01b8 NVIDIA Corporation nForce PCI-to-PCI bridge
// 10ec:8139 Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (behind bridge) // 10ec:8139 Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (behind bridge)
MCPX_IDE(config, ":pci:09.0", 0); // 10de:01bc NVIDIA Corporation nForce IDE MCPX_IDE(config, ":pci:09.0", 0); // 10de:01bc NVIDIA Corporation nForce IDE
/* subdevice<ide_controller_32_device>(":pci:09.0:ide")->options(nforcepc_ata_devices, "hdd", "cdrom", true); /* subdevice<ide_controller_32_device>(":pci:09.0:ide")->options(nforcepc_ata_devices, "hdd", "cdrom", true);
.interrupt_handler().set(FUNC(nforcepc_state::ide_interrupt_changed)); .interrupt_handler().set(FUNC(nforcepc_state::ide_interrupt_changed));
ide.irq_pri().set(":pci:01.0", FUNC(mcpx_isalpc_device::pc_irq14_w)); ide.irq_pri().set(":pci:01.0", FUNC(mcpx_isalpc_device::pc_irq14_w));
ide.irq_sec().set(":pci:01.0", FUNC(mcpx_isalpc_device::pc_irq15_w));*/ ide.irq_sec().set(":pci:01.0", FUNC(mcpx_isalpc_device::pc_irq15_w));*/
NV2A_AGP(config, ":pci:1e.0", 0, 0x10de01b7, 0); // 10de:01b7 NVIDIA Corporation nForce AGP to PCI Bridge NV2A_AGP(config, ":pci:1e.0", 0, 0x10de01b7, 0); // 10de:01b7 NVIDIA Corporation nForce AGP to PCI Bridge
SST_49LF020(config, "bios", 0); SST_49LF020(config, "bios", 0);
} }

20
src/mame/drivers/qvt190.cpp
View File

@ -2,18 +2,18 @@
// copyright-holders: // copyright-holders:
/**************************************************************************** /****************************************************************************
Qume QVT-190 Qume QVT-190
Hardware: Hardware:
- MC68B00P - MC68B00P
- 2x MC68B50P - 2x MC68B50P
- MC68B45P - MC68B45P
- V61C16P55L - V61C16P55L
- M5M5165P-70L - M5M5165P-70L
- ABHGA101006 - ABHGA101006
- button battery, 7-DIL-jumper - button battery, 7-DIL-jumper
Crystal: unreadable (but likely to be 16.6698) Crystal: unreadable (but likely to be 16.6698)
****************************************************************************/ ****************************************************************************/

38
src/mame/drivers/qvt70.cpp
View File

@ -2,25 +2,25 @@
// copyright-holders: Dirk Best // copyright-holders: Dirk Best
/**************************************************************************** /****************************************************************************
Qume QVT-70 terminal Qume QVT-70 terminal
Hardware: Hardware:
- Z80 (Z8040008VSC) - Z80 (Z8040008VSC)
- Z80 DART (Z0847006PSC) - Z80 DART (Z0847006PSC)
- QUME 303489-01 QFP144 - QUME 303489-01 QFP144
- DTC 801000-02 QFP100 - DTC 801000-02 QFP100
- ROM 128k + 64k - ROM 128k + 64k
- CXK5864CM-70LL (8k, next to ROMs) - CXK5864CM-70LL (8k, next to ROMs)
- W242575-70LL (32k) + 5x CXK5864CM-70LL (8k) - W242575-70LL (32k) + 5x CXK5864CM-70LL (8k)
- DS1231 - DS1231
- Beeper + Battery - Beeper + Battery
- XTAL unreadable - XTAL unreadable
Features: Features:
- 65 hz with 16x16 characters - 65 hz with 16x16 characters
- 78 hz with 16x13 characters - 78 hz with 16x13 characters
- 64 background/foreground colors - 64 background/foreground colors
- 80/132 columns - 80/132 columns
****************************************************************************/ ****************************************************************************/
@ -62,7 +62,7 @@ void qvt70_state::mem_map(address_map &map)
map(0x0000, 0x7fff).m(m_bank, FUNC(address_map_bank_device::amap8)); map(0x0000, 0x7fff).m(m_bank, FUNC(address_map_bank_device::amap8));
map(0x8000, 0x8000).w(FUNC(qvt70_state::bankswitch_w)); map(0x8000, 0x8000).w(FUNC(qvt70_state::bankswitch_w));
map(0xa000, 0xbfff).ram(); map(0xa000, 0xbfff).ram();
// map(0xc000, 0xffff).ram(); // map(0xc000, 0xffff).ram();
} }
void qvt70_state::bank_map(address_map &map) void qvt70_state::bank_map(address_map &map)
@ -74,7 +74,7 @@ void qvt70_state::bank_map(address_map &map)
map(0x20000, 0x27fff).rom().region("maincpu", 0x20000); map(0x20000, 0x27fff).rom().region("maincpu", 0x20000);
map(0x28000, 0x2ffff).rom().region("maincpu", 0x28000); map(0x28000, 0x2ffff).rom().region("maincpu", 0x28000);
map(0x30000, 0x37fff).ram(); map(0x30000, 0x37fff).ram();
// map(0x38000, 0x3ffff) // map(0x38000, 0x3ffff)
} }
void qvt70_state::io_map(address_map &map) void qvt70_state::io_map(address_map &map)

4
src/mame/drivers/subsino2.cpp
View File

@ -3875,9 +3875,9 @@ void subsino2_state::init_ptrain()
/*************************************************************************** /***************************************************************************
Treasure City Treasure City
unknown hardware unknown hardware
***************************************************************************/ ***************************************************************************/
ROM_START( treacity ) ROM_START( treacity )

12
src/mame/drivers/toki_ms.cpp
View File

@ -2,16 +2,16 @@
// copyright-holders:David Haywood // copyright-holders:David Haywood
/* /*
Toki (Modular System) Toki (Modular System)
as with most of the 'Modular System' setups, the hardware is heavily modified from the original as with most of the 'Modular System' setups, the hardware is heavily modified from the original
and consists of a multi-board stack in a cage, hence different driver. and consists of a multi-board stack in a cage, hence different driver.
TODO: PCB list TODO: PCB list
NOTES: NOTES:
PCB lacks raster effect on title screen PCB lacks raster effect on title screen
*/ */

50
src/mame/drivers/trkfldch.cpp
View File

@ -124,50 +124,50 @@ void trkfldch_state::video_start()
void trkfldch_state::render_tile_layer(screen_device& screen, bitmap_ind16& bitmap, const rectangle& cliprect, int which) void trkfldch_state::render_tile_layer(screen_device& screen, bitmap_ind16& bitmap, const rectangle& cliprect, int which)
{ {
// tilemap 0 = trkfld events, my1stddr background // tilemap 0 = trkfld events, my1stddr background
// tilemap 1= my1stddr HUD layer // tilemap 1= my1stddr HUD layer
// first group of tile scroll registers starting at 7820 // first group of tile scroll registers starting at 7820
// none of these written by hammer throw in trkfld or ddr // none of these written by hammer throw in trkfld or ddr
// uint8_t unk20 = m_tmapscroll_window[0][0x00]; // 0f - 100 meters 00 - javelin, long jump, triple 00 after events, 1e high jump -- hurdle holes -- ddr (assume default of 00?) // uint8_t unk20 = m_tmapscroll_window[0][0x00]; // 0f - 100 meters 00 - javelin, long jump, triple 00 after events, 1e high jump -- hurdle holes -- ddr (assume default of 00?)
// uint8_t unk21 = m_tmapscroll_window[0][0x01]; // 1f - 100 meters 00 - javelin, long jump, triple 00 after events, 00 high jump 00 hurdle holes -- ddr (assume default of 00?) // uint8_t unk21 = m_tmapscroll_window[0][0x01]; // 1f - 100 meters 00 - javelin, long jump, triple 00 after events, 00 high jump 00 hurdle holes -- ddr (assume default of 00?)
// uint8_t unk22 = m_tmapscroll_window[0][0x02]; // 1f - 100 meters 1e - javelin, long jump, triple 1e after events, 1e high jump 1e hurdle holes -- ddr (assume default of 1e?) // uint8_t unk22 = m_tmapscroll_window[0][0x02]; // 1f - 100 meters 1e - javelin, long jump, triple 1e after events, 1e high jump 1e hurdle holes -- ddr (assume default of 1e?)
// uint8_t unk23 = m_tmapscroll_window[0][0x03]; // -- - 100 meters, 1e - javelin, long jump, triple -- after events, -- high jump -- hurdle holes -- ddr (assume default of 1e?) // uint8_t unk23 = m_tmapscroll_window[0][0x03]; // -- - 100 meters, 1e - javelin, long jump, triple -- after events, -- high jump -- hurdle holes -- ddr (assume default of 1e?)
// uint8_t unk24 = m_tmapscroll_window[0][0x04]; // 00 after events 00 hurdle holes -- ddr (assume default of 00?) // uint8_t unk24 = m_tmapscroll_window[0][0x04]; // 00 after events 00 hurdle holes -- ddr (assume default of 00?)
// uint8_t unk25 = m_tmapscroll_window[0][0x05]; // 28 after events 14 hurdle holes -- ddr (assume default of 28?) // uint8_t unk25 = m_tmapscroll_window[0][0x05]; // 28 after events 14 hurdle holes -- ddr (assume default of 28?)
// uint16_t xscroll = (m_tmapscroll_window[0][0x06] << 0) | (m_tmapscroll_window[0][0x07] << 8); // trkfld tilemap 0, race top // why do the split screen races use a different set of scroll registers? maybe global (applies to both layers?) as only one is enabled at this point. // uint16_t xscroll = (m_tmapscroll_window[0][0x06] << 0) | (m_tmapscroll_window[0][0x07] << 8); // trkfld tilemap 0, race top // why do the split screen races use a different set of scroll registers? maybe global (applies to both layers?) as only one is enabled at this point.
// uint16_t xscroll = (m_tmapscroll_window[0][0x08] << 0) | (m_tmapscroll_window[0][0x09] << 8); // trkfld tilemap 0, race bot (window?) // uint16_t xscroll = (m_tmapscroll_window[0][0x08] << 0) | (m_tmapscroll_window[0][0x09] << 8); // trkfld tilemap 0, race bot (window?)
// uint16_t xscroll = (m_tmapscroll_window[0][0x0a] << 0) | (m_tmapscroll_window[0][0x0b] << 8); // trkfld tilemap 0?, javelin // uint16_t xscroll = (m_tmapscroll_window[0][0x0a] << 0) | (m_tmapscroll_window[0][0x0b] << 8); // trkfld tilemap 0?, javelin
// 0c,0d never written // 0c,0d never written
// 0e,0f never written // 0e,0f never written
// uint16_t yscroll = (m_tmapscroll_window[0][0x10] << 0) | (m_tmapscroll_window[0][0x11] << 8); // trkfld tilemap 0, javelin, holes, hammer throw // uint16_t yscroll = (m_tmapscroll_window[0][0x10] << 0) | (m_tmapscroll_window[0][0x11] << 8); // trkfld tilemap 0, javelin, holes, hammer throw
// second group of tile scroll registers starting at 7832 // second group of tile scroll registers starting at 7832
// 32 never written (assume default of 00? to fit 20-25 pattern?) // 32 never written (assume default of 00? to fit 20-25 pattern?)
// uint8_t windowtop = m_tmapscroll_window[1][0x01]; // 0x00 - on trkfld hurdle the holes (also resets to 0x00 & after event - possible default values) (assume default of 00?) // uint8_t windowtop = m_tmapscroll_window[1][0x01]; // 0x00 - on trkfld hurdle the holes (also resets to 0x00 & after event - possible default values) (assume default of 00?)
// uint8_t windowbottom = m_tmapscroll_window[1][0x02]; // 0x1e ^ 0x1e (assume default of 1e?) // uint8_t windowbottom = m_tmapscroll_window[1][0x02]; // 0x1e ^ 0x1e (assume default of 1e?)
// uint8_t unk35 = m_tmapscroll_window[1][0x03]; set to 1e (30) (30*8=240) by trkfld high jump otherwise uninitialized always - something to do with bottom (assume default of 1e?) // uint8_t unk35 = m_tmapscroll_window[1][0x03]; set to 1e (30) (30*8=240) by trkfld high jump otherwise uninitialized always - something to do with bottom (assume default of 1e?)
// for left / right on tilemap 1 // for left / right on tilemap 1
// uint8_t windowleft = m_tmapscroll_window[1][0x04]; //0x29 when unused on my1stddr, 0x25 when used 14 when used on hurdle holes, resets to 00 after event (assume default of 00?) // uint8_t windowleft = m_tmapscroll_window[1][0x04]; //0x29 when unused on my1stddr, 0x25 when used 14 when used on hurdle holes, resets to 00 after event (assume default of 00?)
// uint8_t windowright = m_tmapscroll_window[1][0x05]; //0x29 0x29 28 when used on hurdle holes, resets to 28 after event (assume default of 28?) // uint8_t windowright = m_tmapscroll_window[1][0x05]; //0x29 0x29 28 when used on hurdle holes, resets to 28 after event (assume default of 28?)
// 06,076never written // 06,076never written
// uint16_t xscroll = (m_tmapscroll_window[1][0x08] << 0) | (m_tmapscroll_window[1][0x09] << 8); // trkfld tilemap 1?, javelin // uint16_t xscroll = (m_tmapscroll_window[1][0x08] << 0) | (m_tmapscroll_window[1][0x09] << 8); // trkfld tilemap 1?, javelin
// 0a,0b never written // 0a,0b never written
// 0c,0d never written // 0c,0d never written
// 0e,0f never written // 0e,0f never written
// uint16_t yscroll = (m_tmapscroll_window[1][0x10] << 0) | (m_tmapscroll_window[1][0x11] << 8); // my1stddr tilemap 1 scroller, trkfld tilemap 1 holes (both window) // uint16_t yscroll = (m_tmapscroll_window[1][0x10] << 0) | (m_tmapscroll_window[1][0x11] << 8); // my1stddr tilemap 1 scroller, trkfld tilemap 1 holes (both window)
// printf("window %02x %02x %02x %02x %02x %02x\n", unk20, unk21, unk22, unk23, unk24, unk25); // printf("window %02x %02x %02x %02x %02x %02x\n", unk20, unk21, unk22, unk23, unk24, unk25);
// printf("xscroll %04x\n", xscroll); // printf("xscroll %04x\n", xscroll);
// printf("yscroll %04x\n", yscroll); // printf("yscroll %04x\n", yscroll);
// printf("window left/right %02x %02x\n", windowleft, windowright); // printf("window left/right %02x %02x\n", windowleft, windowright);
// printf("window top/bottom %02x %02x\n", windowtop, windowbottom); // printf("window top/bottom %02x %02x\n", windowtop, windowbottom);
int base, gfxbase, gfxregion; int base, gfxbase, gfxregion;
@ -679,11 +679,11 @@ WRITE8_MEMBER(trkfldch_state::modebankregs_w)
logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data); logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
break; break;
case 0x09: // unknowns? another unknown layer? case 0x09: // unknowns? another unknown layer?
logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data); logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
break; break;
case 0x0a: // unknowns? another unknown layer? case 0x0a: // unknowns? another unknown layer?
logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data); logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
break; break;
} }

2
src/mame/layout/by35.lay
View File

@ -1198,7 +1198,7 @@
<!-- Sound Board Power On Self Test LED --> <!-- Sound Board Power On Self Test LED -->
<bezel name="sound_led0" element="LED_Green"><bounds x="618" y="358" width="10" height="10" /></bezel> <bezel name="sound_led0" element="LED_Green"><bounds x="618" y="358" width="10" height="10" /></bezel>
<bezel element="Text_Sound_LED"> <bounds x="609" y="372" width="30" height="10" /></bezel> <bezel element="Text_Sound_LED"> <bounds x="609" y="372" width="30" height="10" /></bezel>
<!-- Misc Solenoids --> <!-- Misc Solenoids -->
<bezel name="solenoid5" element="Solenoid_Knocker"><bounds x="297" y="457" width="23" height="09" /></bezel> <bezel name="solenoid5" element="Solenoid_Knocker"><bounds x="297" y="457" width="23" height="09" /></bezel>

18
src/mame/machine/deco_irq.cpp
View File

@ -6,18 +6,18 @@
TODO: TODO:
- Lightgun support is only used by Locked 'n Loaded. - Lightgun support is only used by Locked 'n Loaded.
irq is likely an h AND v beam trigger, game counts via raster irqs until irq is likely an h AND v beam trigger, game counts via raster irqs until
it finds one of these, and where gun trigger x position is the H pixel it finds one of these, and where gun trigger x position is the H pixel
latch. latch.
Two problems here: Two problems here:
1. (assuming being correct) default calibration looks way offset. 1. (assuming being correct) default calibration looks way offset.
2. We currently give minmax defaults to Y latches to order to avoid 2. We currently give minmax defaults to Y latches to order to avoid
making the game to crash. These limits doesn't seem very sane, making the game to crash. These limits doesn't seem very sane,
for example lower limit is / 3 the full screen height (248 / 3 = 82). for example lower limit is / 3 the full screen height (248 / 3 = 82).
Being an highly timing dependant behaviour ARM core is probably at Being an highly timing dependant behaviour ARM core is probably at
fault here. fault here.
- Understand if there's an additional switch for player 1 and player 2 - Understand if there's an additional switch for player 1 and player 2
wrt lightgun trigger. wrt lightgun trigger.
***************************************************************************/ ***************************************************************************/

16
src/mame/machine/hal2.h
View File

@ -44,14 +44,14 @@ protected:
enum enum
{ {
IAR_TYPE = 0xf000, IAR_TYPE = 0xf000,
IAR_TYPE_SHIFT = 12, IAR_TYPE_SHIFT = 12,
IAR_NUM = 0x0f00, IAR_NUM = 0x0f00,
IAR_NUM_SHIFT = 8, IAR_NUM_SHIFT = 8,
IAR_ACCESS_SEL = 0x0080, IAR_ACCESS_SEL = 0x0080,
IAR_PARAM = 0x000c, IAR_PARAM = 0x000c,
IAR_PARAM_SHIFT = 2, IAR_PARAM_SHIFT = 2,
IAR_RB_INDEX = 0x0003 IAR_RB_INDEX = 0x0003
}; };
enum enum

10
src/mame/machine/sgi.h
View File

@ -48,11 +48,11 @@ protected:
private: private:
enum enum
{ {
MODE_TO_HOST = (1 << 1), MODE_TO_HOST = (1 << 1),
MODE_SYNC = (1 << 2), MODE_SYNC = (1 << 2),
MODE_FILL = (1 << 3), MODE_FILL = (1 << 3),
MODE_DIR = (1 << 4), MODE_DIR = (1 << 4),
MODE_SNOOP = (1 << 5) MODE_SNOOP = (1 << 5)
}; };
uint32_t dma_translate(uint32_t address); uint32_t dma_translate(uint32_t address);

2
src/mame/machine/xbox_pci.cpp
View File

@ -1104,7 +1104,7 @@ void mcpx_ide_device::map_extra(uint64_t memory_window_start, uint64_t memory_wi
if (~pclass & 1) if (~pclass & 1)
io_space->install_device(0x1f0, 0x1f7, *this, &mcpx_ide_device::ide_pri_command); io_space->install_device(0x1f0, 0x1f7, *this, &mcpx_ide_device::ide_pri_command);
/*if (~pclass & 4) /*if (~pclass & 4)
io_space->install_device(0x3f0, 0x3f7, *this, &mcpx_ide_device::ide_sec_command);*/ io_space->install_device(0x3f0, 0x3f7, *this, &mcpx_ide_device::ide_sec_command);*/
} }
WRITE32_MEMBER(mcpx_ide_device::class_rev_w) WRITE32_MEMBER(mcpx_ide_device::class_rev_w)

4
src/mame/video/dpb_brushproc.h
View File

@ -5,8 +5,8 @@
dpb_brushproc.h dpb_brushproc.h
DPB-7000/1 - Brush Processor Card DPB-7000/1 - Brush Processor Card
TODO: TODO:
- Everything - Everything
***************************************************************************/ ***************************************************************************/

12
src/mame/video/dpb_storeaddr.cpp
View File

@ -5,11 +5,11 @@
dpb_storeaddr.cpp dpb_storeaddr.cpp
DPB-7000/1 - Store Address Card DPB-7000/1 - Store Address Card
TODO: TODO:
- Code is currently a more or less direct translation of the board - Code is currently a more or less direct translation of the board
schematic. It is highly inefficient, but accurate. An equally- schematic. It is highly inefficient, but accurate. An equally-
accurate, but faster, version can be made once better understanding accurate, but faster, version can be made once better understanding
of the overall DPB-7000 system is had. of the overall DPB-7000 system is had.
***************************************************************************/ ***************************************************************************/
@ -1180,7 +1180,7 @@ void dpb7000_storeaddr_card_device::ipen_w(int state)
const bool old_sel = m_ipsel; const bool old_sel = m_ipsel;
m_ipsel = ((!m_crc || m_selvideo) != m_ipsel); m_ipsel = ((!m_crc || m_selvideo) != m_ipsel);
if (old_sel != m_ipsel) if (old_sel != m_ipsel)
m_ipsel_out(m_ipsel); m_ipsel_out(m_ipsel);
} }
} }

6
src/mame/video/segas32.cpp
View File

@ -143,9 +143,9 @@
---- ---- ---- --0- : 1= NBG0 layer disable ---- ---- ---- --0- : 1= NBG0 layer disable
---- ---- ---- ---t : 1= Text layer disable ---- ---- ---- ---t : 1= Text layer disable
reference reference
- arabfgt : https://www.youtube.com/watch?v=98QivDAGz3I - arabfgt : https://www.youtube.com/watch?v=98QivDAGz3I
- darkedge : https://www.youtube.com/watch?v=riO1yb95z7s - darkedge : https://www.youtube.com/watch?v=riO1yb95z7s
*/ */
#include "emu.h" #include "emu.h"