-kaneko/kaneko_calc3.cpp: Organise decryption table as 256*64, restored tabulation killed by a previous incarnation of srcclean.

-cpu/dsp56156: Fixed class memory access warnings (was nuking some memory_access::specific helpers).
This commit is contained in:
Vas Crabb 2025-03-13 04:21:31 +11:00
parent e7ae0c266c
commit d3afef2289
5 changed files with 1107 additions and 1074 deletions

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@ -250,8 +250,6 @@ void dsp56156_device::alu_init()
void dsp56156_device::device_start() void dsp56156_device::device_start()
{ {
memset(&m_core, 0, sizeof(m_core));
m_core.device = this; m_core.device = this;
m_core.program_ram = m_program_ram; m_core.program_ram = m_program_ram;
@ -263,7 +261,7 @@ void dsp56156_device::device_start()
/* HACK - You're not in bootstrap mode upon bootup */ /* HACK - You're not in bootstrap mode upon bootup */
m_core.bootstrap_mode = BOOTSTRAP_OFF; m_core.bootstrap_mode = BOOTSTRAP_OFF;
/* Clear the irq states */ /* Clear the IRQ states */
m_core.modA_state = false; m_core.modA_state = false;
m_core.modB_state = false; m_core.modB_state = false;
m_core.modC_state = false; m_core.modC_state = false;

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@ -14,6 +14,7 @@
#pragma once #pragma once
#include <algorithm>
// IRQ Lines // IRQ Lines
@ -33,6 +34,13 @@ class dsp56156_device;
// 5-4 Host Interface // 5-4 Host Interface
struct dsp56156_host_interface struct dsp56156_host_interface
{ {
dsp56156_host_interface()
: hcr(nullptr), hsr(nullptr), htrx(nullptr)
, icr(0), cvr(0), isr(0), ivr(0), trxh(0), trxl(0)
, bootstrap_offset(0)
{
}
// **** DSP56156 side **** // // **** DSP56156 side **** //
// Host Control Register // Host Control Register
uint16_t *hcr; uint16_t *hcr;
@ -62,12 +70,19 @@ struct dsp56156_host_interface
// HACK - Host interface bootstrap write offset // HACK - Host interface bootstrap write offset
uint16_t bootstrap_offset; uint16_t bootstrap_offset;
}; };
// 1-9 ALU // 1-9 ALU
struct dsp56156_data_alu struct dsp56156_data_alu
{ {
dsp56156_data_alu()
{
x.d = 0;
y.d = 0;
a.q = 0;
b.q = 0;
}
// Four 16-bit input registers (can be accessed as 2 32-bit registers) // Four 16-bit input registers (can be accessed as 2 32-bit registers)
PAIR x; PAIR x;
PAIR y; PAIR y;
@ -85,6 +100,14 @@ struct dsp56156_data_alu
// 1-10 Address Generation Unit (AGU) // 1-10 Address Generation Unit (AGU)
struct dsp56156_agu struct dsp56156_agu
{ {
dsp56156_agu()
: r0(0), r1(0), r2(0), r3(0)
, n0(0), n1(0), n2(0), n3(0)
, m0(0), m1(0), m2(0), m3(0)
, temp(0)
{
}
// Four address registers // Four address registers
uint16_t r0; uint16_t r0;
uint16_t r1; uint16_t r1;
@ -115,26 +138,24 @@ struct dsp56156_agu
// 1-11 Program Control Unit (PCU) // 1-11 Program Control Unit (PCU)
struct dsp56156_pcu struct dsp56156_pcu
{ {
// Program Counter dsp56156_pcu()
uint16_t pc; : pc(0), la(0), lc(0), sr(0), omr(0), sp(0)
, service_interrupts(nullptr)
, reset_vector(0)
, ipc(0)
{
for (auto &s : ss)
s.d = 0;
std::fill(std::begin(pending_interrupts), std::end(pending_interrupts), 0);
}
// Loop Address uint16_t pc; // Program Counter
uint16_t la; uint16_t la; // Loop Address
uint16_t lc; // Loop Counter
// Loop Counter uint16_t sr; // Status Register
uint16_t lc; uint16_t omr; // Operating Mode Register
uint16_t sp; // Stack Pointer
// Status Register PAIR ss[16]; // Stack (TODO: 15-level?)
uint16_t sr;
// Operating Mode Register
uint16_t omr;
// Stack Pointer
uint16_t sp;
// Stack (TODO: 15-level?)
PAIR ss[16];
// Controls IRQ processing // Controls IRQ processing
void (*service_interrupts)(void); void (*service_interrupts)(void);
@ -152,6 +173,21 @@ struct dsp56156_pcu
// 1-8 The dsp56156 CORE // 1-8 The dsp56156 CORE
struct dsp56156_core struct dsp56156_core
{ {
dsp56156_core()
: modA_state(false), modB_state(false), modC_state(false), reset_state(false)
, bootstrap_mode(0)
, repFlag(0), repAddr(0)
, icount(0)
, ppc(0)
, op(0)
, interrupt_cycles(0)
, output_pins_changed(nullptr)
, device(nullptr)
, program_ram(nullptr)
{
std::fill(std::begin(peripheral_ram), std::end(peripheral_ram), 0);
}
// PROGRAM CONTROLLER // PROGRAM CONTROLLER
dsp56156_pcu PCU; dsp56156_pcu PCU;

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@ -100,7 +100,7 @@ uint8_t SE_bit(const dsp56156_core* cpustate) { return ((SP & 0x0010) != 0); }
***************************************************************************/ ***************************************************************************/
void pcu_init(dsp56156_core* cpustate, device_t *device) void pcu_init(dsp56156_core* cpustate, device_t *device)
{ {
/* Init the irq table */ /* Init the IRQ table */
dsp56156_irq_table_init(); dsp56156_irq_table_init();
/* save states - dsp56156_pcu members */ /* save states - dsp56156_pcu members */
@ -322,7 +322,7 @@ void dsp56156_set_irq_source(uint8_t irq_num, uint16_t iv, const char* source)
} }
/* Construct a table containing pertient IRQ information */ /* Construct a table containing pertient IRQ information */
void dsp56156_irq_table_init(void) void dsp56156_irq_table_init()
{ {
/* 1-14 + 1-18 */ /* 1-14 + 1-18 */
/* TODO: Cull host command stuff appropriately */ /* TODO: Cull host command stuff appropriately */

File diff suppressed because it is too large Load Diff

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@ -68,8 +68,6 @@ private:
void initial_scan_tables(); void initial_scan_tables();
void mcu_com_w(offs_t offset, uint16_t data, uint16_t mem_mask, int _n_); void mcu_com_w(offs_t offset, uint16_t data, uint16_t mem_mask, int _n_);
int decompress_table(int tabnum, uint8_t* dstram, int dstoffset); int decompress_table(int tabnum, uint8_t* dstram, int dstoffset);
static const int16_t s_keydata[0x40*0x100];
}; };