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https://github.com/holub/mame
synced 2025-07-03 17:08:39 +03:00
-kaneko/kaneko_calc3.cpp: Organise decryption table as 256*64, restored tabulation killed by a previous incarnation of srcclean.
-cpu/dsp56156: Fixed class memory access warnings (was nuking some memory_access::specific helpers).
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e7ae0c266c
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@ -250,8 +250,6 @@ void dsp56156_device::alu_init()
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void dsp56156_device::device_start()
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void dsp56156_device::device_start()
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{
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{
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memset(&m_core, 0, sizeof(m_core));
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m_core.device = this;
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m_core.device = this;
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m_core.program_ram = m_program_ram;
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m_core.program_ram = m_program_ram;
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@ -263,7 +261,7 @@ void dsp56156_device::device_start()
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/* HACK - You're not in bootstrap mode upon bootup */
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/* HACK - You're not in bootstrap mode upon bootup */
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m_core.bootstrap_mode = BOOTSTRAP_OFF;
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m_core.bootstrap_mode = BOOTSTRAP_OFF;
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/* Clear the irq states */
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/* Clear the IRQ states */
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m_core.modA_state = false;
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m_core.modA_state = false;
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m_core.modB_state = false;
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m_core.modB_state = false;
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m_core.modC_state = false;
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m_core.modC_state = false;
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@ -14,6 +14,7 @@
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#pragma once
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#pragma once
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#include <algorithm>
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// IRQ Lines
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// IRQ Lines
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@ -33,15 +34,22 @@ class dsp56156_device;
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// 5-4 Host Interface
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// 5-4 Host Interface
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struct dsp56156_host_interface
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struct dsp56156_host_interface
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{
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{
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dsp56156_host_interface()
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: hcr(nullptr), hsr(nullptr), htrx(nullptr)
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, icr(0), cvr(0), isr(0), ivr(0), trxh(0), trxl(0)
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, bootstrap_offset(0)
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{
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}
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// **** DSP56156 side **** //
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// **** DSP56156 side **** //
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// Host Control Register
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// Host Control Register
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uint16_t* hcr;
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uint16_t *hcr;
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// Host Status Register
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// Host Status Register
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uint16_t* hsr;
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uint16_t *hsr;
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// Host Transmit/Receive Data
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// Host Transmit/Receive Data
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uint16_t* htrx;
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uint16_t *htrx;
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// **** Host CPU side **** //
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// **** Host CPU side **** //
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// Interrupt Control Register
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// Interrupt Control Register
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@ -62,12 +70,19 @@ struct dsp56156_host_interface
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// HACK - Host interface bootstrap write offset
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// HACK - Host interface bootstrap write offset
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uint16_t bootstrap_offset;
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uint16_t bootstrap_offset;
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};
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};
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// 1-9 ALU
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// 1-9 ALU
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struct dsp56156_data_alu
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struct dsp56156_data_alu
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{
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{
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dsp56156_data_alu()
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{
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x.d = 0;
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y.d = 0;
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a.q = 0;
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b.q = 0;
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}
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// Four 16-bit input registers (can be accessed as 2 32-bit registers)
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// Four 16-bit input registers (can be accessed as 2 32-bit registers)
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PAIR x;
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PAIR x;
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PAIR y;
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PAIR y;
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@ -85,6 +100,14 @@ struct dsp56156_data_alu
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// 1-10 Address Generation Unit (AGU)
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// 1-10 Address Generation Unit (AGU)
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struct dsp56156_agu
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struct dsp56156_agu
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{
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{
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dsp56156_agu()
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: r0(0), r1(0), r2(0), r3(0)
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, n0(0), n1(0), n2(0), n3(0)
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, m0(0), m1(0), m2(0), m3(0)
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, temp(0)
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{
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}
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// Four address registers
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// Four address registers
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uint16_t r0;
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uint16_t r0;
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uint16_t r1;
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uint16_t r1;
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@ -115,26 +138,24 @@ struct dsp56156_agu
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// 1-11 Program Control Unit (PCU)
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// 1-11 Program Control Unit (PCU)
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struct dsp56156_pcu
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struct dsp56156_pcu
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{
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{
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// Program Counter
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dsp56156_pcu()
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uint16_t pc;
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: pc(0), la(0), lc(0), sr(0), omr(0), sp(0)
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, service_interrupts(nullptr)
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, reset_vector(0)
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, ipc(0)
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{
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for (auto &s : ss)
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s.d = 0;
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std::fill(std::begin(pending_interrupts), std::end(pending_interrupts), 0);
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}
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// Loop Address
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uint16_t pc; // Program Counter
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uint16_t la;
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uint16_t la; // Loop Address
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uint16_t lc; // Loop Counter
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// Loop Counter
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uint16_t sr; // Status Register
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uint16_t lc;
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uint16_t omr; // Operating Mode Register
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uint16_t sp; // Stack Pointer
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// Status Register
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PAIR ss[16]; // Stack (TODO: 15-level?)
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uint16_t sr;
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// Operating Mode Register
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uint16_t omr;
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// Stack Pointer
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uint16_t sp;
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// Stack (TODO: 15-level?)
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PAIR ss[16];
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// Controls IRQ processing
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// Controls IRQ processing
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void (*service_interrupts)(void);
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void (*service_interrupts)(void);
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@ -152,6 +173,21 @@ struct dsp56156_pcu
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// 1-8 The dsp56156 CORE
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// 1-8 The dsp56156 CORE
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struct dsp56156_core
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struct dsp56156_core
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{
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{
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dsp56156_core()
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: modA_state(false), modB_state(false), modC_state(false), reset_state(false)
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, bootstrap_mode(0)
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, repFlag(0), repAddr(0)
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, icount(0)
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, ppc(0)
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, op(0)
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, interrupt_cycles(0)
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, output_pins_changed(nullptr)
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, device(nullptr)
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, program_ram(nullptr)
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{
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std::fill(std::begin(peripheral_ram), std::end(peripheral_ram), 0);
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}
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// PROGRAM CONTROLLER
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// PROGRAM CONTROLLER
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dsp56156_pcu PCU;
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dsp56156_pcu PCU;
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@ -100,7 +100,7 @@ uint8_t SE_bit(const dsp56156_core* cpustate) { return ((SP & 0x0010) != 0); }
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***************************************************************************/
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***************************************************************************/
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void pcu_init(dsp56156_core* cpustate, device_t *device)
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void pcu_init(dsp56156_core* cpustate, device_t *device)
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{
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{
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/* Init the irq table */
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/* Init the IRQ table */
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dsp56156_irq_table_init();
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dsp56156_irq_table_init();
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/* save states - dsp56156_pcu members */
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/* save states - dsp56156_pcu members */
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@ -322,7 +322,7 @@ void dsp56156_set_irq_source(uint8_t irq_num, uint16_t iv, const char* source)
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}
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}
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/* Construct a table containing pertient IRQ information */
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/* Construct a table containing pertient IRQ information */
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void dsp56156_irq_table_init(void)
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void dsp56156_irq_table_init()
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{
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{
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/* 1-14 + 1-18 */
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/* 1-14 + 1-18 */
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/* TODO: Cull host command stuff appropriately */
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/* TODO: Cull host command stuff appropriately */
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File diff suppressed because it is too large
Load Diff
@ -68,8 +68,6 @@ private:
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void initial_scan_tables();
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void initial_scan_tables();
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void mcu_com_w(offs_t offset, uint16_t data, uint16_t mem_mask, int _n_);
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void mcu_com_w(offs_t offset, uint16_t data, uint16_t mem_mask, int _n_);
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int decompress_table(int tabnum, uint8_t* dstram, int dstoffset);
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int decompress_table(int tabnum, uint8_t* dstram, int dstoffset);
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static const int16_t s_keydata[0x40*0x100];
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};
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};
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