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TIM100: some work on fixing the display (nw)
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@ -1,50 +1,68 @@
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// license:BSD-3-Clause
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// copyright-holders:Miodrag Milanovic
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/***************************************************************************
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// copyright-holders:Miodrag Milanovic, Robbbert
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/********************************************************************************************************
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TIM-100 Terminal
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Mihajlo Pupin Institute
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TIM-100 Terminal
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Mihajlo Pupin Institute
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21/12/2012 Skeleton driver.
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2012/12/21 Skeleton driver.
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2016/07/14 Fixed display etc [Robbbert]
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****************************************************************************/
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Notes:
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- Serial terminals appear to need 8 bits, 2 stop bits, odd parity @ 9600
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- Unable to set these settings as default, because std::bad_cast fatal error occurs at start
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- Unable to type anything as it seems uarts want BRKDET activated all the time, which we cannot do.
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- Unable to find any technical info at all, so it's all guesswork.
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*******************************************************************************************************/
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#include "emu.h"
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#include "cpu/i8085/i8085.h"
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#include "machine/i8251.h"
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#include "video/i8275.h"
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#include "bus/rs232/rs232.h"
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#include "machine/clock.h"
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class tim100_state : public driver_device
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{
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public:
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tim100_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_palette(*this, "palette")
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: driver_device(mconfig, type, tag)
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, m_p_videoram(*this, "videoram")
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, m_maincpu(*this, "maincpu")
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, m_palette(*this, "palette")
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, m_crtc(*this, "crtc")
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, m_uart17(*this, "uart_u17")
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, m_uart18(*this, "uart_u18")
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{ }
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required_device<cpu_device> m_maincpu;
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required_device<palette_device> m_palette;
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virtual void machine_start() override;
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virtual void machine_reset() override;
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WRITE_LINE_MEMBER(drq_w);
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WRITE_LINE_MEMBER(irq_w);
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WRITE_LINE_MEMBER(clock_w);
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I8275_DRAW_CHARACTER_MEMBER( crtc_display_pixels );
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private:
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virtual void machine_start() override;
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UINT8 *m_charmap;
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UINT16 m_dma_adr;
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required_shared_ptr<UINT8> m_p_videoram;
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required_device<cpu_device> m_maincpu;
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required_device<palette_device> m_palette;
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required_device<i8275_device> m_crtc;
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required_device<i8251_device> m_uart17;
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required_device<i8251_device> m_uart18;
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};
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static ADDRESS_MAP_START(tim100_mem, AS_PROGRAM, 8, tim100_state)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0x1fff) AM_ROM // 2764 at U16
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AM_RANGE(0x2000, 0x27ff) AM_RAM // 2KB static ram CDM6116A at U15
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AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("i8276", i8275_device, read, write)
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AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("uart_u17", i8251_device, status_r, control_w)
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AM_RANGE(0x6001, 0x6001) AM_DEVREADWRITE("uart_u17", i8251_device, data_r, data_w)
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AM_RANGE(0x8000, 0x8000) AM_DEVREADWRITE("uart_u18", i8251_device, status_r, control_w)
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AM_RANGE(0x8001, 0x8001) AM_DEVREADWRITE("uart_u18", i8251_device, data_r, data_w)
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AM_RANGE(0x2000, 0x27ff) AM_RAM AM_SHARE("videoram") // 2KB static ram CDM6116A at U15
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AM_RANGE(0x6000, 0x6000) AM_DEVREADWRITE("uart_u17", i8251_device, data_r, data_w)
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AM_RANGE(0x6001, 0x6001) AM_DEVREADWRITE("uart_u17", i8251_device, status_r, control_w)
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AM_RANGE(0x8000, 0x8000) AM_DEVREADWRITE("uart_u18", i8251_device, data_r, data_w)
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AM_RANGE(0x8001, 0x8001) AM_DEVREADWRITE("uart_u18", i8251_device, status_r, control_w)
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AM_RANGE(0xa000, 0xa000) AM_WRITENOP // continuously writes 00 here
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AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("crtc", i8275_device, read, write) // i8276
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(tim100_io, AS_IO, 8, tim100_state)
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@ -57,6 +75,15 @@ ADDRESS_MAP_END
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static INPUT_PORTS_START( tim100 )
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INPUT_PORTS_END
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DEVICE_INPUT_DEFAULTS_START( tim100 )
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DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_9600 )
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DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_9600 )
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DEVICE_INPUT_DEFAULTS( "RS232_STARTBITS", 0xff, RS232_STARTBITS_1 )
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DEVICE_INPUT_DEFAULTS( "RS232_DATABITS", 0xff, RS232_DATABITS_7 )
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DEVICE_INPUT_DEFAULTS( "RS232_PARITY", 0xff, RS232_PARITY_ODD )
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DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_1 )
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DEVICE_INPUT_DEFAULTS_END
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static const rgb_t tim100_palette[3] = {
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rgb_t(0x00, 0x00, 0x00), // black
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rgb_t(0xa0, 0xa0, 0xa0), // white
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@ -66,10 +93,6 @@ static const rgb_t tim100_palette[3] = {
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void tim100_state::machine_start()
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{
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m_charmap = memregion("chargen")->base();
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}
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void tim100_state::machine_reset()
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{
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m_palette->set_pen_colors(0, tim100_palette, ARRAY_LENGTH(tim100_palette));
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}
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@ -90,34 +113,60 @@ static GFXDECODE_START( tim100 )
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GFXDECODE_END
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// this gets called via a (i8275_dack_w), so does nothing currently
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// once fixed, pixel count needs adjusting
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I8275_DRAW_CHARACTER_MEMBER( tim100_state::crtc_display_pixels )
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{
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int i;
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const rgb_t *palette = m_palette->palette()->entry_list_raw();
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UINT8 pixels = m_charmap[(linecount & 15) + (charcode << 4)];
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if (vsp)
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UINT8 pixels;
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for (UINT8 i = 0; i < 2; i++)
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{
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pixels = 0;
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}
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pixels = m_charmap[(i * 0x1000) | (linecount & 15) | (charcode << 4)];
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if (vsp)
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pixels = 0;
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if (lten)
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{
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pixels = 0xff;
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}
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if (lten)
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pixels = 0xff;
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if (rvv)
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{
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pixels ^= 0xff;
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}
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if (rvv)
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pixels ^= 0xff;
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for(i=0;i<8;i++) // 6 pixels
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{
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bitmap.pix32(y, x + i) = palette[(pixels >> (7-i)) & 1 ? (hlgt ? 2 : 1) : 0];
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bitmap.pix32(y, x++) = palette[BIT(pixels, 7) ? (hlgt ? 2 : 1) : 0];
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bitmap.pix32(y, x++) = palette[BIT(pixels, 6) ? (hlgt ? 2 : 1) : 0];
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bitmap.pix32(y, x++) = palette[BIT(pixels, 5) ? (hlgt ? 2 : 1) : 0];
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bitmap.pix32(y, x++) = palette[BIT(pixels, 4) ? (hlgt ? 2 : 1) : 0];
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bitmap.pix32(y, x++) = palette[BIT(pixels, 3) ? (hlgt ? 2 : 1) : 0];
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bitmap.pix32(y, x++) = palette[BIT(pixels, 2) ? (hlgt ? 2 : 1) : 0];
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}
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}
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WRITE_LINE_MEMBER( tim100_state::drq_w )
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{
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if (state)
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{
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address_space& mem = m_maincpu->space(AS_PROGRAM);
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m_crtc->dack_w(mem, 0, m_p_videoram[m_dma_adr++]);
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}
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}
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WRITE_LINE_MEMBER( tim100_state::irq_w )
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{
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if (state)
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{
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m_dma_adr = 2;
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m_maincpu->set_input_line(I8085_RST65_LINE, HOLD_LINE);
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}
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else
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m_maincpu->set_input_line(I8085_RST65_LINE, CLEAR_LINE);
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}
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DECLARE_WRITE_LINE_MEMBER( tim100_state::clock_w )
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{
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m_uart17->write_txc(state);
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m_uart17->write_rxc(state);
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m_uart18->write_txc(state);
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m_uart18->write_rxc(state);
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}
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static MACHINE_CONFIG_START( tim100, tim100_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu",I8085A, XTAL_4_9152MHz) // divider unknown
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@ -126,28 +175,50 @@ static MACHINE_CONFIG_START( tim100, tim100_state )
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_UPDATE_DEVICE("i8276", i8275_device, screen_update)
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MCFG_SCREEN_UPDATE_DEVICE("crtc", i8275_device, screen_update)
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MCFG_SCREEN_REFRESH_RATE(50)
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
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MCFG_SCREEN_SIZE(40*16, 16*16)
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MCFG_SCREEN_VISIBLE_AREA(0, 40*16-1, 0, 16*16-1)
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MCFG_SCREEN_SIZE(40*12, 16*16)
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MCFG_SCREEN_VISIBLE_AREA(0, 40*12-1, 0, 16*16-1)
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MCFG_GFXDECODE_ADD("gfxdecode", "palette", tim100 )
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MCFG_DEVICE_ADD("i8276", I8275, XTAL_4_9152MHz)
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MCFG_I8275_CHARACTER_WIDTH(16)
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MCFG_DEVICE_ADD("crtc", I8275, XTAL_4_9152MHz)
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MCFG_I8275_CHARACTER_WIDTH(12)
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MCFG_I8275_DRAW_CHARACTER_CALLBACK_OWNER(tim100_state, crtc_display_pixels)
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MCFG_I8275_IRQ_CALLBACK(INPUTLINE("maincpu", I8085_RST65_LINE))
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MCFG_I8275_DRQ_CALLBACK(WRITELINE(tim100_state, drq_w))
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MCFG_I8275_IRQ_CALLBACK(WRITELINE(tim100_state, irq_w))
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MCFG_VIDEO_SET_SCREEN("screen")
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MCFG_PALETTE_ADD("palette", 3)
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MCFG_DEVICE_ADD("uart_u17", I8251, 0)
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MCFG_I8251_TXD_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_txd))
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MCFG_I8251_DTR_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
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MCFG_I8251_RTS_HANDLER(DEVWRITELINE("rs232", rs232_port_device, write_rts))
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MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, "keyboard")
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MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart_u17", i8251_device, write_rxd))
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MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart_u17", i8251_device, write_dsr))
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MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart_u17", i8251_device, write_cts))
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MCFG_DEVICE_ADD("uart_u18", I8251, 0)
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MCFG_I8251_TXD_HANDLER(DEVWRITELINE("rs232a", rs232_port_device, write_txd))
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MCFG_I8251_DTR_HANDLER(DEVWRITELINE("rs232a", rs232_port_device, write_dtr))
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MCFG_I8251_RTS_HANDLER(DEVWRITELINE("rs232a", rs232_port_device, write_rts))
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MCFG_RS232_PORT_ADD("rs232a", default_rs232_devices, "terminal") //"keyboard")
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MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart_u18", i8251_device, write_rxd))
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MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart_u18", i8251_device, write_dsr))
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MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart_u18", i8251_device, write_cts))
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// MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("keyboard", tim100 ) // gives std::bad_cast
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// MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("terminal", tim100 ) // gives std::bad_cast
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MCFG_DEVICE_ADD("uart_clock", CLOCK, 153600)
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MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(tim100_state, clock_w))
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MACHINE_CONFIG_END
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/* ROM definition */
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ROM_START( tim100 )
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ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
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ROM_REGION( 0x2000, "maincpu", 0 )
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ROM_LOAD( "tim 100 v.3.2.0.u16", 0x0000, 0x2000, CRC(4de9c8ad) SHA1(b0914d6e8d618e92a87b4b39c35391541251e8cc))
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// The first and 2nd halves of these roms are identical, confirmed ok
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