fixed Coverity "Out-of-bounds write" warnings in drivers with VME (nw)

This commit is contained in:
firewave 2018-01-20 12:17:43 +01:00
parent 5e3467af40
commit d3ef917bba
4 changed files with 8 additions and 8 deletions

View File

@ -153,8 +153,8 @@ READ32_MEMBER(vme_hcpu30_card_device::bootvect_r)
WRITE32_MEMBER(vme_hcpu30_card_device::bootvect_w)
{
LOG("%s\n", FUNCNAME);
m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
m_sysram[offset % ARRAY_LENGTH(m_sysram)] &= ~mem_mask;
m_sysram[offset % ARRAY_LENGTH(m_sysram)] |= (data & mem_mask);
m_sysrom = &m_sysram[0]; // redirect all upcoming accesses to masking RAM until reset.
}

View File

@ -424,8 +424,8 @@ READ32_MEMBER (cpu30_state::bootvect_r){
WRITE32_MEMBER (cpu30_state::bootvect_w){
LOG("%s\n", FUNCNAME);
m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
m_sysram[offset % ARRAY_LENGTH(m_sysram)] &= ~mem_mask;
m_sysram[offset % ARRAY_LENGTH(m_sysram)] |= (data & mem_mask);
m_sysrom = &m_sysram[0]; // redirect all upcoming accesses to masking RAM until reset.
}

View File

@ -279,8 +279,8 @@ READ16_MEMBER (hk68v10_state::bootvect_r){
WRITE16_MEMBER (hk68v10_state::bootvect_w){
LOG (("%s offset %08x, mask %08x, data %04x\n", FUNCNAME, offset, mem_mask, data));
m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
m_sysram[offset % ARRAY_LENGTH(m_sysram)] &= ~mem_mask;
m_sysram[offset % ARRAY_LENGTH(m_sysram)] |= (data & mem_mask);
m_sysrom = &m_sysram[0]; // redirect all upcoming accesses to masking RAM until reset.
}

View File

@ -288,8 +288,8 @@ READ32_MEMBER (mvme147_state::bootvect_r){
}
WRITE32_MEMBER (mvme147_state::bootvect_w){
m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
m_sysram[offset % ARRAY_LENGTH(m_sysram)] &= ~mem_mask;
m_sysram[offset % ARRAY_LENGTH(m_sysram)] |= (data & mem_mask);
m_sysrom = &m_sysram[0]; // redirect all upcoming accesses to masking RAM until reset.
}