we can probably do away with these hacks in tnzs.c as well (membank stuff) -- not tested

there's still the sync kludge for tnzs tho...
This commit is contained in:
davidhay 2008-11-23 17:32:47 +00:00
parent ac999e7f71
commit d3fa796f72

View File

@ -520,36 +520,18 @@ DRIVER_INIT( plumpop )
DRIVER_INIT( extrmatn ) DRIVER_INIT( extrmatn )
{ {
UINT8 *RAM = memory_region(machine, "main");
mcu_type = MCU_EXTRMATN; mcu_type = MCU_EXTRMATN;
/* there's code which falls through from the fixed ROM to bank #7, I have to */
/* copy it there otherwise the CPU bank switching support will not catch it. */
memcpy(&RAM[0x08000],&RAM[0x2c000],0x4000);
} }
DRIVER_INIT( arknoid2 ) DRIVER_INIT( arknoid2 )
{ {
UINT8 *RAM = memory_region(machine, "main");
mcu_type = MCU_ARKANOID; mcu_type = MCU_ARKANOID;
/* there's code which falls through from the fixed ROM to bank #2, I have to */
/* copy it there otherwise the CPU bank switching support will not catch it. */
memcpy(&RAM[0x08000],&RAM[0x18000],0x4000);
} }
DRIVER_INIT( drtoppel ) DRIVER_INIT( drtoppel )
{ {
UINT8 *RAM = memory_region(machine, "main");
mcu_type = MCU_DRTOPPEL; mcu_type = MCU_DRTOPPEL;
/* there's code which falls through from the fixed ROM to bank #2, I have to */
/* copy it there otherwise the CPU bank switching support will not catch it. */
memcpy(&RAM[0x08000],&RAM[0x18000],0x4000);
/* drtoppel writes to the palette RAM area even if it has PROMs! We have to patch it out. */ /* drtoppel writes to the palette RAM area even if it has PROMs! We have to patch it out. */
memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf800, 0xfbff, 0, 0, SMH_NOP); memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf800, 0xfbff, 0, 0, SMH_NOP);
} }
@ -561,26 +543,15 @@ DRIVER_INIT( chukatai )
DRIVER_INIT( tnzs ) DRIVER_INIT( tnzs )
{ {
UINT8 *RAM = memory_region(machine, "main");
mcu_type = MCU_TNZS; mcu_type = MCU_TNZS;
/* there's code which falls through from the fixed ROM to bank #7, I have to */
/* copy it there otherwise the CPU bank switching support will not catch it. */
memcpy(&RAM[0x08000],&RAM[0x2c000],0x4000);
/* we need to install a kludge to avoid problems with a bug in the original code */ /* we need to install a kludge to avoid problems with a bug in the original code */
memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w); memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
} }
DRIVER_INIT( tnzsb ) DRIVER_INIT( tnzsb )
{ {
UINT8 *RAM = memory_region(machine, "main");
mcu_type = MCU_NONE_TNZSB; mcu_type = MCU_NONE_TNZSB;
/* there's code which falls through from the fixed ROM to bank #7, I have to */
/* copy it there otherwise the CPU bank switching support will not catch it. */
memcpy(&RAM[0x08000],&RAM[0x2c000],0x4000);
/* we need to install a kludge to avoid problems with a bug in the original code */ /* we need to install a kludge to avoid problems with a bug in the original code */
memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w); memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
} }