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https://github.com/holub/mame
synced 2025-05-21 21:29:15 +03:00
we can probably do away with these hacks in tnzs.c as well (membank stuff) -- not tested
there's still the sync kludge for tnzs tho...
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@ -520,36 +520,18 @@ DRIVER_INIT( plumpop )
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DRIVER_INIT( extrmatn )
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DRIVER_INIT( extrmatn )
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{
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{
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UINT8 *RAM = memory_region(machine, "main");
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mcu_type = MCU_EXTRMATN;
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mcu_type = MCU_EXTRMATN;
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/* there's code which falls through from the fixed ROM to bank #7, I have to */
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/* copy it there otherwise the CPU bank switching support will not catch it. */
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memcpy(&RAM[0x08000],&RAM[0x2c000],0x4000);
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}
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}
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DRIVER_INIT( arknoid2 )
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DRIVER_INIT( arknoid2 )
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{
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{
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UINT8 *RAM = memory_region(machine, "main");
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mcu_type = MCU_ARKANOID;
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mcu_type = MCU_ARKANOID;
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/* there's code which falls through from the fixed ROM to bank #2, I have to */
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/* copy it there otherwise the CPU bank switching support will not catch it. */
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memcpy(&RAM[0x08000],&RAM[0x18000],0x4000);
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}
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}
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DRIVER_INIT( drtoppel )
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DRIVER_INIT( drtoppel )
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{
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{
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UINT8 *RAM = memory_region(machine, "main");
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mcu_type = MCU_DRTOPPEL;
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mcu_type = MCU_DRTOPPEL;
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/* there's code which falls through from the fixed ROM to bank #2, I have to */
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/* copy it there otherwise the CPU bank switching support will not catch it. */
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memcpy(&RAM[0x08000],&RAM[0x18000],0x4000);
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/* drtoppel writes to the palette RAM area even if it has PROMs! We have to patch it out. */
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/* drtoppel writes to the palette RAM area even if it has PROMs! We have to patch it out. */
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memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf800, 0xfbff, 0, 0, SMH_NOP);
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memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf800, 0xfbff, 0, 0, SMH_NOP);
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}
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}
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@ -561,26 +543,15 @@ DRIVER_INIT( chukatai )
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DRIVER_INIT( tnzs )
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DRIVER_INIT( tnzs )
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{
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{
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UINT8 *RAM = memory_region(machine, "main");
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mcu_type = MCU_TNZS;
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mcu_type = MCU_TNZS;
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/* there's code which falls through from the fixed ROM to bank #7, I have to */
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/* copy it there otherwise the CPU bank switching support will not catch it. */
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memcpy(&RAM[0x08000],&RAM[0x2c000],0x4000);
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/* we need to install a kludge to avoid problems with a bug in the original code */
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/* we need to install a kludge to avoid problems with a bug in the original code */
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memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
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memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
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}
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}
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DRIVER_INIT( tnzsb )
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DRIVER_INIT( tnzsb )
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{
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{
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UINT8 *RAM = memory_region(machine, "main");
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mcu_type = MCU_NONE_TNZSB;
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mcu_type = MCU_NONE_TNZSB;
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/* there's code which falls through from the fixed ROM to bank #7, I have to */
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/* copy it there otherwise the CPU bank switching support will not catch it. */
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memcpy(&RAM[0x08000],&RAM[0x2c000],0x4000);
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/* we need to install a kludge to avoid problems with a bug in the original code */
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/* we need to install a kludge to avoid problems with a bug in the original code */
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memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
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memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
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}
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}
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