dsp56k: Remove the not required direct update handler [O. Galibert]

This commit is contained in:
Olivier Galibert 2015-06-23 09:03:06 +02:00
parent 5293b3d468
commit d42056a7c4
5 changed files with 5 additions and 65 deletions

View File

@ -108,7 +108,7 @@ const device_type DSP56156 = &device_creator<dsp56k_device>;
* Internal Memory Maps
****************************************************************************/
static ADDRESS_MAP_START( dsp56156_program_map, AS_PROGRAM, 16, dsp56k_device )
AM_RANGE(0x0000,0x07ff) AM_READWRITE(program_r, program_w) /* 1-5 */
AM_RANGE(0x0000,0x07ff) AM_RAM AM_SHARE("dsk56k_program_ram") /* 1-5 */
// AM_RANGE(0x2f00,0x2fff) AM_ROM /* 1-5 PROM reserved memory. Is this the right spot for it? */
ADDRESS_MAP_END
@ -122,25 +122,10 @@ dsp56k_device::dsp56k_device(const machine_config &mconfig, const char *tag, dev
: cpu_device(mconfig, DSP56156, "DSP56156", tag, owner, clock, "dsp56156", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1, ADDRESS_MAP_NAME(dsp56156_program_map))
, m_data_config("data", ENDIANNESS_LITTLE, 16, 16, -1, ADDRESS_MAP_NAME(dsp56156_x_data_map))
, m_program_ram(*this, "dsk56k_program_ram")
{
}
/***************************************************************************
Direct Update Handler
***************************************************************************/
DIRECT_UPDATE_MEMBER( dsp56k_device::dsp56k_direct_handler )
{
if (address <= (0x07ff<<1))
{
direct.explicit_configure(0x0000<<1, 0x07ff<<1, (0x07ff<<1) | 1, m_dsp56k_core.program_ram);
return ~0;
}
return address;
}
/***************************************************************************
MEMORY ACCESSORS
***************************************************************************/
@ -255,6 +240,7 @@ void dsp56k_device::device_start()
memset(&m_dsp56k_core, 0, sizeof(m_dsp56k_core));
m_dsp56k_core.device = this;
m_dsp56k_core.program_ram = m_program_ram;
/* Call specific module inits */
pcu_init(&m_dsp56k_core, this);
@ -292,16 +278,11 @@ void dsp56k_device::device_start()
save_item(NAME(m_dsp56k_core.HI.bootstrap_offset));
save_item(NAME(m_dsp56k_core.peripheral_ram));
save_item(NAME(m_dsp56k_core.program_ram));
m_dsp56k_core.program = &space(AS_PROGRAM);
m_dsp56k_core.direct = &m_dsp56k_core.program->direct();
m_dsp56k_core.data = &space(AS_DATA);
/* Setup the direct memory handler for this CPU */
/* NOTE: Be sure to grab this guy and call him if you ever install another direct_update_hander in a driver! */
m_dsp56k_core.program->set_direct_update_handler(direct_update_delegate(FUNC(dsp56k_device::dsp56k_direct_handler), this));
state_add(DSP56K_PC, "PC", m_dsp56k_core.PCU.pc).formatstr("%04X");
state_add(DSP56K_SR, "SR", m_dsp56k_core.PCU.sr).formatstr("%04X");
state_add(DSP56K_LC, "LC", m_dsp56k_core.PCU.lc).formatstr("%04X");

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@ -195,7 +195,7 @@ struct dsp56k_core
address_space *data;
UINT16 peripheral_ram[0x40];
UINT16 program_ram[0x800];
UINT16 *program_ram;
};
@ -204,7 +204,6 @@ class dsp56k_device : public cpu_device
public:
dsp56k_device(const machine_config &mconfig, const char *_tag, device_t *_owner, UINT32 _clock);
DECLARE_DIRECT_UPDATE_MEMBER(dsp56k_direct_handler);
DECLARE_READ16_MEMBER( program_r );
DECLARE_WRITE16_MEMBER( program_w );
DECLARE_READ16_MEMBER( peripheral_register_r );
@ -244,6 +243,7 @@ protected:
private:
address_space_config m_program_config;
address_space_config m_data_config;
required_shared_ptr<UINT16> m_program_ram;
dsp56k_core m_dsp56k_core;

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@ -488,16 +488,6 @@ void dsp56k_io_reset(dsp56k_core* cpustate)
} // namespace DSP56K
READ16_MEMBER( dsp56k_device::program_r )
{
return m_dsp56k_core.program_ram[offset];
}
WRITE16_MEMBER( dsp56k_device::program_w )
{
m_dsp56k_core.program_ram[offset] = data;
}
/* Work */
READ16_MEMBER( dsp56k_device::peripheral_register_r )
{

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@ -314,30 +314,6 @@ READ16_MEMBER(polygonet_state::dsp56k_bootload_r)
return 0x7fff;
}
DIRECT_UPDATE_MEMBER(polygonet_state::plygonet_dsp56k_direct_handler)
{
/* Call the dsp's update handler first */
if (!m_dsp56k_update_handler.isnull())
{
if (m_dsp56k_update_handler(direct, address) == ~0)
return ~0;
}
/* If the requested region wasn't in there, see if it needs to be caught driver-side */
if (address >= (0x7000<<1) && address <= (0x7fff<<1))
{
direct.explicit_configure(0x7000<<1, 0x7fff<<1, (0xfff<<1) | 1, m_dsp56k_p_mirror);
return ~0;
}
else if (address >= (0x8000<<1) && address <= (0x87ff<<1))
{
direct.explicit_configure(0x8000<<1, 0x87ff<<1, (0x7ff<<1) | 1, m_dsp56k_p_8000);
return ~0;
}
return address;
}
/* The dsp56k's Port C Data register (0xffe3) :
Program code (function 4e) configures it as general purpose output I/O pins (ffc1 = 0000 & ffc3 = 0fff).
@ -756,10 +732,6 @@ DRIVER_INIT_MEMBER(polygonet_state,polygonet)
memset(m_dsp56k_bank02_ram, 0, sizeof(m_dsp56k_bank02_ram));
memset(m_dsp56k_shared_ram_16, 0, sizeof(m_dsp56k_shared_ram_16));
memset(m_dsp56k_bank04_ram, 0, sizeof(m_dsp56k_bank04_ram));
/* The dsp56k occasionally executes out of mapped memory */
address_space &space = machine().device<dsp56k_device>("dsp")->space(AS_PROGRAM);
m_dsp56k_update_handler = space.set_direct_update_handler(direct_update_delegate(FUNC(polygonet_state::plygonet_dsp56k_direct_handler), this));
}

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@ -48,8 +48,6 @@ public:
UINT8 m_sys0;
UINT8 m_sys1;
direct_update_delegate m_dsp56k_update_handler;
/* TTL text plane stuff */
int m_ttl_gfx_index;
tilemap_t *m_ttl_tilemap;
@ -95,7 +93,6 @@ public:
DECLARE_WRITE32_MEMBER(polygonet_ttl_ram_w);
DECLARE_READ32_MEMBER(polygonet_roz_ram_r);
DECLARE_WRITE32_MEMBER(polygonet_roz_ram_w);
DIRECT_UPDATE_MEMBER(plygonet_dsp56k_direct_handler);
DECLARE_DRIVER_INIT(polygonet);
TILE_GET_INFO_MEMBER(ttl_get_tile_info);
TILE_GET_INFO_MEMBER(roz_get_tile_info);