Checkpoint

This commit is contained in:
Angelo Salese 2012-09-12 14:27:13 +00:00
parent 60d69c180f
commit d45cd973c1
3 changed files with 70 additions and 9 deletions

View File

@ -1,6 +1,8 @@
/*************************************************************************** /***************************************************************************
Template for skeleton device Seibu COP protection device
(this header needs expanding)
***************************************************************************/ ***************************************************************************/
@ -16,6 +18,10 @@ Template for skeleton device
// device type definition // device type definition
const device_type SEIBU_COP = &device_creator<seibu_cop_device>; const device_type SEIBU_COP = &device_creator<seibu_cop_device>;
#if 0
static ADDRESS_MAP_START( seibu_cop_vram, AS_0, 16, seibu_cop_device )
ADDRESS_MAP_END
#endif
//************************************************************************** //**************************************************************************
// LIVE DEVICE // LIVE DEVICE
@ -86,11 +92,60 @@ void seibu_cop_device::device_reset()
// READ/WRITE HANDLERS // READ/WRITE HANDLERS
//************************************************************************** //**************************************************************************
READ8_MEMBER( seibu_cop_device::read ) READ16_MEMBER( seibu_cop_device::read )
{ {
return 0; return 0;
} }
WRITE8_MEMBER( seibu_cop_device::write ) WRITE16_MEMBER( seibu_cop_device::write )
{ {
switch(offset)
{
case 0x028/2:
COMBINE_DATA(&m_dma_fill_val_lo);
m_dma_fill_val = (m_dma_fill_val_lo) | (m_dma_fill_val_hi << 16);
break;
case 0x02a/2:
COMBINE_DATA(&m_dma_fill_val_hi);
m_dma_fill_val = (m_dma_fill_val_lo) | (m_dma_fill_val_hi << 16);
break;
case (0x05a/2): COMBINE_DATA(&m_pal_brightness_val); break;
case (0x05c/2): COMBINE_DATA(&m_pal_brightness_mode); break;
case 0x074/2:
/*
This sets up a DMA mode of some sort
0x0e00: grainbow, cupsoc
0x0a00: legionna, godzilla, denjinmk
0x0600: heatbrl
0x1e00: zeroteam, xsedae
raiden2 and raidendx doesn't set this up, this could indicate that this is related to the non-private buffer DMAs
(both only uses 0x14 and 0x15 as DMAs)
*/
COMBINE_DATA(&m_dma_unk_param);
break;
case (0x076/2):
COMBINE_DATA(&m_cop_dma_fade_table);
break;
case (0x078/2): /* DMA source address */
COMBINE_DATA(&m_cop_dma_src[m_cop_dma_trigger]);
break;
case (0x07a/2): /* DMA length */
COMBINE_DATA(&m_cop_dma_size[m_cop_dma_trigger]);
break;
case (0x07c/2): /* DMA destination */
COMBINE_DATA(&m_cop_dma_dst[m_cop_dma_trigger]);
break;
case (0x07e/2): /* DMA parameter */
COMBINE_DATA(&m_cop_dma_exec_param);
m_cop_dma_trigger = m_cop_dma_exec_param & 7;
break;
}
} }

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@ -44,8 +44,8 @@ public:
seibu_cop_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); seibu_cop_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// I/O operations // I/O operations
DECLARE_WRITE8_MEMBER( write ); DECLARE_WRITE16_MEMBER( write );
DECLARE_READ8_MEMBER( read ); DECLARE_READ16_MEMBER( read );
protected: protected:
// device-level overrides // device-level overrides
@ -57,6 +57,12 @@ protected:
private: private:
devcb_resolved_read8 m_in_mreq_func; devcb_resolved_read8 m_in_mreq_func;
devcb_resolved_write8 m_out_mreq_func; devcb_resolved_write8 m_out_mreq_func;
UINT16 m_dma_unk_param, m_cop_dma_fade_table, m_cop_dma_src[8], m_cop_dma_dst[8], m_cop_dma_size[8], m_cop_dma_exec_param;
UINT8 m_cop_dma_trigger;
UINT16 m_dma_fill_val_lo,m_dma_fill_val_hi;
UINT32 m_dma_fill_val;
UINT8 m_pal_brightness_val, m_pal_brightness_mode;
}; };

View File

@ -1542,7 +1542,7 @@ static WRITE16_HANDLER( seibu_common_video_regs_w )
case (0x026/2): { state->m_scrollram16[3] = seibu_vregs[offset]; break; } case (0x026/2): { state->m_scrollram16[3] = seibu_vregs[offset]; break; }
case (0x028/2): { state->m_scrollram16[4] = seibu_vregs[offset]; break; } case (0x028/2): { state->m_scrollram16[4] = seibu_vregs[offset]; break; }
case (0x02a/2): { state->m_scrollram16[5] = seibu_vregs[offset]; break; } case (0x02a/2): { state->m_scrollram16[5] = seibu_vregs[offset]; break; }
// case (0x03a/2): Godzilla sets this up to be 0x1ef / 0x1eb, presumably bit 2 is vertical wrap-around on/off?
default: { logerror("seibu_common_video_regs_w unhandled offset %02x %04x\n",offset*2,data); break; } default: { logerror("seibu_common_video_regs_w unhandled offset %02x %04x\n",offset*2,data); break; }
} }
} }
@ -2630,11 +2630,11 @@ static WRITE16_HANDLER( generic_cop_w )
// return; // return;
address = (cop_dma_src[cop_dma_trigger] << 6); address = (cop_dma_src[cop_dma_trigger] << 6);
length = ((cop_dma_size[cop_dma_trigger]+1) << 4); length = ((cop_dma_size[cop_dma_trigger]+1) << 5);
for (i=address;i<address+length;i+=4) for (i=address;i<address+length;i+=2)
{ {
space->write_dword(i, fill_val); space->write_word(i, fill_val);
} }
return; return;