From d4b702bf336152d2bc81de92d7a6cf036caf8fce Mon Sep 17 00:00:00 2001 From: Aaron Giles Date: Sun, 22 Jun 2008 01:40:28 +0000 Subject: [PATCH] 01900: All sets in kinst.c: Mass coin input disables dipswitch access, and thus further coin input during a fight --- src/emu/cpu/mips/mips3com.c | 12 +++++------- src/emu/cpu/mips/mips3drc.c | 2 +- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/src/emu/cpu/mips/mips3com.c b/src/emu/cpu/mips/mips3com.c index 97969495ed7..8d11d53c2b8 100644 --- a/src/emu/cpu/mips/mips3com.c +++ b/src/emu/cpu/mips/mips3com.c @@ -170,16 +170,14 @@ offs_t mips3com_dasm(mips3_state *mips, char *buffer, offs_t pc, const UINT8 *op void mips3com_update_cycle_counting(mips3_state *mips) { /* modify the timer to go off */ - if ((mips->cpr[0][COP0_Status] & SR_IMEX5) && mips->cpr[0][COP0_Compare] != 0xffffffff) + if (mips->cpr[0][COP0_Status] & SR_IMEX5) { UINT32 count = (activecpu_gettotalcycles() - mips->count_zero_time) / 2; UINT32 compare = mips->cpr[0][COP0_Compare]; - if (compare > count) - { - attotime newtime = ATTOTIME_IN_CYCLES(((INT64)(compare - count) * 2), cpu_getactivecpu()); - timer_adjust_oneshot(mips->compare_int_timer, newtime, cpu_getactivecpu()); - return; - } + UINT32 delta = compare - count; + attotime newtime = ATTOTIME_IN_CYCLES(((UINT64)delta * 2), cpu_getactivecpu()); + timer_adjust_oneshot(mips->compare_int_timer, newtime, cpu_getactivecpu()); + return; } timer_adjust_oneshot(mips->compare_int_timer, attotime_never, cpu_getactivecpu()); } diff --git a/src/emu/cpu/mips/mips3drc.c b/src/emu/cpu/mips/mips3drc.c index 8c9b380eadc..19b5b7c4e52 100644 --- a/src/emu/cpu/mips/mips3drc.c +++ b/src/emu/cpu/mips/mips3drc.c @@ -2739,7 +2739,7 @@ static int generate_set_cop0_reg(drcuml_block *block, compiler_state *compiler, generate_update_cycles(block, compiler, IMM(desc->pc), !in_delay_slot); // UML_MOV(block, IREG(1), CPR032(COP0_Status)); // mov i1,[Status] UML_MOV(block, CPR032(COP0_Status), IREG(0)); // mov [Status],i0 - generate_update_mode(block); + generate_update_mode(block); // UML_XOR(block, IREG(0), IREG(0), IREG(1)); // xor i0,i0,i1 UML_TEST(block, IREG(0), IMM(0x8000)); // test i0,0x8000 UML_CALLCc(block, IF_NZ, mips3com_update_cycle_counting, mips3); // callc mips3com_update_cycle_counting,mips.core,NZ