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ymmu*: invert lcd edge,

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h8_port: write hi-z output pins as 1
This commit is contained in:
hap 2024-03-12 01:13:15 +01:00
parent 8f5259ee6f
commit d50c07b4f2
11 changed files with 33 additions and 57 deletions
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2
src/devices/cpu/h8/h8_port.cpp
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@ -85,7 +85,7 @@ u8 h8_port_device::odr_r()
void h8_port_device::update_output()
{
u8 data = m_dr & m_ddr & ~m_mask;
u8 data = (m_dr | ~m_ddr) & ~m_mask;
u8 ddr = m_ddr & ~m_mask; // 0-bits = hi-z
u16 res = ddr << 8 | data;

20
src/mame/namco/namcos12.cpp
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@ -1178,9 +1178,9 @@ protected:
uint8_t s12_mcu_portB_r();
void s12_mcu_portB_w(uint8_t data);
uint8_t s12_mcu_p6_r();
uint16_t iob_p4_r();
uint16_t iob_p6_r();
void iob_p4_w(uint16_t data);
uint8_t iob_p4_r();
uint8_t iob_p6_r();
void iob_p4_w(uint8_t data);
required_device<psxcpu_device> m_maincpu;
required_device<ram_device> m_ram;
@ -1212,9 +1212,7 @@ private:
uint32_t m_ttt_val[2];
uint8_t m_sub_porta;
uint8_t m_sub_portb;
uint8_t m_jvssense;
uint8_t m_tssio_port_4;
void sharedram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t sharedram_r(offs_t offset, uint16_t mem_mask = ~0);
@ -1627,8 +1625,6 @@ void namcos12_state::machine_reset()
bankoffset_w(0,0,0xffff);
m_jvssense = 1;
m_tssio_port_4 = 0;
m_has_tektagt_dma = 0;
}
@ -1877,20 +1873,18 @@ void namcos12_state::jvsmap(address_map &map)
map(0xc000, 0xfb7f).ram();
}
uint16_t namcos12_state::iob_p4_r()
uint8_t namcos12_state::iob_p4_r()
{
return m_tssio_port_4;
return 0;
}
void namcos12_state::iob_p4_w(uint16_t data)
void namcos12_state::iob_p4_w(uint8_t data)
{
m_tssio_port_4 = data;
// bit 2 = SENSE line back to main (0 = asserted, 1 = dropped)
m_jvssense = (data & 0x04) ? 0 : 1;
}
uint16_t namcos12_state::iob_p6_r()
uint8_t namcos12_state::iob_p6_r()
{
// d4 is service button
uint8_t sb = (m_service_io->read() & 1) << 4;

6
src/mame/namco/namcos23.cpp
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@ -1818,7 +1818,6 @@ private:
uint8_t m_sub_port8;
uint8_t m_sub_porta;
uint8_t m_sub_portb;
uint8_t m_tssio_port_4;
output_finder<8> m_lamps;
};
@ -3331,13 +3330,11 @@ void namcos23_state::s23h8rwmap(address_map &map)
uint8_t namcos23_state::iob_p4_r()
{
return m_tssio_port_4;
return 0;
}
void namcos23_state::iob_p4_w(uint8_t data)
{
m_tssio_port_4 = data;
// bit 2 = SENSE line back to main (0 = asserted, 1 = dropped)
m_jvssense = (data & 0x04) ? 0 : 1;
}
@ -3759,7 +3756,6 @@ void namcos23_state::init_s23()
m_sub_port8 = 0x02;
m_sub_porta = 0;
m_sub_portb = 0x50;
m_tssio_port_4 = 0;
m_subcpu_running = false;
m_render.count[0] = m_render.count[1] = 0;
m_render.cur = 0;

6
src/mame/saitek/gk2000.cpp
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@ -89,7 +89,7 @@ private:
void p2_w(u8 data);
u8 p4_r();
void p5_w(offs_t offset, u8 data, u8 mem_mask);
void p5_w(u8 data);
};
void gk2000_state::machine_start()
@ -198,10 +198,8 @@ u8 gk2000_state::p4_r()
return ~data;
}
void gk2000_state::p5_w(offs_t offset, u8 data, u8 mem_mask)
void gk2000_state::p5_w(u8 data)
{
data |= ~mem_mask;
// P50: speaker out
m_dac->write(data & 1);

2
src/mame/yamaha/ymmu100.cpp
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@ -337,7 +337,7 @@ u8 mu100_state::p1_r()
void mu100_state::p2_w(u8 data)
{
// LCD enable edge
if(!(m_cur_p2 & P2_LCD_ENABLE) && (data & P2_LCD_ENABLE)) {
if((m_cur_p2 & P2_LCD_ENABLE) && !(data & P2_LCD_ENABLE)) {
if(!(m_cur_p2 & P2_LCD_RW)) {
if(m_cur_p2 & P2_LCD_RS)
m_lcd->data_write(m_cur_p1);

22
src/mame/yamaha/ymmu128.cpp
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@ -60,17 +60,17 @@ private:
virtual void machine_start() override;
virtual void machine_reset() override;
u16 pe_r();
void pe_w(u16 data);
};
void mu128_state::machine_start()
{
save_item(NAME(m_pe));
m_pe = 0;
}
void mu128_state::machine_reset()
{
}
@ -107,16 +107,16 @@ u16 mu128_state::pe_r()
void mu128_state::pe_w(u16 data)
{
u16 prev = m_pe;
m_pe = data;
if(BIT(m_pe, 4) && !BIT(prev, 4)) {
if(!BIT(m_pe, 0)) {
if(BIT(m_pe, 2))
m_lcd->data_write(m_pe >> 8);
if(BIT(m_pe, 4) && !BIT(data, 4)) {
if(!BIT(data, 0)) {
if(BIT(data, 2))
m_lcd->data_write(data >> 8);
else
m_lcd->control_write(m_pe >> 8);
m_lcd->control_write(data >> 8);
}
}
}
m_pe = data;
}
void mu128_state::map(address_map &map)

2
src/mame/yamaha/ymmu15.cpp
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@ -109,7 +109,7 @@ u16 mu15_state::adc_battery_r()
void mu15_state::p6_w(u8 data)
{
data ^= P6_LCD_ENABLE;
if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) {
if((cur_p6 & P6_LCD_ENABLE) && !(data & P6_LCD_ENABLE)) {
if(!(cur_p6 & P6_LCD_RW)) {
if(cur_p6 & P6_LCD_RS)
m_lcd->data_write(cur_pa);

2
src/mame/yamaha/ymmu50.cpp
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@ -160,7 +160,7 @@ u16 mu50_state::adc_battery_r()
void mu50_state::p6_w(u8 data)
{
data ^= P6_LCD_ENABLE;
if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) {
if((cur_p6 & P6_LCD_ENABLE) && !(data & P6_LCD_ENABLE)) {
if(!(cur_p6 & P6_LCD_RW)) {
if(cur_p6 & P6_LCD_RS)
m_lcd->data_write(cur_pa);

14
src/mame/yamaha/ymmu80.cpp
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@ -178,18 +178,6 @@ public:
void mu80(machine_config &config);
private:
enum {
P2_LCD_RS = 0x01,
P2_LCD_RW = 0x02,
P2_LCD_ENABLE = 0x04
};
enum {
P6_LCD_RS = 0x04,
P6_LCD_RW = 0x02,
P6_LCD_ENABLE = 0x01
};
enum {
PA_LCD_RS = 0x02,
PA_LCD_ENABLE = 0x20,
@ -310,7 +298,7 @@ u8 mu80_state::p6_r()
void mu80_state::pa_w(u8 data)
{
data ^= PA_LCD_ENABLE;
if(!(cur_pa & PA_LCD_ENABLE) && (data & PA_LCD_ENABLE)) {
if((cur_pa & PA_LCD_ENABLE) && !(data & PA_LCD_ENABLE)) {
if(!(cur_pa & PA_LCD_RW)) {
if(cur_pa & PA_LCD_RS)
m_lcd->data_write(cur_pb);

2
src/mame/yamaha/ymmu90.cpp
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@ -175,7 +175,7 @@ void mu90_state::pa_w(u8 data)
logerror("ad2 input level %s\n", cur_pb & 0x40 ? "line" : "mic");
}
if(!(cur_pa & 0x20) && (data & 0x20)) {
if((cur_pa & 0x20) && !(data & 0x20)) {
if(!(cur_pa & 0x40)) {
if(cur_pa & 0x02)
m_lcd->data_write(cur_pb);

12
src/mame/yamaha/ymvl70.cpp
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@ -123,12 +123,12 @@ u16 vl70_state::adc_breath_r()
void vl70_state::p6_w(u8 data)
{
if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) {
if(!(cur_p6 & P6_LCD_RW)) {
if(cur_p6 & P6_LCD_RS)
m_lcd->data_write(cur_pa);
else
m_lcd->control_write(cur_pa);
if((cur_p6 & P6_LCD_ENABLE) && !(data & P6_LCD_ENABLE)) {
if(!(cur_p6 & P6_LCD_RW)) {
if(cur_p6 & P6_LCD_RS)
m_lcd->data_write(cur_pa);
else
m_lcd->control_write(cur_pa);
}
}