various drivers: simplified some more handlers (nw)

This commit is contained in:
Ivan Vangelista 2020-05-14 21:01:52 +02:00
parent 24b1f64a70
commit d53adb01e3
40 changed files with 234 additions and 247 deletions

View File

@ -154,7 +154,7 @@ WRITE8_MEMBER(scv_rom32ram8_device::write_cart)
m_ram[offset & 0x1fff] = data;
}
WRITE8_MEMBER(scv_rom32ram8_device::write_bank)
void scv_rom32ram8_device::write_bank(uint8_t data)
{
m_ram_enabled = BIT(data, 5);
}
@ -165,7 +165,7 @@ READ8_MEMBER(scv_rom64_device::read_cart)
return m_rom[offset + (m_bank_base * 0x8000)];
}
WRITE8_MEMBER(scv_rom64_device::write_bank)
void scv_rom64_device::write_bank(uint8_t data)
{
m_bank_base = BIT(data, 5);
}
@ -176,7 +176,7 @@ READ8_MEMBER(scv_rom128_device::read_cart)
return m_rom[offset + (m_bank_base * 0x8000)];
}
WRITE8_MEMBER(scv_rom128_device::write_bank)
void scv_rom128_device::write_bank(uint8_t data)
{
m_bank_base = (data >> 5) & 0x03;
}
@ -196,7 +196,7 @@ WRITE8_MEMBER(scv_rom128ram4_device::write_cart)
m_ram[offset & 0xfff] = data;
}
WRITE8_MEMBER(scv_rom128ram4_device::write_bank)
void scv_rom128ram4_device::write_bank(uint8_t data)
{
m_bank_base = (data >> 5) & 0x03;
m_ram_enabled = BIT(data, 6);

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@ -65,7 +65,7 @@ public:
// reading and writing
virtual DECLARE_READ8_MEMBER(read_cart) override;
virtual DECLARE_WRITE8_MEMBER(write_cart) override;
virtual DECLARE_WRITE8_MEMBER(write_bank) override;
virtual void write_bank(uint8_t data) override;
protected:
// device-level overrides
@ -91,7 +91,7 @@ public:
// reading and writing
virtual DECLARE_READ8_MEMBER(read_cart) override;
virtual DECLARE_WRITE8_MEMBER(write_bank) override;
virtual void write_bank(uint8_t data) override;
private:
uint8_t m_bank_base;
@ -108,7 +108,7 @@ public:
// reading and writing
virtual DECLARE_READ8_MEMBER(read_cart) override;
virtual DECLARE_WRITE8_MEMBER(write_bank) override;
virtual void write_bank(uint8_t data) override;
protected:
// device-level overrides
@ -131,7 +131,7 @@ public:
// reading and writing
virtual DECLARE_READ8_MEMBER(read_cart) override;
virtual DECLARE_WRITE8_MEMBER(write_cart) override;
virtual DECLARE_WRITE8_MEMBER(write_bank) override;
virtual void write_bank(uint8_t data) override;
protected:
// device-level overrides

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@ -284,8 +284,8 @@ WRITE8_MEMBER(scv_cart_slot_device::write_cart)
write_bank
-------------------------------------------------*/
WRITE8_MEMBER(scv_cart_slot_device::write_bank)
void scv_cart_slot_device::write_bank(uint8_t data)
{
if (m_cart)
m_cart->write_bank(space, offset, data);
m_cart->write_bank(data);
}

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@ -37,7 +37,7 @@ public:
// reading and writing
virtual DECLARE_READ8_MEMBER(read_cart) { return 0xff; }
virtual DECLARE_WRITE8_MEMBER(write_cart) { }
virtual DECLARE_WRITE8_MEMBER(write_bank) { }
virtual void write_bank(uint8_t data) { }
void rom_alloc(uint32_t size, const char *tag);
void ram_alloc(uint32_t size);
@ -103,7 +103,7 @@ public:
// reading and writing
virtual DECLARE_READ8_MEMBER(read_cart);
virtual DECLARE_WRITE8_MEMBER(write_cart);
virtual DECLARE_WRITE8_MEMBER(write_bank);
virtual void write_bank(uint8_t data);
protected:
// device-level overrides

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@ -259,13 +259,13 @@ void i8087_device::execute()
m_timer->adjust(attotime::from_hz((m_icount ? m_icount : 1) * clock()));
}
WRITE32_MEMBER(i8087_device::insn_w)
void i8087_device::insn_w(uint32_t data)
{
m_ppc = m_pc;
m_pc = data;
}
WRITE32_MEMBER(i8087_device::addr_w)
void i8087_device::addr_w(uint32_t data)
{
m_ea = data;
execute();

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@ -19,8 +19,8 @@ public:
auto irq() { return m_int_handler.bind(); }
auto busy() { return m_busy_handler.bind(); }
DECLARE_WRITE32_MEMBER(insn_w); // the real 8087 sniffs the bus watching for esc, can't do that here so provide a poke spot
DECLARE_WRITE32_MEMBER(addr_w);
void insn_w(uint32_t data); // the real 8087 sniffs the bus watching for esc, can't do that here so provide a poke spot
void addr_w(uint32_t data);
protected:
i8087_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);

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@ -26,7 +26,7 @@
/* Memory Maps */
READ8_MEMBER( advision_state::rom_r )
uint8_t advision_state::rom_r(offs_t offset)
{
offset += 0x400;
return m_cart->read_rom(offset & 0xfff);

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@ -83,7 +83,7 @@ private:
// screen updates
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_WRITE8_MEMBER(bank_w);
void bank_w(uint8_t data);
DECLARE_READ8_MEMBER(irq_source_r);
DECLARE_WRITE8_MEMBER(irq_source_w);
DECLARE_READ8_MEMBER(palette_r);
@ -92,11 +92,11 @@ private:
DECLARE_WRITE8_MEMBER(vram_w);
DECLARE_READ8_MEMBER(vram_bank_r);
DECLARE_WRITE8_MEMBER(vram_bank_w);
DECLARE_WRITE8_MEMBER(mux_w);
void mux_w(uint8_t data);
DECLARE_READ8_MEMBER(in_mux_r);
DECLARE_READ8_MEMBER(in_mux_type_r);
DECLARE_WRITE8_MEMBER(output_w);
DECLARE_WRITE8_MEMBER(lamps_w);
void lamps_w(uint8_t data);
DECLARE_WRITE8_MEMBER(watchdog_w);
TIMER_DEVICE_CALLBACK_MEMBER(dblcrown_irq_scanline);
@ -169,7 +169,7 @@ uint32_t dblcrown_state::screen_update( screen_device &screen, bitmap_ind16 &bit
return 0;
}
WRITE8_MEMBER( dblcrown_state::bank_w)
void dblcrown_state::bank_w(uint8_t data)
{
m_bank = data;
membank("rom_bank")->set_entry(m_bank & 0x1f);
@ -251,7 +251,7 @@ WRITE8_MEMBER( dblcrown_state::vram_bank_w)
printf("vram bank = %02x\n",data);
}
WRITE8_MEMBER( dblcrown_state::mux_w)
void dblcrown_state::mux_w(uint8_t data)
{
m_mux_data = data;
}
@ -305,7 +305,7 @@ WRITE8_MEMBER( dblcrown_state::output_w )
}
WRITE8_MEMBER( dblcrown_state::lamps_w )
void dblcrown_state::lamps_w(uint8_t data)
{
/* bits
7654 3210

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@ -123,8 +123,8 @@ private:
DECLARE_WRITE_LINE_MEMBER(write_brgb);
DECLARE_WRITE_LINE_MEMBER(write_brgc);
DECLARE_WRITE8_MEMBER(ksm_ppi_porta_w);
DECLARE_WRITE8_MEMBER(ksm_ppi_portc_w);
void ksm_ppi_porta_w(uint8_t data);
void ksm_ppi_portc_w(uint8_t data);
void ksm_io(address_map &map);
void ksm_mem(address_map &map);
@ -247,13 +247,13 @@ void ksm_state::video_start()
m_brg = timer_alloc(TIMER_ID_BRG);
}
WRITE8_MEMBER(ksm_state::ksm_ppi_porta_w)
void ksm_state::ksm_ppi_porta_w(uint8_t data)
{
LOG("PPI port A line %d\n", data);
m_video.line = data;
}
WRITE8_MEMBER(ksm_state::ksm_ppi_portc_w)
void ksm_state::ksm_ppi_portc_w(uint8_t data)
{
brgc = (data >> 5) & 3;

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@ -148,8 +148,8 @@ private:
DECLARE_WRITE_LINE_MEMBER(dreq0_ck_w);
DECLARE_WRITE_LINE_MEMBER( epc_dma_hrq_changed );
DECLARE_WRITE_LINE_MEMBER( epc_dma8237_out_eop );
DECLARE_READ8_MEMBER( epc_dma_read_byte );
DECLARE_WRITE8_MEMBER( epc_dma_write_byte );
uint8_t epc_dma_read_byte(offs_t offset);
void epc_dma_write_byte(offs_t offset, uint8_t data);
template <int Channel> uint8_t epc_dma8237_io_r(offs_t offset);
template <int Channel> void epc_dma8237_io_w(offs_t offset, uint8_t data);
template <int Channel> DECLARE_WRITE_LINE_MEMBER(epc_dack_w);
@ -164,8 +164,8 @@ private:
// PPI
required_device<i8255_device> m_ppi8255;
DECLARE_WRITE8_MEMBER(ppi_portb_w);
DECLARE_READ8_MEMBER(ppi_portc_r);
void ppi_portb_w(uint8_t data);
uint8_t ppi_portc_r();
uint8_t m_ppi_portb;
required_ioport m_io_dsw;
required_ioport m_io_j10;
@ -695,7 +695,7 @@ WRITE_LINE_MEMBER(epc_state::speaker_ck_w)
*
**********************************************************/
READ8_MEMBER( epc_state::ppi_portc_r )
uint8_t epc_state::ppi_portc_r()
{
uint8_t data;
@ -710,7 +710,7 @@ READ8_MEMBER( epc_state::ppi_portc_r )
return data;
}
WRITE8_MEMBER( epc_state::ppi_portb_w )
void epc_state::ppi_portb_w(uint8_t data)
{
LOGPPI("PPI Port B write: %02x\n", data);
LOGPPI(" PB0 - Enable beeper : %d\n", (data & 0x01) ? 1 : 0);
@ -987,7 +987,7 @@ WRITE_LINE_MEMBER( epc_state::epc_dma_hrq_changed )
}
READ8_MEMBER( epc_state::epc_dma_read_byte )
uint8_t epc_state::epc_dma_read_byte(offs_t offset)
{
if ((m_dma_active & 0x0f) == 0)
{
@ -999,7 +999,7 @@ READ8_MEMBER( epc_state::epc_dma_read_byte )
return m_maincpu->space(AS_PROGRAM).read_byte(offset | u32(m_dma_segment[seg]) << 16);
}
WRITE8_MEMBER( epc_state::epc_dma_write_byte )
void epc_state::epc_dma_write_byte(offs_t offset, uint8_t data)
{
if ((m_dma_active & 0x0f) == 0)
{

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@ -77,10 +77,10 @@ private:
DECLARE_FLOPPY_FORMATS( floppy_formats );
DECLARE_WRITE8_MEMBER(mirage_via_write_porta);
DECLARE_WRITE8_MEMBER(mirage_via_write_portb);
void mirage_via_write_porta(uint8_t data);
void mirage_via_write_portb(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(mirage_doc_irq);
DECLARE_READ8_MEMBER(mirage_adc_read);
uint8_t mirage_adc_read();
void mirage_map(address_map &map);
@ -109,7 +109,7 @@ WRITE_LINE_MEMBER(enmirage_state::mirage_doc_irq)
// m_maincpu->set_input_line(M6809_IRQ_LINE, state);
}
READ8_MEMBER(enmirage_state::mirage_adc_read)
uint8_t enmirage_state::mirage_adc_read()
{
return 0x00;
}
@ -137,7 +137,7 @@ void enmirage_state::mirage_map(address_map &map)
// bits 0-2: column select from 0-7
// bits 3/4 = right and left LED enable
// bits 5/6/7 keypad rows 0/1/2 return
WRITE8_MEMBER(enmirage_state::mirage_via_write_porta)
void enmirage_state::mirage_via_write_porta(uint8_t data)
{
u8 segdata = data & 7;
m_display->matrix(((data >> 3) & 3) ^ 3, (1<<segdata));
@ -151,7 +151,7 @@ WRITE8_MEMBER(enmirage_state::mirage_via_write_porta)
// bit 1: OUT upper/lower bank (64k halves)
// bit 0: OUT bank 0/bank 1 (32k halves)
WRITE8_MEMBER(enmirage_state::mirage_via_write_portb)
void enmirage_state::mirage_via_write_portb(uint8_t data)
{
int bank = 0;

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@ -164,7 +164,7 @@ READ32_MEMBER(eolith_state::hidctch3_pen_r)
*
*************************************/
WRITE8_MEMBER( eolith_state::sound_p1_w )
void eolith_state::sound_p1_w(uint8_t data)
{
// .... xxxx - Data ROM bank (32kB)
// ...x .... - Unknown (Usually 1?)
@ -191,13 +191,13 @@ WRITE8_MEMBER( eolith_state::sound_p1_w )
P37 (O) RDB (/RD)
*/
READ8_MEMBER( eolith_state::qs1000_p1_r )
uint8_t eolith_state::qs1000_p1_r()
{
// Sound banking? (must be 1)
return 1;
}
WRITE8_MEMBER( eolith_state::qs1000_p1_w )
void eolith_state::qs1000_p1_w(uint8_t data)
{
}
@ -208,7 +208,7 @@ WRITE8_MEMBER( eolith_state::qs1000_p1_w )
*
*************************************/
WRITE8_MEMBER(eolith_state::soundcpu_to_qs1000)
void eolith_state::soundcpu_to_qs1000(uint8_t data)
{
m_qs1000->serial_in(data);
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(250));

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@ -421,9 +421,9 @@ private:
DECLARE_WRITE8_MEMBER(mapper_w);
DECLARE_WRITE8_MEMBER(analog_w);
DECLARE_WRITE8_MEMBER(duart_output);
void duart_output(uint8_t data);
DECLARE_READ8_MEMBER(esq1_adc_read);
uint8_t esq1_adc_read();
DECLARE_READ8_MEMBER(es5503_sample_r);
@ -453,7 +453,7 @@ void esq1_state::sq80_es5503_map(address_map &map)
map(0x000000, 0x1ffff).r(FUNC(esq1_state::es5503_sample_r));
}
READ8_MEMBER(esq1_state::esq1_adc_read)
uint8_t esq1_state::esq1_adc_read()
{
return m_adc_value[m_adc_target];
}
@ -560,7 +560,7 @@ void esq1_state::sq80_map(address_map &map)
// OP5 = metronome hi
// OP6/7 = tape out
WRITE8_MEMBER(esq1_state::duart_output)
void esq1_state::duart_output(uint8_t data)
{
int bank = m_adc_target = ((data >> 1) & 0x7);
// printf("DP [%02x]: %d mlo %d mhi %d tape %d\n", data, data&1, (data>>4)&1, (data>>5)&1, (data>>6)&3);

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@ -248,13 +248,13 @@ private:
DECLARE_READ16_MEMBER(lower_r);
DECLARE_WRITE16_MEMBER(lower_w);
DECLARE_READ16_MEMBER(analog_r);
DECLARE_WRITE16_MEMBER(analog_w);
uint16_t analog_r();
void analog_w(offs_t offset, uint16_t data);
DECLARE_WRITE_LINE_MEMBER(duart_irq_handler);
DECLARE_WRITE_LINE_MEMBER(duart_tx_a);
DECLARE_WRITE_LINE_MEMBER(duart_tx_b);
DECLARE_WRITE8_MEMBER(duart_output);
void duart_output(uint8_t data);
void es5505_clock_changed(u32 data);
@ -470,13 +470,13 @@ void esq5505_state::es5505_clock_changed(u32 data)
m_pump->set_unscaled_clock(data);
}
WRITE16_MEMBER(esq5505_state::analog_w)
void esq5505_state::analog_w(offs_t offset, uint16_t data)
{
offset &= 0x7;
m_analog_values[offset] = data;
}
READ16_MEMBER(esq5505_state::analog_r)
uint16_t esq5505_state::analog_r()
{
return m_analog_values[m_duart_io & 7];
}
@ -495,7 +495,7 @@ WRITE_LINE_MEMBER(esq5505_state::duart_irq_handler)
update_irq_to_maincpu();
}
WRITE8_MEMBER(esq5505_state::duart_output)
void esq5505_state::duart_output(uint8_t data)
{
floppy_image_device *floppy = m_floppy_connector ? m_floppy_connector->get_device() : nullptr;

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@ -75,7 +75,7 @@ private:
virtual void machine_reset() override;
DECLARE_WRITE_LINE_MEMBER(esq5506_otto_irq);
DECLARE_READ16_MEMBER(esq5506_read_adc);
u16 esq5506_read_adc();
void es5506_clock_changed(u32 data);
void asr_map(address_map &map);
@ -107,7 +107,7 @@ WRITE_LINE_MEMBER(esqasr_state::esq5506_otto_irq)
{
}
READ16_MEMBER(esqasr_state::esq5506_read_adc)
u16 esqasr_state::esq5506_read_adc()
{
return 0;
}

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@ -134,13 +134,13 @@ private:
DECLARE_WRITE_LINE_MEMBER(duart_irq_handler);
DECLARE_WRITE_LINE_MEMBER(duart_tx_a);
DECLARE_WRITE_LINE_MEMBER(duart_tx_b);
DECLARE_WRITE8_MEMBER(duart_output);
void duart_output(u8 data);
u8 m_duart_io;
bool m_bCalibSecondByte;
DECLARE_WRITE_LINE_MEMBER(esq5506_otto_irq);
DECLARE_READ16_MEMBER(esq5506_read_adc);
u16 esq5506_read_adc();
void es5506_clock_changed(u32 data);
void kt_map(address_map &map);
void ts_map(address_map &map);
@ -190,7 +190,7 @@ WRITE_LINE_MEMBER(esqkt_state::esq5506_otto_irq)
#endif
}
READ16_MEMBER(esqkt_state::esq5506_read_adc)
u16 esqkt_state::esq5506_read_adc()
{
switch ((m_duart_io & 7) ^ 7)
{
@ -224,7 +224,7 @@ WRITE_LINE_MEMBER(esqkt_state::duart_irq_handler)
m_maincpu->set_input_line(M68K_IRQ_3, state);
}
WRITE8_MEMBER(esqkt_state::duart_output)
void esqkt_state::duart_output(u8 data)
{
m_duart_io = data;

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@ -231,7 +231,7 @@ private:
virtual void machine_reset() override;
DECLARE_WRITE_LINE_MEMBER(esq5506_otto_irq);
DECLARE_READ16_MEMBER(esq5506_read_adc);
u16 esq5506_read_adc();
DECLARE_WRITE_LINE_MEMBER(duart_tx_a);
DECLARE_WRITE_LINE_MEMBER(duart_tx_b);
@ -265,7 +265,7 @@ WRITE_LINE_MEMBER(esqmr_state::esq5506_otto_irq)
{
}
READ16_MEMBER(esqmr_state::esq5506_read_adc)
u16 esqmr_state::esq5506_read_adc()
{
return 0;
}

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@ -122,20 +122,20 @@ private:
DECLARE_READ32_MEMBER(bballoon_speedup_r);
DECLARE_READ32_MEMBER(touryuu_port_10000000_r);
DECLARE_WRITE8_MEMBER(qs1000_p1_w);
DECLARE_WRITE8_MEMBER(qs1000_p2_w);
DECLARE_WRITE8_MEMBER(qs1000_p3_w);
void qs1000_p1_w(uint8_t data);
void qs1000_p2_w(uint8_t data);
void qs1000_p3_w(uint8_t data);
int m_rom_pagesize;
virtual void machine_start() override;
virtual void machine_reset() override;
DECLARE_READ32_MEMBER(s3c2410_gpio_port_r);
DECLARE_WRITE32_MEMBER(s3c2410_gpio_port_w);
DECLARE_READ32_MEMBER(s3c2410_core_pin_r);
DECLARE_WRITE8_MEMBER(s3c2410_nand_command_w );
DECLARE_WRITE8_MEMBER(s3c2410_nand_address_w );
DECLARE_READ8_MEMBER(s3c2410_nand_data_r );
DECLARE_WRITE8_MEMBER(s3c2410_nand_data_w );
uint32_t s3c2410_gpio_port_r(offs_t offset);
void s3c2410_gpio_port_w(offs_t offset, uint32_t data);
uint32_t s3c2410_core_pin_r(offs_t offset);
void s3c2410_nand_command_w(uint8_t data);
void s3c2410_nand_address_w(uint8_t data);
uint8_t s3c2410_nand_data_r();
void s3c2410_nand_data_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(s3c2410_i2c_scl_w );
DECLARE_READ_LINE_MEMBER(s3c2410_i2c_sda_r );
DECLARE_WRITE_LINE_MEMBER(s3c2410_i2c_sda_w );
@ -168,15 +168,15 @@ NAND Flash Controller (4KB internal buffer)
24-ch external interrupts Controller (Wake-up source 16-ch)
*/
WRITE8_MEMBER( ghosteo_state::qs1000_p1_w )
void ghosteo_state::qs1000_p1_w(uint8_t data)
{
}
WRITE8_MEMBER( ghosteo_state::qs1000_p2_w )
void ghosteo_state::qs1000_p2_w(uint8_t data)
{
}
WRITE8_MEMBER( ghosteo_state::qs1000_p3_w )
void ghosteo_state::qs1000_p3_w(uint8_t data)
{
// .... .xxx - Data ROM bank (64kB)
// ...x .... - ?
@ -193,7 +193,7 @@ WRITE8_MEMBER( ghosteo_state::qs1000_p3_w )
static const uint8_t security_data[] = { 0x01, 0xC4, 0xFF, 0x22, 0xFF, 0xFF, 0xFF, 0xFF };
READ32_MEMBER(ghosteo_state::s3c2410_gpio_port_r)
uint32_t ghosteo_state::s3c2410_gpio_port_r(offs_t offset)
{
uint32_t data = m_bballoon_port[offset];
switch (offset)
@ -213,7 +213,7 @@ READ32_MEMBER(ghosteo_state::s3c2410_gpio_port_r)
return data;
}
WRITE32_MEMBER(ghosteo_state::s3c2410_gpio_port_w)
void ghosteo_state::s3c2410_gpio_port_w(offs_t offset, uint32_t data)
{
uint32_t old_value = m_bballoon_port[offset];
m_bballoon_port[offset] = data;
@ -258,7 +258,7 @@ NCON : NAND flash memory address step selection
*/
READ32_MEMBER(ghosteo_state::s3c2410_core_pin_r)
uint32_t ghosteo_state::s3c2410_core_pin_r(offs_t offset)
{
int data = 0;
switch (offset)
@ -272,7 +272,7 @@ READ32_MEMBER(ghosteo_state::s3c2410_core_pin_r)
// NAND
WRITE8_MEMBER(ghosteo_state::s3c2410_nand_command_w )
void ghosteo_state::s3c2410_nand_command_w(uint8_t data)
{
struct nand_t &nand = m_nand;
#if NAND_LOG
@ -296,7 +296,7 @@ WRITE8_MEMBER(ghosteo_state::s3c2410_nand_command_w )
}
}
WRITE8_MEMBER(ghosteo_state::s3c2410_nand_address_w )
void ghosteo_state::s3c2410_nand_address_w(uint8_t data)
{
struct nand_t &nand = m_nand;
#if NAND_LOG
@ -330,7 +330,7 @@ WRITE8_MEMBER(ghosteo_state::s3c2410_nand_address_w )
}
}
READ8_MEMBER(ghosteo_state::s3c2410_nand_data_r )
uint8_t ghosteo_state::s3c2410_nand_data_r()
{
struct nand_t &nand = m_nand;
uint8_t data = 0;
@ -376,7 +376,7 @@ READ8_MEMBER(ghosteo_state::s3c2410_nand_data_r )
return data;
}
WRITE8_MEMBER(ghosteo_state::s3c2410_nand_data_w )
void ghosteo_state::s3c2410_nand_data_w(uint8_t data)
{
#if NAND_LOG
logerror( "s3c2410_nand_data_w %02X\n", data);

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@ -173,7 +173,7 @@ WRITE8_MEMBER( hx20_state::lcd_data_w )
// main_p1_r - main CPU port 1 read
//-------------------------------------------------
READ8_MEMBER( hx20_state::main_p1_r )
uint8_t hx20_state::main_p1_r()
{
/*
@ -210,7 +210,7 @@ READ8_MEMBER( hx20_state::main_p1_r )
// main_p1_w - main CPU port 1 write
//-------------------------------------------------
WRITE8_MEMBER( hx20_state::main_p1_w )
void hx20_state::main_p1_w(uint8_t data)
{
/*
@ -233,7 +233,7 @@ WRITE8_MEMBER( hx20_state::main_p1_w )
// main_p2_r - main CPU port 2 read
//-------------------------------------------------
READ8_MEMBER( hx20_state::main_p2_r )
uint8_t hx20_state::main_p2_r()
{
/*
@ -268,7 +268,7 @@ READ8_MEMBER( hx20_state::main_p2_r )
// main_p2_w - main CPU port 2 write
//-------------------------------------------------
WRITE8_MEMBER( hx20_state::main_p2_w )
void hx20_state::main_p2_w(uint8_t data)
{
/*
@ -302,7 +302,7 @@ WRITE8_MEMBER( hx20_state::main_p2_w )
// slave_p1_r - slave CPU port 1 read
//-------------------------------------------------
READ8_MEMBER( hx20_state::slave_p1_r )
uint8_t hx20_state::slave_p1_r()
{
/*
@ -329,7 +329,7 @@ READ8_MEMBER( hx20_state::slave_p1_r )
// slave_p1_w - slave CPU port 1 write
//-------------------------------------------------
WRITE8_MEMBER( hx20_state::slave_p1_w )
void hx20_state::slave_p1_w(uint8_t data)
{
/*
@ -355,7 +355,7 @@ WRITE8_MEMBER( hx20_state::slave_p1_w )
// slave_p2_r - slave CPU port 2 read
//-------------------------------------------------
READ8_MEMBER( hx20_state::slave_p2_r )
uint8_t hx20_state::slave_p2_r()
{
/*
@ -385,7 +385,7 @@ READ8_MEMBER( hx20_state::slave_p2_r )
// slave_p2_w - slave CPU port 2 write
//-------------------------------------------------
WRITE8_MEMBER( hx20_state::slave_p2_w )
void hx20_state::slave_p2_w(uint8_t data)
{
/*
@ -411,7 +411,7 @@ WRITE8_MEMBER( hx20_state::slave_p2_w )
// slave_p3_r - slave CPU port 3 read
//-------------------------------------------------
READ8_MEMBER( hx20_state::slave_p3_r )
uint8_t hx20_state::slave_p3_r()
{
/*
@ -438,7 +438,7 @@ READ8_MEMBER( hx20_state::slave_p3_r )
// slave_p3_w - slave CPU port 3 write
//-------------------------------------------------
WRITE8_MEMBER( hx20_state::slave_p3_w )
void hx20_state::slave_p3_w(uint8_t data)
{
/*
@ -467,7 +467,7 @@ WRITE8_MEMBER( hx20_state::slave_p3_w )
// slave_p4_r - slave CPU port 4 read
//-------------------------------------------------
READ8_MEMBER( hx20_state::slave_p4_r )
uint8_t hx20_state::slave_p4_r()
{
/*
@ -497,7 +497,7 @@ READ8_MEMBER( hx20_state::slave_p4_r )
// slave_p4_w - slave CPU port 4 write
//-------------------------------------------------
WRITE8_MEMBER( hx20_state::slave_p4_w )
void hx20_state::slave_p4_w(uint8_t data)
{
/*

View File

@ -48,10 +48,10 @@ public:
void junior(machine_config &config);
private:
DECLARE_READ8_MEMBER(junior_riot_a_r);
DECLARE_READ8_MEMBER(junior_riot_b_r);
DECLARE_WRITE8_MEMBER(junior_riot_a_w);
DECLARE_WRITE8_MEMBER(junior_riot_b_w);
uint8_t junior_riot_a_r();
uint8_t junior_riot_b_r();
void junior_riot_a_w(uint8_t data);
void junior_riot_b_w(uint8_t data);
virtual void machine_start() override;
virtual void machine_reset() override;
@ -136,7 +136,7 @@ INPUT_PORTS_END
READ8_MEMBER( junior_state::junior_riot_a_r )
uint8_t junior_state::junior_riot_a_r()
{
uint8_t data = 0xff;
@ -154,7 +154,7 @@ READ8_MEMBER( junior_state::junior_riot_a_r )
}
READ8_MEMBER( junior_state::junior_riot_b_r )
uint8_t junior_state::junior_riot_b_r()
{
if ( m_port_b & 0x20 )
return 0xFF;
@ -164,7 +164,7 @@ READ8_MEMBER( junior_state::junior_riot_b_r )
}
WRITE8_MEMBER( junior_state::junior_riot_a_w )
void junior_state::junior_riot_a_w(uint8_t data)
{
uint8_t idx = ( m_port_b >> 1 ) & 0x0f;
@ -178,7 +178,7 @@ WRITE8_MEMBER( junior_state::junior_riot_a_w )
}
WRITE8_MEMBER( junior_state::junior_riot_b_w )
void junior_state::junior_riot_b_w(uint8_t data)
{
uint8_t idx = ( data >> 1 ) & 0x0f;

View File

@ -57,13 +57,13 @@ public:
DECLARE_INPUT_CHANGED_MEMBER(coin_inserted);
private:
DECLARE_READ8_MEMBER(mcu_porta_r);
DECLARE_WRITE8_MEMBER(mcu_porta_w);
DECLARE_WRITE8_MEMBER(mcu_portb_w);
DECLARE_WRITE8_MEMBER(mcu_portc_w);
DECLARE_READ8_MEMBER(pia_pa_r);
DECLARE_READ8_MEMBER(pia_pb_r);
WRITE8_MEMBER(pia_pb_w) { mmu(data); }
uint8_t mcu_porta_r();
void mcu_porta_w(uint8_t data);
void mcu_portb_w(uint8_t data);
void mcu_portc_w(uint8_t data);
uint8_t pia_pa_r();
uint8_t pia_pb_r();
void pia_pb_w(uint8_t data) { mmu(data); }
WRITE_LINE_MEMBER(pia_cb2_w) { } // This is used by Floppy drive on Atari 8bits Home Computers
TIMER_DEVICE_CALLBACK_MEMBER(mf_interrupt);
@ -123,7 +123,7 @@ void maxaflex_state::mmu(uint8_t new_mmu)
7 (out) AUDIO
*/
READ8_MEMBER(maxaflex_state::mcu_porta_r)
uint8_t maxaflex_state::mcu_porta_r()
{
return
((m_dsw->read() << 0) & 0x0f) |
@ -132,7 +132,7 @@ READ8_MEMBER(maxaflex_state::mcu_porta_r)
0xc0;
}
WRITE8_MEMBER(maxaflex_state::mcu_porta_w)
void maxaflex_state::mcu_porta_w(uint8_t data)
{
m_speaker->level_w(BIT(data, 7));
}
@ -148,7 +148,7 @@ WRITE8_MEMBER(maxaflex_state::mcu_porta_w)
7 (out) TOFF - enables/disables user controls
*/
WRITE8_MEMBER(maxaflex_state::mcu_portb_w)
void maxaflex_state::mcu_portb_w(uint8_t data)
{
const uint8_t diff = data ^ m_portb_out;
m_portb_out = data;
@ -180,7 +180,7 @@ WRITE8_MEMBER(maxaflex_state::mcu_portb_w)
2 (out) lamp START
3 (out) lamp OVER */
WRITE8_MEMBER(maxaflex_state::mcu_portc_w)
void maxaflex_state::mcu_portc_w(uint8_t data)
{
/* uses a 7447A, which is equivalent to an LS47/48 */
constexpr static uint8_t ls48_map[16] =
@ -283,12 +283,12 @@ static INPUT_PORTS_START( a600xl )
INPUT_PORTS_END
READ8_MEMBER(maxaflex_state::pia_pa_r)
uint8_t maxaflex_state::pia_pa_r()
{
return atari_input_disabled() ? 0xff : m_joy01.read_safe(0);
}
READ8_MEMBER(maxaflex_state::pia_pb_r)
uint8_t maxaflex_state::pia_pb_r()
{
return atari_input_disabled() ? 0xff : m_joy23.read_safe(0);
}

View File

@ -97,8 +97,8 @@ private:
DECLARE_WRITE8_MEMBER(pic_w);
IRQ_CALLBACK_MEMBER(ms6102_int_ack);
DECLARE_READ8_MEMBER(memory_read_byte);
DECLARE_WRITE8_MEMBER(vdack_w);
u8 memory_read_byte(offs_t offset);
void vdack_w(u8 data);
DECLARE_READ8_MEMBER(crtc_r);
DECLARE_WRITE8_MEMBER(crtc_w);
@ -106,7 +106,7 @@ private:
DECLARE_READ8_MEMBER(misc_status_r);
u16 m_dmaaddr;
DECLARE_WRITE8_MEMBER(kbd_uart_clock_w);
void kbd_uart_clock_w(u8 data);
required_shared_ptr<uint8_t> m_p_videoram;
required_device<i8080_cpu_device> m_maincpu;
@ -175,7 +175,7 @@ WRITE_LINE_MEMBER(ms6102_state::irq_w)
m_maincpu->set_input_line(I8085_INTR_LINE, ASSERT_LINE);
}
READ8_MEMBER(ms6102_state::memory_read_byte)
u8 ms6102_state::memory_read_byte(offs_t offset)
{
m_dmaaddr = offset;
return m_maincpu->space(AS_PROGRAM).read_byte(offset);
@ -219,7 +219,7 @@ READ8_MEMBER(ms6102_state::misc_status_r)
return status;
}
WRITE8_MEMBER(ms6102_state::kbd_uart_clock_w)
void ms6102_state::kbd_uart_clock_w(u8 data)
{
m_kbd_uart->write_tcp(BIT(data, 1));
m_kbd_uart->write_rcp(BIT(data, 1));
@ -236,7 +236,7 @@ WRITE8_MEMBER(ms6102_state::pic_w)
m_pic->b_sgs_w(~data);
}
WRITE8_MEMBER(ms6102_state::vdack_w)
void ms6102_state::vdack_w(u8 data)
{
if(m_dmaaddr & 1)
m_crtc1->dack_w(data);

View File

@ -104,12 +104,10 @@ private:
DECLARE_WRITE8_MEMBER( prom_sel_w );
DECLARE_WRITE8_MEMBER( cmos_sel_w );
DECLARE_WRITE_LINE_MEMBER( qx10_upd765_interrupt );
DECLARE_READ8_MEMBER( fdc_dma_r );
DECLARE_WRITE8_MEMBER( fdc_dma_w );
DECLARE_WRITE8_MEMBER( fdd_motor_w );
DECLARE_READ8_MEMBER( qx10_30_r );
DECLARE_READ8_MEMBER( gdc_dack_r );
DECLARE_WRITE8_MEMBER( gdc_dack_w );
uint8_t gdc_dack_r();
void gdc_dack_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER( tc_w );
DECLARE_READ8_MEMBER( mc146818_r );
DECLARE_WRITE8_MEMBER( mc146818_w );
@ -119,8 +117,8 @@ private:
DECLARE_WRITE8_MEMBER( vram_bank_w );
DECLARE_READ16_MEMBER( vram_r );
DECLARE_WRITE16_MEMBER( vram_w );
DECLARE_READ8_MEMBER(memory_read_byte);
DECLARE_WRITE8_MEMBER(memory_write_byte);
uint8_t memory_read_byte(offs_t offset);
void memory_write_byte(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER(keyboard_clk);
DECLARE_WRITE_LINE_MEMBER(keyboard_irq);
@ -298,17 +296,6 @@ void qx10_state::update_memory_mapping()
}
}
READ8_MEMBER( qx10_state::fdc_dma_r )
{
return m_fdc->dma_r();
}
WRITE8_MEMBER( qx10_state::fdc_dma_w )
{
m_fdc->dma_w(data);
}
WRITE8_MEMBER( qx10_state::qx10_18_w )
{
m_membank = (data >> 4) & 0x0f;
@ -423,13 +410,13 @@ WRITE_LINE_MEMBER(qx10_state::dma_hrq_changed)
m_dma_1->hack_w(state);
}
READ8_MEMBER( qx10_state::gdc_dack_r )
uint8_t qx10_state::gdc_dack_r()
{
logerror("GDC DACK read\n");
return 0;
}
WRITE8_MEMBER( qx10_state::gdc_dack_w )
void qx10_state::gdc_dack_w(uint8_t data)
{
logerror("GDC DACK write %02x\n", data);
}
@ -446,13 +433,13 @@ WRITE_LINE_MEMBER( qx10_state::tc_w )
Channel 2: GDC
Channel 3: Option slots
*/
READ8_MEMBER(qx10_state::memory_read_byte)
uint8_t qx10_state::memory_read_byte(offs_t offset)
{
address_space& prog_space = m_maincpu->space(AS_PROGRAM);
return prog_space.read_byte(offset);
}
WRITE8_MEMBER(qx10_state::memory_write_byte)
void qx10_state::memory_write_byte(offs_t offset, uint8_t data)
{
address_space& prog_space = m_maincpu->space(AS_PROGRAM);
return prog_space.write_byte(offset, data);
@ -796,10 +783,10 @@ void qx10_state::qx10(machine_config &config)
m_dma_1->out_eop_callback().set(FUNC(qx10_state::tc_w));
m_dma_1->in_memr_callback().set(FUNC(qx10_state::memory_read_byte));
m_dma_1->out_memw_callback().set(FUNC(qx10_state::memory_write_byte));
m_dma_1->in_ior_callback<0>().set(FUNC(qx10_state::fdc_dma_r));
m_dma_1->in_ior_callback<0>().set(m_fdc, FUNC(upd765a_device::dma_r));
m_dma_1->in_ior_callback<1>().set(FUNC(qx10_state::gdc_dack_r));
//m_dma_1->in_ior_callback<2>().set(m_hgdc, FUNC(upd7220_device::dack_r));
m_dma_1->out_iow_callback<0>().set(FUNC(qx10_state::fdc_dma_w));
m_dma_1->out_iow_callback<0>().set(m_fdc, FUNC(upd765a_device::dma_w));
m_dma_1->out_iow_callback<1>().set(FUNC(qx10_state::gdc_dack_w));
//m_dma_1->out_iow_callback<2>().set(m_hgdc, FUNC(upd7220_device::dack_w));
AM9517A(config, m_dma_2, MAIN_CLK/4);

View File

@ -85,13 +85,13 @@ private:
u16 m_grid = 0;
u16 m_plate = 0;
DECLARE_WRITE8_MEMBER(hmcs40_write_r);
DECLARE_WRITE16_MEMBER(hmcs40_write_d);
DECLARE_READ16_MEMBER(hmcs40_read_d);
void hmcs40_write_r(offs_t offset, u8 data);
void hmcs40_write_d(u16 data);
u16 hmcs40_read_d();
DECLARE_WRITE16_MEMBER(tms1k_write_r);
DECLARE_WRITE16_MEMBER(tms1k_write_o);
DECLARE_READ8_MEMBER(tms1k_read_k);
void tms1k_write_r(u16 data);
void tms1k_write_o(u16 data);
u8 tms1k_read_k();
};
void sag_state::machine_start()
@ -206,7 +206,7 @@ void sag_state::speaker_w(int state)
// cartridge type 1: HD38800
WRITE8_MEMBER(sag_state::hmcs40_write_r)
void sag_state::hmcs40_write_r(offs_t offset, u8 data)
{
// R0x-R3x: vfd plate
int shift = offset * 4;
@ -214,7 +214,7 @@ WRITE8_MEMBER(sag_state::hmcs40_write_r)
update_display();
}
WRITE16_MEMBER(sag_state::hmcs40_write_d)
void sag_state::hmcs40_write_d(u16 data)
{
// D0: speaker out
speaker_w(data & 1);
@ -224,7 +224,7 @@ WRITE16_MEMBER(sag_state::hmcs40_write_d)
update_display();
}
READ16_MEMBER(sag_state::hmcs40_read_d)
u16 sag_state::hmcs40_read_d()
{
// D13-D15: multiplexed inputs
return input_r() << 13;
@ -233,7 +233,7 @@ READ16_MEMBER(sag_state::hmcs40_read_d)
// cartridge type 2: TMS1670
WRITE16_MEMBER(sag_state::tms1k_write_r)
void sag_state::tms1k_write_r(u16 data)
{
// R0: speaker out
speaker_w(data & 1);
@ -245,14 +245,14 @@ WRITE16_MEMBER(sag_state::tms1k_write_r)
update_display();
}
WRITE16_MEMBER(sag_state::tms1k_write_o)
void sag_state::tms1k_write_o(u16 data)
{
// O0-O7: vfd plate 4-11
m_plate = (m_plate & 0xf) | data << 4;
update_display();
}
READ8_MEMBER(sag_state::tms1k_read_k)
u8 sag_state::tms1k_read_k()
{
// K1-K4: multiplexed inputs
return input_r();

View File

@ -41,10 +41,10 @@ protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
private:
DECLARE_WRITE8_MEMBER(porta_w);
DECLARE_READ8_MEMBER(portb_r);
DECLARE_READ8_MEMBER(portc_r);
DECLARE_WRITE8_MEMBER(portc_w);
void porta_w(uint8_t data);
uint8_t portb_r();
uint8_t portc_r();
void portc_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(upd1771_ack_w);
void scv_palette(palette_device &palette) const;
uint32_t screen_update_scv(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -174,13 +174,13 @@ static INPUT_PORTS_START( scv )
INPUT_PORTS_END
WRITE8_MEMBER( scv_state::porta_w )
void scv_state::porta_w(uint8_t data)
{
m_porta = data;
}
READ8_MEMBER( scv_state::portb_r )
uint8_t scv_state::portb_r()
{
uint8_t data = 0xff;
@ -194,7 +194,7 @@ READ8_MEMBER( scv_state::portb_r )
}
READ8_MEMBER( scv_state::portc_r )
uint8_t scv_state::portc_r()
{
uint8_t data = m_portc;
@ -204,11 +204,11 @@ READ8_MEMBER( scv_state::portc_r )
}
WRITE8_MEMBER( scv_state::portc_w )
void scv_state::portc_w(uint8_t data)
{
//logerror("%04x: scv_portc_w: data = 0x%02x\n", m_maincpu->pc(), data );
m_portc = data;
m_cart->write_bank(space, 0, m_portc);
m_cart->write_bank(m_portc);
m_upd1771c->pcm_write(m_portc & 0x08);
}

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@ -51,23 +51,23 @@ private:
DECLARE_READ8_MEMBER(vram_r);
DECLARE_WRITE32_MEMBER(vega_misc_w);
DECLARE_READ32_MEMBER(vegaeo_custom_read);
DECLARE_WRITE8_MEMBER(qs1000_p1_w);
DECLARE_WRITE8_MEMBER(qs1000_p2_w);
DECLARE_WRITE8_MEMBER(qs1000_p3_w);
void qs1000_p1_w(uint8_t data);
void qs1000_p2_w(uint8_t data);
void qs1000_p3_w(uint8_t data);
uint32_t screen_update_vega(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void vega_map(address_map &map);
};
WRITE8_MEMBER( vegaeo_state::qs1000_p1_w )
void vegaeo_state::qs1000_p1_w(uint8_t data)
{
}
WRITE8_MEMBER( vegaeo_state::qs1000_p2_w )
void vegaeo_state::qs1000_p2_w(uint8_t data)
{
}
WRITE8_MEMBER( vegaeo_state::qs1000_p3_w )
void vegaeo_state::qs1000_p3_w(uint8_t data)
{
// .... .xxx - Data ROM bank (64kB)
// ...x .... - ?

View File

@ -397,7 +397,7 @@ READ8_MEMBER(witch_state::gfx1_cram_r)
return m_gfx1_cram[offset];
}
READ8_MEMBER(witch_state::read_a000)
uint8_t witch_state::read_a000()
{
switch (m_reg_a002 & 0x3f)
{
@ -413,7 +413,7 @@ READ8_MEMBER(witch_state::read_a000)
}
}
WRITE8_MEMBER(witch_state::write_a002)
void witch_state::write_a002(uint8_t data)
{
//A002 bit 7&6 = m_bank ????
m_reg_a002 = data;
@ -421,7 +421,7 @@ WRITE8_MEMBER(witch_state::write_a002)
m_mainbank->set_entry((data >> 6) & 3);
}
WRITE8_MEMBER(keirinou_state::write_keirinou_a002)
void keirinou_state::write_keirinou_a002(uint8_t data)
{
uint8_t new_bg_bank;
m_reg_a002 = data;
@ -437,7 +437,7 @@ WRITE8_MEMBER(keirinou_state::write_keirinou_a002)
// m_mainbank->set_entry((data >> 6) & 3);
}
WRITE8_MEMBER(witch_state::write_a006)
void witch_state::write_a006(uint8_t data)
{
// don't write when zeroed on reset
if (data == 0)
@ -486,7 +486,7 @@ READ8_MEMBER(witch_state::prot_read_700x)
return memregion("sub")->base()[0x7000+offset];
}
WRITE8_MEMBER(witch_state::xscroll_w)
void witch_state::xscroll_w(uint8_t data)
{
m_scrollx = data;
// need to mark tiles dirty here, as the tilemap writes are affected by scrollx, see FIX_OFFSET macro.
@ -495,7 +495,7 @@ WRITE8_MEMBER(witch_state::xscroll_w)
m_gfx1_tilemap->mark_all_dirty();
}
WRITE8_MEMBER(witch_state::yscroll_w)
void witch_state::yscroll_w(uint8_t data)
{
m_scrolly = data;
}

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@ -49,18 +49,18 @@ public:
void vh_write(int data);
void vh_update(int x);
DECLARE_READ8_MEMBER( rom_r );
DECLARE_READ8_MEMBER( ext_ram_r );
DECLARE_WRITE8_MEMBER( ext_ram_w );
DECLARE_READ8_MEMBER( controller_r );
DECLARE_WRITE8_MEMBER( bankswitch_w );
DECLARE_WRITE8_MEMBER( av_control_w );
uint8_t rom_r(offs_t offset);
uint8_t ext_ram_r(offs_t offset);
void ext_ram_w(offs_t offset, uint8_t data);
uint8_t controller_r();
void bankswitch_w(uint8_t data);
void av_control_w(uint8_t data);
DECLARE_READ_LINE_MEMBER( vsync_r );
TIMER_CALLBACK_MEMBER( sound_cmd_sync );
DECLARE_READ8_MEMBER( sound_cmd_r );
DECLARE_WRITE8_MEMBER( sound_g_w );
DECLARE_WRITE8_MEMBER( sound_d_w );
uint8_t sound_cmd_r();
void sound_g_w(uint8_t data);
void sound_d_w(uint8_t data);
memory_region *m_cart_rom;

View File

@ -120,11 +120,11 @@ private:
DECLARE_WRITE_LINE_MEMBER(coin2_interrupt_clear_w);
DECLARE_WRITE_LINE_MEMBER(coin3_interrupt_clear_w);
DECLARE_WRITE_LINE_MEMBER(coin4_interrupt_clear_w);
DECLARE_WRITE8_MEMBER(pia_0_port_a_w);
DECLARE_WRITE8_MEMBER(pia_0_port_b_w);
DECLARE_READ8_MEMBER(pia_0_port_b_r);
DECLARE_READ8_MEMBER(pia_1_port_a_r);
DECLARE_READ8_MEMBER(pia_1_port_b_r);
void pia_0_port_a_w(uint8_t data);
void pia_0_port_b_w(uint8_t data);
uint8_t pia_0_port_b_r();
uint8_t pia_1_port_a_r();
uint8_t pia_1_port_b_r();
DECLARE_WRITE_LINE_MEMBER(ttl7474_2s_1_q_cb);
DECLARE_WRITE_LINE_MEMBER(ttl7474_2s_2_q_cb);
DECLARE_WRITE_LINE_MEMBER(ttl7474_2u_1_q_cb);
@ -132,7 +132,7 @@ private:
DECLARE_WRITE_LINE_MEMBER(ls153_za_w);
DECLARE_WRITE_LINE_MEMBER(ls153_zb_w);
DECLARE_WRITE8_MEMBER(ttl74148_3s_cb);
void ttl74148_3s_cb(uint8_t data);
void timer_tick();
void remap_sprite_code(int bank, int code, int *remapped_code, int *flipy);

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@ -60,10 +60,10 @@ private:
template<int Player> DECLARE_READ32_MEMBER(hidctch3_pen_r);
DECLARE_WRITE16_MEMBER(eolith_vram_w);
DECLARE_READ16_MEMBER(eolith_vram_r);
DECLARE_WRITE8_MEMBER(sound_p1_w);
DECLARE_READ8_MEMBER(qs1000_p1_r);
DECLARE_WRITE8_MEMBER(qs1000_p1_w);
DECLARE_WRITE8_MEMBER(soundcpu_to_qs1000);
void sound_p1_w(uint8_t data);
uint8_t qs1000_p1_r();
void qs1000_p1_w(uint8_t data);
void soundcpu_to_qs1000(uint8_t data);
DECLARE_MACHINE_RESET(eolith);
DECLARE_VIDEO_START(eolith);

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@ -35,10 +35,10 @@ private:
void hd44102ch_init(int which);
void lcd_update();
DECLARE_WRITE8_MEMBER( port_a_w );
DECLARE_READ8_MEMBER( port_b_r );
DECLARE_WRITE8_MEMBER( port_b_w );
DECLARE_READ8_MEMBER( port_c_r );
void port_a_w(uint8_t data);
uint8_t port_b_r();
void port_b_w(uint8_t data);
uint8_t port_c_r();
uint32_t screen_update_gamepock(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_WRITE_LINE_MEMBER(gamepock_to_w);
void gamepock_mem(address_map &map);

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@ -76,19 +76,19 @@ private:
DECLARE_WRITE8_MEMBER( lcd_cs_w );
DECLARE_WRITE8_MEMBER( lcd_data_w );
DECLARE_READ8_MEMBER( main_p1_r );
DECLARE_WRITE8_MEMBER( main_p1_w );
DECLARE_READ8_MEMBER( main_p2_r );
DECLARE_WRITE8_MEMBER( main_p2_w );
uint8_t main_p1_r();
void main_p1_w(uint8_t data);
uint8_t main_p2_r();
void main_p2_w(uint8_t data);
DECLARE_READ8_MEMBER( slave_p1_r );
DECLARE_WRITE8_MEMBER( slave_p1_w );
DECLARE_READ8_MEMBER( slave_p2_r );
DECLARE_WRITE8_MEMBER( slave_p2_w );
DECLARE_READ8_MEMBER( slave_p3_r );
DECLARE_WRITE8_MEMBER( slave_p3_w );
DECLARE_READ8_MEMBER( slave_p4_r );
DECLARE_WRITE8_MEMBER( slave_p4_w );
uint8_t slave_p1_r();
void slave_p1_w(uint8_t data);
uint8_t slave_p2_r();
void slave_p2_w(uint8_t data);
uint8_t slave_p3_r();
void slave_p3_w(uint8_t data);
uint8_t slave_p4_r();
void slave_p4_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER( rtc_irq_w );

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@ -113,10 +113,10 @@ private:
DECLARE_SNAPSHOT_LOAD_MEMBER(snapshot_cb);
DECLARE_QUICKLOAD_LOAD_MEMBER(quickload_cb);
DECLARE_WRITE_LINE_MEMBER(busreq_w);
DECLARE_READ8_MEMBER(memory_read_byte);
DECLARE_WRITE8_MEMBER(memory_write_byte);
DECLARE_READ8_MEMBER(io_read_byte);
DECLARE_WRITE8_MEMBER(io_write_byte);
uint8_t memory_read_byte(offs_t offset);
void memory_write_byte(offs_t offset, uint8_t data);
uint8_t io_read_byte(offs_t offset);
void io_write_byte(offs_t offset, uint8_t data);
void machine_start_common(u16 endmem);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);

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@ -51,7 +51,7 @@ private:
TIMER_CALLBACK_MEMBER(sound_command_w);
DECLARE_WRITE_LINE_MEMBER(v_irq4_w);
DECLARE_WRITE_LINE_MEMBER(v_irq3_w);
DECLARE_WRITE8_MEMBER(update_irq);
void update_irq(uint8_t data);
virtual void machine_start() override;
virtual void machine_reset() override;

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@ -62,14 +62,14 @@ public:
DECLARE_WRITE8_MEMBER(gfx1_cram_w);
DECLARE_READ8_MEMBER(gfx1_vram_r);
DECLARE_READ8_MEMBER(gfx1_cram_r);
DECLARE_READ8_MEMBER(read_a000);
DECLARE_WRITE8_MEMBER(write_a002);
DECLARE_WRITE8_MEMBER(write_a006);
uint8_t read_a000();
void write_a002(uint8_t data);
void write_a006(uint8_t data);
DECLARE_WRITE8_MEMBER(main_write_a008);
DECLARE_WRITE8_MEMBER(sub_write_a008);
DECLARE_READ8_MEMBER(prot_read_700x);
DECLARE_WRITE8_MEMBER(xscroll_w);
DECLARE_WRITE8_MEMBER(yscroll_w);
void xscroll_w(uint8_t data);
void yscroll_w(uint8_t data);
protected:
void common_map(address_map &map);
@ -129,7 +129,7 @@ private:
void keirinou_main_map(address_map &map);
void keirinou_sub_map(address_map &map);
DECLARE_WRITE8_MEMBER(write_keirinou_a002);
void write_keirinou_a002(uint8_t data);
DECLARE_WRITE8_MEMBER(palette_w);
TILE_GET_INFO_MEMBER(get_keirinou_gfx1_tile_info);

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@ -71,7 +71,7 @@ void advision_state::machine_reset()
/* Bank Switching */
WRITE8_MEMBER( advision_state::bankswitch_w )
void advision_state::bankswitch_w(uint8_t data)
{
m_ea_bank = BIT(data, 2);
m_rambank = (data & 0x03) << 8;
@ -83,7 +83,7 @@ WRITE8_MEMBER( advision_state::bankswitch_w )
/* External RAM */
READ8_MEMBER( advision_state::ext_ram_r )
uint8_t advision_state::ext_ram_r(offs_t offset)
{
uint8_t data = m_ext_ram[m_rambank + offset];
@ -98,7 +98,7 @@ READ8_MEMBER( advision_state::ext_ram_r )
return data;
}
WRITE8_MEMBER( advision_state::ext_ram_w )
void advision_state::ext_ram_w(offs_t offset, uint8_t data)
{
m_ext_ram[m_rambank + offset] = data;
}
@ -110,7 +110,7 @@ TIMER_CALLBACK_MEMBER( advision_state::sound_cmd_sync )
m_sound_cmd = param;
}
READ8_MEMBER( advision_state::sound_cmd_r )
uint8_t advision_state::sound_cmd_r()
{
return m_sound_cmd;
}
@ -121,14 +121,14 @@ void advision_state::update_dac()
m_dac->write(translate[(m_sound_g << 1) | m_sound_d]);
}
WRITE8_MEMBER( advision_state::sound_g_w )
void advision_state::sound_g_w(uint8_t data)
{
m_sound_g = data & 0x01;
update_dac();
}
WRITE8_MEMBER( advision_state::sound_d_w )
void advision_state::sound_d_w(uint8_t data)
{
m_sound_d = data & 0x01;
@ -137,7 +137,7 @@ WRITE8_MEMBER( advision_state::sound_d_w )
/* Video */
WRITE8_MEMBER( advision_state::av_control_w )
void advision_state::av_control_w(uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(advision_state::sound_cmd_sync), this), data >> 4);
@ -174,7 +174,7 @@ READ_LINE_MEMBER( advision_state::vsync_r )
/* Input */
READ8_MEMBER( advision_state::controller_r )
uint8_t advision_state::controller_r()
{
// Get joystick switches
uint8_t in = m_joy->read();

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@ -57,7 +57,7 @@
#define CAR_BORDER_EXTRA_BITS 0x50
WRITE8_MEMBER(carpolo_state::ttl74148_3s_cb)
void carpolo_state::ttl74148_3s_cb(uint8_t data)
{
m_maincpu->set_input_line(M6502_IRQ_LINE, m_ttl74148_3s->output_valid_r() ? CLEAR_LINE : ASSERT_LINE);
}
@ -333,7 +333,7 @@ WRITE_LINE_MEMBER( carpolo_state::ls153_zb_w )
m_ls153_zb = state;
}
WRITE8_MEMBER(carpolo_state::pia_0_port_a_w)
void carpolo_state::pia_0_port_a_w(uint8_t data)
{
/* bit 0 - Coin counter
bit 1 - Player 4 crash sound
@ -354,7 +354,7 @@ WRITE8_MEMBER(carpolo_state::pia_0_port_a_w)
}
WRITE8_MEMBER(carpolo_state::pia_0_port_b_w)
void carpolo_state::pia_0_port_b_w(uint8_t data)
{
/* bit 0 - Strobe speed bits sound
bit 1 - Speed bit 0 sound
@ -367,7 +367,7 @@ WRITE8_MEMBER(carpolo_state::pia_0_port_b_w)
m_ttl74153_1k->s1_w(BIT(data, 7));
}
READ8_MEMBER(carpolo_state::pia_0_port_b_r)
uint8_t carpolo_state::pia_0_port_b_r()
{
/* bit 4 - Pedal bit 0
bit 5 - Pedal bit 1 */
@ -376,7 +376,7 @@ READ8_MEMBER(carpolo_state::pia_0_port_b_r)
}
READ8_MEMBER(carpolo_state::pia_1_port_a_r)
uint8_t carpolo_state::pia_1_port_a_r()
{
uint8_t ret;
@ -399,7 +399,7 @@ READ8_MEMBER(carpolo_state::pia_1_port_a_r)
}
READ8_MEMBER(carpolo_state::pia_1_port_b_r)
uint8_t carpolo_state::pia_1_port_b_r()
{
uint8_t ret;

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@ -89,7 +89,7 @@ void gamepock_state::lcd_update()
}
WRITE8_MEMBER( gamepock_state::port_a_w )
void gamepock_state::port_a_w(uint8_t data)
{
uint8_t old_port_a = m_port_a;
@ -102,20 +102,20 @@ WRITE8_MEMBER( gamepock_state::port_a_w )
}
WRITE8_MEMBER( gamepock_state::port_b_w )
void gamepock_state::port_b_w(uint8_t data)
{
m_port_b = data;
}
READ8_MEMBER( gamepock_state::port_b_r )
uint8_t gamepock_state::port_b_r()
{
logerror("gamepock_port_b_r: not implemented\n");
return 0xFF;
}
READ8_MEMBER( gamepock_state::port_c_r )
uint8_t gamepock_state::port_c_r()
{
uint8_t data = 0xFF;

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@ -290,25 +290,25 @@ WRITE_LINE_MEMBER( sorcerer_state::busreq_w )
m_dma->bai_w(state); // tell dma that bus has been granted
}
READ8_MEMBER(sorcerer_state::memory_read_byte)
uint8_t sorcerer_state::memory_read_byte(offs_t offset)
{
address_space& prog_space = m_maincpu->space(AS_PROGRAM);
return prog_space.read_byte(offset);
}
WRITE8_MEMBER(sorcerer_state::memory_write_byte)
void sorcerer_state::memory_write_byte(offs_t offset, uint8_t data)
{
address_space& prog_space = m_maincpu->space(AS_PROGRAM);
prog_space.write_byte(offset, data);
}
READ8_MEMBER(sorcerer_state::io_read_byte)
uint8_t sorcerer_state::io_read_byte(offs_t offset)
{
address_space& prog_space = m_maincpu->space(AS_IO);
return prog_space.read_byte(offset);
}
WRITE8_MEMBER(sorcerer_state::io_write_byte)
void sorcerer_state::io_write_byte(offs_t offset, uint8_t data)
{
address_space& prog_space = m_maincpu->space(AS_IO);
prog_space.write_byte(offset, data);

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@ -19,7 +19,7 @@
*
*************************************/
WRITE8_MEMBER(vertigo_state::update_irq)
void vertigo_state::update_irq(uint8_t data)
{
if (m_irq_state < 7)
m_maincpu->set_input_line(m_irq_state ^ 7, CLEAR_LINE);