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204
docs/source/techspecs/device_disasm_interface.rst Normal file
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@ -0,0 +1,204 @@
The device_disasm_interface and the disassemblers
=================================================
1. Capabilities
---------------
The disassemblers are classes that provide disassembly and opcode
meta-information for the cpu cores and **unidasm**. The
**device_disasm_interface** connects a cpu core with its disassembler.
2. The disassemblers
--------------------
2.1. Definition
~~~~~~~~~~~~~~~
A disassembler is a class that derives from
**util::disasm_interface**. It then has two required methods to
implement, **opcode_alignment** and **disassemble**, and 6 optional,
**interface_flags**, **page_address_bits**, **pc_linear_to_real**,
**pc_real_to_linear**, and one with four possible variants,
**decrypt8/16/32/64**.
2.2. opcode_alignment
~~~~~~~~~~~~~~~~~~~~~
| u32 \ **opcode_alignment**\ () const
Returns the required alignment of opcodes by the cpu, in PC-units. In
other words, the required alignment for the PC register of the cpu.
Tends to be 1 (almost everything), 2 (68000...), 4 (mips, ppc...),
which an exceptional 8 (tms 32082 parallel processor) and 16
(tms32010, instructions are 16-bits aligned and the PC targets bits).
It must be a power-of-two or things will break.
Note that processors like the tms32031 which have 32-bits instructions
but where the PC targets 32-bits values have an alignment of 1.
2.3. disassemble
~~~~~~~~~~~~~~~~
| offs_t \ **disassemble**\ (std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
This is the method where the real work is done. This method must
disassemble the instruction at address *pc* and write the result to
*stream*. The values to decode are retrieved from the *opcode*
buffer. A **data_buffer** object offers four accessor methods:
| u8 util::disasm_interface::data_buffer::\ **r8**\ (offs_t pc) const
| u16 util::disasm_interface::data_buffer::\ **r16**\ (offs_t pc) const
| u32 util::disasm_interface::data_buffer::\ **r32**\ (offs_t pc) const
| u64 util::disasm_interface::data_buffer::\ **r64**\ (offs_t pc) const
They read the data at a given address and take endianness and
nonlinear PCs for larger-than-bus-width accesses. The debugger
variant also caches the read data in one block, so for that reason one
should not read data too far from the base pc (e.g. stay within 16K or
so, careful when trying to follow indirect accesses).
A number of CPUs have an external signal that splits fetches into an
opcode part and a parameter part. This is for instance the M1 signal
of the z80 or the SYNC signal of the 6502. Some systems present
different values to the cpu depending on whether that signal is
active, usually for protection purposes. On these cpus the opcode
part should be read from the *opcode* buffer, and the parameter part
from the *params* buffer. They will or will not be the same buffer
depending on the system itself.
The method returns the size of the instruction in PC units, with a
maximum of 65535. In addition, if possible, the disassembler should
give some meta-information about the opcode by OR-ing in into the
result:
* **STEP_OVER** for subroutine calls or auto-decrementing loops. If there is some delay slots, also OR with **step_over_extra**\ (n) where n is the number of instruction slots.
* **STEP_OUT** for the return-from-subroutine instructions
In addition, to indicated that these flags are supported, OR the
result with **SUPPORTED**\ . An annoying number of disassemblers lies
about that support (e.g. they do a or with **SUPPORTED** without even
generating the **STEP_OVER** or **STEP_OUT** information). Don't do
that, it breaks the step over/step out functionality of the debugger.
2.4. interface_flags
~~~~~~~~~~~~~~~~~~~~
| u32 **interface_flags**\ () const
That optional method indicates specifics of the disassembler. Default
of zero is correct most of the time. Possible flags, which need to be
OR-ed together, are:
* **NONLINEAR_PC**\ : stepping to the next opcode or the next byte of the opcode is not adding one to pc. Used for old LFSR-based PCs.
* **PAGED**\ : PC wraps at a page boundary
* **PAGED2LEVEL**\ : not only PC wraps at some kind of page boundary, but there are two levels of paging
* **INTERNAL_DECRYPTION**\ : there is some decryption tucked between reading from AS_PROGRAM and the actual disassembler
* **SPLIT_DECRYPTION**\ : there is some decryption tucked between reading from AS_PROGRAM and the actual disassembler, and that decryption is different for opcodes and parameters
Note that in practice non-linear pc systems are also paged, that
**PAGED2LEVEL** implies **PAGED**, and that **SPLIT_DECRYPTION**
implies **DECRYPTION**.
2.5. pc_linear_to_real and pc_real_to_linear
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| offs_t **pc_linear_to_real**\ (offs_t pc) const
| offs_t **pc_real_to_linear**\ (offs_t pc) const
These methods should be present only when **NONLINEAR_PC** is set in
the interface flags. They must convert pc to and from a value to a
linear domain where the instruction parameters and next instruction
are reached by incrementing the value. **pc_real_to_linear** converts
to that domain, **pc_linear_to_real** converts back from that domain.
2.6. page_address_bits
~~~~~~~~~~~~~~~~~~~~~~
| u32 **page_address_bits**\ () const
Present on when **PAGED** or **PAGED2LEVEL** is set, gives the number
of address bits in the lowest page.
2.7. page2_address_bits
~~~~~~~~~~~~~~~~~~~~~~~
| u32 **page2_address_bits**\ () const
Present on when **PAGED2LEVEL** is set, gives the number
of address bits in the upper page.
2.8. decryptnn
~~~~~~~~~~~~~~
| u8 **decrypt8**\ (u8 value, offs_t pc, bool opcode) const
| u16 **decrypt16**\ (u16 value, offs_t pc, bool opcode) const
| u32 **decrypt32**\ (u32 value, offs_t pc, bool opcode) const
| u64 **decrypt64**\ (u64 value, offs_t pc, bool opcode) const
One of these must be defined when **INTERNAL_DECRYPTION** or
**SPLIT_DECRYPTION** is set. The chosen one is the one which takes
what **opcode_alignment** represents in bytes.
That method decrypts a given value read from address pc (from
AS_PROGRAM) and gives the result which will be passed to the
disassembler. In the split decryption case, opcode indicates whether
we're in the opcode (true) or parameter (false) part of the
instruction.
3. Disassembler interface, device_disasm_interface
--------------------------------------------------
3.1. Definition
~~~~~~~~~~~~~~~
A CPU core derives from **device_disasm_interface** through
**cpu_device**\ . One method has to be implemented,
**create_disassembler**\ .
3.2. create_disassembler
~~~~~~~~~~~~~~~~~~~~~~~~
| util::disasm_interface \*\ **create_disassembler**\ ()
That method must return a pointer to a newly allocated disassembler
object. The caller takes ownership and handles the lifetime.
THis method will be called at most one in the lifetime of the cpu
object.
4. Disassembler configuration and communication
-----------------------------------------------
Some disassemblers need to be configured. Configuration can be
unchanging (static) for the duration of the run (cpu model type for
instance) or dynamic (state of a flag or a user preference). Static
configuration can be done through either (a) parameter(s) to the
disassembler constructor, or through deriving a main disassembler
class. If the information is short and its semantics obvious (like a
model name), feel free to use a parameter. Otherwise derive the
class.
Dynamic configuration must be done by first defining a nested public
struct called "config" in the disassembler, with virtual destructor
and pure virtual methods to pull the required information. A pointer
to that struct should be passed to the disassembler constructor. The
cpu core should then add a derivation from that config struct and
implement the methods. Unidasm will have to derive a small class from
the config class to give the information.
5. Missing stuff
----------------
There currently is no way for the debugger GUI to add per-core
configuration. It is needed for in particular the s2650 and the
saturn cores. It should go through the cpu core class itself, since
it's pulled from the config struct.
There is support missing in unidasm for per-cpu configuration. That's
needed for a lot of things, see the unidasm source code for the
current list ("Configuration missing" comments).

5
docs/source/techspecs/device_memory_interface.rst
View File

@ -40,12 +40,13 @@ instructions separately from the data.
2. Setup
--------
| std::vector<std::pair<int, const address_space_config *>>\ **memory_space_config**\ (int spacenum) const
| std::vector<std::pair<int, const address_space_config \*>>\ **memory_space_config**\ (int spacenum) const
The device must override that method to provide a vector of pairs
comprising of a space number and its associated
**address_space_config** describing its configuration. Some examples
to look up when needed:
* Standard two-space vector: v60_device
* Conditional AS_OPCODE: z80_device
* Inherit config and add a space: m6801_device
@ -106,7 +107,7 @@ version tests for AS_PROGRAM/AS_0.
Does a logical to physical address translation through the device's
MMU. spacenum gives the space number, intention the type of the
future access (TRANSLATE_(READ|WRITE|FETCH)(|_USER|_DEBUG)) and
future access (TRANSLATE_(READ\|WRITE\|FETCH)(\|_USER\|_DEBUG)) and
address is an inout parameter with the address to translate and its
translated version. Should return true if the translation went
correctly, false if the address is unmapped.

1
docs/source/techspecs/index.rst
View File

@ -8,6 +8,7 @@ This section covers technical specifications useful to programmers working on MA
device_memory_interface
device_rom_interface
device_disasm_interface
floppy
nscsi
luaengine

97
hash/fmtowns_cd.xml
View File

@ -338,7 +338,6 @@ Interactive Business English 4 DynEd Japan
Interactive Business English 5 DynEd Japan 1992/7 SET(CD+FD)
Interactive Business English 6 DynEd Japan 1992/7 SET(CD+FD)
Iris-tei Sayokyoku Agumix 1992/11 CD
Ishin no Arashi Koei 1990/3 SET(CD+FD)
Iwanami Bungakukan: Natsume Souseki Iwanami Shoten 1994/2 CD
Iwanami Denshi Nihon Sougou Nendo CD-ROM Fujitsu 1993/10 CD
J.League Professional Soccer 1994 Victor Entertainment 1994/9 CD
@ -585,14 +584,13 @@ Saishin Igaku Daijiten CD-ROM Fujitsu
Saishin Igaku Daijiten Standard-ban CD-ROM Fujitsu 1993/2 CD
Sakura no Mori Active 1995/10 CD
* Samurai Spirits Japan Home Video (JHV) 1995/9 SET(CD+FD)
Sangokushi 2 Koei 1990/6 SET(CD+FD)
Sangokushi 4 Koei 1994/6 SET(CD+FD)
Sanseido Word Hunter Multi CD-ROM Jiten Fujitsu 1991/10 CD
Sargon 5 GAM 1992/11 CD
Sayonara no Mukougawa Foster 1997/8 CD
School Accessory Illust-hen V1.0 Fujitsu 1993/2 CD
School Navi Nihon no Rekishi CD : Heian, Kamakura Unitybell 1995/8 CD
School Navi Nihon no Rekishi CD : Kodai, Asuka-Nara Unitybell 1995/7 CD
School Navi Nihon no Rekishi CD: Heian, Kamakura Unitybell 1995/8 CD
School Navi Nihon no Rekishi CD: Kodai, Asuka-Nara Unitybell 1995/7 CD
School Navi Nihon no Rekishi CD: Azuchi-Momoyama, Edo Unitybell 1995/9 CD
School Navi Nihon no Rekishi CD: Meiji, Gendai Unitybell 1995/9 CD
School-Ace Alpha HG Sensei-you Fujitsu 1994/7 SET(CD+FD)
@ -750,6 +748,7 @@ Vanishing Point: Tenshi no Kieta Machi Tiara
Vector Moji Pattern 2 Fujitsu 1992/12 IC
Video Koubou V1.1 Fujitsu 1992/6 SET(CD+FD)
Video Koubou V1.2 Fujitsu 1993/4 CD
* Video Koubou V1.3 Fujitsu 1994/2 CD
Video Koubou V1.4 Fujitsu 1995/11 SET(CD+FD)
VIP Ball CSK Research Institute (CRI) 1991/8 CD
VIP Tone CSK Research Institute (CRI) 1991/9 CD
@ -781,7 +780,6 @@ Youki de Cool na LA Towns Media Art
Yubiwa Monogatari Daiikkan: Tabi no Nakama Starcraft 1992/3 CD
Yubiwa Monogatari Dainikan: Futatsu no Tou Starcraft 1993/4 SET(CD+FD)
Yumeutsutsu Megami 1992/5 CD
Zan 3: Ten'un Ware ni Ari Nihon Telenet 1994/4 SET(CD+FD)
Zoku Youjuu Senki: Suna no Mokushiroku D.O. 1994/2 CD
Z's Staff Pro Towns Zeit 1991/7 CD
Z's Triphony DigitalCraft Towns Zeit 1990/12 CD
@ -4975,6 +4973,44 @@ User/save disks that can be created from the game itself are not included.
</part>
</software>
<software name="ishin">
<!--
Origin: Private dump (Reuental)
<rom name="ISHIN_NO_ARASHI.mdf" size="502741200" crc="33a4b201" sha1="4666a1c55405acefd13f17608645df0bac1583fc"/>
<rom name="ISHIN_NO_ARASHI.mds" size="1024" crc="cfb06454" sha1="05e023f2567feca6c984aeba9385cbfaac878cab"/>
*after conversion with IsoBuster+EAC *
<rom name="ishin.cue" size="1123" crc="ab69674c" sha1="6ac864e1572e04e6382fe4bac453bc14ba8ef461"/>
<rom name="ishin_track01.bin" size="20462400" crc="be4b061a" sha1="99fca8c1ef5dedb879d82eb932b6cf1f70a8659a"/>
<rom name="ishin_track02.bin" size="53409216" crc="62115ac9" sha1="6ab76f1d439cb0a2fe4a0c8922031aa04b183ed9"/>
<rom name="ishin_track03.bin" size="48004320" crc="426ee287" sha1="43ff60a150b80802f988235e561e9e175c4e7413"/>
<rom name="ishin_track04.bin" size="37008720" crc="281c033b" sha1="254d876a746b23673c4f8123e767e23eb5082c7e"/>
<rom name="ishin_track05.bin" size="35456400" crc="3e8f4123" sha1="246cd999e86dd536f3be6d3676577bcb5d71d8e5"/>
<rom name="ishin_track06.bin" size="30822960" crc="ccf11e55" sha1="bf4710e6bba7e030db428d95cbde4975573597b7"/>
<rom name="ishin_track07.bin" size="39160800" crc="40ec9d8f" sha1="d20cc12e917c12207467a27439dd14bed9da0f45"/>
<rom name="ishin_track08.bin" size="54731040" crc="c35f12a6" sha1="6aa8fc2f8aadb2c8f55157aa24a6c8de3ec78970"/>
<rom name="ishin_track09.bin" size="24507840" crc="bb01cf0d" sha1="4a0435f05e7c17c1b024e69fbd77122bee765ca3"/>
<rom name="ishin_track10.bin" size="43542576" crc="b1d9a332" sha1="0da9c7fc70a0d6ee46e67ce4daa0066a152f55db"/>
<rom name="ishin_track11.bin" size="35886816" crc="c5998c45" sha1="161fd150ae83c1670621a1aec326ef9191050a25"/>
<rom name="ishin_track12.bin" size="85920912" crc="8e65d944" sha1="bc24be3f270455e879218ba842f6a18133b76e40"/>
-->
<description>Ishin no Arashi</description>
<year>1990</year>
<publisher>光栄 (Koei)</publisher>
<info name="alt_title" value="維新の嵐" />
<info name="release" value="199003xx" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1281968">
<rom name="ishin.d88" size="1281968" crc="5885c76c" sha1="29b0773c95d1f69d943c1ee47e957f7b7eb6cb55" offset="000000" />
</dataarea>
</part>
<part name="cdrom" interface="fmt_cdrom">
<diskarea name="cdrom">
<disk name="ishin" sha1="e5aaf3d9e6fb44aec09b6586adfe72e872c9b85d" />
</diskarea>
</part>
</software>
<software name="janjaka">
<!--
Origin: Neo Kobe Collection
@ -7888,6 +7924,30 @@ User/save disks that can be created from the game itself are not included.
</part>
</software>
<software name="sangoku2">
<!--
Origin: Private dump (Reuental)
<rom name="SANGOKUSHI_2.ccd" size="3832" crc="6bbbdec6" sha1="1ad024f2e10d5ba0d5eb95281e1e94879a741a25"/>
<rom name="SANGOKUSHI_2.cue" size="920" crc="8dd872dc" sha1="540efad426d2a82dfe547f8424115db6465cf093"/>
<rom name="SANGOKUSHI_2.img" size="445635792" crc="a82468d9" sha1="68064b8a3cfbfe1e5c7e0c38d7e9c3b24e51fa45"/>
<rom name="SANGOKUSHI_2.sub" size="18189216" crc="4042bd7b" sha1="9df79c40b18cbaf2c8e3ab89e444a2f0e6b8932f"/>
-->
<description>Sangokushi II</description>
<year>1990</year>
<publisher>光栄 (Koei)</publisher>
<info name="alt_title" value="三国志II" />
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="1281968">
<rom name="sango2.d88" size="1281968" crc="40a7015d" sha1="79ae6709d7ee2c7f35c07f967e032f790565278b" offset="000000" />
</dataarea>
</part>
<part name="cdrom" interface="fmt_cdrom">
<diskarea name="cdrom">
<disk name="sangokushi_2" sha1="f4ecb67518eb27c0ba5d6d01b945f89aa056535d" />
</diskarea>
</part>
</software>
<software name="sangoku3">
<!--
Origin: P2P
@ -10091,6 +10151,33 @@ User/save disks that can be created from the game itself are not included.
</part>
</software>
<software name="zan3">
<!--
Origin: Private dump (Reuental)
<rom name="ZAN3.mdf" size="8908800" crc="df3ca4de" sha1="21479d715e7a32ed3f93a6eb1d3d3690fd2ee0ec"/>
<rom name="ZAN3.mds" size="688" crc="beb71eb0" sha1="a82d8b7783e9087b0b32241208ceed2db2d1e9d8"/>
The MDF file is a single track, so a CUE file was created for conversion:
<rom name="zan3.cue" size="65" crc="09d4a494" sha1="65cb0a7c4333779fb2f13c60ad2cb69749e1ea0c"/>
-->
<description>Zan III - Ten'un Ware ni Ari</description>
<year>1994</year>
<publisher>日本テレネット (Nihon Telenet)</publisher>
<info name="alt_title" value="斬III　～天運我にあり～" />
<info name="release" value="199404xx" />
<part name="flop1" interface="floppy_3_5">
<feature name="part_id" value="System Disk" />
<dataarea name="flop" size="1281968">
<rom name="zan3 system disk.d88" size="1281968" crc="cbe7152b" sha1="eed29400e2d84788871027d3fc88c2297aa6a8b7" offset="000000" />
</dataarea>
</part>
<part name="cdrom" interface="fmt_cdrom">
<diskarea name="cdrom">
<disk name="zan3" sha1="375d3a88e0c6990137cb7b054ffc4785e6475584" />
</diskarea>
</part>
</software>
<software name="zatsuon">
<!--
Origin: Neo Kobe Collection

269
scripts/src/cpu.lua
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File diff suppressed because it is too large Load Diff

8
scripts/src/devices.lua
View File

@ -79,15 +79,11 @@ if #disasm_files > 0 then
}
if #disasm_dependency > 0 then
dependency {
disasm_dependency[1]
}
dependency(disasm_dependency)
end
if #disasm_custombuildtask > 0 then
custombuildtask {
disasm_custombuildtask[1]
}
custombuildtask(disasm_custombuildtask)
end
end

2
scripts/src/emu.lua
View File

@ -187,6 +187,8 @@ files {
MAME_DIR .. "src/emu/rendersw.hxx",
MAME_DIR .. "src/emu/ui/uimain.h",
MAME_DIR .. "src/emu/ui/cmddata.h", -- TODO: remove
MAME_DIR .. "src/emu/debug/debugbuf.cpp",
MAME_DIR .. "src/emu/debug/debugbuf.h",
MAME_DIR .. "src/emu/debug/debugcmd.cpp",
MAME_DIR .. "src/emu/debug/debugcmd.h",
MAME_DIR .. "src/emu/debug/debugcon.cpp",

2
scripts/src/lib.lua
View File

@ -57,6 +57,8 @@ project "utils"
MAME_DIR .. "src/lib/util/crypto.hpp",
MAME_DIR .. "src/lib/util/delegate.cpp",
MAME_DIR .. "src/lib/util/delegate.h",
MAME_DIR .. "src/lib/util/disasmintf.cpp",
MAME_DIR .. "src/lib/util/disasmintf.h",
MAME_DIR .. "src/lib/util/flac.cpp",
MAME_DIR .. "src/lib/util/flac.h",
MAME_DIR .. "src/lib/util/harddisk.cpp",

6
src/devices/cpu/8x300/8x300.cpp
View File

@ -11,6 +11,7 @@
#include "emu.h"
#include "8x300.h"
#include "8x300dasm.h"
#include "debugger.h"
#define FETCHOP(a) (m_direct->read_word(a))
@ -590,8 +591,7 @@ void n8x300_cpu_device::execute_run()
} while (m_icount > 0);
}
offs_t n8x300_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *n8x300_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE( n8x300 );
return CPU_DISASSEMBLE_NAME(n8x300)(this, stream, pc, oprom, opram, options);
return new n8x300_disassembler;
}

4
src/devices/cpu/8x300/8x300.h
View File

@ -63,9 +63,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
virtual util::disasm_interface *create_disassembler() override;
address_space_config m_program_config;
address_space_config m_io_config;

17
src/devices/cpu/8x300/8x300dasm.cpp
View File

@ -8,7 +8,7 @@
*/
#include "emu.h"
#include "8x300.h"
#include "8x300dasm.h"
#define SRC ((opcode & 0x1f00) >> 8)
#define DST (opcode & 0x001f)
@ -16,7 +16,7 @@
#define IMM8 (opcode & 0x00ff)
#define IMM5 (opcode & 0x001f)
static const char *reg_names[32] =
const char *const n8x300_disassembler::reg_names[32] =
{
"AUX", "R1", "R2", "R3", "R4", "R5", "R6", "IVL", "OVF", "R11",
"Unused12", "Unused13", "Unused14", "Unused15", "Unused16", "IVR",
@ -25,7 +25,7 @@ static const char *reg_names[32] =
};
// determines if right rotate or I/O field length is to be used
static inline bool is_rot(uint16_t opcode)
bool n8x300_disassembler::is_rot(uint16_t opcode)
{
if((opcode & 0x1000) || (opcode & 0x0010))
return false;
@ -33,7 +33,7 @@ static inline bool is_rot(uint16_t opcode)
return true;
}
static inline bool is_src_rot(uint16_t opcode)
bool n8x300_disassembler::is_src_rot(uint16_t opcode)
{
if((opcode & 0x1000))
return false;
@ -41,10 +41,15 @@ static inline bool is_src_rot(uint16_t opcode)
return true;
}
CPU_DISASSEMBLE(n8x300)
u32 n8x300_disassembler::opcode_alignment() const
{
return 2;
}
offs_t n8x300_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
unsigned startpc = pc;
uint16_t opcode = (oprom[pc - startpc] << 8) | oprom[pc+1 - startpc];
uint16_t opcode = opcodes.r16(pc);
uint8_t inst = opcode >> 13;
pc+=2;

31
src/devices/cpu/8x300/8x300dasm.h Normal file
View File

@ -0,0 +1,31 @@
// license:BSD-3-Clause
// copyright-holders:Barry Rodewald
/*
* 8x300dasm.c
* Implementation of the Scientific Micro Systems SMS300 / Signetics 8X300 Microcontroller
*
* Created on: 18/12/2013
*/
#ifndef MAME_CPU_8X300_8X300DASM_H
#define MAME_CPU_8X300_8X300DASM_H
#pragma once
class n8x300_disassembler : public util::disasm_interface
{
public:
n8x300_disassembler() = default;
virtual ~n8x300_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
static const char *const reg_names[32];
bool is_rot(uint16_t opcode);
bool is_src_rot(uint16_t opcode);
};
#endif

66
src/devices/cpu/adsp2100/2100dasm.cpp
View File

@ -1,32 +1,32 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles
#include "emu.h"
#include "adsp2100.h"
#include "2100dasm.h"
static const char *const flag_change[] = { "", "TOGGLE %s ", "RESET %s ", "SET %s " };
static const char *const mode_change[] = { "", "", "DIS %s ", "ENA %s " };
const char *const adsp21xx_disassembler::flag_change[] = { "", "TOGGLE %s ", "RESET %s ", "SET %s " };
const char *const adsp21xx_disassembler::mode_change[] = { "", "", "DIS %s ", "ENA %s " };
static const char *const alu_xop[] = { "AX0", "AX1", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
static const char *const alu_yop[] = { "AY0", "AY1", "AF", "0" };
static const char *const alu_dst[] = { "AR", "AF", "NONE" };
const char *const adsp21xx_disassembler::alu_xop[] = { "AX0", "AX1", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
const char *const adsp21xx_disassembler::alu_yop[] = { "AY0", "AY1", "AF", "0" };
const char *const adsp21xx_disassembler::alu_dst[] = { "AR", "AF", "NONE" };
static const char *const mac_xop[] = { "MX0", "MX1", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
static const char *const mac_yop[] = { "MY0", "MY1", "MF", "0" };
static const char *const mac_dst[] = { "MR", "MF", "NONE" };
const char *const adsp21xx_disassembler::mac_xop[] = { "MX0", "MX1", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
const char *const adsp21xx_disassembler::mac_yop[] = { "MY0", "MY1", "MF", "0" };
const char *const adsp21xx_disassembler::mac_dst[] = { "MR", "MF", "NONE" };
static const char *const shift_xop[] = { "SI", "??", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
const char *const adsp21xx_disassembler::shift_xop[] = { "SI", "??", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
static const char *const reg_grp[][16] =
const char *const adsp21xx_disassembler::reg_grp[][16] =
{
{ "AX0", "AX1", "MX0", "MX1", "AY0", "AY1", "MY0", "MY1", "SI", "SE", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" },
{ "I0", "I1", "I2", "I3", "M0", "M1", "M2", "M3", "L0", "L1", "L2", "L3", "??", "??", "PMOVLAY", "DMOVLAY" },
{ "I4", "I5", "I6", "I7", "M4", "M5", "M6", "M7", "L4", "L5", "L6", "L7", "??", "??", "??", "??" },
{ "ASTAT", "MSTAT", "SSTAT", "IMASK", "ICNTL", "CNTR", "SB", "PX", "RX0", "TX0", "RX1", "TX1", "IFC", "OWRCNTR", "??", "??" }
};
static const char *const dual_xreg[] = { "AX0", "AX1", "MX0", "MX1" };
static const char *const dual_yreg[] = { "AY0", "AY1", "MY0", "MY1" };
const char *const adsp21xx_disassembler::dual_xreg[] = { "AX0", "AX1", "MX0", "MX1" };
const char *const adsp21xx_disassembler::dual_yreg[] = { "AY0", "AY1", "MY0", "MY1" };
static const char *const condition[] =
const char *const adsp21xx_disassembler::condition[] =
{
"IF EQ ",
"IF NE ",
@ -46,7 +46,7 @@ static const char *const condition[] =
""
};
static const char *const do_condition[] =
const char *const adsp21xx_disassembler::do_condition[] =
{
"NE",
"EQ",
@ -66,7 +66,7 @@ static const char *const do_condition[] =
"FOREVER"
};
static const char *const alumac_op[][2] =
const char *const adsp21xx_disassembler::alumac_op[][2] =
{
{ "", "" },
{ "%s = %s * %s (RND)", "%s = %s * %s (RND)" },
@ -103,7 +103,7 @@ static const char *const alumac_op[][2] =
{ "%s = ABS %s", "%s = ABS %s" }
};
static const char *const shift_op[] =
const char *const adsp21xx_disassembler::shift_op[] =
{
"SR = LSHIFT %s (HI)",
"SR = SR OR LSHIFT %s (HI)",
@ -123,7 +123,7 @@ static const char *const shift_op[] =
"SB = EXPADJ %s",
};
static const char *const shift_by_op[] =
const char *const adsp21xx_disassembler::shift_by_op[] =
{
"SR = LSHIFT %s BY %d (HI)",
"SR = SR OR LSHIFT %s BY %d (HI)",
@ -143,7 +143,7 @@ static const char *const shift_by_op[] =
"???"
};
static const char *const constants[] =
const char *const adsp21xx_disassembler::constants[] =
{
"$0001",
"$FFFE",
@ -180,9 +180,7 @@ static const char *const constants[] =
};
static void alumac(std::ostream &stream, int dest, int op)
void adsp21xx_disassembler::alumac(std::ostream &stream, int dest, int op)
{
int opindex = (op >> 13) & 31;
const char *xop, *yop, *dst, *opstring;
@ -207,7 +205,7 @@ static void alumac(std::ostream &stream, int dest, int op)
}
static void aluconst(std::ostream &stream, int dest, int op)
void adsp21xx_disassembler::aluconst(std::ostream &stream, int dest, int op)
{
int opindex = (op >> 13) & 31;
const char *xop, *dst, *cval, *opstring;
@ -232,10 +230,9 @@ static void aluconst(std::ostream &stream, int dest, int op)
}
/* execute instructions on this CPU until icount expires */
CPU_DISASSEMBLE(adsp21xx)
offs_t adsp21xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
unsigned int op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16);
unsigned int op = opcodes.r32(pc);
unsigned dasmflags = 0;
int temp;
@ -281,7 +278,7 @@ CPU_DISASSEMBLE(adsp21xx)
if (op & 1)
{
util::stream_format(stream, "%s", "CALL ");
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
}
else
util::stream_format(stream, "%s", "JUMP ");
@ -295,7 +292,7 @@ CPU_DISASSEMBLE(adsp21xx)
if (op & 0x000010)
{
util::stream_format(stream, "%s", "POP PC ");
dasmflags = DASMFLAG_STEP_OUT;
dasmflags = STEP_OUT;
}
if (op & 0x000008) util::stream_format(stream, "%s", "POP LOOP ");
if (op & 0x000004) util::stream_format(stream, "%s", "POP CNTR ");
@ -349,7 +346,7 @@ CPU_DISASSEMBLE(adsp21xx)
util::stream_format(stream, "%s", "RTI");
else
util::stream_format(stream, "%s", "RTS");
dasmflags = DASMFLAG_STEP_OUT;
dasmflags = STEP_OUT;
}
else
util::stream_format(stream, "??? (%06X)", op);
@ -362,7 +359,7 @@ CPU_DISASSEMBLE(adsp21xx)
if (op & 0x000010)
{
util::stream_format(stream, "CALL (I%d)", 4 + ((op >> 6) & 3));
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
}
else
util::stream_format(stream, "JUMP (I%d)", 4 + ((op >> 6) & 3));
@ -440,7 +437,7 @@ CPU_DISASSEMBLE(adsp21xx)
if (op & 0x040000)
{
util::stream_format(stream, "%sCALL $%04X", condition[op & 15], (op >> 4) & 0x3fff);
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
}
else
util::stream_format(stream, "%sJUMP $%04X", condition[op & 15], (op >> 4) & 0x3fff);
@ -549,5 +546,10 @@ CPU_DISASSEMBLE(adsp21xx)
break;
}
return 1 | dasmflags | DASMFLAG_SUPPORTED;
return 1 | dasmflags | SUPPORTED;
}
uint32_t adsp21xx_disassembler::opcode_alignment() const
{
return 1;
}

43
src/devices/cpu/adsp2100/2100dasm.h Normal file
View File

@ -0,0 +1,43 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles
#ifndef MAME_CPU_ADSP2100_2100DASM_H
#define MAME_CPU_ADSP2100_2100DASM_H
#pragma once
class adsp21xx_disassembler : public util::disasm_interface
{
public:
adsp21xx_disassembler() = default;
virtual ~adsp21xx_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
static const char *const flag_change[];
static const char *const mode_change[];
static const char *const alu_xop[];
static const char *const alu_yop[];
static const char *const alu_dst[];
static const char *const mac_xop[];
static const char *const mac_yop[];
static const char *const mac_dst[];
static const char *const shift_xop[];;
static const char *const reg_grp[][16];
static const char *const dual_xreg[];
static const char *const dual_yreg[];
static const char *const condition[];
static const char *const do_condition[];
static const char *const alumac_op[][2];
static const char *const shift_op[];
static const char *const shift_by_op[];
static const char *const constants[];
void alumac(std::ostream &stream, int dest, int op);
void aluconst(std::ostream &stream, int dest, int op);
};
#endif

31
src/devices/cpu/adsp2100/adsp2100.cpp
View File

@ -100,6 +100,7 @@
#include "emu.h"
#include "debugger.h"
#include "adsp2100.h"
#include "2100dasm.h"
// device type definitions
@ -758,41 +759,17 @@ void adsp21xx_device::state_string_export(const device_state_entry &entry, std::
//-------------------------------------------------
// disasm_min_opcode_bytes - return the length
// of the shortest instruction, in bytes
//-------------------------------------------------
uint32_t adsp21xx_device::disasm_min_opcode_bytes() const
{
return 4;
}
//-------------------------------------------------
// disasm_max_opcode_bytes - return the length
// of the longest instruction, in bytes
//-------------------------------------------------
uint32_t adsp21xx_device::disasm_max_opcode_bytes() const
{
return 4;
}
//-------------------------------------------------
// disasm_disassemble - call the disassembly
// disassemble - call the disassembly
// helper function
//-------------------------------------------------
offs_t adsp21xx_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *adsp21xx_device::create_disassembler()
{
extern CPU_DISASSEMBLE( adsp21xx );
return CPU_DISASSEMBLE_NAME(adsp21xx)(this, stream, pc, oprom, opram, options);
return new adsp21xx_disassembler;
}
/***************************************************************************
MEMORY ACCESSORS
***************************************************************************/

4
src/devices/cpu/adsp2100/adsp2100.h
View File

@ -243,9 +243,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override;
virtual uint32_t disasm_max_opcode_bytes() const override;
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
// helpers
void create_tables();

47
src/devices/cpu/alph8201/8201dasm.cpp
View File

@ -20,11 +20,10 @@ cpu/alph8201/ will be removed when the alpha 8304 has been dumped.
****************************************************************************/
#include "emu.h"
#include "8201dasm.h"
#include <ctype.h>
typedef unsigned char byte;
#define FMT(a,b) a, b
#define PTRS_PER_FORMAT 2
@ -171,7 +170,7 @@ Notes:
/****************************************************/
static const char *const Formats[] = {
const char *const alpha8201_disassembler::Formats[] = {
FMT("0000_0000", "NOP"), // 00
FMT("0000_0001", "RRCA"), // 01
FMT("0000_0010", "RLCA"), // 02
@ -270,24 +269,10 @@ static const char *const Formats[] = {
nullptr
};
#define MAX_OPS ((ARRAY_LENGTH(Formats) - 1) / PTRS_PER_FORMAT)
struct AD8201Opcode {
byte mask;
byte bits;
byte type;
byte pmask;
byte pdown;
const char *fmt;
};
static AD8201Opcode Op[MAX_OPS+1];
static int OpInizialized = 0;
static void InitDasm8201(void)
alpha8201_disassembler::alpha8201_disassembler()
{
const char *p;
byte mask, bits;
u8 mask, bits;
int bit;
int i;
char chr , type;
@ -345,11 +330,10 @@ static void InitDasm8201(void)
Op[i].type |= 0x02; /* double param */
}
}
OpInizialized = 1;
op_count = i;
}
CPU_DISASSEMBLE(alpha8201)
offs_t alpha8201_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
offs_t dasmflags = 0;
int i;
@ -357,11 +341,9 @@ CPU_DISASSEMBLE(alpha8201)
int cnt = 1;
int code , disp;
if (!OpInizialized) InitDasm8201();
code = oprom[0];
code = opcodes.r8(pc);
op = -1; /* no matching opcode */
for ( i = 0; i < MAX_OPS; i++)
for ( i = 0; i < op_count; i++)
{
if( (code & Op[i].mask) == Op[i].bits )
{
@ -382,7 +364,7 @@ CPU_DISASSEMBLE(alpha8201)
if (Op[op].type & 0x10)
{
disp = opram[1];
disp = params.r8(pc+1);
cnt++;
}
else
@ -403,13 +385,18 @@ CPU_DISASSEMBLE(alpha8201)
case 0xcd:
case 0xce:
case 0xdf:
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
break;
case 0xff:
dasmflags = DASMFLAG_STEP_OUT;
dasmflags = STEP_OUT;
break;
}
return cnt | dasmflags | DASMFLAG_SUPPORTED;
return cnt | dasmflags | SUPPORTED;
}
u32 alpha8201_disassembler::opcode_alignment() const
{
return 1;
}

51
src/devices/cpu/alph8201/8201dasm.h Normal file
View File

@ -0,0 +1,51 @@
// license:BSD-3-Clause
// copyright-holders:Tatsuyuki Satoh
/*
Notice: The alpha 8201 is now emulated using mame/alpha8201.*
cpu/alph8201/ will be removed when the alpha 8304 has been dumped.
*/
/****************************************************************************
Alpha 8201/8301 Disassembler
Copyright Tatsuyuki Satoh
Originally written for the MAME project.
****************************************************************************/
#ifndef MAME_CPU_ALPH8201_8201DASM_H
#define MAME_CPU_ALPH8201_8201DASM_H
#pragma once
class alpha8201_disassembler : public util::disasm_interface
{
public:
alpha8201_disassembler();
virtual ~alpha8201_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
struct AD8201Opcode {
u8 mask;
u8 bits;
u8 type;
u8 pmask;
u8 pdown;
const char *fmt;
};
static const char *const Formats[];
AD8201Opcode Op[256];
int op_count;
};
#endif

8
src/devices/cpu/alph8201/alph8201.cpp
View File

@ -163,7 +163,7 @@ Timming
#include "emu.h"
#include "alph8201.h"
#include "debugger.h"
#include "8201dasm.h"
DEFINE_DEVICE_TYPE(ALPHA8201L, alpha8201_cpu_device, "alpha8201l", "ALPHA-8201L")
DEFINE_DEVICE_TYPE(ALPHA8301L, alpha8301_cpu_device, "alpha8301l", "ALPHA-8301L")
@ -690,9 +690,7 @@ void alpha8201_cpu_device::execute_set_input(int inputnum, int state)
}
}
offs_t alpha8201_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)
util::disasm_interface *alpha8201_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE( alpha8201 );
return CPU_DISASSEMBLE_NAME(alpha8201)(this, stream, pc, oprom, opram, options);
return new alpha8201_disassembler;
}

4
src/devices/cpu/alph8201/alph8201.h
View File

@ -83,9 +83,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual u32 disasm_min_opcode_bytes() const override { return 1; }
virtual u32 disasm_max_opcode_bytes() const override { return 4; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
virtual util::disasm_interface *create_disassembler() override;
u8 M_RDMEM(u16 A) { return m_program->read_byte(A); }
void M_WRMEM(u16 A, u8 V) { m_program->write_byte(A, V); }

4
src/devices/cpu/alto2/a2ram.cpp
View File

@ -99,7 +99,7 @@ void alto2_cpu_device::rdram()
#if DEBUG_RDRAM
char buffer[256];
uint8_t* oprom = m_ucode_cram.get() + 4 * wordaddr;
disasm_disassemble(buffer, wordaddr, oprom, oprom, 0);
disassemble(buffer, wordaddr, oprom, oprom, 0);
printf("RD CRAM_BANKSEL=%d RAM%d [%04o] upper:%06o lower:%06o value:%011o '%s'\n",
GET_CRAM_BANKSEL(m_cram_addr), bank, wordaddr, m_myl, m_alu,
value, buffer);
@ -144,7 +144,7 @@ void alto2_cpu_device::wrtram()
#if DEBUG_WRTRAM
char buffer[256];
uint8_t* oprom = m_ucode_cram.get() + 4 * wordaddr;
disasm_disassemble(buffer, wordaddr, oprom, oprom, 0);
disassemble(buffer, wordaddr, oprom, oprom, 0);
printf("WR CRAM_BANKSEL=%d RAM%d [%04o] upper:%06o lower:%06o value:%011o '%s'\n",
GET_CRAM_BANKSEL(m_cram_addr), bank, wordaddr, m_myl, m_alu,
value, buffer);

6
src/devices/cpu/alto2/alto2cpu.cpp
View File

@ -7,6 +7,7 @@
*****************************************************************************/
#include "emu.h"
#include "alto2cpu.h"
#include "alto2dsm.h"
#include "a2roms.h"
#define DEBUG_UCODE_CONST_DATA 0 //!< define to 1 to dump decoded micro code and constants
@ -2980,3 +2981,8 @@ void alto2_cpu_device::soft_reset()
m_unload_time = 0; // reset the word unload timing accu
m_bitclk_time = 0; // reset the bitclk timing accu
}
util::disasm_interface *alto2_cpu_device::create_disassembler()
{
return new alto2_disassembler;
}

4
src/devices/cpu/alto2/alto2cpu.h
View File

@ -238,9 +238,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
//! device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
private:

54
src/devices/cpu/alto2/alto2dsm.cpp
View File

@ -5,7 +5,7 @@
*
**********************************************************/
#include "emu.h"
#include "alto2cpu.h"
#include "alto2dsm.h"
#define loc_DASTART 0000420 // display list header
#define loc_DVIBITS 0000421 // display vertical field interrupt bitword
@ -68,7 +68,7 @@
/**
* @brief short names for the 16 tasks
*/
static const char *taskname[16] = {
const char *const alto2_disassembler::taskname[16] = {
"EMU", // emulator task
"T01",
"T02",
@ -90,7 +90,7 @@ static const char *taskname[16] = {
/**
* @brief names for the 32 R registers
*/
static const char *regname[32] = {
const char *const alto2_disassembler::regname[32] = {
"AC(3)", // emulator accu 3
"AC(2)", // emulator accu 2
"AC(1)", // emulator accu 1
@ -126,7 +126,7 @@ static const char *regname[32] = {
};
//! for ALUF which is the value loaded into T, if t flags is set
static const char* t_bus_alu[16] = {
const char *const alto2_disassembler::t_bus_alu[16] = {
"ALU",
"BUS",
"ALU",
@ -148,7 +148,7 @@ static const char* t_bus_alu[16] = {
/**
* @brief copy of the constant PROM, which this disassembler may not have access to
*/
static uint16_t const_prom[PROM_SIZE] = {
uint16_t alto2_disassembler::const_prom[PROM_SIZE] = {
/* 0000 */ 0x0000, 0x0001, 0x0002, 0xfffe, 0xffff, 0xffff, 0x000f, 0xffff,
/* 0008 */ 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008, 0xfff8, 0xfff8,
/* 0010 */ 0x0010, 0x001f, 0x0020, 0x003f, 0x0040, 0x007f, 0x0080, 0x0007,
@ -187,34 +187,22 @@ static uint16_t const_prom[PROM_SIZE] = {
* @brief print a symbolic name for an mpc address
*
* @param a microcode address (mpc)
* @return pointer to const string with the address or symbolic name
* @return string with the address or symbolic name
*/
static const char *addrname(int a)
std::string alto2_disassembler::addrname(int a) const
{
static char buffer[4][32];
static int which = 0;
char *dst;
which = (which + 1) % 4;
dst = buffer[which];
if (a < 020) {
if (a < 020)
// start value for mpc per task is the task number
snprintf(dst, sizeof(buffer[0]), "*%s", taskname[a]);
} else {
snprintf(dst, sizeof(buffer[0]), "%04o", a);
}
return dst;
return util::string_format("*%s", taskname[a]);
else
return util::string_format("%04o", a);
}
offs_t alto2_cpu_device::disasm_disassemble(std::ostream &main_stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
offs_t alto2_disassembler::disassemble(std::ostream &main_stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
std::ostringstream stream;
uint32_t mir = (static_cast<uint32_t>(oprom[0]) << 24) |
(static_cast<uint32_t>(oprom[1]) << 16) |
(static_cast<uint32_t>(oprom[2]) << 8) |
(static_cast<uint32_t>(oprom[3]) << 0);
uint32_t mir = opcodes.r32(pc);
int rsel = (mir >> 27) & 31;
int aluf = (mir >> 23) & 15;
int bs = (mir >> 20) & 7;
@ -223,17 +211,13 @@ offs_t alto2_cpu_device::disasm_disassemble(std::ostream &main_stream, offs_t pc
int t = (mir >> 11) & 1;
int l = (mir >> 10) & 1;
offs_t next = mir & 1023;
const uint8_t* src = oprom - 4 * pc + 4 * next;
uint32_t next2 = (static_cast<uint32_t>(src[0]) << 24) |
(static_cast<uint32_t>(src[1]) << 16) |
(static_cast<uint32_t>(src[2]) << 8) |
(static_cast<uint32_t>(src[3]) << 0);
uint32_t next2 = opcodes.r32(next);
uint16_t prefetch = next2 & 1023;
offs_t result = 1 | DASMFLAG_SUPPORTED;
offs_t result = 1 | SUPPORTED;
uint8_t pa;
if (next != pc + 1)
result |= DASMFLAG_STEP_OUT;
result |= STEP_OUT;
if (t)
util::stream_format(stream, "T<-%s ", t_bus_alu[aluf]);
@ -395,3 +379,9 @@ offs_t alto2_cpu_device::disasm_disassemble(std::ostream &main_stream, offs_t pc
return result;
}
u32 alto2_disassembler::opcode_alignment() const
{
return 1;
}

31
src/devices/cpu/alto2/alto2dsm.h Normal file
View File

@ -0,0 +1,31 @@
// license:BSD-3-Clause
// copyright-holders:Juergen Buchmueller
/**********************************************************
* Xerox AltoII disassembler
*
**********************************************************/
#ifndef MAME_CPU_ALTO2_ALTO2DSM_H
#define MAME_CPU_ALTO2_ALTO2DSM_H
#pragma once
class alto2_disassembler : public util::disasm_interface
{
public:
alto2_disassembler() = default;
virtual ~alto2_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
static const char *const taskname[16];
static const char *const regname[32];
static const char *const t_bus_alu[16];
static uint16_t const_prom[];
std::string addrname(int a) const;
};
#endif

7
src/devices/cpu/am29000/am29000.cpp
View File

@ -17,6 +17,7 @@
#include "emu.h"
#include "debugger.h"
#include "am29000.h"
#include "am29dasm.h"
DEFINE_DEVICE_TYPE(AM29000, am29000_cpu_device, "am29000", "AMC Am29000")
@ -702,9 +703,7 @@ void am29000_cpu_device::execute_set_input(int inputnum, int state)
// TODO : CHECK IRQs
}
offs_t am29000_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *am29000_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE( am29000 );
return CPU_DISASSEMBLE_NAME(am29000)(this, stream, pc, oprom, opram, options);
return new am29000_disassembler;
}

4
src/devices/cpu/am29000/am29000.h
View File

@ -458,9 +458,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
void signal_exception(uint32_t type);
void external_irq_check();

27
src/devices/cpu/am29000/am29dasm.cpp
View File

@ -9,7 +9,7 @@
***************************************************************************/
#include "emu.h"
#include "am29000.h"
#include "am29dasm.h"
/***************************************************************************
@ -36,38 +36,38 @@
CODE
***************************************************************************/
static std::string dasm_type1(uint32_t op)
std::string am29000_disassembler::dasm_type1(uint32_t op)
{
return (op & OP_M_BIT)
? string_format("r%d, r%d, $%02x", OP_RC, OP_RA, OP_I8)
: string_format("r%d, r%d, r%d", OP_RC, OP_RA, OP_RB);
}
static std::string dasm_type2(uint32_t op)
std::string am29000_disassembler::dasm_type2(uint32_t op)
{
return string_format("r%d, r%d, r%d", OP_RC, OP_RA, OP_RB);
}
static std::string dasm_type3(uint32_t op)
std::string am29000_disassembler::dasm_type3(uint32_t op)
{
return string_format("r%d, $%04x", OP_RA, OP_I16);
}
static std::string dasm_type4(uint32_t op, uint32_t pc)
std::string am29000_disassembler::dasm_type4(uint32_t op, uint32_t pc)
{
return (op & OP_M_BIT)
? string_format("r%d, $%04x", OP_RA, OP_IJMP)
: string_format("r%d, $%04x", OP_RA, pc + OP_SJMP);
}
static std::string dasm_type5(uint32_t op)
std::string am29000_disassembler::dasm_type5(uint32_t op)
{
return (op & OP_M_BIT)
? string_format("trap%d, r%d, $%02x", OP_VN, OP_RA, OP_I8)
: string_format("trap%d, r%d, r%d", OP_VN, OP_RA, OP_RB);
}
static std::string dasm_type6(uint32_t op)
std::string am29000_disassembler::dasm_type6(uint32_t op)
{
return (op & OP_M_BIT)
? string_format("%d, %x, r%d, $%02x", OP_CE, OP_CNTL, OP_RA, OP_I8)
@ -82,7 +82,7 @@ static std::string dasm_type6(uint32_t op)
#define TYPE_6 dasm_type6(op)
static const char* get_spr(int spid)
const char* am29000_disassembler::get_spr(int spid)
{
switch (spid)
{
@ -117,9 +117,14 @@ static const char* get_spr(int spid)
}
}
CPU_DISASSEMBLE(am29000)
u32 am29000_disassembler::opcode_alignment() const
{
uint32_t op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | oprom[3];
return 4;
}
offs_t am29000_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint32_t op = opcodes.r32(pc);
uint32_t flags = 0;
switch (op >> 24)
@ -228,5 +233,5 @@ CPU_DISASSEMBLE(am29000)
default: util::stream_format(stream, "??????"); break;
}
return 4 | flags | DASMFLAG_SUPPORTED;
return 4 | flags | SUPPORTED;
}

36
src/devices/cpu/am29000/am29dasm.h Normal file
View File

@ -0,0 +1,36 @@
// license:BSD-3-Clause
// copyright-holders:Philip Bennett
/***************************************************************************
am29dasm.c
Disassembler for the portable Am29000 emulator.
Written by Phil Bennett
***************************************************************************/
#ifndef MAME_CPU_AM29000_AM29DASM_H
#define MAME_CPU_AM29000_AM29DASM_H
#pragma once
class am29000_disassembler : public util::disasm_interface
{
public:
am29000_disassembler() = default;
virtual ~am29000_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
std::string dasm_type1(uint32_t op);
std::string dasm_type2(uint32_t op);
std::string dasm_type3(uint32_t op);
std::string dasm_type4(uint32_t op, uint32_t pc);
std::string dasm_type5(uint32_t op);
std::string dasm_type6(uint32_t op);
const char* get_spr(int spid);
};
#endif

6
src/devices/cpu/amis2000/amis2000.cpp
View File

@ -20,6 +20,7 @@
#include "emu.h"
#include "amis2000.h"
#include "amis2000d.h"
#include "debugger.h"
@ -98,10 +99,9 @@ void amis2000_base_device::state_string_export(const device_state_entry &entry,
}
}
offs_t amis2000_base_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)
util::disasm_interface *amis2000_base_device::create_disassembler()
{
extern CPU_DISASSEMBLE(amis2000);
return CPU_DISASSEMBLE_NAME(amis2000)(this, stream, pc, oprom, opram, options);
return new amis2000_disassembler;
}

4
src/devices/cpu/amis2000/amis2000.h
View File

@ -87,9 +87,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
virtual u32 disasm_min_opcode_bytes() const override { return 1; }
virtual u32 disasm_max_opcode_bytes() const override { return 1; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
virtual util::disasm_interface *create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;

41
src/devices/cpu/amis2000/amis2000d.cpp
View File

@ -7,21 +7,9 @@
*/
#include "emu.h"
#include "debugger.h"
#include "amis2000.h"
#include "amis2000d.h"
enum e_mnemonics
{
mLAB = 0, mLAE, mLAI, mLBE, mLBEP, mLBF, mLBZ, mXAB, mXABU, mXAE,
mLAM, mXC, mXCI, mXCD, mSTM, mRSM,
mADD, mADCS, mADIS, mAND, mXOR, mCMA, mSTC, mRSC, mSF1, mRF1, mSF2, mRF2,
mSAM, mSZM, mSBE, mSZC, mSOS, mSZK, mSZI, mTF1, mTF2,
mPP, mJMP, mJMS, mRT, mRTS, mNOP, mHALT,
mINP, mOUT, mDISB, mDISN, mMVS, mPSH, mPSL, mEUR
};
static const char *const s_mnemonics[] =
const char *const amis2000_disassembler::s_mnemonics[] =
{
"LAB", "LAE", "LAI", "LBE", "LBEP", "LBF", "LBZ", "XAB", "XABU", "XAE",
"LAM", "XC", "XCI", "XCD", "STM", "RSM",
@ -32,7 +20,7 @@ static const char *const s_mnemonics[] =
};
// number of bits per opcode parameter, negative indicates complement
static const s8 s_bits[] =
const s8 amis2000_disassembler::s_bits[] =
{
0, 0, 4, 2, 2, 2, 2, 0, 0, 0,
-2, -2, -2, -2, 2, 2,
@ -42,21 +30,18 @@ static const s8 s_bits[] =
0, 0, 0, 0, 0, 0, 0, 0
};
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
static const u32 s_flags[] =
const u32 amis2000_disassembler::s_flags[] =
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, _OVER, _OUT, _OUT, 0, 0,
0, 0, STEP_OVER, STEP_OUT, STEP_OUT, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0
};
static const u8 s2000_mnemonic[0x100] =
const u8 amis2000_disassembler::s2000_mnemonic[0x100] =
{
/* 0x00 */
mNOP, mHALT, mRT, mRTS, mPSH, mPSL, mAND, mSOS,
@ -98,12 +83,9 @@ static const u8 s2000_mnemonic[0x100] =
mJMP, mJMP, mJMP, mJMP, mJMP, mJMP, mJMP, mJMP
};
CPU_DISASSEMBLE(amis2000)
offs_t amis2000_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
int pos = 0;
u8 op = oprom[pos++];
u8 op = opcodes.r8(pc);
u8 instr = s2000_mnemonic[op];
util::stream_format(stream, "%-5s ", s_mnemonics[instr]);
@ -128,5 +110,10 @@ CPU_DISASSEMBLE(amis2000)
util::stream_format(stream, "$%02X", param);
}
return pos | s_flags[instr] | DASMFLAG_SUPPORTED;
return 1 | s_flags[instr] | SUPPORTED;
}
u32 amis2000_disassembler::opcode_alignment() const
{
return 1;
}

40
src/devices/cpu/amis2000/amis2000d.h Normal file
View File

@ -0,0 +1,40 @@
// license:BSD-3-Clause
// copyright-holders:hap
/*
AMI S2000-family disassembler
*/
#ifndef MAME_CPU_AMIS2000_AMIS2000D_H
#define MAME_CPU_AMIS2000_AMIS2000D_H
#pragma once
class amis2000_disassembler : public util::disasm_interface
{
public:
amis2000_disassembler() = default;
virtual ~amis2000_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
enum e_mnemonics
{
mLAB = 0, mLAE, mLAI, mLBE, mLBEP, mLBF, mLBZ, mXAB, mXABU, mXAE,
mLAM, mXC, mXCI, mXCD, mSTM, mRSM,
mADD, mADCS, mADIS, mAND, mXOR, mCMA, mSTC, mRSC, mSF1, mRF1, mSF2, mRF2,
mSAM, mSZM, mSBE, mSZC, mSOS, mSZK, mSZI, mTF1, mTF2,
mPP, mJMP, mJMS, mRT, mRTS, mNOP, mHALT,
mINP, mOUT, mDISB, mDISN, mMVS, mPSH, mPSL, mEUR
};
static const char *const s_mnemonics[];
static const s8 s_bits[];
static const u32 s_flags[];
static const u8 s2000_mnemonic[0x100];
};
#endif

7
src/devices/cpu/apexc/apexc.cpp
View File

@ -327,6 +327,7 @@ field: X address D Function Y address D (part 2)
#include "emu.h"
#include "apexc.h"
#include "apexcdsm.h"
#include "debugger.h"
@ -854,9 +855,7 @@ void apexc_cpu_device::execute_run()
} while (m_icount > 0);
}
offs_t apexc_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *apexc_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE( apexc );
return CPU_DISASSEMBLE_NAME(apexc)(this, stream, pc, oprom, opram, options);
return new apexc_disassembler;
}

4
src/devices/cpu/apexc/apexc.h
View File

@ -40,9 +40,7 @@ protected:
virtual void state_import(const device_state_entry &entry) override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
inline uint32_t apexc_readmem(uint32_t address) { return m_program->read_dword((address)<<2); }
inline void apexc_writemem(uint32_t address, uint32_t data) { m_program->write_dword((address)<<2, (data)); }

22
src/devices/cpu/apexc/apexcdsm.cpp
View File

@ -10,9 +10,7 @@
#include "emu.h"
#include "debugger.h"
#include "apexc.h"
#include "apexcdsm.h"
/*
Here is the format used for debugger output.
@ -63,15 +61,8 @@
The X value shows where the data word is located, and the Y value is the
address of the next instruction.
*/
enum format_type {branch, shiftl, shiftr, multiply, store, swap, one_address, two_address};
struct instr_desc
{
const char *mnemonic;
format_type format; /* -> X and Y are format */
};
static const instr_desc instructions[16] =
const apexc_disassembler::instr_desc apexc_disassembler::instructions[16] =
{
{ "Stop", one_address }, { "I", one_address },
{ "P", one_address }, { "B", branch },
@ -83,7 +74,12 @@ static const instr_desc instructions[16] =
{ "A", store }, { "S", swap }
};
CPU_DISASSEMBLE(apexc)
u32 apexc_disassembler::opcode_alignment() const
{
return 4;
}
offs_t apexc_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint32_t instruction; /* 32-bit machine instruction */
int x, y, function, c6, vector; /* instruction fields */
@ -92,7 +88,7 @@ CPU_DISASSEMBLE(apexc)
char mnemonic[9]; /* storage for generated mnemonic */
/* read the instruction to disassemble */
instruction = oprom[0] << 24 | oprom[1] << 16 | oprom[2] << 8 | oprom[3];
instruction = opcodes.r32(pc);
/* isolate the instruction fields */
x = (instruction >> 22) & 0x3FF;

37
src/devices/cpu/apexc/apexcdsm.h Normal file
View File

@ -0,0 +1,37 @@
// license:BSD-3-Clause
// copyright-holders:Raphael Nabet
/*
cpu/apexc/apexcsm.c : APE(X)C CPU disassembler
By Raphael Nabet
see cpu/apexc.c for background and tech info
*/
#ifndef MAME_CPU_APEXC_APEXCDSM_H
#define MAME_CPU_APEXC_APEXCDSM_H
#pragma once
class apexc_disassembler : public util::disasm_interface
{
public:
apexc_disassembler() = default;
virtual ~apexc_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
enum format_type {branch, shiftl, shiftr, multiply, store, swap, one_address, two_address};
struct instr_desc
{
const char *mnemonic;
format_type format; /* -> X and Y are format */
};
static const instr_desc instructions[16];
};
#endif

7
src/devices/cpu/arc/arc.cpp
View File

@ -12,6 +12,7 @@
#include "emu.h"
#include "debugger.h"
#include "arc.h"
#include "arcdasm.h"
DEFINE_DEVICE_TYPE(ARC, arc_cpu_device, "arc_a4", "ARCtangent A4")
@ -26,13 +27,11 @@ arc_cpu_device::arc_cpu_device(const machine_config &mconfig, const char *tag, d
}
offs_t arc_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *arc_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE( arc );
return CPU_DISASSEMBLE_NAME(arc)(this, stream, pc, oprom, opram, options);
return new arc_disassembler;
}
/*****************************************************************************/
/*****************************************************************************/

4
src/devices/cpu/arc/arc.h
View File

@ -43,9 +43,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
private:
address_space_config m_program_config;

22
src/devices/cpu/arc/arcdasm.cpp
View File

@ -7,7 +7,7 @@
\*********************************/
#include "emu.h"
#include <stdarg.h>
#include "arcdasm.h"
/*****************************************************************************/
@ -15,7 +15,7 @@
/*****************************************************************************/
static const char *basic[0x20] =
const char *const arc_disassembler::basic[0x20] =
{
/* 00 */ "LD r+r",
/* 01 */ "LD r+o",
@ -51,7 +51,7 @@ static const char *basic[0x20] =
/* 1f */ "MIN"
};
static const char *conditions[0x20] =
const char *arc_disassembler::conditions[0x20] =
{
/* 00 */ "AL", // (aka RA - Always)
/* 01 */ "EQ", // (aka Z - Zero
@ -87,7 +87,7 @@ static const char *conditions[0x20] =
/* 1f */ "0x1f Reserved"
};
static const char *delaytype[0x4] =
const char *arc_disassembler::delaytype[0x4] =
{
"ND", // NO DELAY - execute next instruction only when NOT jumping
"D", // always execute next instruction
@ -95,7 +95,7 @@ static const char *delaytype[0x4] =
"Res!", // reserved / invalid
};
static const char *regnames[0x40] =
const char *arc_disassembler::regnames[0x40] =
{
/* 0x00 */ "r00",
/* 0x01 */ "r01",
@ -180,10 +180,14 @@ static const char *regnames[0x40] =
#define ARC_REGOP_SHIMM ((op & 0x000001ff) >> 0 ) // aka D
CPU_DISASSEMBLE(arc)
u32 arc_disassembler::opcode_alignment() const
{
uint32_t op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
op = big_endianize_int32(op);
return 4;
}
offs_t arc_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint32_t op = opcodes.r32(pc);
uint8_t opcode = ARC_OPERATION;
@ -205,5 +209,5 @@ CPU_DISASSEMBLE(arc)
break;
}
return 4 | DASMFLAG_SUPPORTED;
return 4 | SUPPORTED;
}

31
src/devices/cpu/arc/arcdasm.h Normal file
View File

@ -0,0 +1,31 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
/*********************************\
ARCtangent A4 disassembler
\*********************************/
#ifndef MAME_CPU_ARC_ARCDASM_H
#define MAME_CPU_ARC_ARCDASM_H
#pragma once
class arc_disassembler : public util::disasm_interface
{
public:
arc_disassembler() = default;
virtual ~arc_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
static const char *const basic[0x20];
static const char *conditions[0x20];
static const char *delaytype[0x4];
static const char *regnames[0x40];
};
#endif

9
src/devices/cpu/arcompact/arcompact.cpp
View File

@ -21,7 +21,7 @@
#include "emu.h"
#include "debugger.h"
#include "arcompact.h"
#include "arcompact_common.h"
#include "arcompactdasm.h"
DEFINE_DEVICE_TYPE(ARCA5, arcompact_device, "arc_a5", "ARCtangent A5")
@ -64,10 +64,9 @@ device_memory_interface::space_config_vector arcompact_device::memory_space_conf
};
}
offs_t arcompact_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *arcompact_device::create_disassembler()
{
extern CPU_DISASSEMBLE( arcompact );
return CPU_DISASSEMBLE_NAME(arcompact)(this, stream, pc, oprom, opram, options);
return new arcompact_disassembler;
}
@ -104,7 +103,7 @@ void arcompact_device::device_start()
for (int i = 0x100; i < 0x140; i++)
{
state_add(i, regnames[i-0x100], m_debugger_temp).callimport().callexport().formatstr("%08X");
state_add(i, arcompact_disassembler::regnames[i-0x100], m_debugger_temp).callimport().callexport().formatstr("%08X");
}

4
src/devices/cpu/arcompact/arcompact.h
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@ -102,9 +102,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;

527
src/devices/cpu/arcompact/arcompact_common.cpp
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@ -1,527 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
/*********************************\
ARCompact Core
\*********************************/
// condition codes (basic ones are the same as arc
const char *conditions[0x20] =
{
/* 00 */ "AL", // (aka RA - Always)
/* 01 */ "EQ", // (aka Z - Zero
/* 02 */ "NE", // (aka NZ - Non-Zero)
/* 03 */ "PL", // (aka P - Positive)
/* 04 */ "MI", // (aka N - Negative)
/* 05 */ "CS", // (aka C, LO - Carry set / Lower than) (unsigned)
/* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
/* 07 */ "VS", // (aka V - Overflow set)
/* 08 */ "VC", // (aka NV - Overflow clear)
/* 09 */ "GT", // ( - Greater than) (signed)
/* 0a */ "GE", // ( - Greater than or Equal) (signed)
/* 0b */ "LT", // ( - Less than) (signed)
/* 0c */ "LE", // ( - Less than or Equal) (signed)
/* 0d */ "HI", // ( - Higher than) (unsigned)
/* 0e */ "LS", // ( - Lower or Same) (unsigned)
/* 0f */ "PNZ",// ( - Positive non-0 value)
/* 10 */ "0x10 Reserved", // possible CPU implementation specifics
/* 11 */ "0x11 Reserved",
/* 12 */ "0x12 Reserved",
/* 13 */ "0x13 Reserved",
/* 14 */ "0x14 Reserved",
/* 15 */ "0x15 Reserved",
/* 16 */ "0x16 Reserved",
/* 17 */ "0x17 Reserved",
/* 18 */ "0x18 Reserved",
/* 19 */ "0x19 Reserved",
/* 1a */ "0x1a Reserved",
/* 1b */ "0x1b Reserved",
/* 1c */ "0x1c Reserved",
/* 1d */ "0x1d Reserved",
/* 1e */ "0x1e Reserved",
/* 1f */ "0x1f Reserved"
};
#define UNUSED_REG "unusedreg"
#define AUX_UNUSED_16 \
/* 0xxx0 */ UNUSED_REG, /* 0xxx1 */ UNUSED_REG, /* 0xxx2 */ UNUSED_REG, /* 0xxx3 */ UNUSED_REG, /* 0xxx4 */ UNUSED_REG, /* 0xxx5 */ UNUSED_REG, /* 0xxx6 */ UNUSED_REG, /* 0xxx7 */ UNUSED_REG, /* 0xxx8 */ UNUSED_REG, /* 0xxx9 */ UNUSED_REG, /* 0xxxa */ UNUSED_REG, /* 0xxxb */ UNUSED_REG, /* 0xxxc */ UNUSED_REG, /* 0xxxd */ UNUSED_REG, /* 0xxxe */ UNUSED_REG, /* 0xxxf */ UNUSED_REG,
// the Auxiliary Register set is actually a 2^32 dword address space (so 16 GB / 34-bit)
// this table just allows us to improve the debugger display for some of the common core / internal ones
const char *auxregnames[0x420] =
{
/* 0x000 */ "STATUS",
/* 0x001 */ "SEMAPHOR",
/* 0x002 */ "LP_START",
/* 0x003 */ "LP_END",
/* 0x004 */ "IDENTITY",
/* 0x005 */ "DEBUG",
/* 0x006 */ "PC",
/* 0x007 */ UNUSED_REG,
/* 0x008 */ UNUSED_REG,
/* 0x009 */ UNUSED_REG,
/* 0x00a */ "STATUS32",
/* 0x00b */ "STATUS32_L1",
/* 0x00c */ "STATUS32_L2",
/* 0x00d */ UNUSED_REG,
/* 0x00e */ UNUSED_REG,
/* 0x00f */ UNUSED_REG,
/* 0x010 */ UNUSED_REG,
/* 0x011 */ UNUSED_REG,
/* 0x012 */ "MULHI", // extension register
/* 0x013 */ UNUSED_REG,
/* 0x014 */ UNUSED_REG,
/* 0x015 */ UNUSED_REG,
/* 0x016 */ UNUSED_REG,
/* 0x017 */ UNUSED_REG,
/* 0x018 */ UNUSED_REG,
/* 0x019 */ UNUSED_REG,
/* 0x01a */ UNUSED_REG,
/* 0x01b */ UNUSED_REG,
/* 0x01c */ UNUSED_REG,
/* 0x01d */ UNUSED_REG,
/* 0x01e */ UNUSED_REG,
/* 0x01f */ UNUSED_REG,
/* 0x020 */ UNUSED_REG,
/* 0x021 */ "COUNT0",
/* 0x022 */ "CONTROL0",
/* 0x023 */ "LIMIT0",
/* 0x024 */ UNUSED_REG,
/* 0x025 */ "INT_VECTOR_BASE",
/* 0x026 */ UNUSED_REG,
/* 0x027 */ UNUSED_REG,
/* 0x028 */ UNUSED_REG,
/* 0x029 */ UNUSED_REG,
/* 0x02a */ UNUSED_REG,
/* 0x02b */ UNUSED_REG,
/* 0x02c */ UNUSED_REG,
/* 0x02d */ UNUSED_REG,
/* 0x02e */ UNUSED_REG,
/* 0x02f */ UNUSED_REG,
AUX_UNUSED_16 /* 0x030 - 0x03f */
/* 0x040 */ UNUSED_REG,
/* 0x041 */ "AUX_MACMODE",
/* 0x042 */ UNUSED_REG,
/* 0x043 */ "AUX_IRQLV12",
/* 0x044 */ UNUSED_REG,
/* 0x045 */ UNUSED_REG,
/* 0x046 */ UNUSED_REG,
/* 0x047 */ UNUSED_REG,
/* 0x048 */ UNUSED_REG,
/* 0x049 */ UNUSED_REG,
/* 0x04a */ UNUSED_REG,
/* 0x04b */ UNUSED_REG,
/* 0x04c */ UNUSED_REG,
/* 0x04d */ UNUSED_REG,
/* 0x04e */ UNUSED_REG,
/* 0x04f */ UNUSED_REG,
AUX_UNUSED_16 /* 0x050 - 0x05f */
// build configuration registers 0x060 - 0x07f
/* 0x060 */ "RESERVED AUX 0x60",/* 0x061 */ "RESERVED AUX 0x61",/* 0x062 */ "RESERVED AUX 0x62",/* 0x063 */ "RESERVED AUX 0x63",/* 0x064 */ "RESERVED AUX 0x64",/* 0x065 */ "RESERVED AUX 0x65",/* 0x066 */ "RESERVED AUX 0x66",/* 0x067 */ "RESERVED AUX 0x67",/* 0x068 */ "RESERVED AUX 0x68",/* 0x069 */ "RESERVED AUX 0x69",/* 0x06a */ "RESERVED AUX 0x6a",/* 0x06b */ "RESERVED AUX 0x6b",/* 0x06c */ "RESERVED AUX 0x6c",/* 0x06d */ "RESERVED AUX 0x6d",/* 0x06e */ "RESERVED AUX 0x6e",/* 0x06f */ "RESERVED AUX 0x6f",
/* 0x070 */ "RESERVED AUX 0x70",/* 0x071 */ "RESERVED AUX 0x71",/* 0x072 */ "RESERVED AUX 0x72",/* 0x073 */ "RESERVED AUX 0x73",/* 0x074 */ "RESERVED AUX 0x74",/* 0x075 */ "RESERVED AUX 0x75",/* 0x076 */ "RESERVED AUX 0x76",/* 0x077 */ "RESERVED AUX 0x77",/* 0x078 */ "RESERVED AUX 0x78",/* 0x079 */ "RESERVED AUX 0x79",/* 0x07a */ "RESERVED AUX 0x7a",/* 0x07b */ "RESERVED AUX 0x7b",/* 0x07c */ "RESERVED AUX 0x7c",/* 0x07d */ "RESERVED AUX 0x7d",/* 0x07e */ "RESERVED AUX 0x7e",/* 0x07f */ "RESERVED AUX 0x7f",
AUX_UNUSED_16 /* 0x080 - 0x08f */
AUX_UNUSED_16 /* 0x090 - 0x09f */
AUX_UNUSED_16 /* 0x0a0 - 0x0af */
AUX_UNUSED_16 /* 0x0b0 - 0x0bf */
// build configuration registers 0x0c0 - 0x0ff
/* 0x0c0 */ "RESERVED AUX 0xc0",/* 0x0c1 */ "RESERVED AUX 0xc1",/* 0x0c2 */ "RESERVED AUX 0xc2",/* 0x0c3 */ "RESERVED AUX 0xc3",/* 0x0c4 */ "RESERVED AUX 0xc4",/* 0x0c5 */ "RESERVED AUX 0xc5",/* 0x0c6 */ "RESERVED AUX 0xc6",/* 0x0c7 */ "RESERVED AUX 0xc7",/* 0x0c8 */ "RESERVED AUX 0xc8",/* 0x0c9 */ "RESERVED AUX 0xc9",/* 0x0ca */ "RESERVED AUX 0xca",/* 0x0cb */ "RESERVED AUX 0xcb",/* 0x0cc */ "RESERVED AUX 0xcc",/* 0x0cd */ "RESERVED AUX 0xcd",/* 0x0ce */ "RESERVED AUX 0xce",/* 0x0cf */ "RESERVED AUX 0xcf",
/* 0x0d0 */ "RESERVED AUX 0xd0",/* 0x0d1 */ "RESERVED AUX 0xd1",/* 0x0d2 */ "RESERVED AUX 0xd2",/* 0x0d3 */ "RESERVED AUX 0xd3",/* 0x0d4 */ "RESERVED AUX 0xd4",/* 0x0d5 */ "RESERVED AUX 0xd5",/* 0x0d6 */ "RESERVED AUX 0xd6",/* 0x0d7 */ "RESERVED AUX 0xd7",/* 0x0d8 */ "RESERVED AUX 0xd8",/* 0x0d9 */ "RESERVED AUX 0xd9",/* 0x0da */ "RESERVED AUX 0xda",/* 0x0db */ "RESERVED AUX 0xdb",/* 0x0dc */ "RESERVED AUX 0xdc",/* 0x0dd */ "RESERVED AUX 0xdd",/* 0x0de */ "RESERVED AUX 0xde",/* 0x0df */ "RESERVED AUX 0xdf",
/* 0x0e0 */ "RESERVED AUX 0xe0",/* 0x0e1 */ "RESERVED AUX 0xe1",/* 0x0e2 */ "RESERVED AUX 0xe2",/* 0x0e3 */ "RESERVED AUX 0xe3",/* 0x0e4 */ "RESERVED AUX 0xe4",/* 0x0e5 */ "RESERVED AUX 0xe5",/* 0x0e6 */ "RESERVED AUX 0xe6",/* 0x0e7 */ "RESERVED AUX 0xe7",/* 0x0e8 */ "RESERVED AUX 0xe8",/* 0x0e9 */ "RESERVED AUX 0xe9",/* 0x0ea */ "RESERVED AUX 0xea",/* 0x0eb */ "RESERVED AUX 0xeb",/* 0x0ec */ "RESERVED AUX 0xec",/* 0x0ed */ "RESERVED AUX 0xed",/* 0x0ee */ "RESERVED AUX 0xee",/* 0x0ef */ "RESERVED AUX 0xef",
/* 0x0f0 */ "RESERVED AUX 0xf0",/* 0x0f1 */ "RESERVED AUX 0xf1",/* 0x0f2 */ "RESERVED AUX 0xf2",/* 0x0f3 */ "RESERVED AUX 0xf3",/* 0x0f4 */ "RESERVED AUX 0xf4",/* 0x0f5 */ "RESERVED AUX 0xf5",/* 0x0f6 */ "RESERVED AUX 0xf6",/* 0x0f7 */ "RESERVED AUX 0xf7",/* 0x0f8 */ "RESERVED AUX 0xf8",/* 0x0f9 */ "RESERVED AUX 0xf9",/* 0x0fa */ "RESERVED AUX 0xfa",/* 0x0fb */ "RESERVED AUX 0xfb",/* 0x0fc */ "RESERVED AUX 0xfc",/* 0x0fd */ "RESERVED AUX 0xfd",/* 0x0fe */ "RESERVED AUX 0xfe",/* 0x0ff */ "RESERVED AUX 0xff",
/* 0x100 */ "COUNT1",
/* 0x101 */ "CONTROL1",
/* 0x102 */ "LIMIT1",
/* 0x103 */ UNUSED_REG,
/* 0x104 */ UNUSED_REG,
/* 0x105 */ UNUSED_REG,
/* 0x106 */ UNUSED_REG,
/* 0x107 */ UNUSED_REG,
/* 0x108 */ UNUSED_REG,
/* 0x109 */ UNUSED_REG,
/* 0x10a */ UNUSED_REG,
/* 0x10b */ UNUSED_REG,
/* 0x10c */ UNUSED_REG,
/* 0x10d */ UNUSED_REG,
/* 0x10e */ UNUSED_REG,
/* 0x10f */ UNUSED_REG,
AUX_UNUSED_16 /* 0x110 - 0x11f */
AUX_UNUSED_16 /* 0x120 - 0x12f */
AUX_UNUSED_16 /* 0x130 - 0x13f */
AUX_UNUSED_16 /* 0x140 - 0x14f */
AUX_UNUSED_16 /* 0x150 - 0x15f */
AUX_UNUSED_16 /* 0x160 - 0x16f */
AUX_UNUSED_16 /* 0x170 - 0x17f */
AUX_UNUSED_16 /* 0x180 - 0x18f */
AUX_UNUSED_16 /* 0x190 - 0x19f */
AUX_UNUSED_16 /* 0x1a0 - 0x1af */
AUX_UNUSED_16 /* 0x1b0 - 0x1bf */
AUX_UNUSED_16 /* 0x1c0 - 0x1cf */
AUX_UNUSED_16 /* 0x1d0 - 0x1df */
AUX_UNUSED_16 /* 0x1e0 - 0x1ef */
AUX_UNUSED_16 /* 0x1f0 - 0x1ff */
/* 0x200 */ "AUX_IRQ_LEV",
/* 0x201 */ "AUX_IRQ_HINT",
/* 0x203 */ UNUSED_REG,
/* 0x203 */ UNUSED_REG,
/* 0x204 */ UNUSED_REG,
/* 0x205 */ UNUSED_REG,
/* 0x206 */ UNUSED_REG,
/* 0x207 */ UNUSED_REG,
/* 0x208 */ UNUSED_REG,
/* 0x209 */ UNUSED_REG,
/* 0x20a */ UNUSED_REG,
/* 0x20b */ UNUSED_REG,
/* 0x20c */ UNUSED_REG,
/* 0x20d */ UNUSED_REG,
/* 0x20e */ UNUSED_REG,
/* 0x20f */ UNUSED_REG,
AUX_UNUSED_16 /* 0x210 - 0x21f */
AUX_UNUSED_16 /* 0x220 - 0x22f */
AUX_UNUSED_16 /* 0x230 - 0x23f */
AUX_UNUSED_16 /* 0x240 - 0x24f */
AUX_UNUSED_16 /* 0x250 - 0x25f */
AUX_UNUSED_16 /* 0x260 - 0x26f */
AUX_UNUSED_16 /* 0x270 - 0x27f */
AUX_UNUSED_16 /* 0x280 - 0x28f */
AUX_UNUSED_16 /* 0x290 - 0x29f */
AUX_UNUSED_16 /* 0x2a0 - 0x2af */
AUX_UNUSED_16 /* 0x2b0 - 0x2bf */
AUX_UNUSED_16 /* 0x2c0 - 0x2cf */
AUX_UNUSED_16 /* 0x2d0 - 0x2df */
AUX_UNUSED_16 /* 0x2e0 - 0x2ef */
AUX_UNUSED_16 /* 0x2f0 - 0x2ff */
AUX_UNUSED_16 /* 0x300 - 0x30f */
AUX_UNUSED_16 /* 0x310 - 0x31f */
AUX_UNUSED_16 /* 0x320 - 0x32f */
AUX_UNUSED_16 /* 0x330 - 0x33f */
AUX_UNUSED_16 /* 0x340 - 0x34f */
AUX_UNUSED_16 /* 0x350 - 0x35f */
AUX_UNUSED_16 /* 0x360 - 0x36f */
AUX_UNUSED_16 /* 0x370 - 0x37f */
AUX_UNUSED_16 /* 0x380 - 0x38f */
AUX_UNUSED_16 /* 0x390 - 0x39f */
AUX_UNUSED_16 /* 0x3a0 - 0x3af */
AUX_UNUSED_16 /* 0x3b0 - 0x3bf */
AUX_UNUSED_16 /* 0x3c0 - 0x3cf */
AUX_UNUSED_16 /* 0x3d0 - 0x3df */
AUX_UNUSED_16 /* 0x3e0 - 0x3ef */
AUX_UNUSED_16 /* 0x3f0 - 0x3ff */
/* 0x400 */ "ERET",
/* 0x401 */ "ERBTA",
/* 0x403 */ "ERSTATUS",
/* 0x403 */ "ECR",
/* 0x404 */ "EFA",
/* 0x405 */ UNUSED_REG,
/* 0x406 */ UNUSED_REG,
/* 0x407 */ UNUSED_REG,
/* 0x408 */ UNUSED_REG,
/* 0x409 */ UNUSED_REG,
/* 0x40a */ "ICAUSE1",
/* 0x40b */ "ICAUSE2",
/* 0x40c */ "AUX_IENABLE",
/* 0x40d */ "AUX_ITRIGGER",
/* 0x40e */ UNUSED_REG,
/* 0x40f */ UNUSED_REG,
/* 0x410 */ "XPU",
/* 0x411 */ UNUSED_REG,
/* 0x412 */ "BTA",
/* 0x413 */ "BTA_L1",
/* 0x414 */ "BTA_L2",
/* 0x415 */ "AUX_IRQ_PULSE_CANCEL",
/* 0x416 */ "AUX_IRQ_PENDING",
/* 0x417 */ UNUSED_REG,
/* 0x418 */ UNUSED_REG,
/* 0x419 */ UNUSED_REG,
/* 0x41a */ UNUSED_REG,
/* 0x41b */ UNUSED_REG,
/* 0x41c */ UNUSED_REG,
/* 0x41d */ UNUSED_REG,
/* 0x41e */ UNUSED_REG,
/* 0x41f */ UNUSED_REG
};
//#define EXPLICIT_EXTENSIONS
const char *datasize[0x4] =
{
#ifdef EXPLICIT_EXTENSIONS
/* 00 */ ".L", // Dword (default) (can use no extension, using .L to be explicit)
#else
/* 00 */ "",// Dword (default)
#endif
/* 01 */ ".B", // Byte
/* 02 */ ".W", // Word
/* 03 */ ".<illegal data size>"
};
const char *dataextend[0x2] =
{
#ifdef EXPLICIT_EXTENSIONS
/* 00 */ ".ZX", // Zero Extend (can use no extension, using .ZX to be explicit)
#else
/* 00 */ "", // Zero Extend
#endif
/* 01 */ ".X" // Sign Extend
};
const char *addressmode[0x4] =
{
#ifdef EXPLICIT_EXTENSIONS
/* 00 */ ".AN", // No Writeback (can use no extension, using .AN to be explicit)
#else
/* 00 */ "", // No Writeback
#endif
/* 01 */ ".AW", // Writeback pre memory access
/* 02 */ ".AB", // Writeback post memory access
/* 03 */ ".AS" // scaled
};
const char *cachebit[0x2] =
{
#ifdef EXPLICIT_EXTENSIONS
/* 00 */ ".EN", // Data Cache Enabled (can use no extension, using .EN to be explicit)
#else
/* 00 */ "", // Data Cache Enabled
#endif
/* 01 */ ".DI" // Direct to Memory (Cache Bypass)
};
const char *flagbit[0x2] =
{
#ifdef EXPLICIT_EXTENSIONS
/* 00 */ ".NF", // Don't Set Flags (can use no extension, using .NF to be explicit)
#else
/* 00 */ "", // Don't Set Flags
#endif
/* 01 */ ".F" // Set Flags
};
const char *delaybit[0x2] =
{
/* 00 */ ".ND", // Don't execute opcode in delay slot
/* 01 */ ".D" // Execute Opcode in delay slot
};
const char *regnames[0x40] =
{
/* 00 */ "r0",
/* 01 */ "r1",
/* 02 */ "r2",
/* 03 */ "r3",
/* 04 */ "r4",
/* 05 */ "r5",
/* 06 */ "r6",
/* 07 */ "r7",
/* 08 */ "r8",
/* 09 */ "r9",
/* 0a */ "r10",
/* 0b */ "r11",
/* 0c */ "r12",
/* 0d */ "r13",
/* 0e */ "r14",
/* 0f */ "r15",
/* 10 */ "r16",
/* 11 */ "r17",
/* 12 */ "r18",
/* 13 */ "r19",
/* 14 */ "r20",
/* 15 */ "r21",
/* 16 */ "r22",
/* 17 */ "r23",
/* 18 */ "r24",
/* 19 */ "r25",
/* 1a */ "r26_GP",
/* 1b */ "r27_FP",
/* 1c */ "r28_SP",
/* 1d */ "r29_ILINK1",
/* 1e */ "r30_ILINK2",
/* 1f */ "r31_BLINK",
/* 20 */ "r32(ext)",
/* 21 */ "r33(ext)",
/* 22 */ "r34(ext)",
/* 23 */ "r35(ext)",
/* 24 */ "r36(ext)",
/* 25 */ "r37(ext)",
/* 26 */ "r38(ext)",
/* 27 */ "r39(ext)",
/* 28 */ "r40(ext)",
/* 29 */ "r41(ext)",
/* 2a */ "r42(ext)",
/* 2b */ "r43(ext)",
/* 2c */ "r44(ext)",
/* 2d */ "r45(ext)",
/* 2e */ "r46(ext)",
/* 2f */ "r47(ext)",
/* 30 */ "r48(ext)",
/* 31 */ "r49(ext)",
/* 32 */ "r50(ext)",
/* 33 */ "r51(ext)",
/* 34 */ "r52(ext)",
/* 35 */ "r53(ext)",
/* 36 */ "r54(ext)",
/* 37 */ "r55(ext)",
/* 38 */ "r56(ext)",
/* 39 */ "r57(M-LO)", // MLO (result registers for optional multply functions)
/* 3a */ "r58(M-MID)", // MMID
/* 3b */ "r59(M-HI)", // MHI
/* 3c */ "r60(LP_COUNT)",
/* 3d */ "r61(reserved)",
/* 3e */ "r62(LIMM)", // use Long Immediate Data instead of register
/* 3f */ "r63(PCL)"
};
#if 0
const char *opcodes_temp[0x40] =
{
/* 00 */ "0x00",
/* 01 */ "0x01",
/* 02 */ "0x02",
/* 03 */ "0x03",
/* 04 */ "0x04",
/* 05 */ "0x05",
/* 06 */ "0x06",
/* 07 */ "0x07",
/* 08 */ "0x08",
/* 09 */ "0x09",
/* 0a */ "0x0a",
/* 0b */ "0x0b",
/* 0c */ "0x0c",
/* 0d */ "0x0d",
/* 0e */ "0x0e",
/* 0f */ "0x0f",
/* 10 */ "0x10",
/* 11 */ "0x11",
/* 12 */ "0x12",
/* 13 */ "0x13",
/* 14 */ "0x14",
/* 15 */ "0x15",
/* 16 */ "0x16",
/* 17 */ "0x17",
/* 18 */ "0x18",
/* 19 */ "0x19",
/* 1a */ "0x1a",
/* 1b */ "0x1b",
/* 1c */ "0x1c",
/* 1d */ "0x1d",
/* 1e */ "0x1e",
/* 1f */ "0x1f",
/* 20 */ "0x20",
/* 21 */ "0x21",
/* 22 */ "0x22",
/* 23 */ "0x23",
/* 24 */ "0x24",
/* 25 */ "0x25",
/* 26 */ "0x26",
/* 27 */ "0x27",
/* 28 */ "0x28",
/* 29 */ "0x29",
/* 2a */ "0x2a",
/* 2b */ "0x2b",
/* 2c */ "0x2c",
/* 2d */ "0x2d",
/* 2e */ "0x2e",
/* 2f */ "0x2f",
/* 30 */ "0x30",
/* 31 */ "0x31",
/* 32 */ "0x32",
/* 33 */ "0x33",
/* 34 */ "0x34",
/* 35 */ "0x35",
/* 36 */ "0x36",
/* 37 */ "0x37",
/* 38 */ "0x38",
/* 39 */ "0x39",
/* 3a */ "0x3a",
/* 3b */ "0x3b",
/* 3c */ "0x3c",
/* 3d */ "0x3d",
/* 3e */ "0x3e",
/* 3f */ "0x3f",
};
#endif
const char *opcodes_04[0x40] =
{
/* 00 */ "ADD",
/* 01 */ "ADC",
/* 02 */ "SUB",
/* 03 */ "SBC",
/* 04 */ "AND",
/* 05 */ "OR",
/* 06 */ "BIC",
/* 07 */ "XOR",
/* 08 */ "MAX",
/* 09 */ "MIN",
/* 0a */ "MOV",
/* 0b */ "TST",
/* 0c */ "CMP",
/* 0d */ "RCMP",
/* 0e */ "RSUB",
/* 0f */ "BSET",
/* 10 */ "BCLR",
/* 11 */ "BTST",
/* 12 */ "BXOR",
/* 13 */ "BSMK",
/* 14 */ "ADD1",
/* 15 */ "ADD2",
/* 16 */ "ADD3",
/* 17 */ "SUB1",
/* 18 */ "SUB2",
/* 19 */ "SUB3",
/* 1a */ "MPY",
/* 1b */ "MPYH",
/* 1c */ "MPYHU",
/* 1d */ "MPYU",
/* 1e */ "0x1e",
/* 1f */ "0x1f",
/* 20 */ "Jcc",
/* 21 */ "Jcc.D",
/* 22 */ "JLcc",
/* 23 */ "JLcc.D",
/* 24 */ "0x24",
/* 25 */ "0x25",
/* 26 */ "0x26",
/* 27 */ "0x27",
/* 28 */ "LPcc",
/* 29 */ "FLAG",
/* 2a */ "LR",
/* 2b */ "SR",
/* 2c */ "0x2c",
/* 2d */ "0x2d",
/* 2e */ "0x2e",
/* 2f */ "SOP table",
/* 30 */ "LD",
/* 31 */ "LD",
/* 32 */ "LD",
/* 33 */ "LD",
/* 34 */ "LD",
/* 35 */ "LD",
/* 36 */ "LD",
/* 37 */ "LD",
/* 38 */ "0x38",
/* 39 */ "0x39",
/* 3a */ "0x3a",
/* 3b */ "0x3b",
/* 3c */ "0x3c",
/* 3d */ "0x3d",
/* 3e */ "0x3e",
/* 3f */ "0x3f",
};

24
src/devices/cpu/arcompact/arcompact_common.h
View File

@ -1,24 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
/*********************************\
ARCompact Core
\*********************************/
extern const char *conditions[0x20];
extern const char *auxregnames[0x420];
extern const char *datasize[0x4];
extern const char *dataextend[0x2];
extern const char *addressmode[0x4];
extern const char *cachebit[0x2];
extern const char *flagbit[0x2];
extern const char *delaybit[0x2];
extern const char *regnames[0x40];
extern const char *opcodes_04[0x40];
#define REG_BLINK (0x1f) // r31
#define REG_SP (0x1c) // r28
#define REG_ILINK1 (0x1d) // r29
#define REG_ILINK2 (0x1e) // r30
#define REG_LP_COUNT (0x3c) // r60

98
src/devices/cpu/arcompact/arcompact_execute.cpp
View File

@ -4,7 +4,13 @@
#include "emu.h"
#include "debugger.h"
#include "arcompact.h"
#include "arcompact_common.h"
#include "arcompactdasm.h"
#define REG_BLINK (0x1f) // r31
#define REG_SP (0x1c) // r28
#define REG_ILINK1 (0x1d) // r29
#define REG_ILINK2 (0x1e) // r30
#define REG_LP_COUNT (0x3c) // r60
#define ARCOMPACT_LOGGING 1
@ -128,35 +134,35 @@ int arcompact_device::check_condition(uint8_t condition)
case 0x00: return 1; // AL
case 0x01: return CONDITION_EQ;
case 0x02: return !CONDITION_EQ; // NE
case 0x03: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x03: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x04: return CONDITION_MI; // MI (N)
case 0x05: return CONDITION_CS; // CS (Carry Set / Lower than)
case 0x06: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x07: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x08: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x09: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0a: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0b: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0c: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0d: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0e: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x0f: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x10: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x11: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x12: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x13: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x14: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x15: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x16: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x17: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x18: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x19: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1a: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1b: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1c: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1d: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1e: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x1f: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
case 0x06: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x07: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x08: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x09: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x0a: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x0b: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x0c: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x0d: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x0e: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x0f: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x10: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x11: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x12: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x13: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x14: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x15: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x16: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x17: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x18: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x19: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x1a: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x1b: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x1c: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x1d: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x1e: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
case 0x1f: fatalerror("unhandled condition check %s", arcompact_disassembler::conditions[condition]); return -1;
}
return -1;
@ -1844,58 +1850,58 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_helper(OPS_32, const char
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_01(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x01], /*"ADC"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x01], /*"ADC"*/ 0,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_03(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x03], /*"SBC"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x03], /*"SBC"*/ 0,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_08(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x08], /*"MAX"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x08], /*"MAX"*/ 0,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_09(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x09], /*"MIN"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x09], /*"MIN"*/ 0,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0b(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x0b], /*"TST"*/ 1,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x0b], /*"TST"*/ 1,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0c(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x0c], /*"CMP"*/ 1,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x0c], /*"CMP"*/ 1,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0d(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x0d], /*"RCMP"*/ 1,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x0d], /*"RCMP"*/ 1,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_10(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x10], /*"BCLR"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x10], /*"BCLR"*/ 0,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_11(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x11], /*"BTST"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x11], /*"BTST"*/ 0,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_12(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x12], /*"BXOR"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x12], /*"BXOR"*/ 0,0);
}
@ -1905,22 +1911,22 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_12(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1a(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x1a], /*"MPY"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x1a], /*"MPY"*/ 0,0);
} // *
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1b(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x1b], /*"MPYH"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x1b], /*"MPYH"*/ 0,0);
} // *
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1c(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x1c], /*"MPYHU"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x1c], /*"MPYHU"*/ 0,0);
} // *
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1d(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x1d], /*"MPYU"*/ 0,0);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x1d], /*"MPYU"*/ 0,0);
} // *
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p00(OPS_32)
@ -2202,12 +2208,12 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p11_m1(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_22(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x22], /*"JL"*/ 1,1);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x22], /*"JL"*/ 1,1);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_23(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x23], /*"JL.D"*/ 1,1);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x23], /*"JL.D"*/ 1,1);
}
@ -2238,7 +2244,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_28(OPS_32) // LPcc (loop
{ // 0010 0RRR 1110 1000 0RRR uuuu uu1Q QQQQ
COMMON32_GET_u6
COMMON32_GET_CONDITION
//arcompact_fatal("Lp conditional %s not supported %d", conditions[condition], u);
//arcompact_fatal("Lp conditional %s not supported %d", arcompact_disassembler::conditions[condition], u);
// if the loop condition fails then just jump to after the end of the loop, don't set any registers
if (!check_condition(condition))
@ -2264,7 +2270,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_28(OPS_32) // LPcc (loop
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_29(OPS_32)
{
// leapster bios uses formats for FLAG that are not defined, bug I guess work anyway (P modes 0 / 1)
return arcompact_handle04_helper(PARAMS, opcodes_04[0x29], /*"FLAG"*/ 1,1);
return arcompact_handle04_helper(PARAMS, arcompact_disassembler::opcodes_04[0x29], /*"FLAG"*/ 1,1);
}

599
src/devices/cpu/arcompact/arcompactdasm.cpp
View File

@ -7,51 +7,564 @@
\*********************************/
#include "emu.h"
#include <stdarg.h>
#include "arcompactdasm.h"
#include "arcompactdasm_dispatch.h"
#include "arcompactdasm_ops.h"
u32 arcompact_disassembler::opcode_alignment() const
{
return 2;
}
/*****************************************************************************/
// condition codes (basic ones are the same as arc
const char *const arcompact_disassembler::conditions[0x20] =
{
/* 00 */ "AL", // (aka RA - Always)
/* 01 */ "EQ", // (aka Z - Zero
/* 02 */ "NE", // (aka NZ - Non-Zero)
/* 03 */ "PL", // (aka P - Positive)
/* 04 */ "MI", // (aka N - Negative)
/* 05 */ "CS", // (aka C, LO - Carry set / Lower than) (unsigned)
/* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
/* 07 */ "VS", // (aka V - Overflow set)
/* 08 */ "VC", // (aka NV - Overflow clear)
/* 09 */ "GT", // ( - Greater than) (signed)
/* 0a */ "GE", // ( - Greater than or Equal) (signed)
/* 0b */ "LT", // ( - Less than) (signed)
/* 0c */ "LE", // ( - Less than or Equal) (signed)
/* 0d */ "HI", // ( - Higher than) (unsigned)
/* 0e */ "LS", // ( - Lower or Same) (unsigned)
/* 0f */ "PNZ",// ( - Positive non-0 value)
/* 10 */ "0x10 Reserved", // possible CPU implementation specifics
/* 11 */ "0x11 Reserved",
/* 12 */ "0x12 Reserved",
/* 13 */ "0x13 Reserved",
/* 14 */ "0x14 Reserved",
/* 15 */ "0x15 Reserved",
/* 16 */ "0x16 Reserved",
/* 17 */ "0x17 Reserved",
/* 18 */ "0x18 Reserved",
/* 19 */ "0x19 Reserved",
/* 1a */ "0x1a Reserved",
/* 1b */ "0x1b Reserved",
/* 1c */ "0x1c Reserved",
/* 1d */ "0x1d Reserved",
/* 1e */ "0x1e Reserved",
/* 1f */ "0x1f Reserved"
};
#define UNUSED_REG "unusedreg"
#define AUX_UNUSED_16 \
/* 0xxx0 */ UNUSED_REG, /* 0xxx1 */ UNUSED_REG, /* 0xxx2 */ UNUSED_REG, /* 0xxx3 */ UNUSED_REG, /* 0xxx4 */ UNUSED_REG, /* 0xxx5 */ UNUSED_REG, /* 0xxx6 */ UNUSED_REG, /* 0xxx7 */ UNUSED_REG, /* 0xxx8 */ UNUSED_REG, /* 0xxx9 */ UNUSED_REG, /* 0xxxa */ UNUSED_REG, /* 0xxxb */ UNUSED_REG, /* 0xxxc */ UNUSED_REG, /* 0xxxd */ UNUSED_REG, /* 0xxxe */ UNUSED_REG, /* 0xxxf */ UNUSED_REG,
// the Auxiliary Register set is actually a 2^32 dword address space (so 16 GB / 34-bit)
// this table just allows us to improve the debugger display for some of the common core / internal ones
const char *const arcompact_disassembler::auxregnames[0x420] =
{
/* 0x000 */ "STATUS",
/* 0x001 */ "SEMAPHOR",
/* 0x002 */ "LP_START",
/* 0x003 */ "LP_END",
/* 0x004 */ "IDENTITY",
/* 0x005 */ "DEBUG",
/* 0x006 */ "PC",
/* 0x007 */ UNUSED_REG,
/* 0x008 */ UNUSED_REG,
/* 0x009 */ UNUSED_REG,
/* 0x00a */ "STATUS32",
/* 0x00b */ "STATUS32_L1",
/* 0x00c */ "STATUS32_L2",
/* 0x00d */ UNUSED_REG,
/* 0x00e */ UNUSED_REG,
/* 0x00f */ UNUSED_REG,
/* 0x010 */ UNUSED_REG,
/* 0x011 */ UNUSED_REG,
/* 0x012 */ "MULHI", // extension register
/* 0x013 */ UNUSED_REG,
/* 0x014 */ UNUSED_REG,
/* 0x015 */ UNUSED_REG,
/* 0x016 */ UNUSED_REG,
/* 0x017 */ UNUSED_REG,
/* 0x018 */ UNUSED_REG,
/* 0x019 */ UNUSED_REG,
/* 0x01a */ UNUSED_REG,
/* 0x01b */ UNUSED_REG,
/* 0x01c */ UNUSED_REG,
/* 0x01d */ UNUSED_REG,
/* 0x01e */ UNUSED_REG,
/* 0x01f */ UNUSED_REG,
/* 0x020 */ UNUSED_REG,
/* 0x021 */ "COUNT0",
/* 0x022 */ "CONTROL0",
/* 0x023 */ "LIMIT0",
/* 0x024 */ UNUSED_REG,
/* 0x025 */ "INT_VECTOR_BASE",
/* 0x026 */ UNUSED_REG,
/* 0x027 */ UNUSED_REG,
/* 0x028 */ UNUSED_REG,
/* 0x029 */ UNUSED_REG,
/* 0x02a */ UNUSED_REG,
/* 0x02b */ UNUSED_REG,
/* 0x02c */ UNUSED_REG,
/* 0x02d */ UNUSED_REG,
/* 0x02e */ UNUSED_REG,
/* 0x02f */ UNUSED_REG,
AUX_UNUSED_16 /* 0x030 - 0x03f */
/* 0x040 */ UNUSED_REG,
/* 0x041 */ "AUX_MACMODE",
/* 0x042 */ UNUSED_REG,
/* 0x043 */ "AUX_IRQLV12",
/* 0x044 */ UNUSED_REG,
/* 0x045 */ UNUSED_REG,
/* 0x046 */ UNUSED_REG,
/* 0x047 */ UNUSED_REG,
/* 0x048 */ UNUSED_REG,
/* 0x049 */ UNUSED_REG,
/* 0x04a */ UNUSED_REG,
/* 0x04b */ UNUSED_REG,
/* 0x04c */ UNUSED_REG,
/* 0x04d */ UNUSED_REG,
/* 0x04e */ UNUSED_REG,
/* 0x04f */ UNUSED_REG,
AUX_UNUSED_16 /* 0x050 - 0x05f */
// build configuration registers 0x060 - 0x07f
/* 0x060 */ "RESERVED AUX 0x60",/* 0x061 */ "RESERVED AUX 0x61",/* 0x062 */ "RESERVED AUX 0x62",/* 0x063 */ "RESERVED AUX 0x63",/* 0x064 */ "RESERVED AUX 0x64",/* 0x065 */ "RESERVED AUX 0x65",/* 0x066 */ "RESERVED AUX 0x66",/* 0x067 */ "RESERVED AUX 0x67",/* 0x068 */ "RESERVED AUX 0x68",/* 0x069 */ "RESERVED AUX 0x69",/* 0x06a */ "RESERVED AUX 0x6a",/* 0x06b */ "RESERVED AUX 0x6b",/* 0x06c */ "RESERVED AUX 0x6c",/* 0x06d */ "RESERVED AUX 0x6d",/* 0x06e */ "RESERVED AUX 0x6e",/* 0x06f */ "RESERVED AUX 0x6f",
/* 0x070 */ "RESERVED AUX 0x70",/* 0x071 */ "RESERVED AUX 0x71",/* 0x072 */ "RESERVED AUX 0x72",/* 0x073 */ "RESERVED AUX 0x73",/* 0x074 */ "RESERVED AUX 0x74",/* 0x075 */ "RESERVED AUX 0x75",/* 0x076 */ "RESERVED AUX 0x76",/* 0x077 */ "RESERVED AUX 0x77",/* 0x078 */ "RESERVED AUX 0x78",/* 0x079 */ "RESERVED AUX 0x79",/* 0x07a */ "RESERVED AUX 0x7a",/* 0x07b */ "RESERVED AUX 0x7b",/* 0x07c */ "RESERVED AUX 0x7c",/* 0x07d */ "RESERVED AUX 0x7d",/* 0x07e */ "RESERVED AUX 0x7e",/* 0x07f */ "RESERVED AUX 0x7f",
AUX_UNUSED_16 /* 0x080 - 0x08f */
AUX_UNUSED_16 /* 0x090 - 0x09f */
AUX_UNUSED_16 /* 0x0a0 - 0x0af */
AUX_UNUSED_16 /* 0x0b0 - 0x0bf */
// build configuration registers 0x0c0 - 0x0ff
/* 0x0c0 */ "RESERVED AUX 0xc0",/* 0x0c1 */ "RESERVED AUX 0xc1",/* 0x0c2 */ "RESERVED AUX 0xc2",/* 0x0c3 */ "RESERVED AUX 0xc3",/* 0x0c4 */ "RESERVED AUX 0xc4",/* 0x0c5 */ "RESERVED AUX 0xc5",/* 0x0c6 */ "RESERVED AUX 0xc6",/* 0x0c7 */ "RESERVED AUX 0xc7",/* 0x0c8 */ "RESERVED AUX 0xc8",/* 0x0c9 */ "RESERVED AUX 0xc9",/* 0x0ca */ "RESERVED AUX 0xca",/* 0x0cb */ "RESERVED AUX 0xcb",/* 0x0cc */ "RESERVED AUX 0xcc",/* 0x0cd */ "RESERVED AUX 0xcd",/* 0x0ce */ "RESERVED AUX 0xce",/* 0x0cf */ "RESERVED AUX 0xcf",
/* 0x0d0 */ "RESERVED AUX 0xd0",/* 0x0d1 */ "RESERVED AUX 0xd1",/* 0x0d2 */ "RESERVED AUX 0xd2",/* 0x0d3 */ "RESERVED AUX 0xd3",/* 0x0d4 */ "RESERVED AUX 0xd4",/* 0x0d5 */ "RESERVED AUX 0xd5",/* 0x0d6 */ "RESERVED AUX 0xd6",/* 0x0d7 */ "RESERVED AUX 0xd7",/* 0x0d8 */ "RESERVED AUX 0xd8",/* 0x0d9 */ "RESERVED AUX 0xd9",/* 0x0da */ "RESERVED AUX 0xda",/* 0x0db */ "RESERVED AUX 0xdb",/* 0x0dc */ "RESERVED AUX 0xdc",/* 0x0dd */ "RESERVED AUX 0xdd",/* 0x0de */ "RESERVED AUX 0xde",/* 0x0df */ "RESERVED AUX 0xdf",
/* 0x0e0 */ "RESERVED AUX 0xe0",/* 0x0e1 */ "RESERVED AUX 0xe1",/* 0x0e2 */ "RESERVED AUX 0xe2",/* 0x0e3 */ "RESERVED AUX 0xe3",/* 0x0e4 */ "RESERVED AUX 0xe4",/* 0x0e5 */ "RESERVED AUX 0xe5",/* 0x0e6 */ "RESERVED AUX 0xe6",/* 0x0e7 */ "RESERVED AUX 0xe7",/* 0x0e8 */ "RESERVED AUX 0xe8",/* 0x0e9 */ "RESERVED AUX 0xe9",/* 0x0ea */ "RESERVED AUX 0xea",/* 0x0eb */ "RESERVED AUX 0xeb",/* 0x0ec */ "RESERVED AUX 0xec",/* 0x0ed */ "RESERVED AUX 0xed",/* 0x0ee */ "RESERVED AUX 0xee",/* 0x0ef */ "RESERVED AUX 0xef",
/* 0x0f0 */ "RESERVED AUX 0xf0",/* 0x0f1 */ "RESERVED AUX 0xf1",/* 0x0f2 */ "RESERVED AUX 0xf2",/* 0x0f3 */ "RESERVED AUX 0xf3",/* 0x0f4 */ "RESERVED AUX 0xf4",/* 0x0f5 */ "RESERVED AUX 0xf5",/* 0x0f6 */ "RESERVED AUX 0xf6",/* 0x0f7 */ "RESERVED AUX 0xf7",/* 0x0f8 */ "RESERVED AUX 0xf8",/* 0x0f9 */ "RESERVED AUX 0xf9",/* 0x0fa */ "RESERVED AUX 0xfa",/* 0x0fb */ "RESERVED AUX 0xfb",/* 0x0fc */ "RESERVED AUX 0xfc",/* 0x0fd */ "RESERVED AUX 0xfd",/* 0x0fe */ "RESERVED AUX 0xfe",/* 0x0ff */ "RESERVED AUX 0xff",
/* 0x100 */ "COUNT1",
/* 0x101 */ "CONTROL1",
/* 0x102 */ "LIMIT1",
/* 0x103 */ UNUSED_REG,
/* 0x104 */ UNUSED_REG,
/* 0x105 */ UNUSED_REG,
/* 0x106 */ UNUSED_REG,
/* 0x107 */ UNUSED_REG,
/* 0x108 */ UNUSED_REG,
/* 0x109 */ UNUSED_REG,
/* 0x10a */ UNUSED_REG,
/* 0x10b */ UNUSED_REG,
/* 0x10c */ UNUSED_REG,
/* 0x10d */ UNUSED_REG,
/* 0x10e */ UNUSED_REG,
/* 0x10f */ UNUSED_REG,
AUX_UNUSED_16 /* 0x110 - 0x11f */
AUX_UNUSED_16 /* 0x120 - 0x12f */
AUX_UNUSED_16 /* 0x130 - 0x13f */
AUX_UNUSED_16 /* 0x140 - 0x14f */
AUX_UNUSED_16 /* 0x150 - 0x15f */
AUX_UNUSED_16 /* 0x160 - 0x16f */
AUX_UNUSED_16 /* 0x170 - 0x17f */
AUX_UNUSED_16 /* 0x180 - 0x18f */
AUX_UNUSED_16 /* 0x190 - 0x19f */
AUX_UNUSED_16 /* 0x1a0 - 0x1af */
AUX_UNUSED_16 /* 0x1b0 - 0x1bf */
AUX_UNUSED_16 /* 0x1c0 - 0x1cf */
AUX_UNUSED_16 /* 0x1d0 - 0x1df */
AUX_UNUSED_16 /* 0x1e0 - 0x1ef */
AUX_UNUSED_16 /* 0x1f0 - 0x1ff */
/* 0x200 */ "AUX_IRQ_LEV",
/* 0x201 */ "AUX_IRQ_HINT",
/* 0x203 */ UNUSED_REG,
/* 0x203 */ UNUSED_REG,
/* 0x204 */ UNUSED_REG,
/* 0x205 */ UNUSED_REG,
/* 0x206 */ UNUSED_REG,
/* 0x207 */ UNUSED_REG,
/* 0x208 */ UNUSED_REG,
/* 0x209 */ UNUSED_REG,
/* 0x20a */ UNUSED_REG,
/* 0x20b */ UNUSED_REG,
/* 0x20c */ UNUSED_REG,
/* 0x20d */ UNUSED_REG,
/* 0x20e */ UNUSED_REG,
/* 0x20f */ UNUSED_REG,
AUX_UNUSED_16 /* 0x210 - 0x21f */
AUX_UNUSED_16 /* 0x220 - 0x22f */
AUX_UNUSED_16 /* 0x230 - 0x23f */
AUX_UNUSED_16 /* 0x240 - 0x24f */
AUX_UNUSED_16 /* 0x250 - 0x25f */
AUX_UNUSED_16 /* 0x260 - 0x26f */
AUX_UNUSED_16 /* 0x270 - 0x27f */
AUX_UNUSED_16 /* 0x280 - 0x28f */
AUX_UNUSED_16 /* 0x290 - 0x29f */
AUX_UNUSED_16 /* 0x2a0 - 0x2af */
AUX_UNUSED_16 /* 0x2b0 - 0x2bf */
AUX_UNUSED_16 /* 0x2c0 - 0x2cf */
AUX_UNUSED_16 /* 0x2d0 - 0x2df */
AUX_UNUSED_16 /* 0x2e0 - 0x2ef */
AUX_UNUSED_16 /* 0x2f0 - 0x2ff */
AUX_UNUSED_16 /* 0x300 - 0x30f */
AUX_UNUSED_16 /* 0x310 - 0x31f */
AUX_UNUSED_16 /* 0x320 - 0x32f */
AUX_UNUSED_16 /* 0x330 - 0x33f */
AUX_UNUSED_16 /* 0x340 - 0x34f */
AUX_UNUSED_16 /* 0x350 - 0x35f */
AUX_UNUSED_16 /* 0x360 - 0x36f */
AUX_UNUSED_16 /* 0x370 - 0x37f */
AUX_UNUSED_16 /* 0x380 - 0x38f */
AUX_UNUSED_16 /* 0x390 - 0x39f */
AUX_UNUSED_16 /* 0x3a0 - 0x3af */
AUX_UNUSED_16 /* 0x3b0 - 0x3bf */
AUX_UNUSED_16 /* 0x3c0 - 0x3cf */
AUX_UNUSED_16 /* 0x3d0 - 0x3df */
AUX_UNUSED_16 /* 0x3e0 - 0x3ef */
AUX_UNUSED_16 /* 0x3f0 - 0x3ff */
/* 0x400 */ "ERET",
/* 0x401 */ "ERBTA",
/* 0x403 */ "ERSTATUS",
/* 0x403 */ "ECR",
/* 0x404 */ "EFA",
/* 0x405 */ UNUSED_REG,
/* 0x406 */ UNUSED_REG,
/* 0x407 */ UNUSED_REG,
/* 0x408 */ UNUSED_REG,
/* 0x409 */ UNUSED_REG,
/* 0x40a */ "ICAUSE1",
/* 0x40b */ "ICAUSE2",
/* 0x40c */ "AUX_IENABLE",
/* 0x40d */ "AUX_ITRIGGER",
/* 0x40e */ UNUSED_REG,
/* 0x40f */ UNUSED_REG,
/* 0x410 */ "XPU",
/* 0x411 */ UNUSED_REG,
/* 0x412 */ "BTA",
/* 0x413 */ "BTA_L1",
/* 0x414 */ "BTA_L2",
/* 0x415 */ "AUX_IRQ_PULSE_CANCEL",
/* 0x416 */ "AUX_IRQ_PENDING",
/* 0x417 */ UNUSED_REG,
/* 0x418 */ UNUSED_REG,
/* 0x419 */ UNUSED_REG,
/* 0x41a */ UNUSED_REG,
/* 0x41b */ UNUSED_REG,
/* 0x41c */ UNUSED_REG,
/* 0x41d */ UNUSED_REG,
/* 0x41e */ UNUSED_REG,
/* 0x41f */ UNUSED_REG
};
//#define EXPLICIT_EXTENSIONS
const char *const arcompact_disassembler::datasize[0x4] =
{
#ifdef EXPLICIT_EXTENSIONS
/* 00 */ ".L", // Dword (default) (can use no extension, using .L to be explicit)
#else
/* 00 */ "",// Dword (default)
#endif
/* 01 */ ".B", // Byte
/* 02 */ ".W", // Word
/* 03 */ ".<illegal data size>"
};
const char *const arcompact_disassembler::dataextend[0x2] =
{
#ifdef EXPLICIT_EXTENSIONS
/* 00 */ ".ZX", // Zero Extend (can use no extension, using .ZX to be explicit)
#else
/* 00 */ "", // Zero Extend
#endif
/* 01 */ ".X" // Sign Extend
};
const char *const arcompact_disassembler::addressmode[0x4] =
{
#ifdef EXPLICIT_EXTENSIONS
/* 00 */ ".AN", // No Writeback (can use no extension, using .AN to be explicit)
#else
/* 00 */ "", // No Writeback
#endif
/* 01 */ ".AW", // Writeback pre memory access
/* 02 */ ".AB", // Writeback post memory access
/* 03 */ ".AS" // scaled
};
const char *const arcompact_disassembler::cachebit[0x2] =
{
#ifdef EXPLICIT_EXTENSIONS
/* 00 */ ".EN", // Data Cache Enabled (can use no extension, using .EN to be explicit)
#else
/* 00 */ "", // Data Cache Enabled
#endif
/* 01 */ ".DI" // Direct to Memory (Cache Bypass)
};
const char *const arcompact_disassembler::flagbit[0x2] =
{
#ifdef EXPLICIT_EXTENSIONS
/* 00 */ ".NF", // Don't Set Flags (can use no extension, using .NF to be explicit)
#else
/* 00 */ "", // Don't Set Flags
#endif
/* 01 */ ".F" // Set Flags
};
const char *const arcompact_disassembler::delaybit[0x2] =
{
/* 00 */ ".ND", // Don't execute opcode in delay slot
/* 01 */ ".D" // Execute Opcode in delay slot
};
const char *const arcompact_disassembler::regnames[0x40] =
{
/* 00 */ "r0",
/* 01 */ "r1",
/* 02 */ "r2",
/* 03 */ "r3",
/* 04 */ "r4",
/* 05 */ "r5",
/* 06 */ "r6",
/* 07 */ "r7",
/* 08 */ "r8",
/* 09 */ "r9",
/* 0a */ "r10",
/* 0b */ "r11",
/* 0c */ "r12",
/* 0d */ "r13",
/* 0e */ "r14",
/* 0f */ "r15",
/*****************************************************************************/
/* 10 */ "r16",
/* 11 */ "r17",
/* 12 */ "r18",
/* 13 */ "r19",
/* 14 */ "r20",
/* 15 */ "r21",
/* 16 */ "r22",
/* 17 */ "r23",
/* 18 */ "r24",
/* 19 */ "r25",
/* 1a */ "r26_GP",
/* 1b */ "r27_FP",
/* 1c */ "r28_SP",
/* 1d */ "r29_ILINK1",
/* 1e */ "r30_ILINK2",
/* 1f */ "r31_BLINK",
/* 20 */ "r32(ext)",
/* 21 */ "r33(ext)",
/* 22 */ "r34(ext)",
/* 23 */ "r35(ext)",
/* 24 */ "r36(ext)",
/* 25 */ "r37(ext)",
/* 26 */ "r38(ext)",
/* 27 */ "r39(ext)",
/* 28 */ "r40(ext)",
/* 29 */ "r41(ext)",
/* 2a */ "r42(ext)",
/* 2b */ "r43(ext)",
/* 2c */ "r44(ext)",
/* 2d */ "r45(ext)",
/* 2e */ "r46(ext)",
/* 2f */ "r47(ext)",
/* 30 */ "r48(ext)",
/* 31 */ "r49(ext)",
/* 32 */ "r50(ext)",
/* 33 */ "r51(ext)",
/* 34 */ "r52(ext)",
/* 35 */ "r53(ext)",
/* 36 */ "r54(ext)",
/* 37 */ "r55(ext)",
/* 38 */ "r56(ext)",
/* 39 */ "r57(M-LO)", // MLO (result registers for optional multply functions)
/* 3a */ "r58(M-MID)", // MMID
/* 3b */ "r59(M-HI)", // MHI
/* 3c */ "r60(LP_COUNT)",
/* 3d */ "r61(reserved)",
/* 3e */ "r62(LIMM)", // use Long Immediate Data instead of register
/* 3f */ "r63(PCL)"
};
#if 0
const char *const arcompact_disassembler::opcodes_temp[0x40] =
{
/* 00 */ "0x00",
/* 01 */ "0x01",
/* 02 */ "0x02",
/* 03 */ "0x03",
/* 04 */ "0x04",
/* 05 */ "0x05",
/* 06 */ "0x06",
/* 07 */ "0x07",
/* 08 */ "0x08",
/* 09 */ "0x09",
/* 0a */ "0x0a",
/* 0b */ "0x0b",
/* 0c */ "0x0c",
/* 0d */ "0x0d",
/* 0e */ "0x0e",
/* 0f */ "0x0f",
/* 10 */ "0x10",
/* 11 */ "0x11",
/* 12 */ "0x12",
/* 13 */ "0x13",
/* 14 */ "0x14",
/* 15 */ "0x15",
/* 16 */ "0x16",
/* 17 */ "0x17",
/* 18 */ "0x18",
/* 19 */ "0x19",
/* 1a */ "0x1a",
/* 1b */ "0x1b",
/* 1c */ "0x1c",
/* 1d */ "0x1d",
/* 1e */ "0x1e",
/* 1f */ "0x1f",
/* 20 */ "0x20",
/* 21 */ "0x21",
/* 22 */ "0x22",
/* 23 */ "0x23",
/* 24 */ "0x24",
/* 25 */ "0x25",
/* 26 */ "0x26",
/* 27 */ "0x27",
/* 28 */ "0x28",
/* 29 */ "0x29",
/* 2a */ "0x2a",
/* 2b */ "0x2b",
/* 2c */ "0x2c",
/* 2d */ "0x2d",
/* 2e */ "0x2e",
/* 2f */ "0x2f",
/* 30 */ "0x30",
/* 31 */ "0x31",
/* 32 */ "0x32",
/* 33 */ "0x33",
/* 34 */ "0x34",
/* 35 */ "0x35",
/* 36 */ "0x36",
/* 37 */ "0x37",
/* 38 */ "0x38",
/* 39 */ "0x39",
/* 3a */ "0x3a",
/* 3b */ "0x3b",
/* 3c */ "0x3c",
/* 3d */ "0x3d",
/* 3e */ "0x3e",
/* 3f */ "0x3f",
};
#endif
#define ARCOMPACT_OPERATION ((op & 0xf800) >> 11)
const char *const arcompact_disassembler::opcodes_04[0x40] =
{
/* 00 */ "ADD",
/* 01 */ "ADC",
/* 02 */ "SUB",
/* 03 */ "SBC",
/* 04 */ "AND",
/* 05 */ "OR",
/* 06 */ "BIC",
/* 07 */ "XOR",
/* 08 */ "MAX",
/* 09 */ "MIN",
/* 0a */ "MOV",
/* 0b */ "TST",
/* 0c */ "CMP",
/* 0d */ "RCMP",
/* 0e */ "RSUB",
/* 0f */ "BSET",
CPU_DISASSEMBLE(arcompact)
/* 10 */ "BCLR",
/* 11 */ "BTST",
/* 12 */ "BXOR",
/* 13 */ "BSMK",
/* 14 */ "ADD1",
/* 15 */ "ADD2",
/* 16 */ "ADD3",
/* 17 */ "SUB1",
/* 18 */ "SUB2",
/* 19 */ "SUB3",
/* 1a */ "MPY",
/* 1b */ "MPYH",
/* 1c */ "MPYHU",
/* 1d */ "MPYU",
/* 1e */ "0x1e",
/* 1f */ "0x1f",
/* 20 */ "Jcc",
/* 21 */ "Jcc.D",
/* 22 */ "JLcc",
/* 23 */ "JLcc.D",
/* 24 */ "0x24",
/* 25 */ "0x25",
/* 26 */ "0x26",
/* 27 */ "0x27",
/* 28 */ "LPcc",
/* 29 */ "FLAG",
/* 2a */ "LR",
/* 2b */ "SR",
/* 2c */ "0x2c",
/* 2d */ "0x2d",
/* 2e */ "0x2e",
/* 2f */ "SOP table",
/* 30 */ "LD",
/* 31 */ "LD",
/* 32 */ "LD",
/* 33 */ "LD",
/* 34 */ "LD",
/* 35 */ "LD",
/* 36 */ "LD",
/* 37 */ "LD",
/* 38 */ "0x38",
/* 39 */ "0x39",
/* 3a */ "0x3a",
/* 3b */ "0x3b",
/* 3c */ "0x3c",
/* 3d */ "0x3d",
/* 3e */ "0x3e",
/* 3f */ "0x3f",
};
offs_t arcompact_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
int size;
uint32_t op = oprom[0] | (oprom[1] << 8);
uint32_t op = opcodes.r16(pc);
uint8_t instruction = ARCOMPACT_OPERATION;
uint8_t instruction = ((op & 0xf800) >> 11);
if (instruction < 0x0c)
{
size = 4;
op <<= 16;
op |= oprom[2] | (oprom[3] << 8);
op |= opcodes.r16(pc+2);
op &= ~0xf8000000;
switch (instruction) // 32-bit instructions (with optional extra dword for immediate data)
{
case 0x00: size = arcompact_handle00_dasm(DASM_PARAMS); break; // Bcc
case 0x01: size = arcompact_handle01_dasm(DASM_PARAMS); break; // BLcc/BRcc
case 0x02: size = arcompact_handle02_dasm(DASM_PARAMS); break; // LD r+o
case 0x03: size = arcompact_handle03_dasm(DASM_PARAMS); break; // ST r+o
case 0x04: size = arcompact_handle04_dasm(DASM_PARAMS); break; // op a,b,c (basecase)
case 0x05: size = arcompact_handle05_dasm(DASM_PARAMS); break; // op a,b,c (05 ARC ext)
case 0x06: size = arcompact_handle06_dasm(DASM_PARAMS); break; // op a,b,c (06 ARC ext)
case 0x07: size = arcompact_handle07_dasm(DASM_PARAMS); break; // op a,b,c (07 User ext)
case 0x08: size = arcompact_handle08_dasm(DASM_PARAMS); break; // op a,b,c (08 User ext)
case 0x09: size = arcompact_handle09_dasm(DASM_PARAMS); break; // op a,b,c (09 Market ext)
case 0x0a: size = arcompact_handle0a_dasm(DASM_PARAMS); break; // op a,b,c (0a Market ext)
case 0x0b: size = arcompact_handle0b_dasm(DASM_PARAMS); break; // op a,b,c (0b Market ext)
case 0x00: size = handle00_dasm(stream, pc, op, opcodes); break; // Bcc
case 0x01: size = handle01_dasm(stream, pc, op, opcodes); break; // BLcc/BRcc
case 0x02: size = handle02_dasm(stream, pc, op, opcodes); break; // LD r+o
case 0x03: size = handle03_dasm(stream, pc, op, opcodes); break; // ST r+o
case 0x04: size = handle04_dasm(stream, pc, op, opcodes); break; // op a,b,c (basecase)
case 0x05: size = handle05_dasm(stream, pc, op, opcodes); break; // op a,b,c (05 ARC ext)
case 0x06: size = handle06_dasm(stream, pc, op, opcodes); break; // op a,b,c (06 ARC ext)
case 0x07: size = handle07_dasm(stream, pc, op, opcodes); break; // op a,b,c (07 User ext)
case 0x08: size = handle08_dasm(stream, pc, op, opcodes); break; // op a,b,c (08 User ext)
case 0x09: size = handle09_dasm(stream, pc, op, opcodes); break; // op a,b,c (09 Market ext)
case 0x0a: size = handle0a_dasm(stream, pc, op, opcodes); break; // op a,b,c (0a Market ext)
case 0x0b: size = handle0b_dasm(stream, pc, op, opcodes); break; // op a,b,c (0b Market ext)
}
}
else
@ -62,28 +575,28 @@ CPU_DISASSEMBLE(arcompact)
switch (instruction) // 16-bit instructions
{
case 0x0c: size = arcompact_handle0c_dasm(DASM_PARAMS); break; // Load/Add reg-reg
case 0x0d: size = arcompact_handle0d_dasm(DASM_PARAMS); break; // Add/Sub/Shft imm
case 0x0e: size = arcompact_handle0e_dasm(DASM_PARAMS); break; // Mov/Cmp/Add
case 0x0f: size = arcompact_handle0f_dasm(DASM_PARAMS); break; // op_S b,b,c (single 16-bit ops)
case 0x10: size = arcompact_handle10_dasm(DASM_PARAMS); break; // LD_S
case 0x11: size = arcompact_handle11_dasm(DASM_PARAMS); break; // LDB_S
case 0x12: size = arcompact_handle12_dasm(DASM_PARAMS); break; // LDW_S
case 0x13: size = arcompact_handle13_dasm(DASM_PARAMS); break; // LSW_S.X
case 0x14: size = arcompact_handle14_dasm(DASM_PARAMS); break; // ST_S
case 0x15: size = arcompact_handle15_dasm(DASM_PARAMS); break; // STB_S
case 0x16: size = arcompact_handle16_dasm(DASM_PARAMS); break; // STW_S
case 0x17: size = arcompact_handle17_dasm(DASM_PARAMS); break; // Shift/Sub/Bit
case 0x18: size = arcompact_handle18_dasm(DASM_PARAMS); break; // Stack Instr
case 0x19: size = arcompact_handle19_dasm(DASM_PARAMS); break; // GP Instr
case 0x1a: size = arcompact_handle1a_dasm(DASM_PARAMS); break; // PCL Instr
case 0x1b: size = arcompact_handle1b_dasm(DASM_PARAMS); break; // MOV_S
case 0x1c: size = arcompact_handle1c_dasm(DASM_PARAMS); break; // ADD_S/CMP_S
case 0x1d: size = arcompact_handle1d_dasm(DASM_PARAMS); break; // BRcc_S
case 0x1e: size = arcompact_handle1e_dasm(DASM_PARAMS); break; // Bcc_S
case 0x1f: size = arcompact_handle1f_dasm(DASM_PARAMS); break; // BL_S
case 0x0c: size = handle0c_dasm(stream, pc, op, opcodes); break; // Load/Add reg-reg
case 0x0d: size = handle0d_dasm(stream, pc, op, opcodes); break; // Add/Sub/Shft imm
case 0x0e: size = handle0e_dasm(stream, pc, op, opcodes); break; // Mov/Cmp/Add
case 0x0f: size = handle0f_dasm(stream, pc, op, opcodes); break; // op_S b,b,c (single 16-bit ops)
case 0x10: size = handle10_dasm(stream, pc, op, opcodes); break; // LD_S
case 0x11: size = handle11_dasm(stream, pc, op, opcodes); break; // LDB_S
case 0x12: size = handle12_dasm(stream, pc, op, opcodes); break; // LDW_S
case 0x13: size = handle13_dasm(stream, pc, op, opcodes); break; // LSW_S.X
case 0x14: size = handle14_dasm(stream, pc, op, opcodes); break; // ST_S
case 0x15: size = handle15_dasm(stream, pc, op, opcodes); break; // STB_S
case 0x16: size = handle16_dasm(stream, pc, op, opcodes); break; // STW_S
case 0x17: size = handle17_dasm(stream, pc, op, opcodes); break; // Shift/Sub/Bit
case 0x18: size = handle18_dasm(stream, pc, op, opcodes); break; // Stack Instr
case 0x19: size = handle19_dasm(stream, pc, op, opcodes); break; // GP Instr
case 0x1a: size = handle1a_dasm(stream, pc, op, opcodes); break; // PCL Instr
case 0x1b: size = handle1b_dasm(stream, pc, op, opcodes); break; // MOV_S
case 0x1c: size = handle1c_dasm(stream, pc, op, opcodes); break; // ADD_S/CMP_S
case 0x1d: size = handle1d_dasm(stream, pc, op, opcodes); break; // BRcc_S
case 0x1e: size = handle1e_dasm(stream, pc, op, opcodes); break; // Bcc_S
case 0x1f: size = handle1f_dasm(stream, pc, op, opcodes); break; // BL_S
}
}
return size | DASMFLAG_SUPPORTED;
return size | SUPPORTED;
}

721
src/devices/cpu/arcompact/arcompactdasm.h Normal file
View File

@ -0,0 +1,721 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
/*********************************\
ARCompact disassembler
\*********************************/
#ifndef MAME_CPU_ARCOMPACT_ARCOMPACTDASM_H
#define MAME_CPU_ARCOMPACT_ARCOMPACTDASM_H
#pragma once
class arcompact_disassembler : public util::disasm_interface
{
public:
arcompact_disassembler() = default;
virtual ~arcompact_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
static const char *const conditions[0x20];
static const char *const auxregnames[0x420];
static const char *const datasize[0x4];
static const char *const dataextend[0x2];
static const char *const addressmode[0x4];
static const char *const cachebit[0x2];
static const char *const flagbit[0x2];
static const char *const delaybit[0x2];
static const char *const regnames[0x40];
static const char *const opcodes_04[0x40];
private:
int handle01_01_00_helper(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext);
int handle01_01_01_helper(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext);
int handle04_p00_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved);
int handle04_p01_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved);
int handle04_p10_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved);
int handle04_p11_m0_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved);
int handle04_p11_m1_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved);
int handle04_p11_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int b_reserved);
int handle04_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext, int ignore_dst, int b_reserved);
int handle04_2f_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext);
int handle04_3x_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, int dsize, int extend);
int handle05_2f_0x_helper_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes, const char* optext);
int handle0c_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int format);
int handle0d_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext);
int handle0e_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int revop);
int handle0f_00_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext);
int handle0f_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int nodst);
int handle_ld_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int shift, int swap);
int handle_l7_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext);
int handle18_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int st, int format);
int handle19_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext, int shift, int format);
int handle1d_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext);
int handle1e_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext);
int handle1e_03_0x_helper_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes, const char* optext);
int handle00_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle00_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_00_00dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_00_01dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle0c_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0c_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0c_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0c_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0d_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0d_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0d_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0d_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0e_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0e_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0e_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0e_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_07_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_07_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_07_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_07_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_07_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_07_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_0b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle17_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle17_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle17_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle17_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle17_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle17_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle17_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle17_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_05_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_05_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_11_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle19_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle19_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle19_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle19_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1c_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1c_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1d_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1d_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_03_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_03_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_03_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_03_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_03_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_03_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_03_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_03_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
/************************************************************************************************************************************
* *
* illegal opcode handlers (disassembly) *
* *
************************************************************************************************************************************/
int handle01_01_00_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_02_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_03_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_06_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_07_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_08_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_0a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_0b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_28_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_29_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_09_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_0c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_0d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_0e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_0f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_10_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_11_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_12_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_13_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_14_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_15_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_16_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_17_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_18_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_19_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_1a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_1b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_1c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_1d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_1e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_1f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_20_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_21_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_22_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_23_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_24_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_25_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_26_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_27_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_30_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_31_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_32_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_33_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_34_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_35_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_36_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_37_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_38_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_39_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_3a_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_3b_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_3c_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_3d_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_3e_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle0f_00_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_07_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_07_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_01_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_08_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_09_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_0a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_05_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_05_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_05_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_05_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_05_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_05_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_08_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_09_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_0a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_0b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_02_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_04_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_08_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_09_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_0a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_0b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_10_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_12_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_13_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_14_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_15_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_16_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_1a_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_1b_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_1f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_00_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle01_01_01_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle04_2f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle05_2f_3f_dasm(std::ostream &stream, offs_t pc, uint32_t op, const data_buffer &opcodes);
int handle0c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle0f_00_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle17_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_05_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_06_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle18_07_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle19_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1c_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1d_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
int handle1e_03_dasm(std::ostream &stream, offs_t pc, uint16_t op, const data_buffer &opcodes);
};
#endif

1245
src/devices/cpu/arcompact/arcompactdasm_dispatch.cpp
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50
src/devices/cpu/arcompact/arcompactdasm_dispatch.h
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// license:BSD-3-Clause
// copyright-holders:David Haywood
/*********************************\
ARCompact disassembler
\*********************************/
#define DASM_OPS_16 std::ostream &stream, offs_t pc, uint16_t op, const uint8_t* oprom
#define DASM_OPS_32 std::ostream &stream, offs_t pc, uint32_t op, const uint8_t* oprom
#define DASM_PARAMS stream, pc, op, oprom
#define LIMM_REG 62
#define GET_LIMM_32 \
limm = oprom[6] | (oprom[7] << 8); \
limm |= (oprom[4] << 16) | (oprom[5] << 24);
int arcompact_handle00_dasm(DASM_OPS_32);
int arcompact_handle01_dasm(DASM_OPS_32);
int arcompact_handle01_00_dasm(DASM_OPS_32);
int arcompact_handle01_01_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_dasm(DASM_OPS_32);
int arcompact_handle04_dasm(DASM_OPS_32);
int arcompact_handle04_2f_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_dasm(DASM_OPS_32);
int arcompact_handle05_dasm(DASM_OPS_32);
int arcompact_handle05_2f_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_dasm(DASM_OPS_32);
int arcompact_handle0c_dasm(DASM_OPS_16);
int arcompact_handle0d_dasm(DASM_OPS_16);
int arcompact_handle0e_dasm(DASM_OPS_16);
int arcompact_handle0f_dasm(DASM_OPS_16);
int arcompact_handle0f_00_dasm(DASM_OPS_16);
int arcompact_handle0f_00_07_dasm(DASM_OPS_16);
int arcompact_handle17_dasm(DASM_OPS_16);
int arcompact_handle18_dasm(DASM_OPS_16);
int arcompact_handle18_05_dasm(DASM_OPS_16);
int arcompact_handle18_06_dasm(DASM_OPS_16);
int arcompact_handle18_07_dasm(DASM_OPS_16);
int arcompact_handle19_dasm(DASM_OPS_16);
int arcompact_handle1c_dasm(DASM_OPS_16);
int arcompact_handle1d_dasm(DASM_OPS_16);
int arcompact_handle1e_dasm(DASM_OPS_16);
int arcompact_handle1e_03_dasm(DASM_OPS_16);

3823
src/devices/cpu/arcompact/arcompactdasm_ops.cpp
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642
src/devices/cpu/arcompact/arcompactdasm_ops.h
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// license:BSD-3-Clause
// copyright-holders:David Haywood
/************************************************************************************************************************************
* *
* individual opcode handlers (disassembly) *
* *
************************************************************************************************************************************/
#include "arcompact_common.h"
#define DASM_OPS_16 std::ostream &stream, offs_t pc, uint16_t op, const uint8_t* oprom
#define DASM_OPS_32 std::ostream &stream, offs_t pc, uint32_t op, const uint8_t* oprom
#define DASM_PARAMS stream, pc, op, oprom
#define LIMM_REG 62
#define GET_LIMM_32 \
limm = oprom[6] | (oprom[7] << 8); \
limm |= (oprom[4] << 16) | (oprom[5] << 24);
int arcompact_handle00_00_dasm(DASM_OPS_32);
int arcompact_handle00_01_dasm(DASM_OPS_32);
int arcompact_handle01_00_00dasm(DASM_OPS_32);
int arcompact_handle01_00_01dasm(DASM_OPS_32);
int arcompact_handle01_01_00_00_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_01_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_02_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_03_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_04_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_05_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_0e_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_0f_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_00_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_01_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_02_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_03_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_04_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_05_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_0e_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_0f_dasm(DASM_OPS_32);
int arcompact_handle02_dasm(DASM_OPS_32);
int arcompact_handle03_dasm(DASM_OPS_32);
int arcompact_handle04_00_dasm(DASM_OPS_32);
int arcompact_handle04_01_dasm(DASM_OPS_32);
int arcompact_handle04_02_dasm(DASM_OPS_32);
int arcompact_handle04_03_dasm(DASM_OPS_32);
int arcompact_handle04_04_dasm(DASM_OPS_32);
int arcompact_handle04_05_dasm(DASM_OPS_32);
int arcompact_handle04_06_dasm(DASM_OPS_32);
int arcompact_handle04_07_dasm(DASM_OPS_32);
int arcompact_handle04_08_dasm(DASM_OPS_32);
int arcompact_handle04_09_dasm(DASM_OPS_32);
int arcompact_handle04_0a_dasm(DASM_OPS_32);
int arcompact_handle04_0b_dasm(DASM_OPS_32);
int arcompact_handle04_0c_dasm(DASM_OPS_32);
int arcompact_handle04_0d_dasm(DASM_OPS_32);
int arcompact_handle04_0e_dasm(DASM_OPS_32);
int arcompact_handle04_0f_dasm(DASM_OPS_32);
int arcompact_handle04_10_dasm(DASM_OPS_32);
int arcompact_handle04_11_dasm(DASM_OPS_32);
int arcompact_handle04_12_dasm(DASM_OPS_32);
int arcompact_handle04_13_dasm(DASM_OPS_32);
int arcompact_handle04_14_dasm(DASM_OPS_32);
int arcompact_handle04_15_dasm(DASM_OPS_32);
int arcompact_handle04_16_dasm(DASM_OPS_32);
int arcompact_handle04_17_dasm(DASM_OPS_32);
int arcompact_handle04_18_dasm(DASM_OPS_32);
int arcompact_handle04_19_dasm(DASM_OPS_32);
int arcompact_handle04_1a_dasm(DASM_OPS_32);
int arcompact_handle04_1b_dasm(DASM_OPS_32);
int arcompact_handle04_1c_dasm(DASM_OPS_32);
int arcompact_handle04_1d_dasm(DASM_OPS_32);
int arcompact_handle04_20_dasm(DASM_OPS_32);
int arcompact_handle04_21_dasm(DASM_OPS_32);
int arcompact_handle04_22_dasm(DASM_OPS_32);
int arcompact_handle04_23_dasm(DASM_OPS_32);
int arcompact_handle04_28_dasm(DASM_OPS_32);
int arcompact_handle04_29_dasm(DASM_OPS_32);
int arcompact_handle04_2a_dasm(DASM_OPS_32);
int arcompact_handle04_2b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_00_dasm(DASM_OPS_32);
int arcompact_handle04_2f_01_dasm(DASM_OPS_32);
int arcompact_handle04_2f_02_dasm(DASM_OPS_32);
int arcompact_handle04_2f_03_dasm(DASM_OPS_32);
int arcompact_handle04_2f_04_dasm(DASM_OPS_32);
int arcompact_handle04_2f_05_dasm(DASM_OPS_32);
int arcompact_handle04_2f_06_dasm(DASM_OPS_32);
int arcompact_handle04_2f_07_dasm(DASM_OPS_32);
int arcompact_handle04_2f_08_dasm(DASM_OPS_32);
int arcompact_handle04_2f_09_dasm(DASM_OPS_32);
int arcompact_handle04_2f_0a_dasm(DASM_OPS_32);
int arcompact_handle04_2f_0b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_0c_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_01_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_02_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_03_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_04_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_05_dasm(DASM_OPS_32);
int arcompact_handle04_30_dasm(DASM_OPS_32);
int arcompact_handle04_31_dasm(DASM_OPS_32);
int arcompact_handle04_32_dasm(DASM_OPS_32);
int arcompact_handle04_33_dasm(DASM_OPS_32);
int arcompact_handle04_34_dasm(DASM_OPS_32);
int arcompact_handle04_35_dasm(DASM_OPS_32);
int arcompact_handle04_36_dasm(DASM_OPS_32);
int arcompact_handle04_37_dasm(DASM_OPS_32);
int arcompact_handle05_00_dasm(DASM_OPS_32);
int arcompact_handle05_01_dasm(DASM_OPS_32);
int arcompact_handle05_02_dasm(DASM_OPS_32);
int arcompact_handle05_03_dasm(DASM_OPS_32);
int arcompact_handle05_04_dasm(DASM_OPS_32);
int arcompact_handle05_05_dasm(DASM_OPS_32);
int arcompact_handle05_06_dasm(DASM_OPS_32);
int arcompact_handle05_07_dasm(DASM_OPS_32);
int arcompact_handle05_08_dasm(DASM_OPS_32);
int arcompact_handle05_0a_dasm(DASM_OPS_32);
int arcompact_handle05_0b_dasm(DASM_OPS_32);
int arcompact_handle05_28_dasm(DASM_OPS_32);
int arcompact_handle05_29_dasm(DASM_OPS_32);
int arcompact_handle06_dasm(DASM_OPS_32);
int arcompact_handle07_dasm(DASM_OPS_32);
int arcompact_handle08_dasm(DASM_OPS_32);
int arcompact_handle09_dasm(DASM_OPS_32);
int arcompact_handle0a_dasm(DASM_OPS_32);
int arcompact_handle0b_dasm(DASM_OPS_32);
int arcompact_handle0c_00_dasm(DASM_OPS_16);
int arcompact_handle0c_01_dasm(DASM_OPS_16);
int arcompact_handle0c_02_dasm(DASM_OPS_16);
int arcompact_handle0c_03_dasm(DASM_OPS_16);
int arcompact_handle0d_00_dasm(DASM_OPS_16);
int arcompact_handle0d_01_dasm(DASM_OPS_16);
int arcompact_handle0d_02_dasm(DASM_OPS_16);
int arcompact_handle0d_03_dasm(DASM_OPS_16);
int arcompact_handle0e_00_dasm(DASM_OPS_16);
int arcompact_handle0e_01_dasm(DASM_OPS_16);
int arcompact_handle0e_02_dasm(DASM_OPS_16);
int arcompact_handle0e_03_dasm(DASM_OPS_16);
int arcompact_handle0f_00_00_dasm(DASM_OPS_16);
int arcompact_handle0f_00_01_dasm(DASM_OPS_16);
int arcompact_handle0f_00_02_dasm(DASM_OPS_16);
int arcompact_handle0f_00_03_dasm(DASM_OPS_16);
int arcompact_handle0f_00_06_dasm(DASM_OPS_16);
int arcompact_handle0f_00_07_00_dasm(DASM_OPS_16);
int arcompact_handle0f_00_07_01_dasm(DASM_OPS_16);
int arcompact_handle0f_00_07_04_dasm(DASM_OPS_16);
int arcompact_handle0f_00_07_05_dasm(DASM_OPS_16);
int arcompact_handle0f_00_07_06_dasm(DASM_OPS_16);
int arcompact_handle0f_00_07_07_dasm(DASM_OPS_16);
int arcompact_handle0f_02_dasm(DASM_OPS_16);
int arcompact_handle0f_04_dasm(DASM_OPS_16);
int arcompact_handle0f_05_dasm(DASM_OPS_16);
int arcompact_handle0f_06_dasm(DASM_OPS_16);
int arcompact_handle0f_07_dasm(DASM_OPS_16);
int arcompact_handle0f_0b_dasm(DASM_OPS_16);
int arcompact_handle0f_0c_dasm(DASM_OPS_16);
int arcompact_handle0f_0d_dasm(DASM_OPS_16);
int arcompact_handle0f_0e_dasm(DASM_OPS_16);
int arcompact_handle0f_0f_dasm(DASM_OPS_16);
int arcompact_handle0f_10_dasm(DASM_OPS_16);
int arcompact_handle0f_11_dasm(DASM_OPS_16);
int arcompact_handle0f_12_dasm(DASM_OPS_16);
int arcompact_handle0f_13_dasm(DASM_OPS_16);
int arcompact_handle0f_14_dasm(DASM_OPS_16);
int arcompact_handle0f_15_dasm(DASM_OPS_16);
int arcompact_handle0f_16_dasm(DASM_OPS_16);
int arcompact_handle0f_18_dasm(DASM_OPS_16);
int arcompact_handle0f_19_dasm(DASM_OPS_16);
int arcompact_handle0f_1a_dasm(DASM_OPS_16);
int arcompact_handle0f_1b_dasm(DASM_OPS_16);
int arcompact_handle0f_1c_dasm(DASM_OPS_16);
int arcompact_handle0f_1d_dasm(DASM_OPS_16);
int arcompact_handle0f_1e_dasm(DASM_OPS_16);
int arcompact_handle0f_1f_dasm(DASM_OPS_16);
int arcompact_handle10_dasm(DASM_OPS_16);
int arcompact_handle11_dasm(DASM_OPS_16);
int arcompact_handle12_dasm(DASM_OPS_16);
int arcompact_handle13_dasm(DASM_OPS_16);
int arcompact_handle14_dasm(DASM_OPS_16);
int arcompact_handle15_dasm(DASM_OPS_16);
int arcompact_handle16_dasm(DASM_OPS_16);
int arcompact_handle17_00_dasm(DASM_OPS_16);
int arcompact_handle17_01_dasm(DASM_OPS_16);
int arcompact_handle17_02_dasm(DASM_OPS_16);
int arcompact_handle17_03_dasm(DASM_OPS_16);
int arcompact_handle17_04_dasm(DASM_OPS_16);
int arcompact_handle17_05_dasm(DASM_OPS_16);
int arcompact_handle17_06_dasm(DASM_OPS_16);
int arcompact_handle17_07_dasm(DASM_OPS_16);
int arcompact_handle18_00_dasm(DASM_OPS_16);
int arcompact_handle18_01_dasm(DASM_OPS_16);
int arcompact_handle18_02_dasm(DASM_OPS_16);
int arcompact_handle18_03_dasm(DASM_OPS_16);
int arcompact_handle18_04_dasm(DASM_OPS_16);
int arcompact_handle18_05_00_dasm(DASM_OPS_16);
int arcompact_handle18_05_01_dasm(DASM_OPS_16);
int arcompact_handle18_06_01_dasm(DASM_OPS_16);
int arcompact_handle18_06_11_dasm(DASM_OPS_16);
int arcompact_handle18_07_01_dasm(DASM_OPS_16);
int arcompact_handle18_07_11_dasm(DASM_OPS_16);
int arcompact_handle19_00_dasm(DASM_OPS_16);
int arcompact_handle19_01_dasm(DASM_OPS_16);
int arcompact_handle19_02_dasm(DASM_OPS_16);
int arcompact_handle19_03_dasm(DASM_OPS_16);
int arcompact_handle1a_dasm(DASM_OPS_16);
int arcompact_handle1b_dasm(DASM_OPS_16);
int arcompact_handle1c_00_dasm(DASM_OPS_16);
int arcompact_handle1c_01_dasm(DASM_OPS_16);
int arcompact_handle1d_00_dasm(DASM_OPS_16);
int arcompact_handle1d_01_dasm(DASM_OPS_16);
int arcompact_handle1e_00_dasm(DASM_OPS_16);
int arcompact_handle1e_01_dasm(DASM_OPS_16);
int arcompact_handle1e_02_dasm(DASM_OPS_16);
int arcompact_handle1e_03_00_dasm(DASM_OPS_16);
int arcompact_handle1e_03_01_dasm(DASM_OPS_16);
int arcompact_handle1e_03_02_dasm(DASM_OPS_16);
int arcompact_handle1e_03_03_dasm(DASM_OPS_16);
int arcompact_handle1e_03_04_dasm(DASM_OPS_16);
int arcompact_handle1e_03_05_dasm(DASM_OPS_16);
int arcompact_handle1e_03_06_dasm(DASM_OPS_16);
int arcompact_handle1e_03_07_dasm(DASM_OPS_16);
int arcompact_handle1f_dasm(DASM_OPS_16);
/************************************************************************************************************************************
* *
* illegal opcode handlers (disassembly) *
* *
************************************************************************************************************************************/
int arcompact_handle01_01_00_06_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_07_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_08_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_09_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_0a_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_0b_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_0c_dasm(DASM_OPS_32);
int arcompact_handle01_01_00_0d_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_06_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_07_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_08_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_09_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_0a_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_0b_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_0c_dasm(DASM_OPS_32);
int arcompact_handle01_01_01_0d_dasm(DASM_OPS_32);
int arcompact_handle04_1e_dasm(DASM_OPS_32);
int arcompact_handle04_1f_dasm(DASM_OPS_32);
int arcompact_handle04_24_dasm(DASM_OPS_32);
int arcompact_handle04_25_dasm(DASM_OPS_32);
int arcompact_handle04_26_dasm(DASM_OPS_32);
int arcompact_handle04_27_dasm(DASM_OPS_32);
int arcompact_handle04_2c_dasm(DASM_OPS_32);
int arcompact_handle04_2d_dasm(DASM_OPS_32);
int arcompact_handle04_2e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_0d_dasm(DASM_OPS_32);
int arcompact_handle04_2f_0e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_0f_dasm(DASM_OPS_32);
int arcompact_handle04_2f_10_dasm(DASM_OPS_32);
int arcompact_handle04_2f_11_dasm(DASM_OPS_32);
int arcompact_handle04_2f_12_dasm(DASM_OPS_32);
int arcompact_handle04_2f_13_dasm(DASM_OPS_32);
int arcompact_handle04_2f_14_dasm(DASM_OPS_32);
int arcompact_handle04_2f_15_dasm(DASM_OPS_32);
int arcompact_handle04_2f_16_dasm(DASM_OPS_32);
int arcompact_handle04_2f_17_dasm(DASM_OPS_32);
int arcompact_handle04_2f_18_dasm(DASM_OPS_32);
int arcompact_handle04_2f_19_dasm(DASM_OPS_32);
int arcompact_handle04_2f_1a_dasm(DASM_OPS_32);
int arcompact_handle04_2f_1b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_1c_dasm(DASM_OPS_32);
int arcompact_handle04_2f_1d_dasm(DASM_OPS_32);
int arcompact_handle04_2f_1e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_1f_dasm(DASM_OPS_32);
int arcompact_handle04_2f_20_dasm(DASM_OPS_32);
int arcompact_handle04_2f_21_dasm(DASM_OPS_32);
int arcompact_handle04_2f_22_dasm(DASM_OPS_32);
int arcompact_handle04_2f_23_dasm(DASM_OPS_32);
int arcompact_handle04_2f_24_dasm(DASM_OPS_32);
int arcompact_handle04_2f_25_dasm(DASM_OPS_32);
int arcompact_handle04_2f_26_dasm(DASM_OPS_32);
int arcompact_handle04_2f_27_dasm(DASM_OPS_32);
int arcompact_handle04_2f_28_dasm(DASM_OPS_32);
int arcompact_handle04_2f_29_dasm(DASM_OPS_32);
int arcompact_handle04_2f_2a_dasm(DASM_OPS_32);
int arcompact_handle04_2f_2b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_2c_dasm(DASM_OPS_32);
int arcompact_handle04_2f_2d_dasm(DASM_OPS_32);
int arcompact_handle04_2f_2e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_2f_dasm(DASM_OPS_32);
int arcompact_handle04_2f_30_dasm(DASM_OPS_32);
int arcompact_handle04_2f_31_dasm(DASM_OPS_32);
int arcompact_handle04_2f_32_dasm(DASM_OPS_32);
int arcompact_handle04_2f_33_dasm(DASM_OPS_32);
int arcompact_handle04_2f_34_dasm(DASM_OPS_32);
int arcompact_handle04_2f_35_dasm(DASM_OPS_32);
int arcompact_handle04_2f_36_dasm(DASM_OPS_32);
int arcompact_handle04_2f_37_dasm(DASM_OPS_32);
int arcompact_handle04_2f_38_dasm(DASM_OPS_32);
int arcompact_handle04_2f_39_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3a_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3c_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3d_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_00_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_06_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_07_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_08_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_09_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_0a_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_0b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_0c_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_0d_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_0e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_0f_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_10_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_11_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_12_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_13_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_14_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_15_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_16_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_17_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_18_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_19_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_1a_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_1b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_1c_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_1d_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_1e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_1f_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_20_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_21_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_22_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_23_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_24_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_25_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_26_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_27_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_28_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_29_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_2a_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_2b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_2c_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_2d_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_2e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_2f_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_30_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_31_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_32_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_33_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_34_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_35_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_36_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_37_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_38_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_39_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3a_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3c_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3d_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3f_dasm(DASM_OPS_32);
int arcompact_handle05_2f_00_dasm(DASM_OPS_32);
int arcompact_handle05_2f_01_dasm(DASM_OPS_32);
int arcompact_handle05_2f_02_dasm(DASM_OPS_32);
int arcompact_handle05_2f_03_dasm(DASM_OPS_32);
int arcompact_handle05_2f_04_dasm(DASM_OPS_32);
int arcompact_handle05_2f_05_dasm(DASM_OPS_32);
int arcompact_handle05_2f_06_dasm(DASM_OPS_32);
int arcompact_handle05_2f_07_dasm(DASM_OPS_32);
int arcompact_handle05_2f_08_dasm(DASM_OPS_32);
int arcompact_handle05_2f_09_dasm(DASM_OPS_32);
int arcompact_handle05_2f_0a_dasm(DASM_OPS_32);
int arcompact_handle05_2f_0b_dasm(DASM_OPS_32);
int arcompact_handle05_2f_0c_dasm(DASM_OPS_32);
int arcompact_handle05_2f_0d_dasm(DASM_OPS_32);
int arcompact_handle05_2f_0e_dasm(DASM_OPS_32);
int arcompact_handle05_2f_0f_dasm(DASM_OPS_32);
int arcompact_handle05_2f_10_dasm(DASM_OPS_32);
int arcompact_handle05_2f_11_dasm(DASM_OPS_32);
int arcompact_handle05_2f_12_dasm(DASM_OPS_32);
int arcompact_handle05_2f_13_dasm(DASM_OPS_32);
int arcompact_handle05_2f_14_dasm(DASM_OPS_32);
int arcompact_handle05_2f_15_dasm(DASM_OPS_32);
int arcompact_handle05_2f_16_dasm(DASM_OPS_32);
int arcompact_handle05_2f_17_dasm(DASM_OPS_32);
int arcompact_handle05_2f_18_dasm(DASM_OPS_32);
int arcompact_handle05_2f_19_dasm(DASM_OPS_32);
int arcompact_handle05_2f_1a_dasm(DASM_OPS_32);
int arcompact_handle05_2f_1b_dasm(DASM_OPS_32);
int arcompact_handle05_2f_1c_dasm(DASM_OPS_32);
int arcompact_handle05_2f_1d_dasm(DASM_OPS_32);
int arcompact_handle05_2f_1e_dasm(DASM_OPS_32);
int arcompact_handle05_2f_1f_dasm(DASM_OPS_32);
int arcompact_handle05_2f_20_dasm(DASM_OPS_32);
int arcompact_handle05_2f_21_dasm(DASM_OPS_32);
int arcompact_handle05_2f_22_dasm(DASM_OPS_32);
int arcompact_handle05_2f_23_dasm(DASM_OPS_32);
int arcompact_handle05_2f_24_dasm(DASM_OPS_32);
int arcompact_handle05_2f_25_dasm(DASM_OPS_32);
int arcompact_handle05_2f_26_dasm(DASM_OPS_32);
int arcompact_handle05_2f_27_dasm(DASM_OPS_32);
int arcompact_handle05_2f_28_dasm(DASM_OPS_32);
int arcompact_handle05_2f_29_dasm(DASM_OPS_32);
int arcompact_handle05_2f_2a_dasm(DASM_OPS_32);
int arcompact_handle05_2f_2b_dasm(DASM_OPS_32);
int arcompact_handle05_2f_2c_dasm(DASM_OPS_32);
int arcompact_handle05_2f_2d_dasm(DASM_OPS_32);
int arcompact_handle05_2f_2e_dasm(DASM_OPS_32);
int arcompact_handle05_2f_2f_dasm(DASM_OPS_32);
int arcompact_handle05_2f_30_dasm(DASM_OPS_32);
int arcompact_handle05_2f_31_dasm(DASM_OPS_32);
int arcompact_handle05_2f_32_dasm(DASM_OPS_32);
int arcompact_handle05_2f_33_dasm(DASM_OPS_32);
int arcompact_handle05_2f_34_dasm(DASM_OPS_32);
int arcompact_handle05_2f_35_dasm(DASM_OPS_32);
int arcompact_handle05_2f_36_dasm(DASM_OPS_32);
int arcompact_handle05_2f_37_dasm(DASM_OPS_32);
int arcompact_handle05_2f_38_dasm(DASM_OPS_32);
int arcompact_handle05_2f_39_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3a_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3b_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3c_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3d_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3e_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_00_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_01_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_02_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_03_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_04_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_05_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_06_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_07_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_08_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_09_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_0a_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_0b_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_0c_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_0d_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_0e_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_0f_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_10_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_11_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_12_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_13_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_14_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_15_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_16_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_17_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_18_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_19_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_1a_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_1b_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_1c_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_1d_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_1e_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_1f_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_20_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_21_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_22_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_23_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_24_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_25_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_26_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_27_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_28_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_29_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_2a_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_2b_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_2c_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_2d_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_2e_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_2f_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_30_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_31_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_32_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_33_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_34_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_35_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_36_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_37_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_38_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_39_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_3a_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_3b_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_3c_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_3d_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_3e_dasm(DASM_OPS_32);
int arcompact_handle05_2f_3f_3f_dasm(DASM_OPS_32);
int arcompact_handle04_38_dasm(DASM_OPS_32);
int arcompact_handle04_39_dasm(DASM_OPS_32);
int arcompact_handle04_3a_dasm(DASM_OPS_32);
int arcompact_handle04_3b_dasm(DASM_OPS_32);
int arcompact_handle04_3c_dasm(DASM_OPS_32);
int arcompact_handle04_3d_dasm(DASM_OPS_32);
int arcompact_handle04_3e_dasm(DASM_OPS_32);
int arcompact_handle04_3f_dasm(DASM_OPS_32);
int arcompact_handle05_09_dasm(DASM_OPS_32);
int arcompact_handle05_0c_dasm(DASM_OPS_32);
int arcompact_handle05_0d_dasm(DASM_OPS_32);
int arcompact_handle05_0e_dasm(DASM_OPS_32);
int arcompact_handle05_0f_dasm(DASM_OPS_32);
int arcompact_handle05_10_dasm(DASM_OPS_32);
int arcompact_handle05_11_dasm(DASM_OPS_32);
int arcompact_handle05_12_dasm(DASM_OPS_32);
int arcompact_handle05_13_dasm(DASM_OPS_32);
int arcompact_handle05_14_dasm(DASM_OPS_32);
int arcompact_handle05_15_dasm(DASM_OPS_32);
int arcompact_handle05_16_dasm(DASM_OPS_32);
int arcompact_handle05_17_dasm(DASM_OPS_32);
int arcompact_handle05_18_dasm(DASM_OPS_32);
int arcompact_handle05_19_dasm(DASM_OPS_32);
int arcompact_handle05_1a_dasm(DASM_OPS_32);
int arcompact_handle05_1b_dasm(DASM_OPS_32);
int arcompact_handle05_1c_dasm(DASM_OPS_32);
int arcompact_handle05_1d_dasm(DASM_OPS_32);
int arcompact_handle05_1e_dasm(DASM_OPS_32);
int arcompact_handle05_1f_dasm(DASM_OPS_32);
int arcompact_handle05_20_dasm(DASM_OPS_32);
int arcompact_handle05_21_dasm(DASM_OPS_32);
int arcompact_handle05_22_dasm(DASM_OPS_32);
int arcompact_handle05_23_dasm(DASM_OPS_32);
int arcompact_handle05_24_dasm(DASM_OPS_32);
int arcompact_handle05_25_dasm(DASM_OPS_32);
int arcompact_handle05_26_dasm(DASM_OPS_32);
int arcompact_handle05_27_dasm(DASM_OPS_32);
int arcompact_handle05_2a_dasm(DASM_OPS_32);
int arcompact_handle05_2b_dasm(DASM_OPS_32);
int arcompact_handle05_2c_dasm(DASM_OPS_32);
int arcompact_handle05_2d_dasm(DASM_OPS_32);
int arcompact_handle05_2e_dasm(DASM_OPS_32);
int arcompact_handle05_30_dasm(DASM_OPS_32);
int arcompact_handle05_31_dasm(DASM_OPS_32);
int arcompact_handle05_32_dasm(DASM_OPS_32);
int arcompact_handle05_33_dasm(DASM_OPS_32);
int arcompact_handle05_34_dasm(DASM_OPS_32);
int arcompact_handle05_35_dasm(DASM_OPS_32);
int arcompact_handle05_36_dasm(DASM_OPS_32);
int arcompact_handle05_37_dasm(DASM_OPS_32);
int arcompact_handle05_38_dasm(DASM_OPS_32);
int arcompact_handle05_39_dasm(DASM_OPS_32);
int arcompact_handle05_3a_dasm(DASM_OPS_32);
int arcompact_handle05_3b_dasm(DASM_OPS_32);
int arcompact_handle05_3c_dasm(DASM_OPS_32);
int arcompact_handle05_3d_dasm(DASM_OPS_32);
int arcompact_handle05_3e_dasm(DASM_OPS_32);
int arcompact_handle05_3f_dasm(DASM_OPS_32);
int arcompact_handle0f_00_04_dasm(DASM_OPS_16);
int arcompact_handle0f_00_05_dasm(DASM_OPS_16);
int arcompact_handle0f_00_07_02_dasm(DASM_OPS_16);
int arcompact_handle0f_00_07_03_dasm(DASM_OPS_16);
int arcompact_handle0f_01_dasm(DASM_OPS_16);
int arcompact_handle0f_03_dasm(DASM_OPS_16);
int arcompact_handle0f_08_dasm(DASM_OPS_16);
int arcompact_handle0f_09_dasm(DASM_OPS_16);
int arcompact_handle0f_0a_dasm(DASM_OPS_16);
int arcompact_handle0f_17_dasm(DASM_OPS_16);
int arcompact_handle18_05_02_dasm(DASM_OPS_16);
int arcompact_handle18_05_03_dasm(DASM_OPS_16);
int arcompact_handle18_05_04_dasm(DASM_OPS_16);
int arcompact_handle18_05_05_dasm(DASM_OPS_16);
int arcompact_handle18_05_06_dasm(DASM_OPS_16);
int arcompact_handle18_05_07_dasm(DASM_OPS_16);
int arcompact_handle18_06_00_dasm(DASM_OPS_16);
int arcompact_handle18_06_02_dasm(DASM_OPS_16);
int arcompact_handle18_06_03_dasm(DASM_OPS_16);
int arcompact_handle18_06_04_dasm(DASM_OPS_16);
int arcompact_handle18_06_05_dasm(DASM_OPS_16);
int arcompact_handle18_06_06_dasm(DASM_OPS_16);
int arcompact_handle18_06_07_dasm(DASM_OPS_16);
int arcompact_handle18_06_08_dasm(DASM_OPS_16);
int arcompact_handle18_06_09_dasm(DASM_OPS_16);
int arcompact_handle18_06_0a_dasm(DASM_OPS_16);
int arcompact_handle18_06_0b_dasm(DASM_OPS_16);
int arcompact_handle18_06_0c_dasm(DASM_OPS_16);
int arcompact_handle18_06_0d_dasm(DASM_OPS_16);
int arcompact_handle18_06_0e_dasm(DASM_OPS_16);
int arcompact_handle18_06_0f_dasm(DASM_OPS_16);
int arcompact_handle18_06_10_dasm(DASM_OPS_16);
int arcompact_handle18_06_12_dasm(DASM_OPS_16);
int arcompact_handle18_06_13_dasm(DASM_OPS_16);
int arcompact_handle18_06_14_dasm(DASM_OPS_16);
int arcompact_handle18_06_15_dasm(DASM_OPS_16);
int arcompact_handle18_06_16_dasm(DASM_OPS_16);
int arcompact_handle18_06_17_dasm(DASM_OPS_16);
int arcompact_handle18_06_18_dasm(DASM_OPS_16);
int arcompact_handle18_06_19_dasm(DASM_OPS_16);
int arcompact_handle18_06_1a_dasm(DASM_OPS_16);
int arcompact_handle18_06_1b_dasm(DASM_OPS_16);
int arcompact_handle18_06_1c_dasm(DASM_OPS_16);
int arcompact_handle18_06_1d_dasm(DASM_OPS_16);
int arcompact_handle18_06_1e_dasm(DASM_OPS_16);
int arcompact_handle18_06_1f_dasm(DASM_OPS_16);
int arcompact_handle18_07_00_dasm(DASM_OPS_16);
int arcompact_handle18_07_02_dasm(DASM_OPS_16);
int arcompact_handle18_07_03_dasm(DASM_OPS_16);
int arcompact_handle18_07_04_dasm(DASM_OPS_16);
int arcompact_handle18_07_05_dasm(DASM_OPS_16);
int arcompact_handle18_07_06_dasm(DASM_OPS_16);
int arcompact_handle18_07_07_dasm(DASM_OPS_16);
int arcompact_handle18_07_08_dasm(DASM_OPS_16);
int arcompact_handle18_07_09_dasm(DASM_OPS_16);
int arcompact_handle18_07_0a_dasm(DASM_OPS_16);
int arcompact_handle18_07_0b_dasm(DASM_OPS_16);
int arcompact_handle18_07_0c_dasm(DASM_OPS_16);
int arcompact_handle18_07_0d_dasm(DASM_OPS_16);
int arcompact_handle18_07_0e_dasm(DASM_OPS_16);
int arcompact_handle18_07_0f_dasm(DASM_OPS_16);
int arcompact_handle18_07_10_dasm(DASM_OPS_16);
int arcompact_handle18_07_12_dasm(DASM_OPS_16);
int arcompact_handle18_07_13_dasm(DASM_OPS_16);
int arcompact_handle18_07_14_dasm(DASM_OPS_16);
int arcompact_handle18_07_15_dasm(DASM_OPS_16);
int arcompact_handle18_07_16_dasm(DASM_OPS_16);
int arcompact_handle18_07_17_dasm(DASM_OPS_16);
int arcompact_handle18_07_18_dasm(DASM_OPS_16);
int arcompact_handle18_07_19_dasm(DASM_OPS_16);
int arcompact_handle18_07_1a_dasm(DASM_OPS_16);
int arcompact_handle18_07_1b_dasm(DASM_OPS_16);
int arcompact_handle18_07_1c_dasm(DASM_OPS_16);
int arcompact_handle18_07_1d_dasm(DASM_OPS_16);
int arcompact_handle18_07_1e_dasm(DASM_OPS_16);
int arcompact_handle18_07_1f_dasm(DASM_OPS_16);

16
src/devices/cpu/arm/arm.cpp
View File

@ -20,9 +20,7 @@
#include "emu.h"
#include "arm.h"
#include "debugger.h"
CPU_DISASSEMBLE( arm );
CPU_DISASSEMBLE( arm_be );
#include "armdasm.h"
#define ARM_DEBUG_CORE 0
#define ARM_DEBUG_COPRO 0
@ -1562,15 +1560,7 @@ void arm_cpu_device::HandleCoPro( uint32_t insn )
}
offs_t arm_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *arm_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE( arm );
return CPU_DISASSEMBLE_NAME(arm)(this, stream, pc, oprom, opram, options);
}
offs_t arm_be_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( arm_be );
return CPU_DISASSEMBLE_NAME(arm_be)(this, stream, pc, oprom, opram, options);
return new arm_disassembler;
}

7
src/devices/cpu/arm/arm.h
View File

@ -64,9 +64,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 4; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
address_space_config m_program_config;
@ -111,9 +109,6 @@ class arm_be_cpu_device : public arm_cpu_device
public:
// construction/destruction
arm_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};

33
src/devices/cpu/arm/armdasm.cpp
View File

@ -7,9 +7,9 @@
*/
#include "emu.h"
#include "arm.h"
#include "armdasm.h"
static void WriteImmediateOperand( std::ostream &stream, uint32_t opcode )
void arm_disassembler::WriteImmediateOperand( std::ostream &stream, uint32_t opcode ) const
{
/* rrrrbbbbbbbb */
uint32_t imm;
@ -21,7 +21,7 @@ static void WriteImmediateOperand( std::ostream &stream, uint32_t opcode )
util::stream_format( stream, ", #$%x", imm );
}
static void WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, int printOp0, int printOp1, int printOp2 )
void arm_disassembler::WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, int printOp0, int printOp1, int printOp2 ) const
{
/* ccccctttmmmm */
static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
@ -57,7 +57,7 @@ static void WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, i
}
}
static void WriteRegisterOperand1( std::ostream &stream, uint32_t opcode )
void arm_disassembler::WriteRegisterOperand1( std::ostream &stream, uint32_t opcode ) const
{
/* ccccctttmmmm */
static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
@ -81,7 +81,7 @@ static void WriteRegisterOperand1( std::ostream &stream, uint32_t opcode )
} /* WriteRegisterOperand */
static void WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opcode )
void arm_disassembler::WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opcode ) const
{
opcode &= 0x00ffffff;
if( opcode&0x00800000 )
@ -92,14 +92,14 @@ static void WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opco
util::stream_format( stream, "$%x", pc );
} /* WriteBranchAddress */
static void WritePadding(std::ostream &stream, std::streampos start_position)
void arm_disassembler::WritePadding(std::ostream &stream, std::streampos start_position) const
{
std::streamoff difference = stream.tellp() - start_position;
for (std::streamoff i = difference; i < 8; i++)
stream << ' ';
}
static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
offs_t arm_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
static const char *const pConditionCodeTable[16] =
{
@ -119,6 +119,8 @@ static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
uint32_t dasmflags = 0;
std::streampos start_position = stream.tellp();
u32 opcode = opcodes.r32(pc);
pConditionCode= pConditionCodeTable[opcode>>28];
if( (opcode&0x0fc000f0)==0x00000090u )
@ -193,7 +195,7 @@ static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
case 0x0d:
/* look for mov pc,lr */
if (((opcode >> 12) & 0x0f) == 15 && ((opcode >> 0) & 0x0f) == 14 && (opcode & 0x02000000) == 0)
dasmflags = DASMFLAG_STEP_OUT;
dasmflags = STEP_OUT;
case 0x0f:
WriteDataProcessingOperand(stream, opcode, 1, 0, 1);
break;
@ -325,7 +327,7 @@ static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
if( opcode&0x01000000 )
{
util::stream_format( stream, "BL" );
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
}
else
{
@ -380,24 +382,21 @@ static uint32_t arm_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
util::stream_format( stream, "SWI%s $%x",
pConditionCode,
opcode&0x00ffffff );
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
}
else
{
util::stream_format( stream, "Undefined" );
}
return dasmflags | DASMFLAG_SUPPORTED;
return 4 | dasmflags | SUPPORTED;
}
CPU_DISASSEMBLE( arm )
u32 arm_disassembler::opcode_alignment() const
{
uint32_t opcode = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
return 4 | arm_disasm(stream, pc, opcode);
return 4;
}
CPU_DISASSEMBLE( arm_be )
arm_disassembler::arm_disassembler()
{
uint32_t opcode = oprom[3] | (oprom[2] << 8) | (oprom[1] << 16) | (oprom[0] << 24);
return 4 | arm_disasm(stream, pc, opcode);
}

23
src/devices/cpu/arm/armdasm.h Normal file
View File

@ -0,0 +1,23 @@
#ifndef MAME_CPU_ARM_ARMDASM_H
#define MAME_CPU_ARM_ARMDASM_H
#pragma once
class arm_disassembler : public util::disasm_interface
{
public:
arm_disassembler();
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
void WriteImmediateOperand( std::ostream &stream, uint32_t opcode ) const;
void WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, int printOp0, int printOp1, int printOp2 ) const;
void WriteRegisterOperand1( std::ostream &stream, uint32_t opcode ) const;
void WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opcode ) const;
void WritePadding(std::ostream &stream, std::streampos start_position) const;
};
#endif

81
src/devices/cpu/arm7/arm7.cpp
View File

@ -929,83 +929,14 @@ void arm7_cpu_device::execute_set_input(int irqline, int state)
}
offs_t arm7_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *arm7_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE( arm7arm );
extern CPU_DISASSEMBLE( arm7thumb );
extern CPU_DISASSEMBLE( arm7arm_be );
extern CPU_DISASSEMBLE( arm7thumb_be );
return new arm7_disassembler(this);
}
uint8_t fetched_op[4];
uint32_t op = 0;
int prefetch_index = get_insn_prefetch_index(pc);
if (prefetch_index < 0)
{
memcpy(fetched_op, oprom, 4);
if (T_IS_SET(m_r[eCPSR]))
{
if ( m_endian == ENDIANNESS_BIG )
{
return CPU_DISASSEMBLE_NAME(arm7thumb_be)(this, stream, pc, fetched_op, opram, options);
}
else
{
return CPU_DISASSEMBLE_NAME(arm7thumb)(this, stream, pc, fetched_op, opram, options);
}
}
else
{
if ( m_endian == ENDIANNESS_BIG )
{
return CPU_DISASSEMBLE_NAME(arm7arm_be)(this, stream, pc, fetched_op, opram, options);
}
else
{
return CPU_DISASSEMBLE_NAME(arm7arm)(this, stream, pc, fetched_op, opram, options);
}
}
}
else
{
op = m_insn_prefetch_buffer[prefetch_index];
if (T_IS_SET(m_r[eCPSR]))
{
if (m_endian == ENDIANNESS_BIG)
{
op >>= ((pc & 2) ? 0 : 16);
fetched_op[1] = op & 0xff;
fetched_op[0] = (op >> 8) & 0xff;
return CPU_DISASSEMBLE_NAME(arm7thumb_be)(this, stream, pc, fetched_op, opram, options);
}
else
{
op >>= ((pc & 2) ? 16 : 0);
fetched_op[0] = op & 0xff;
fetched_op[1] = (op >> 8) & 0xff;
return CPU_DISASSEMBLE_NAME(arm7thumb)(this, stream, pc, fetched_op, opram, options);
}
}
else
{
if (m_endian == ENDIANNESS_BIG)
{
fetched_op[3] = op & 0xff;
fetched_op[2] = (op >> 8) & 0xff;
fetched_op[1] = (op >> 16) & 0xff;
fetched_op[0] = (op >> 24) & 0xff;
return CPU_DISASSEMBLE_NAME(arm7arm_be)(this, stream, pc, fetched_op, opram, options);
}
else
{
fetched_op[0] = op & 0xff;
fetched_op[1] = (op >> 8) & 0xff;
fetched_op[2] = (op >> 16) & 0xff;
fetched_op[3] = (op >> 24) & 0xff;
return CPU_DISASSEMBLE_NAME(arm7arm)(this, stream, pc, fetched_op, opram, options);
}
}
}
return 0;
bool arm7_cpu_device::get_t_flag() const
{
return T_IS_SET(m_r[eCPSR]);
}

9
src/devices/cpu/arm7/arm7.h
View File

@ -23,6 +23,8 @@
#pragma once
#include "arm7dasm.h"
#include "cpu/drcfe.h"
#include "cpu/drcuml.h"
#include "cpu/drcumlsh.h"
@ -49,7 +51,7 @@
* PUBLIC FUNCTIONS
***************************************************************************************************/
class arm7_cpu_device : public cpu_device
class arm7_cpu_device : public cpu_device, public arm7_disassembler::config
{
public:
// construction/destruction
@ -130,9 +132,8 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 4; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
virtual bool get_t_flag() const override;
address_space_config m_program_config;

64
src/devices/cpu/arm7/arm7dasm.cpp
View File

@ -23,16 +23,17 @@
******************************************************************************/
#include "emu.h"
#include "arm7dasm.h"
#include "arm7core.h"
static void WritePadding(std::ostream &stream, std::streampos start_position)
void arm7_disassembler::WritePadding(std::ostream &stream, std::streampos start_position)
{
std::streamoff difference = stream.tellp() - start_position;
for (std::streamoff i = difference; i < 8; i++)
stream << ' ';
}
static void DasmCoProc_RT(std::ostream &stream, uint32_t opcode, const char *pConditionCode, std::streampos start_position)
void arm7_disassembler::DasmCoProc_RT(std::ostream &stream, uint32_t opcode, const char *pConditionCode, std::streampos start_position)
{
/* co processor register transfer */
/* xxxx 1110 oooL nnnn dddd cccc ppp1 mmmm */
@ -51,7 +52,7 @@ static void DasmCoProc_RT(std::ostream &stream, uint32_t opcode, const char *pCo
if((opcode>>5)&7) util::stream_format( stream, ", %d",(opcode>>5)&7);
}
static void DasmCoProc_DT(std::ostream &stream, uint32_t opcode, const char *pConditionCode, std::streampos start_position)
void arm7_disassembler::DasmCoProc_DT(std::ostream &stream, uint32_t opcode, const char *pConditionCode, std::streampos start_position)
{
/* co processor data transfer */
/* xxxx 111P UNWL nnnn dddd pppp oooooooo */
@ -75,7 +76,7 @@ static void DasmCoProc_DT(std::ostream &stream, uint32_t opcode, const char *pCo
util::stream_format(stream, "%s%s",(opcode&0x1000000)?"]":"",(opcode&0x200000)?"{!}":"");
}
static void DasmCoProc_DO(std::ostream &stream, uint32_t opcode, const char *pConditionCode, std::streampos start_position)
void arm7_disassembler::DasmCoProc_DO(std::ostream &stream, uint32_t opcode, const char *pConditionCode, std::streampos start_position)
{
/* co processor data operation */
/* xxxx 1110 oooo nnnn dddd cccc ppp0 mmmm */
@ -88,7 +89,7 @@ static void DasmCoProc_DO(std::ostream &stream, uint32_t opcode, const char *pCo
if((opcode>>5)&7) util::stream_format(stream, ", %d",(opcode>>5)&7);
}
static void WriteImmediateOperand( std::ostream &stream, uint32_t opcode )
void arm7_disassembler::WriteImmediateOperand( std::ostream &stream, uint32_t opcode )
{
/* rrrrbbbbbbbb */
uint32_t imm;
@ -100,7 +101,7 @@ static void WriteImmediateOperand( std::ostream &stream, uint32_t opcode )
util::stream_format( stream, ", #$%x", imm );
}
static void WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, int printOp0, int printOp1, int printOp2 )
void arm7_disassembler::WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, int printOp0, int printOp1, int printOp2 )
{
/* ccccctttmmmm */
static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
@ -142,7 +143,7 @@ static void WriteDataProcessingOperand( std::ostream &stream, uint32_t opcode, i
}
}
static void WriteRegisterOperand1( std::ostream &stream, uint32_t opcode )
void arm7_disassembler::WriteRegisterOperand1( std::ostream &stream, uint32_t opcode )
{
/* ccccctttmmmm */
static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
@ -172,7 +173,7 @@ static void WriteRegisterOperand1( std::ostream &stream, uint32_t opcode )
} /* WriteRegisterOperand */
static void WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opcode, bool h_bit )
void arm7_disassembler::WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opcode, bool h_bit )
{
opcode <<= 2;
if (h_bit && (opcode & 0x04000000))
@ -188,7 +189,7 @@ static void WriteBranchAddress( std::ostream &stream, uint32_t pc, uint32_t opco
util::stream_format( stream, "$%x", pc );
} /* WriteBranchAddress */
static uint32_t arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
u32 arm7_disassembler::arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode )
{
static const char *const pConditionCodeTable[16] =
{
@ -214,7 +215,7 @@ static uint32_t arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode
{
/* BLX(1) */
util::stream_format( stream, "BLX" );
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
WritePadding(stream, start_position);
@ -224,7 +225,7 @@ static uint32_t arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode
{
/* BLX(2) */
util::stream_format( stream, "BLX" );
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
WritePadding(stream, start_position);
util::stream_format( stream, "R%d",(opcode&0xf));
}
@ -236,7 +237,7 @@ static uint32_t arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode
WritePadding(stream, start_position);
util::stream_format( stream, "R%d",(opcode&0xf));
if ((opcode & 0x0f) == 14)
dasmflags = DASMFLAG_STEP_OUT;
dasmflags = STEP_OUT;
}
else if ((opcode & 0x0ff000f0) == 0x01600010) // CLZ - v5
{
@ -500,7 +501,7 @@ static uint32_t arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode
case 0x0d:
/* look for mov pc,lr */
if (((opcode >> 12) & 0x0f) == 15 && ((opcode >> 0) & 0x0f) == 14 && (opcode & 0x02000000) == 0)
dasmflags = DASMFLAG_STEP_OUT;
dasmflags = STEP_OUT;
case 0x0f:
WriteDataProcessingOperand(stream, opcode, 1, 0, 1);
break;
@ -649,7 +650,7 @@ static uint32_t arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode
if( opcode&0x01000000 )
{
util::stream_format( stream, "BL" );
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
}
else
{
@ -688,16 +689,16 @@ static uint32_t arm7_disasm( std::ostream &stream, uint32_t pc, uint32_t opcode
util::stream_format( stream, "SWI%s $%x",
pConditionCode,
opcode&0x00ffffff );
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
}
else
{
util::stream_format( stream, "Undefined" );
}
return dasmflags | DASMFLAG_SUPPORTED;
return 4 | dasmflags | SUPPORTED;
}
static uint32_t thumb_disasm(std::ostream &stream, uint32_t pc, uint16_t opcode)
u32 arm7_disassembler::thumb_disasm(std::ostream &stream, uint32_t pc, uint16_t opcode)
{
std::streampos start_position = stream.tellp();
uint32_t dasmflags = 0;
@ -978,7 +979,7 @@ static uint32_t thumb_disasm(std::ostream &stream, uint32_t pc, uint16_t opcode)
rd = ( ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT ) + 8;
util::stream_format( stream, "BX R%d", rd );
if (rd == 14)
dasmflags = DASMFLAG_STEP_OUT;
dasmflags = STEP_OUT;
break;
case 0x2:
rd = ( opcode & THUMB_HIREG_RS ) >> THUMB_HIREG_RS_SHIFT;
@ -1287,7 +1288,7 @@ static uint32_t thumb_disasm(std::ostream &stream, uint32_t pc, uint16_t opcode)
{
addr = ( ( opcode & THUMB_BLOP_OFFS ) << 1 ) & 0xfffc;
util::stream_format( stream, "BLX (LO) %08x", addr );
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
}
else
{
@ -1303,7 +1304,7 @@ static uint32_t thumb_disasm(std::ostream &stream, uint32_t pc, uint16_t opcode)
if( opcode & THUMB_BLOP_LO )
{
util::stream_format( stream, "BL (LO) %08x", ( opcode & THUMB_BLOP_OFFS ) << 1 );
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
}
else
{
@ -1313,7 +1314,7 @@ static uint32_t thumb_disasm(std::ostream &stream, uint32_t pc, uint16_t opcode)
addr |= 0xff800000;
}
util::stream_format( stream, "BL (HI) %08x", addr );
dasmflags = DASMFLAG_STEP_OVER;
dasmflags = STEP_OVER;
}
break;
default:
@ -1321,25 +1322,22 @@ static uint32_t thumb_disasm(std::ostream &stream, uint32_t pc, uint16_t opcode)
break;
}
return dasmflags | DASMFLAG_SUPPORTED;
return 2 | dasmflags | SUPPORTED;
}
CPU_DISASSEMBLE( arm7arm )
arm7_disassembler::arm7_disassembler(config *conf) : m_config(conf)
{
return arm7_disasm(stream, pc, oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24)) | 4;
}
CPU_DISASSEMBLE( arm7arm_be )
u32 arm7_disassembler::opcode_alignment() const
{
return arm7_disasm(stream, pc, oprom[3] | (oprom[2] << 8) | (oprom[1] << 16) | (oprom[0] << 24)) | 4;
return m_config->get_t_flag() ? 2 : 4;
}
CPU_DISASSEMBLE( arm7thumb )
offs_t arm7_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
return thumb_disasm(stream, pc, oprom[0] | (oprom[1] << 8)) | 2;
}
CPU_DISASSEMBLE( arm7thumb_be )
{
return thumb_disasm(stream, pc, oprom[1] | (oprom[0] << 8)) | 2;
if(m_config->get_t_flag())
return thumb_disasm(stream, pc, opcodes.r16(pc));
else
return arm7_disasm(stream, pc, opcodes.r32(pc));
}

51
src/devices/cpu/arm7/arm7dasm.h Normal file
View File

@ -0,0 +1,51 @@
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
* arm7dasm.c
* Portable ARM7TDMI Core Emulator - Disassembler
*
* Copyright Steve Ellenoff, all rights reserved.
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
* #2) Arm 2/3/6 emulator By Bryan McPhail (bmcphail@tendril.co.uk) and Phil Stroffolino (MAME CORE 0.76)
*
*****************************************************************************/
#ifndef MAME_CPU_ARM7_ARM7DASM_H
#define MAME_CPU_ARM7_ARM7DASM_H
#pragma once
class arm7_disassembler : public util::disasm_interface
{
public:
class config {
public:
virtual ~config() = default;
virtual bool get_t_flag() const = 0;
};
arm7_disassembler(config *conf);
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
config *m_config;
void WritePadding(std::ostream &stream, std::streampos start_position);
void DasmCoProc_RT(std::ostream &stream, u32 opcode, const char *pConditionCode, std::streampos start_position);
void DasmCoProc_DT(std::ostream &stream, u32 opcode, const char *pConditionCode, std::streampos start_position);
void DasmCoProc_DO(std::ostream &stream, u32 opcode, const char *pConditionCode, std::streampos start_position);
void WriteImmediateOperand( std::ostream &stream, u32 opcode );
void WriteDataProcessingOperand( std::ostream &stream, u32 opcode, int printOp0, int printOp1, int printOp2 );
void WriteRegisterOperand1( std::ostream &stream, u32 opcode );
void WriteBranchAddress( std::ostream &stream, u32 pc, u32 opcode, bool h_bit );
u32 arm7_disasm( std::ostream &stream, u32 pc, u32 opcode );
u32 thumb_disasm(std::ostream &stream, u32 pc, u16 opcode);
};
#endif

31
src/devices/cpu/asap/asap.cpp
View File

@ -13,6 +13,7 @@
#include "emu.h"
#include "asap.h"
#include "asapdasm.h"
#include "debugger.h"
@ -300,40 +301,16 @@ void asap_device::state_string_export(const device_state_entry &entry, std::stri
//-------------------------------------------------
// disasm_min_opcode_bytes - return the length
// of the shortest instruction, in bytes
//-------------------------------------------------
uint32_t asap_device::disasm_min_opcode_bytes() const
{
return 4;
}
//-------------------------------------------------
// disasm_max_opcode_bytes - return the length
// of the longest instruction, in bytes
//-------------------------------------------------
uint32_t asap_device::disasm_max_opcode_bytes() const
{
return 12;
}
//-------------------------------------------------
// disasm_disassemble - call the disassembly
// disassemble - call the disassembly
// helper function
//-------------------------------------------------
offs_t asap_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *asap_device::create_disassembler()
{
extern CPU_DISASSEMBLE( asap );
return CPU_DISASSEMBLE_NAME(asap)(this, stream, pc, oprom, opram, options);
return new asap_disassembler;
}
//**************************************************************************
// INLINE HELPERS
//**************************************************************************

4
src/devices/cpu/asap/asap.h
View File

@ -89,9 +89,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override;
virtual uint32_t disasm_max_opcode_bytes() const override;
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
// helpers
inline uint32_t readop(offs_t pc);

45
src/devices/cpu/asap/asapdasm.cpp
View File

@ -9,10 +9,10 @@
***************************************************************************/
#include "emu.h"
#include "asap.h"
#include "asapdasm.h"
static const char *const reg[32] =
const char *const asap_disassembler::reg[32] =
{
"0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
@ -20,12 +20,12 @@ static const char *const reg[32] =
"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
};
static const char *const setcond[2] =
const char *const asap_disassembler::setcond[2] =
{
" ", ".c"
};
static const char *const condition[16] =
const char *const asap_disassembler::condition[16] =
{
"sp", "mz", "gt", "le", "ge", "lt", "hi", "ls", "cc", "cs", "pl", "mi", "ne", "eq", "vc", "vs"
};
@ -35,19 +35,17 @@ static const char *const condition[16] =
CODE CODE
***************************************************************************/
static inline char *src2(uint32_t op, int scale)
std::string asap_disassembler::src2(uint32_t op, int scale)
{
static char temp[20];
if ((op & 0xffe0) == 0xffe0)
sprintf(temp, "%s", reg[op & 31]);
return util::string_format("%s", reg[op & 31]);
else
sprintf(temp, "$%x", (op & 0xffff) << scale);
return temp;
return util::string_format("$%x", (op & 0xffff) << scale);
}
CPU_DISASSEMBLE(asap)
offs_t asap_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint32_t op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
uint32_t op = opcodes.r32(pc);
int opcode = op >> 27;
int cond = (op >> 21) & 1;
int rdst = (op >> 22) & 31;
@ -58,21 +56,21 @@ CPU_DISASSEMBLE(asap)
switch (opcode)
{
case 0x00: util::stream_format(stream, "trap $00"); flags = DASMFLAG_STEP_OVER; break;
case 0x00: util::stream_format(stream, "trap $00"); flags = STEP_OVER; break;
case 0x01: util::stream_format(stream, "b%s $%08x", condition[rdst & 15], pc + ((int32_t)(op << 10) >> 8)); break;
case 0x02: if ((op & 0x003fffff) == 3)
{
uint32_t nextop = oprom[4] | (oprom[5] << 8) | (oprom[6] << 16) | (oprom[7] << 24);
uint32_t nextop = opcodes.r32(pc+4);
if ((nextop >> 27) == 0x10 && ((nextop >> 22) & 31) == rdst && (nextop & 0xffff) == 0)
{
uint32_t nextnextop = oprom[8] | (oprom[9] << 8) | (oprom[10] << 16) | (oprom[11] << 24);
uint32_t nextnextop = opcodes.r32(pc+8);
util::stream_format(stream, "llit%s $%08x,%s", setcond[cond], nextnextop, reg[rdst]);
return 12 | DASMFLAG_STEP_OVER | DASMFLAG_SUPPORTED;
return 12 | STEP_OVER | SUPPORTED;
}
}
if (rdst)
{
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
flags = STEP_OVER | step_over_extra(1);
util::stream_format(stream, "bsr %s,$%08x", reg[rdst], pc + ((int32_t)(op << 10) >> 8));
}
else
@ -123,24 +121,29 @@ CPU_DISASSEMBLE(asap)
case 0x1d: util::stream_format(stream, "putps %s", src2(op,0)); break;
case 0x1e: if (rdst && rsrc2_iszero)
{
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
flags = STEP_OVER | step_over_extra(1);
util::stream_format(stream, "jsr%s %s,%s", setcond[cond], reg[rdst], reg[rsrc1]);
}
else if (rdst)
{
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
flags = STEP_OVER | step_over_extra(1);
util::stream_format(stream, "jsr%s %s,%s[%s]", setcond[cond], reg[rdst], reg[rsrc1], src2(op,2));
}
else if (rsrc2_iszero)
{
if (rsrc1 == 28)
flags = DASMFLAG_STEP_OUT;
flags = STEP_OUT;
util::stream_format(stream, "jmp%s %s", setcond[cond], reg[rsrc1]);
}
else
util::stream_format(stream, "jmp%s %s[%s]", setcond[cond], reg[rsrc1], src2(op,2));
break;
case 0x1f: util::stream_format(stream, "trap $1f"); flags = DASMFLAG_STEP_OVER; break;
case 0x1f: util::stream_format(stream, "trap $1f"); flags = STEP_OVER; break;
}
return 4 | flags | DASMFLAG_SUPPORTED;
return 4 | flags | SUPPORTED;
}
u32 asap_disassembler::opcode_alignment() const
{
return 4;
}

33
src/devices/cpu/asap/asapdasm.h Normal file
View File

@ -0,0 +1,33 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles
/***************************************************************************
asapdasm.c
Disassembler for the portable ASAP emulator.
Written by Aaron Giles
***************************************************************************/
#ifndef MAME_CPU_ASAP_ASAPDASM_H
#define MAME_CPU_ASAP_ASAPDASM_H
#pragma once
class asap_disassembler : public util::disasm_interface
{
public:
asap_disassembler() = default;
virtual ~asap_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
static const char *const reg[32];
static const char *const setcond[2];
static const char *const condition[16];
std::string src2(uint32_t op, int scale);
};
#endif

30
src/devices/cpu/avr8/avr8.cpp
View File

@ -59,6 +59,7 @@
#include "emu.h"
#include "avr8.h"
#include "avr8dasm.h"
#include "debugger.h"
#define VERBOSE_LEVEL (0)
@ -911,36 +912,13 @@ void avr8_device::state_string_export(const device_state_entry &entry, std::stri
//-------------------------------------------------
// disasm_min_opcode_bytes - return the length
// of the shortest instruction, in bytes
//-------------------------------------------------
uint32_t avr8_device::disasm_min_opcode_bytes() const
{
return 2;
}
//-------------------------------------------------
// disasm_max_opcode_bytes - return the length
// of the longest instruction, in bytes
//-------------------------------------------------
uint32_t avr8_device::disasm_max_opcode_bytes() const
{
return 4;
}
//-------------------------------------------------
// disasm_disassemble - call the disassembly
// disassemble - call the disassembly
// helper function
//-------------------------------------------------
offs_t avr8_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *avr8_device::create_disassembler()
{
extern CPU_DISASSEMBLE( avr8 );
return CPU_DISASSEMBLE_NAME(avr8)(this, stream, pc, oprom, opram, options);
return new avr8_disassembler;
}

6
src/devices/cpu/avr8/avr8.h
View File

@ -123,9 +123,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override;
virtual uint32_t disasm_max_opcode_bytes() const override;
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@ -848,6 +846,4 @@ enum
#define AVR8_SPCR_CPHA_MASK 0x04
#define AVR8_SPCR_SPR_MASK 0x03
CPU_DISASSEMBLE( avr8 );
#endif /* __AVR8_H__ */

41
src/devices/cpu/avr8/avr8dasm.cpp
View File

@ -7,7 +7,7 @@
*/
#include "emu.h"
#include "avr8.h"
#include "avr8dasm.h"
#define RD2(op) (((op) >> 4) & 0x0003)
#define RD3(op) (((op) >> 4) & 0x0007)
@ -25,11 +25,16 @@
#define ACONST6(op) ((((op) >> 5) & 0x0030) | ((op) & 0x000f))
#define MULCONST2(op) ((((op) >> 6) & 0x0002) | (((op) >> 3) & 0x0001))
CPU_DISASSEMBLE(avr8)
u32 avr8_disassembler::opcode_alignment() const
{
int pos = 0;
uint32_t op = oprom[pos++];
op |= oprom[pos++] << 8;
return 2;
}
offs_t avr8_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
offs_t base_pc = pc;
uint32_t op = opcodes.r16(pc);
pc += 2;
uint32_t addr;
const char* register_names[0x40] = {"PINA", "DDRA", "PORTA", "PINB", "DDRB", "PORTB", "PINC", "DDRC", "PORTC", "PIND", "DDRD", "PORTD", "PINE", "DDRE", "PORTE", "PINF", "DDRF", "PORTF", "PING", "DDRG", "PORTG", "TIFR0", "TIFR1", "TIFR2","TIFR3", "TIFR4", "TIFR5", "PCIFR", "EIFR", "EIMSK", "GPIOR0", "EECR", "EEDR", "EEARL", "EEARH", "GTCCR", "TCCR0A", "TCCR0B", "TCNT0", "OCR0A", "OCR0B", "0x29", "GPIOR1", "GPIOR2", "SPCR", "SPSR", "SPDR", "0x2F", "ACSR", "OCDR", "0x32", "SMCR", "MCUSR", "MCUCR", "0x36", "SPMCSR", "0x38", "0x39", "0x3A", "RAMPZ", "EIND", "SPL", "SPH", "SREG"};
@ -226,8 +231,8 @@ CPU_DISASSEMBLE(avr8)
{
case 0x0000:
op <<= 16;
op |= oprom[pos++];
op |= oprom[pos++] << 8;
op |= opcodes.r16(pc);
pc += 2;
util::stream_format(stream, "LDS R%d, (0x%04x)", RD5(op >> 16), op & 0x0000ffff);
break;
case 0x0001:
@ -277,8 +282,8 @@ CPU_DISASSEMBLE(avr8)
{
case 0x0000:
op <<= 16;
op |= oprom[pos++];
op |= oprom[pos++] << 8;
op |= opcodes.r16(pc);
pc += 2;
util::stream_format(stream, "STS (0x%04x), R%d", op & 0x0000ffff, RD5(op >> 16));
break;
case 0x0001:
@ -410,15 +415,15 @@ CPU_DISASSEMBLE(avr8)
case 0x000c:
case 0x000d:
addr = KCONST22(op) << 16;
addr |= oprom[pos++];
addr |= oprom[pos++] << 8;
addr |= opcodes.r16(pc);
pc += 2;
util::stream_format(stream, "JMP 0x%06x", addr << 1);
break;
case 0x000e:
case 0x000f:
addr = KCONST22(op) << 16;
addr |= oprom[pos++];
addr |= oprom[pos++] << 8;
addr |= opcodes.r16(pc);
pc += 2;
util::stream_format(stream, "CALL 0x%06x", addr << 1);
break;
default:
@ -505,15 +510,15 @@ CPU_DISASSEMBLE(avr8)
case 0x000c:
case 0x000d:
op <<= 16;
op |= oprom[pos++];
op |= oprom[pos++] << 8;
op |= opcodes.r16(pc);
pc += 2;
util::stream_format(stream, "JMP 0x%06x", KCONST22(op) << 1);
break;
case 0x000e:
case 0x000f:
op <<= 16;
op |= oprom[pos++];
op |= oprom[pos++] << 8;
op |= opcodes.r16(pc);
pc += 2;
util::stream_format(stream, "CALL 0x%06x", KCONST22(op) << 1);
break;
}
@ -669,5 +674,5 @@ CPU_DISASSEMBLE(avr8)
break;
}
return pos | DASMFLAG_SUPPORTED;
return (pc - base_pc) | SUPPORTED;
}

24
src/devices/cpu/avr8/avr8dasm.h Normal file
View File

@ -0,0 +1,24 @@
// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
/*
Atmel 8-bit AVR disassembler
Written by Ryan Holtz
*/
#ifndef MAME_CPU_AVR8_AVR8DASM_H
#define MAME_CPU_AVR8_AVR8DASM_H
#pragma once
class avr8_disassembler : public util::disasm_interface
{
public:
avr8_disassembler() = default;
virtual ~avr8_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
#endif

6
src/devices/cpu/capricorn/capricorn.cpp
View File

@ -7,6 +7,7 @@
//
#include "emu.h"
#include "capricorn.h"
#include "capricorn_dasm.h"
#include "debugger.h"
// Register indexes
@ -237,10 +238,9 @@ void capricorn_cpu_device::state_string_export(const device_state_entry &entry,
}
}
offs_t capricorn_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)
util::disasm_interface *capricorn_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE(capricorn);
return CPU_DISASSEMBLE_NAME(capricorn)(this, stream, pc, oprom, opram, options);
return new capricorn_disassembler;
}
void capricorn_cpu_device::start_mem_burst(ea_addr_t addr)

6
src/devices/cpu/capricorn/capricorn.h
View File

@ -39,11 +39,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual u32 disasm_min_opcode_bytes() const override
{ return 1; }
virtual u32 disasm_max_opcode_bytes() const override
{ return 9; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
virtual util::disasm_interface *create_disassembler() override;
private:
address_space_config m_program_config;

237
src/devices/cpu/capricorn/capricorn_dasm.cpp
View File

@ -5,204 +5,197 @@
// ********************************************************************************
#include "emu.h"
#include "capricorn.h"
#include "capricorn_dasm.h"
typedef offs_t (*fn_dis_param)(std::ostream &stream , offs_t pc , const uint8_t *oprom);
typedef struct {
uint8_t m_op_mask;
uint8_t m_opcode;
const char *m_mnemonic;
bool m_has_mb;
char m_addr_mode;
fn_dis_param m_param_fn;
uint32_t m_dasm_flags;
} dis_entry_t;
static void direct_addr(std::ostream &stream , const uint8_t *oprom)
void capricorn_disassembler::direct_addr(std::ostream &stream, offs_t pc, const data_buffer &opcodes)
{
util::stream_format(stream , "$%02x%02x" , oprom[ 1 ] , oprom[ 0 ]);
util::stream_format(stream, "$%04x", opcodes.r16(pc));
}
static offs_t param_arp_drp(std::ostream &stream , offs_t pc , const uint8_t *oprom)
offs_t capricorn_disassembler::param_arp_drp(std::ostream &stream, offs_t pc, const data_buffer &opcodes)
{
stream << "R";
util::stream_format(stream , "%02o" , oprom[ 0 ] & 0x3f);
util::stream_format(stream, "%02o", opcodes.r8(pc) & 0x3f);
return 0;
}
static offs_t param_dr(std::ostream &stream , offs_t pc , const uint8_t *oprom)
offs_t capricorn_disassembler::param_dr(std::ostream &stream, offs_t pc, const data_buffer &opcodes)
{
stream << "DR";
return 0;
}
static offs_t param_dr_ar(std::ostream &stream , offs_t pc , const uint8_t *oprom)
offs_t capricorn_disassembler::param_dr_ar(std::ostream &stream, offs_t pc, const data_buffer &opcodes)
{
stream << "DR,AR";
return 0;
}
static offs_t param_dr_lit(std::ostream &stream , offs_t pc , const uint8_t *oprom)
offs_t capricorn_disassembler::param_dr_lit(std::ostream &stream, offs_t pc, const data_buffer &opcodes)
{
stream << "DR,=";
// Here we assume that multi-byte instructions operate on 2 bytes because we
// have no way of knowing how many they are (the actual number of bytes is
// dynamically determined by the value of DRP register at run-time)
unsigned bytes = BIT(oprom[ 0 ] , 0) ? 2 : 1;
unsigned bytes = BIT(opcodes.r8(pc), 0) ? 2 : 1;
for (unsigned i = 1; i <= bytes; i++) {
util::stream_format(stream , "$%02x " , oprom[ i ]);
util::stream_format(stream, "$%02x ", opcodes.r8(pc+i));
}
return bytes;
}
static offs_t param_dr_lit_dir(std::ostream &stream , offs_t pc ,const uint8_t *oprom)
offs_t capricorn_disassembler::param_dr_lit_dir(std::ostream &stream, offs_t pc,const data_buffer &opcodes)
{
stream << "DR,=";
direct_addr(stream , &oprom[ 1 ]);
direct_addr(stream, pc+1, opcodes);
return 2;
}
static offs_t param_dr_idx_dir(std::ostream &stream , offs_t pc ,const uint8_t *oprom)
offs_t capricorn_disassembler::param_dr_idx_dir(std::ostream &stream, offs_t pc,const data_buffer &opcodes)
{
stream << "DR,XAR,";
direct_addr(stream , &oprom[ 1 ]);
direct_addr(stream, pc+1, opcodes);
return 2;
}
static offs_t param_xr_lit(std::ostream &stream , offs_t pc ,const uint8_t *oprom)
offs_t capricorn_disassembler::param_xr_lit(std::ostream &stream, offs_t pc,const data_buffer &opcodes)
{
stream << "XR,";
direct_addr(stream , &oprom[ 1 ]);
direct_addr(stream, pc+1, opcodes);
return 2;
}
static offs_t param_lit_dir(std::ostream &stream , offs_t pc ,const uint8_t *oprom)
offs_t capricorn_disassembler::param_lit_dir(std::ostream &stream, offs_t pc,const data_buffer &opcodes)
{
stream << "=";
direct_addr(stream , &oprom[ 1 ]);
direct_addr(stream, pc+1, opcodes);
return 2;
}
static offs_t param_dr_id_ar(std::ostream &stream , offs_t pc , const uint8_t *oprom)
offs_t capricorn_disassembler::param_dr_id_ar(std::ostream &stream, offs_t pc, const data_buffer &opcodes)
{
stream << "DR," << (BIT(oprom[ 0 ] , 1) ? '-' : '+') << "AR";
stream << "DR," << (BIT(opcodes.r8(pc), 1) ? '-' : '+') << "AR";
return 0;
}
static offs_t param_jmp_off(std::ostream &stream , offs_t pc , const uint8_t *oprom)
offs_t capricorn_disassembler::param_jmp_off(std::ostream &stream, offs_t pc, const data_buffer &opcodes)
{
uint16_t off = oprom[ 1 ];
if (BIT(off , 7)) {
uint16_t off = opcodes.r8(pc+1);
if (BIT(off, 7)) {
off -= 0x100;
}
util::stream_format(stream , "$%04x" , (pc + 2 + off) & 0xffff);
util::stream_format(stream, "$%04x", (pc + 2 + off) & 0xffff);
return 1;
}
static const dis_entry_t dis_table[] = {
{ 0xff , 0x01 , "ARP R*" , false , '\0' , nullptr , 0 },
{ 0xc0 , 0x00 , "ARP" , false , '\0' , param_arp_drp , 0 },
{ 0xff , 0x41 , "DRP R*" , false , '\0' , nullptr , 0 },
{ 0xc0 , 0x40 , "DRP" , false , '\0' , param_arp_drp , 0 },
{ 0xfe , 0x80 , "EL" , true , '\0' , param_dr , 0 },
{ 0xfe , 0x82 , "ER" , true , '\0' , param_dr , 0 },
{ 0xfe , 0x84 , "LL" , true , '\0' , param_dr , 0 },
{ 0xfe , 0x86 , "LR" , true , '\0' , param_dr , 0 },
{ 0xfe , 0x88 , "IC" , true , '\0' , param_dr , 0 },
{ 0xfe , 0x8a , "DC" , true , '\0' , param_dr , 0 },
{ 0xfe , 0x8c , "TC" , true , '\0' , param_dr , 0 },
{ 0xfe , 0x8e , "NC" , true , '\0' , param_dr , 0 },
{ 0xfe , 0x90 , "TS" , true , '\0' , param_dr , 0 },
{ 0xfe , 0x92 , "CL" , true , '\0' , param_dr , 0 },
{ 0xfe , 0x94 , "OR" , true , '\0' , param_dr_ar , 0 },
{ 0xfe , 0x96 , "XR" , true , '\0' , param_dr_ar , 0 },
{ 0xff , 0x98 , "BIN" , false , '\0' , nullptr , 0 },
{ 0xff , 0x99 , "BCD" , false , '\0' , nullptr , 0 },
{ 0xff , 0x9a , "SAD" , false , '\0' , nullptr , 0 },
{ 0xff , 0x9b , "DCE" , false , '\0' , nullptr , 0 },
{ 0xff , 0x9c , "ICE" , false , '\0' , nullptr , 0 },
{ 0xff , 0x9d , "CLE" , false , '\0' , nullptr , 0 },
{ 0xff , 0x9e , "RTN" , false , '\0' , nullptr , DASMFLAG_STEP_OUT },
{ 0xff , 0x9f , "PAD" , false , '\0' , nullptr , 0 },
{ 0xfe , 0xa0 , "LD" , true , '\0' , param_dr_ar , 0 },
{ 0xfe , 0xa2 , "ST" , true , '\0' , param_dr_ar , 0 },
{ 0xfe , 0xa4 , "LD" , true , 'D' , param_dr_ar , 0 },
{ 0xfe , 0xa6 , "ST" , true , 'D' , param_dr_ar , 0 },
{ 0xfe , 0xa8 , "LD" , true , '\0' , param_dr_lit , 0 },
{ 0xfe , 0xaa , "ST" , true , '\0' , param_dr_lit , 0 },
{ 0xfe , 0xac , "LD" , true , 'I' , param_dr_ar , 0 },
{ 0xfe , 0xae , "ST" , true , 'I' , param_dr_ar , 0 },
{ 0xfe , 0xb0 , "LD" , true , 'D' , param_dr_lit_dir , 0 },
{ 0xfe , 0xb2 , "ST" , true , 'D' , param_dr_lit_dir , 0 },
{ 0xfe , 0xb4 , "LD" , true , 'D' , param_dr_idx_dir , 0 },
{ 0xfe , 0xb6 , "ST" , true , 'D' , param_dr_idx_dir , 0 },
{ 0xfe , 0xb8 , "LD" , true , 'I' , param_dr_lit_dir , 0 },
{ 0xfe , 0xba , "ST" , true , 'I' , param_dr_lit_dir , 0 },
{ 0xfe , 0xbc , "LD" , true , 'I' , param_dr_idx_dir , 0 },
{ 0xfe , 0xbe , "ST" , true , 'I' , param_dr_idx_dir , 0 },
{ 0xfe , 0xc0 , "CM" , true , '\0' , param_dr_ar , 0 },
{ 0xfe , 0xc2 , "AD" , true , '\0' , param_dr_ar , 0 },
{ 0xfe , 0xc4 , "SB" , true , '\0' , param_dr_ar , 0 },
{ 0xff , 0xc6 , "JSB" , false , '\0' , param_xr_lit , DASMFLAG_STEP_OVER },
{ 0xff , 0xc7 , "ANM" , false , '\0' , param_dr_ar , 0 },
{ 0xfe , 0xc8 , "CM" , true , '\0' , param_dr_lit , 0 },
{ 0xfe , 0xca , "AD" , true , '\0' , param_dr_lit , 0 },
{ 0xfe , 0xcc , "SB" , true , '\0' , param_dr_lit , 0 },
{ 0xff , 0xce , "JSB" , false , '\0' , param_lit_dir , DASMFLAG_STEP_OVER },
{ 0xff , 0xcf , "ANM" , false , '\0' , param_dr_lit , 0 },
{ 0xfe , 0xd0 , "CM" , true , 'D' , param_dr_lit_dir , 0 },
{ 0xfe , 0xd2 , "AD" , true , 'D' , param_dr_lit_dir , 0 },
{ 0xfe , 0xd4 , "SB" , true , 'D' , param_dr_lit_dir , 0 },
{ 0xff , 0xd7 , "ANM" , false , 'D' , param_dr_lit_dir , 0 },
{ 0xfe , 0xd8 , "CM" , true , 'D' , param_dr_ar , 0 },
{ 0xfe , 0xda , "AD" , true , 'D' , param_dr_ar , 0 },
{ 0xfe , 0xdc , "SB" , true , 'D' , param_dr_ar , 0 },
{ 0xff , 0xdf , "ANM" , false , 'D' , param_dr_ar , 0 },
{ 0xfc , 0xe0 , "PO" , true , 'D' , param_dr_id_ar , 0 },
{ 0xfc , 0xe4 , "PU" , true , 'D' , param_dr_id_ar , 0 },
{ 0xfc , 0xe8 , "PO" , true , 'I' , param_dr_id_ar , 0 },
{ 0xfc , 0xec , "PU" , true , 'I' , param_dr_id_ar , 0 },
{ 0xff , 0xf0 , "JMP" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xf1 , "JNO" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xf2 , "JOD" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xf3 , "JEV" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xf4 , "JNG" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xf5 , "JPS" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xf6 , "JNZ" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xf7 , "JZR" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xf8 , "JEN" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xf9 , "JEZ" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xfa , "JNC" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xfb , "JCY" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xfc , "JLZ" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xfd , "JLN" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xfe , "JRZ" , false , '\0' , param_jmp_off , 0 },
{ 0xff , 0xff , "JRN" , false , '\0' , param_jmp_off , 0 },
const capricorn_disassembler::dis_entry_t capricorn_disassembler::dis_table[] = {
{ 0xff, 0x01, "ARP R*", false, '\0', nullptr, 0 },
{ 0xc0, 0x00, "ARP" , false, '\0', &capricorn_disassembler::param_arp_drp, 0 },
{ 0xff, 0x41, "DRP R*", false, '\0', nullptr, 0 },
{ 0xc0, 0x40, "DRP" , false, '\0', &capricorn_disassembler::param_arp_drp, 0 },
{ 0xfe, 0x80, "EL" , true , '\0', &capricorn_disassembler::param_dr, 0 },
{ 0xfe, 0x82, "ER" , true , '\0', &capricorn_disassembler::param_dr, 0 },
{ 0xfe, 0x84, "LL" , true , '\0', &capricorn_disassembler::param_dr, 0 },
{ 0xfe, 0x86, "LR" , true , '\0', &capricorn_disassembler::param_dr, 0 },
{ 0xfe, 0x88, "IC" , true , '\0', &capricorn_disassembler::param_dr, 0 },
{ 0xfe, 0x8a, "DC" , true , '\0', &capricorn_disassembler::param_dr, 0 },
{ 0xfe, 0x8c, "TC" , true , '\0', &capricorn_disassembler::param_dr, 0 },
{ 0xfe, 0x8e, "NC" , true , '\0', &capricorn_disassembler::param_dr, 0 },
{ 0xfe, 0x90, "TS" , true , '\0', &capricorn_disassembler::param_dr, 0 },
{ 0xfe, 0x92, "CL" , true , '\0', &capricorn_disassembler::param_dr, 0 },
{ 0xfe, 0x94, "OR" , true , '\0', &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0x96, "XR" , true , '\0', &capricorn_disassembler::param_dr_ar, 0 },
{ 0xff, 0x98, "BIN" , false, '\0', nullptr, 0 },
{ 0xff, 0x99, "BCD" , false, '\0', nullptr, 0 },
{ 0xff, 0x9a, "SAD" , false, '\0', nullptr, 0 },
{ 0xff, 0x9b, "DCE" , false, '\0', nullptr, 0 },
{ 0xff, 0x9c, "ICE" , false, '\0', nullptr, 0 },
{ 0xff, 0x9d, "CLE" , false, '\0', nullptr, 0 },
{ 0xff, 0x9e, "RTN" , false, '\0', nullptr, STEP_OUT },
{ 0xff, 0x9f, "PAD" , false, '\0', nullptr, 0 },
{ 0xfe, 0xa0, "LD" , true , '\0', &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xa2, "ST" , true , '\0', &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xa4, "LD" , true , 'D' , &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xa6, "ST" , true , 'D' , &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xa8, "LD" , true , '\0', &capricorn_disassembler::param_dr_lit, 0 },
{ 0xfe, 0xaa, "ST" , true , '\0', &capricorn_disassembler::param_dr_lit, 0 },
{ 0xfe, 0xac, "LD" , true , 'I' , &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xae, "ST" , true , 'I' , &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xb0, "LD" , true , 'D' , &capricorn_disassembler::param_dr_lit_dir, 0 },
{ 0xfe, 0xb2, "ST" , true , 'D' , &capricorn_disassembler::param_dr_lit_dir, 0 },
{ 0xfe, 0xb4, "LD" , true , 'D' , &capricorn_disassembler::param_dr_idx_dir, 0 },
{ 0xfe, 0xb6, "ST" , true , 'D' , &capricorn_disassembler::param_dr_idx_dir, 0 },
{ 0xfe, 0xb8, "LD" , true , 'I' , &capricorn_disassembler::param_dr_lit_dir, 0 },
{ 0xfe, 0xba, "ST" , true , 'I' , &capricorn_disassembler::param_dr_lit_dir, 0 },
{ 0xfe, 0xbc, "LD" , true , 'I' , &capricorn_disassembler::param_dr_idx_dir, 0 },
{ 0xfe, 0xbe, "ST" , true , 'I' , &capricorn_disassembler::param_dr_idx_dir, 0 },
{ 0xfe, 0xc0, "CM" , true , '\0', &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xc2, "AD" , true , '\0', &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xc4, "SB" , true , '\0', &capricorn_disassembler::param_dr_ar, 0 },
{ 0xff, 0xc6, "JSB" , false, '\0', &capricorn_disassembler::param_xr_lit, STEP_OVER },
{ 0xff, 0xc7, "ANM" , false, '\0', &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xc8, "CM" , true , '\0', &capricorn_disassembler::param_dr_lit, 0 },
{ 0xfe, 0xca, "AD" , true , '\0', &capricorn_disassembler::param_dr_lit, 0 },
{ 0xfe, 0xcc, "SB" , true , '\0', &capricorn_disassembler::param_dr_lit, 0 },
{ 0xff, 0xce, "JSB" , false, '\0', &capricorn_disassembler::param_lit_dir, STEP_OVER },
{ 0xff, 0xcf, "ANM" , false, '\0', &capricorn_disassembler::param_dr_lit, 0 },
{ 0xfe, 0xd0, "CM" , true , 'D' , &capricorn_disassembler::param_dr_lit_dir, 0 },
{ 0xfe, 0xd2, "AD" , true , 'D' , &capricorn_disassembler::param_dr_lit_dir, 0 },
{ 0xfe, 0xd4, "SB" , true , 'D' , &capricorn_disassembler::param_dr_lit_dir, 0 },
{ 0xff, 0xd7, "ANM" , false, 'D' , &capricorn_disassembler::param_dr_lit_dir, 0 },
{ 0xfe, 0xd8, "CM" , true , 'D' , &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xda, "AD" , true , 'D' , &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfe, 0xdc, "SB" , true , 'D' , &capricorn_disassembler::param_dr_ar, 0 },
{ 0xff, 0xdf, "ANM" , false, 'D' , &capricorn_disassembler::param_dr_ar, 0 },
{ 0xfc, 0xe0, "PO" , true , 'D' , &capricorn_disassembler::param_dr_id_ar, 0 },
{ 0xfc, 0xe4, "PU" , true , 'D' , &capricorn_disassembler::param_dr_id_ar, 0 },
{ 0xfc, 0xe8, "PO" , true , 'I' , &capricorn_disassembler::param_dr_id_ar, 0 },
{ 0xfc, 0xec, "PU" , true , 'I' , &capricorn_disassembler::param_dr_id_ar, 0 },
{ 0xff, 0xf0, "JMP" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xf1, "JNO" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xf2, "JOD" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xf3, "JEV" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xf4, "JNG" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xf5, "JPS" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xf6, "JNZ" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xf7, "JZR" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xf8, "JEN" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xf9, "JEZ" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xfa, "JNC" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xfb, "JCY" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xfc, "JLZ" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xfd, "JLN" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xfe, "JRZ" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
{ 0xff, 0xff, "JRN" , false, '\0', &capricorn_disassembler::param_jmp_off, 0 },
// *** END ***
{0 , 0 , nullptr , false , 0 , nullptr , 0 }
{0, 0, nullptr, false, 0, nullptr, 0 }
};
CPU_DISASSEMBLE(capricorn)
u32 capricorn_disassembler::opcode_alignment() const
{
return 1;
}
offs_t capricorn_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
const dis_entry_t *p;
uint8_t opcode = oprom[ 0 ];
uint8_t opcode = opcodes.r8(pc);
for (p = dis_table; p->m_op_mask; p++) {
if ((opcode & p->m_op_mask) == p->m_opcode) {
offs_t res = 1 | p->m_dasm_flags | DASMFLAG_SUPPORTED;
offs_t res = 1 | p->m_dasm_flags | SUPPORTED;
stream << p->m_mnemonic;
if (p->m_has_mb) {
stream << (BIT(opcode , 0) ? 'M' : 'B');
stream << (BIT(opcode, 0) ? 'M' : 'B');
}
if (p->m_addr_mode != '\0') {
stream << p->m_addr_mode;
}
if (p->m_param_fn != nullptr) {
stream << " ";
res += p->m_param_fn(stream , pc , oprom);
res += (this->*(p->m_param_fn))(stream, pc, opcodes);
}
return res;
}
@ -210,5 +203,5 @@ CPU_DISASSEMBLE(capricorn)
// Unknown opcode
stream << "???";
return 1 | DASMFLAG_SUPPORTED;
return 1 | SUPPORTED;
}

50
src/devices/cpu/capricorn/capricorn_dasm.h Normal file
View File

@ -0,0 +1,50 @@
// license:BSD-3-Clause
// copyright-holders:F. Ulivi
// ********************************************************************************
// * HP Capricorn processor disassembler
// ********************************************************************************
#ifndef MAME_CPU_CAPRICORN_CAPRICORN_DASM_H
#define MAME_CPU_CAPRICORN_CAPRICORN_DASM_H
#pragma once
class capricorn_disassembler : public util::disasm_interface
{
public:
capricorn_disassembler() = default;
virtual ~capricorn_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
typedef offs_t (capricorn_disassembler::*fn_dis_param)(std::ostream &stream, offs_t pc, const data_buffer &opcodes);
struct dis_entry_t {
uint8_t m_op_mask;
uint8_t m_opcode;
const char *m_mnemonic;
bool m_has_mb;
char m_addr_mode;
fn_dis_param m_param_fn;
uint32_t m_dasm_flags;
};
static const dis_entry_t dis_table[];
void direct_addr(std::ostream &stream, offs_t pc, const data_buffer &opcodes);
offs_t param_arp_drp(std::ostream &stream, offs_t pc, const data_buffer &opcodes);
offs_t param_dr(std::ostream &stream, offs_t pc, const data_buffer &opcodes);
offs_t param_dr_ar(std::ostream &stream, offs_t pc, const data_buffer &opcodes);
offs_t param_dr_lit(std::ostream &stream, offs_t pc, const data_buffer &opcodes);
offs_t param_dr_lit_dir(std::ostream &stream, offs_t pc,const data_buffer &opcodes);
offs_t param_dr_idx_dir(std::ostream &stream, offs_t pc,const data_buffer &opcodes);
offs_t param_xr_lit(std::ostream &stream, offs_t pc,const data_buffer &opcodes);
offs_t param_lit_dir(std::ostream &stream, offs_t pc,const data_buffer &opcodes);
offs_t param_dr_id_ar(std::ostream &stream, offs_t pc, const data_buffer &opcodes);
offs_t param_jmp_off(std::ostream &stream, offs_t pc, const data_buffer &opcodes);
};
#endif

6
src/devices/cpu/ccpu/ccpu.cpp
View File

@ -12,6 +12,7 @@
#include "emu.h"
#include "ccpu.h"
#include "ccpudasm.h"
#include "debugger.h"
@ -695,8 +696,7 @@ void ccpu_cpu_device::execute_run()
}
offs_t ccpu_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *ccpu_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE( ccpu );
return CPU_DISASSEMBLE_NAME(ccpu)(this, stream, pc, oprom, opram, options);
return new ccpu_disassembler;
}

4
src/devices/cpu/ccpu/ccpu.h
View File

@ -78,9 +78,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 3; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
address_space_config m_program_config;
address_space_config m_data_config;

18
src/devices/cpu/ccpu/ccpudasm.cpp
View File

@ -11,13 +11,17 @@
***************************************************************************/
#include "emu.h"
#include "ccpu.h"
#include "ccpudasm.h"
u32 ccpu_disassembler::opcode_alignment() const
{
return 1;
}
CPU_DISASSEMBLE(ccpu)
offs_t ccpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
unsigned startpc = pc;
uint8_t opcode = oprom[pc++ - startpc];
uint8_t opcode = opcodes.r8(pc++);
uint8_t tempval;
switch (opcode)
@ -40,7 +44,7 @@ CPU_DISASSEMBLE(ccpu)
/* A8I */
case 0x20:
util::stream_format(stream, "A8I $%X", oprom[pc++ - startpc]);
util::stream_format(stream, "A8I $%X", opcodes.r8(pc++));
break;
/* A4I */
@ -53,7 +57,7 @@ CPU_DISASSEMBLE(ccpu)
/* S8I */
case 0x30:
util::stream_format(stream, "S8I $%X", oprom[pc++ - startpc]);
util::stream_format(stream, "S8I $%X", opcodes.r8(pc++));
break;
/* S4I */
@ -69,7 +73,7 @@ CPU_DISASSEMBLE(ccpu)
case 0x44: case 0x45: case 0x46: case 0x47:
case 0x48: case 0x49: case 0x4a: case 0x4b:
case 0x4c: case 0x4d: case 0x4e: case 0x4f:
tempval = oprom[pc++ - startpc];
tempval = opcodes.r8(pc++);
util::stream_format(stream, "LPAI $%03X", (opcode & 0x0f) + (tempval & 0xf0) + ((tempval & 0x0f) << 8));
break;
@ -326,5 +330,5 @@ CPU_DISASSEMBLE(ccpu)
break;
}
return (pc - startpc) | DASMFLAG_SUPPORTED;
return (pc - startpc) | SUPPORTED;
}

28
src/devices/cpu/ccpu/ccpudasm.h Normal file
View File

@ -0,0 +1,28 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles
/***************************************************************************
ccpudasm.c
Core implementation for the portable Cinematronics CPU disassembler.
Written by Aaron Giles
Special thanks to Zonn Moore for his detailed documentation.
***************************************************************************/
#ifndef MAME_CPU_CCPU_CCPUDASM_H
#define MAME_CPU_CCPU_CCPUDASM_H
#pragma once
class ccpu_disassembler : public util::disasm_interface
{
public:
ccpu_disassembler() = default;
virtual ~ccpu_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
#endif

5
src/devices/cpu/clipper/clipper.cpp
View File

@ -19,6 +19,7 @@
#include "emu.h"
#include "debugger.h"
#include "clipper.h"
#include "clipperd.h"
#define LOG_GENERAL (1U << 0)
#define LOG_INTERRUPT (1U << 1)
@ -1652,7 +1653,7 @@ inline void clipper_device::set_fp64(const u8 reg, const float64 data)
m_ssw |= SSW_FRD;
}
offs_t clipper_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)
util::disasm_interface *clipper_device::create_disassembler()
{
return CPU_DISASSEMBLE_NAME(clipper)(this, stream, pc, oprom, opram, options);
return new clipper_disassembler;
}

6
src/devices/cpu/clipper/clipper.h
View File

@ -221,9 +221,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual u32 disasm_min_opcode_bytes() const override { return 2; } // smallest instruction
virtual u32 disasm_max_opcode_bytes() const override { return 8; } // largest instruction
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
virtual util::disasm_interface *create_disassembler() override;
void set_ssw(u32 data) { m_ssw = (m_ssw & SSW(ID)) | (data & ~SSW(ID)); }
@ -314,6 +312,4 @@ DECLARE_DEVICE_TYPE(CLIPPER_C100, clipper_c100_device)
DECLARE_DEVICE_TYPE(CLIPPER_C300, clipper_c300_device)
DECLARE_DEVICE_TYPE(CLIPPER_C400, clipper_c400_device)
extern CPU_DISASSEMBLE(clipper);
#endif // MAME_CPU_CLIPPER_CLIPPER_H

158
src/devices/cpu/clipper/clipperd.cpp
View File

@ -2,6 +2,7 @@
// copyright-holders:Patrick Mackinlay
#include "emu.h"
#include "clipperd.h"
/*
* TODO
@ -14,33 +15,20 @@
// enable C400 instruction decoding
#define C400_INSTRUCTIONS 1
// the CLIPPER addressing modes (unshifted)
enum
{
ADDR_MODE_PC32 = 0x10,
ADDR_MODE_ABS32 = 0x30,
ADDR_MODE_REL32 = 0x60,
ADDR_MODE_PC16 = 0x90,
ADDR_MODE_REL12 = 0xa0,
ADDR_MODE_ABS16 = 0xb0,
ADDR_MODE_PCX = 0xd0,
ADDR_MODE_RELX = 0xe0
};
// macros for decoding various operand fields
#define R1 ((insn[0] & 0x00f0) >> 4)
#define R2 (insn[0] & 0x000f)
#define R1 ((opcodes.r16(pc) & 0x00f0) >> 4)
#define R2 (opcodes.r16(pc) & 0x000f)
#define I16 ((int16_t)insn[1])
#define I32 (*(int32_t *)&insn[1])
#define IMM_VALUE (insn[0] & 0x0080 ? I16 : I32)
#define IMM_SIZE (insn[0] & 0x0080 ? 2 : 4)
#define I16 (int16_t(opcodes.r16(pc+2)))
#define I32 (int32_t(opcodes.r32(pc+2)))
#define IMM_VALUE (opcodes.r16(pc) & 0x0080 ? I16 : I32)
#define IMM_SIZE (opcodes.r16(pc) & 0x0080 ? 2 : 4)
#define ADDR_MODE (insn[0] & 0x00f0)
#define ADDR_R2 ((insn[0] & 0x0050) == 0x0010 ? (insn[0] & 0x000f) : (insn[1] & 0x000f))
#define ADDR_MODE (opcodes.r16(pc) & 0x00f0)
#define ADDR_R2 ((opcodes.r16(pc) & 0x0050) == 0x0010 ? (opcodes.r16(pc) & 0x000f) : (opcodes.r16(pc+2) & 0x000f))
#define ADDR_SIZE (ADDR_MODE > ADDR_MODE_REL32 ? 2 : ADDR_MODE == ADDR_MODE_REL32 ? 6 : 4)
#define ADDR_RX ((insn[1] & 0xf0) >> 4)
#define ADDR_I12 (((int16_t)insn[1]) >> 4)
#define ADDR_RX ((opcodes.r16(pc+2) & 0xf0) >> 4)
#define ADDR_I12 (((int16_t)opcodes.r16(pc+2)) >> 4)
/*
* Branch condition code mnemonics - the forms beginning with 'c' are
@ -49,7 +37,7 @@ enum
* instructions. We use the first form because we can't know which type
* should be used without some kind of dynamic information.
*/
static const char *const cc[] =
const char *const clipper_disassembler::cc[] =
{
"",
"clt", // rgt
@ -72,13 +60,13 @@ static const char *const cc[] =
/*
* Decode an addressing mode into a string.
*/
std::string address (offs_t pc, u16 *insn)
std::string clipper_disassembler::address (offs_t pc, const data_buffer &opcodes)
{
switch (ADDR_MODE)
{
case ADDR_MODE_PC32: return util::string_format("0x%x", pc + I32);
case ADDR_MODE_ABS32: return util::string_format("0x%x", I32);
case ADDR_MODE_REL32: return util::string_format("%d(r%d)", *(int32_t *)&insn[2], R2);
case ADDR_MODE_REL32: return util::string_format("%d(r%d)", opcodes.r32(pc+4), R2);
case ADDR_MODE_PC16: return util::string_format("0x%x", pc + I16);
case ADDR_MODE_REL12: return util::string_format("%d(r%d)", ADDR_I12, R2);
case ADDR_MODE_ABS16: return util::string_format("0x%x", I16);
@ -96,26 +84,30 @@ std::string address (offs_t pc, u16 *insn)
* an on-CPU macro instruction ROM. It appears at least some of these macro instructions were removed
* from the C400 and generate traps which can be used to implement them in software instead.
*/
CPU_DISASSEMBLE(clipper)
u32 clipper_disassembler::opcode_alignment() const
{
u16 *insn = (u16 *)oprom;
u32 flags = DASMFLAG_SUPPORTED;
return 2;
}
offs_t clipper_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
u32 flags = SUPPORTED;
offs_t bytes;
switch (insn[0] >> 8)
switch (opcodes.r16(pc) >> 8)
{
case 0x00:
if (oprom[0] == 0)
if (opcodes.r16(pc) == 0)
util::stream_format(stream, "noop");
else
util::stream_format(stream, "noop $%d", oprom[0]);
util::stream_format(stream, "noop $%d", opcodes.r16(pc));
bytes = 2;
break;
case 0x10: util::stream_format(stream, "movwp r%d,%s", R2, R1 == 0 ? "psw" : R1 == 1 ? "ssw" : "sswf"); bytes = 2; break;
case 0x11: util::stream_format(stream, "movpw %s,r%d", R1 == 0 ? "psw" : "ssw", R2); bytes = 2; break;
case 0x12: util::stream_format(stream, "calls $%d", insn[0] & 0x7F); bytes = 2; flags |= DASMFLAG_STEP_OVER; break;
case 0x13: util::stream_format(stream, "ret r%d", R2); bytes = 2; flags |= DASMFLAG_STEP_OUT; break;
case 0x12: util::stream_format(stream, "calls $%d", opcodes.r16(pc) & 0x7F); bytes = 2; flags |= STEP_OVER; break;
case 0x13: util::stream_format(stream, "ret r%d", R2); bytes = 2; flags |= STEP_OUT; break;
case 0x14: util::stream_format(stream, "pushw r%d,r%d", R2, R1); bytes = 2; break;
case 0x16: util::stream_format(stream, "popw r%d,r%d", R1, R2); bytes = 2; break;
@ -151,60 +143,60 @@ CPU_DISASSEMBLE(clipper)
case 0x3c: util::stream_format(stream, "roti $%d,r%d", I16, R2); bytes = 4; break;
case 0x3d: util::stream_format(stream, "rotli $%d,r%d:r%d", I16, R2 + 0, R2 + 1); bytes = 4; break;
case 0x44: util::stream_format(stream, "call r%d,(r%d)", R2, R1); bytes = 2; flags |= DASMFLAG_STEP_OVER; break;
case 0x45: util::stream_format(stream, "call r%d,%s", ADDR_R2, address(pc, insn)); bytes = 2 + ADDR_SIZE; flags |= DASMFLAG_STEP_OVER; break;
case 0x44: util::stream_format(stream, "call r%d,(r%d)", R2, R1); bytes = 2; flags |= STEP_OVER; break;
case 0x45: util::stream_format(stream, "call r%d,%s", ADDR_R2, address(pc, opcodes)); bytes = 2 + ADDR_SIZE; flags |= STEP_OVER; break;
#if C400_INSTRUCTIONS
case 0x46: util::stream_format(stream, "loadd2 (r%d),f%d", R1, R2); bytes = 2; break;
case 0x47: util::stream_format(stream, "loadd2 %s,f%d", address(pc, insn), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x47: util::stream_format(stream, "loadd2 %s,f%d", address(pc, opcodes), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
#endif
case 0x48: util::stream_format(stream, "b%-4s (r%d)", cc[R2], R1); bytes = 2; break;
case 0x49: util::stream_format(stream, "b%-4s %s", cc[ADDR_R2], address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x49: util::stream_format(stream, "b%-4s %s", cc[ADDR_R2], address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
#if C400_INSTRUCTIONS
// delayed branches
case 0x4a: util::stream_format(stream, "cdb r%d,(r%d)", R2, R1); bytes = 2; break;
case 0x4b: util::stream_format(stream, "cdb r%d,%s", ADDR_R2, address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x4b: util::stream_format(stream, "cdb r%d,%s", ADDR_R2, address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
case 0x4c: util::stream_format(stream, "cdbeq r%d,(r%d)", R2, R1); bytes = 2; break;
case 0x4d: util::stream_format(stream, "cdbeq r%d,%s", ADDR_R2, address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x4d: util::stream_format(stream, "cdbeq r%d,%s", ADDR_R2, address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
case 0x4e: util::stream_format(stream, "cdbne r%d,(r%d)", R2, R1); bytes = 2; break;
case 0x4f: util::stream_format(stream, "cdbne r%d,%s", ADDR_R2, address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x4f: util::stream_format(stream, "cdbne r%d,%s", ADDR_R2, address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
case 0x50: util::stream_format(stream, "db%-4s (r%d)", cc[R2], R1); bytes = 2; break;
case 0x51: util::stream_format(stream, "db%-4s %s", cc[ADDR_R2], address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x51: util::stream_format(stream, "db%-4s %s", cc[ADDR_R2], address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
#else
// these instructions are in the C300 documentation, but appear to be replaced in the C400
case 0x4c: util::stream_format(stream, "bf%s (r%d)", R2 == 0 ? "any" : "bad", R1); bytes = 2; break;
case 0x4d: util::stream_format(stream, "bf%s %s", ADDR_R2 == 0 ? "any" : "bad", address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x4d: util::stream_format(stream, "bf%s %s", ADDR_R2 == 0 ? "any" : "bad", address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
#endif
case 0x60: util::stream_format(stream, "loadw (r%d),r%d", R1, R2); bytes = 2; break;
case 0x61: util::stream_format(stream, "loadw %s,r%d", address(pc, insn), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x61: util::stream_format(stream, "loadw %s,r%d", address(pc, opcodes), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x62: util::stream_format(stream, "loada (r%d),r%d", R1, R2); bytes = 2; break;
case 0x63: util::stream_format(stream, "loada %s,r%d", address(pc, insn), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x63: util::stream_format(stream, "loada %s,r%d", address(pc, opcodes), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x64: util::stream_format(stream, "loads (r%d),f%d", R1, R2); bytes = 2; break;
case 0x65: util::stream_format(stream, "loads %s,f%d", address(pc, insn), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x65: util::stream_format(stream, "loads %s,f%d", address(pc, opcodes), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x66: util::stream_format(stream, "loadd (r%d),f%d", R1, R2); bytes = 2; break;
case 0x67: util::stream_format(stream, "loadd %s,f%d", address(pc, insn), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x67: util::stream_format(stream, "loadd %s,f%d", address(pc, opcodes), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x68: util::stream_format(stream, "loadb (r%d),r%d", R1, R2); bytes = 2; break;
case 0x69: util::stream_format(stream, "loadb %s,r%d", address(pc, insn), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x69: util::stream_format(stream, "loadb %s,r%d", address(pc, opcodes), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x6a: util::stream_format(stream, "loadbu (r%d),r%d", R1, R2); bytes = 2; break;
case 0x6b: util::stream_format(stream, "loadbu %s,r%d", address(pc, insn), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x6b: util::stream_format(stream, "loadbu %s,r%d", address(pc, opcodes), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x6c: util::stream_format(stream, "loadh (r%d),r%d", R1, R2); bytes = 2; break;
case 0x6d: util::stream_format(stream, "loadh %s,r%d", address(pc, insn), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x6d: util::stream_format(stream, "loadh %s,r%d", address(pc, opcodes), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x6e: util::stream_format(stream, "loadhu (r%d),r%d", R1, R2); bytes = 2; break;
case 0x6f: util::stream_format(stream, "loadhu %s,r%d", address(pc, insn), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x6f: util::stream_format(stream, "loadhu %s,r%d", address(pc, opcodes), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x70: util::stream_format(stream, "storw r%d,(r%d)", R2, R1); bytes = 2; break;
case 0x71: util::stream_format(stream, "storw r%d,%s", ADDR_R2, address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x71: util::stream_format(stream, "storw r%d,%s", ADDR_R2, address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
case 0x72: util::stream_format(stream, "tsts (r%d),r%d", R1, R2); bytes = 2; break;
case 0x73: util::stream_format(stream, "tsts %s,r%d", address(pc, insn), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x73: util::stream_format(stream, "tsts %s,r%d", address(pc, opcodes), ADDR_R2); bytes = 2 + ADDR_SIZE; break;
case 0x74: util::stream_format(stream, "stors f%d,(r%d)", R2, R1); bytes = 2; break;
case 0x75: util::stream_format(stream, "stors f%d,%s", ADDR_R2, address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x75: util::stream_format(stream, "stors f%d,%s", ADDR_R2, address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
case 0x76: util::stream_format(stream, "stord f%d,(r%d)", R2, R1); bytes = 2; break;
case 0x77: util::stream_format(stream, "stord f%d,%s", ADDR_R2, address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x77: util::stream_format(stream, "stord f%d,%s", ADDR_R2, address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
case 0x78: util::stream_format(stream, "storb r%d,(r%d)", R2, R1); bytes = 2; break;
case 0x79: util::stream_format(stream, "storb r%d,%s", ADDR_R2, address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x79: util::stream_format(stream, "storb r%d,%s", ADDR_R2, address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
case 0x7c: util::stream_format(stream, "storh r%d,(r%d)", R2, R1); bytes = 2; break;
case 0x7d: util::stream_format(stream, "storh r%d,%s", ADDR_R2, address(pc, insn)); bytes = 2 + ADDR_SIZE; break;
case 0x7d: util::stream_format(stream, "storh r%d,%s", ADDR_R2, address(pc, opcodes)); bytes = 2 + ADDR_SIZE; break;
case 0x80: util::stream_format(stream, "addw r%d,r%d", R1, R2); bytes = 2; break;
@ -258,7 +250,7 @@ CPU_DISASSEMBLE(clipper)
case 0xb4:
case 0xb5:
// unprivileged macro instructions
switch (insn[0] & 0xff)
switch (opcodes.r16(pc) & 0xff)
{
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x04: case 0x05: case 0x06: case 0x07:
@ -288,25 +280,25 @@ CPU_DISASSEMBLE(clipper)
util::stream_format(stream, "restd%d", R2);
break;
case 0x30: util::stream_format(stream, "cnvsw f%d,r%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x31: util::stream_format(stream, "cnvrsw f%d,r%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x32: util::stream_format(stream, "cnvtsw f%d,r%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x33: util::stream_format(stream, "cnvws r%d,f%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x34: util::stream_format(stream, "cnvdw f%d,r%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x35: util::stream_format(stream, "cnvrdw f%d,r%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x36: util::stream_format(stream, "cnvtdw f%d,r%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x37: util::stream_format(stream, "cnvwd r%d,f%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x38: util::stream_format(stream, "cnvsd f%d,f%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x39: util::stream_format(stream, "cnvds f%d,f%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x3a: util::stream_format(stream, "negs f%d,f%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x3b: util::stream_format(stream, "negd f%d,f%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x3c: util::stream_format(stream, "scalbs r%d,f%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x3d: util::stream_format(stream, "scalbd r%d,f%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x30: util::stream_format(stream, "cnvsw f%d,r%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x31: util::stream_format(stream, "cnvrsw f%d,r%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x32: util::stream_format(stream, "cnvtsw f%d,r%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x33: util::stream_format(stream, "cnvws r%d,f%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x34: util::stream_format(stream, "cnvdw f%d,r%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x35: util::stream_format(stream, "cnvrdw f%d,r%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x36: util::stream_format(stream, "cnvtdw f%d,r%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x37: util::stream_format(stream, "cnvwd r%d,f%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x38: util::stream_format(stream, "cnvsd f%d,f%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x39: util::stream_format(stream, "cnvds f%d,f%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x3a: util::stream_format(stream, "negs f%d,f%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x3b: util::stream_format(stream, "negd f%d,f%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x3c: util::stream_format(stream, "scalbs r%d,f%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x3d: util::stream_format(stream, "scalbd r%d,f%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x3e: util::stream_format(stream, "trapfn"); break;
case 0x3f: util::stream_format(stream, "loadfs r%d,f%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x3f: util::stream_format(stream, "loadfs r%d,f%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
default:
util::stream_format(stream, "macro 0x%04x 0x%04x", insn[0], insn[1]);
util::stream_format(stream, "macro 0x%04x 0x%04x", opcodes.r16(pc), opcodes.r16(pc+2));
break;
}
bytes = 4;
@ -314,19 +306,19 @@ CPU_DISASSEMBLE(clipper)
case 0xb6:
case 0xb7:
// privileged macro instructions
switch (insn[0] & 0xff)
switch (opcodes.r16(pc) & 0xff)
{
case 0x00: util::stream_format(stream, "movus r%d,r%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x01: util::stream_format(stream, "movsu r%d,r%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x02: util::stream_format(stream, "saveur r%d", (insn[1] & 0xf0) >> 4); break;
case 0x03: util::stream_format(stream, "restur r%d", (insn[1] & 0xf0) >> 4); break;
case 0x04: util::stream_format(stream, "reti r%d", (insn[1] & 0xf0) >> 4); flags |= DASMFLAG_STEP_OUT; break;
case 0x00: util::stream_format(stream, "movus r%d,r%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x01: util::stream_format(stream, "movsu r%d,r%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
case 0x02: util::stream_format(stream, "saveur r%d", (opcodes.r16(pc+2) & 0xf0) >> 4); break;
case 0x03: util::stream_format(stream, "restur r%d", (opcodes.r16(pc+2) & 0xf0) >> 4); break;
case 0x04: util::stream_format(stream, "reti r%d", (opcodes.r16(pc+2) & 0xf0) >> 4); flags |= STEP_OUT; break;
case 0x05: util::stream_format(stream, "wait"); break;
#if C400_INSTRUCTIONS
case 0x07: util::stream_format(stream, "loadts r%d,f%d", (insn[1] & 0xf0) >> 4, insn[1] & 0xf); break;
case 0x07: util::stream_format(stream, "loadts r%d,f%d", (opcodes.r16(pc+2) & 0xf0) >> 4, opcodes.r16(pc+2) & 0xf); break;
#endif
default:
util::stream_format(stream, "macro 0x%04x 0x%04x", insn[0], insn[1]);
util::stream_format(stream, "macro 0x%04x 0x%04x", opcodes.r16(pc), opcodes.r16(pc+2));
break;
}
bytes = 4;
@ -338,7 +330,7 @@ CPU_DISASSEMBLE(clipper)
#endif
default:
util::stream_format(stream, ".word 0x%04x", insn[0]);
util::stream_format(stream, ".word 0x%04x", opcodes.r16(pc));
bytes = 2;
break;
}

38
src/devices/cpu/clipper/clipperd.h Normal file
View File

@ -0,0 +1,38 @@
// license:BSD-3-Clause
// copyright-holders:Patrick Mackinlay
#ifndef MAME_CPU_CLIPPER_CLIPPERDASM_H
#define MAME_CPU_CLIPPER_CLIPPERDASM_H
#pragma once
class clipper_disassembler : public util::disasm_interface
{
public:
clipper_disassembler() = default;
virtual ~clipper_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
// the CLIPPER addressing modes (unshifted)
enum
{
ADDR_MODE_PC32 = 0x10,
ADDR_MODE_ABS32 = 0x30,
ADDR_MODE_REL32 = 0x60,
ADDR_MODE_PC16 = 0x90,
ADDR_MODE_REL12 = 0xa0,
ADDR_MODE_ABS16 = 0xb0,
ADDR_MODE_PCX = 0xd0,
ADDR_MODE_RELX = 0xe0
};
static const char *const cc[];
std::string address (offs_t pc, const data_buffer &opcodes);
};
#endif

19
src/devices/cpu/cop400/cop400.cpp
View File

@ -56,6 +56,10 @@
#include "emu.h"
#include "debugger.h"
#include "cop400.h"
#include "cop410ds.h"
#include "cop420ds.h"
#include "cop424ds.h"
#include "cop444ds.h"
DEFINE_DEVICE_TYPE(COP401, cop401_cpu_device, "cop401", "COP401")
@ -1362,29 +1366,24 @@ void cop400_cpu_device::state_string_export(const device_state_entry &entry, std
}
offs_t cop400_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *cop400_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE( cop410 );
extern CPU_DISASSEMBLE( cop420 );
extern CPU_DISASSEMBLE( cop444 );
extern CPU_DISASSEMBLE( cop424 );
if ( m_featuremask & COP424C_FEATURE )
{
return CPU_DISASSEMBLE_NAME(cop424)(this, stream, pc, oprom, opram, options);
return new cop424_disassembler;
}
if ( m_featuremask & COP444L_FEATURE )
{
return CPU_DISASSEMBLE_NAME(cop444)(this, stream, pc, oprom, opram, options);
return new cop444_disassembler;
}
if ( m_featuremask & COP420_FEATURE )
{
return CPU_DISASSEMBLE_NAME(cop420)(this, stream, pc, oprom, opram, options);
return new cop420_disassembler;
}
return CPU_DISASSEMBLE_NAME(cop410)(this, stream, pc, oprom, opram, options);
return new cop410_disassembler;
}
READ8_MEMBER( cop400_cpu_device::microbus_rd )

4
src/devices/cpu/cop400/cop400.h
View File

@ -165,9 +165,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 1; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 2; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
address_space_config m_program_config;
address_space_config m_data_config;

22
src/devices/cpu/cop400/cop410ds.cpp
View File

@ -9,11 +9,17 @@
***************************************************************************/
#include "emu.h"
#include "cop410ds.h"
CPU_DISASSEMBLE(cop410)
u32 cop410_disassembler::opcode_alignment() const
{
uint8_t opcode = oprom[0];
uint8_t next_opcode = oprom[1];
return 1;
}
offs_t cop410_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint8_t opcode = opcodes.r8(pc);
uint8_t next_opcode = opcodes.r8(pc+1);
uint16_t address;
uint32_t flags = 0;
int bytes = 1;
@ -38,7 +44,7 @@ CPU_DISASSEMBLE(cop410)
{
address = (uint16_t)(0x80 | (opcode & 0x3F));
util::stream_format(stream, "JSRP %03X", address);
flags = DASMFLAG_STEP_OVER;
flags = STEP_OVER;
}
}
}
@ -72,7 +78,7 @@ CPU_DISASSEMBLE(cop410)
{
address = ((opcode & 0x01) << 8) | next_opcode;
util::stream_format(stream, "JSR %03X", address);
flags = DASMFLAG_STEP_OVER;
flags = STEP_OVER;
bytes = 2;
}
else if (opcode >= 0x70 && opcode <= 0x7F)
@ -302,12 +308,12 @@ CPU_DISASSEMBLE(cop410)
case 0x48:
util::stream_format(stream, "RET");
flags = DASMFLAG_STEP_OUT;
flags = STEP_OUT;
break;
case 0x49:
util::stream_format(stream, "RETSK");
flags = DASMFLAG_STEP_OUT;
flags = STEP_OUT;
break;
case 0x4B:
@ -348,5 +354,5 @@ CPU_DISASSEMBLE(cop410)
}
}
return bytes | flags | DASMFLAG_SUPPORTED;
return bytes | flags | SUPPORTED;
}

26
src/devices/cpu/cop400/cop410ds.h Normal file
View File

@ -0,0 +1,26 @@
// license:BSD-3-Clause
// copyright-holders:Curt Coder
/***************************************************************************
cop410ds.c
National Semiconductor COP410 Emulator.
***************************************************************************/
#ifndef MAME_CPU_COP410_COP410DS_H
#define MAME_CPU_COP410_COP410DS_H
#pragma once
class cop410_disassembler : public util::disasm_interface
{
public:
cop410_disassembler() = default;
virtual ~cop410_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
#endif

22
src/devices/cpu/cop400/cop420ds.cpp
View File

@ -9,11 +9,17 @@
***************************************************************************/
#include "emu.h"
#include "cop420ds.h"
CPU_DISASSEMBLE(cop420)
u32 cop420_disassembler::opcode_alignment() const
{
uint8_t opcode = oprom[0];
uint8_t next_opcode = oprom[1];
return 1;
}
offs_t cop420_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint8_t opcode = opcodes.r8(pc);
uint8_t next_opcode = opcodes.r8(pc+1);
uint16_t address;
uint32_t flags = 0;
int bytes = 1;
@ -38,7 +44,7 @@ CPU_DISASSEMBLE(cop420)
{
address = (uint16_t)(0x80 | (opcode & 0x3F));
util::stream_format(stream, "JSRP %03X", address);
flags = DASMFLAG_STEP_OVER;
flags = STEP_OVER;
}
}
}
@ -72,7 +78,7 @@ CPU_DISASSEMBLE(cop420)
{
address = ((opcode & 0x03) << 8) | next_opcode;
util::stream_format(stream, "JSR %03X", address);
flags = DASMFLAG_STEP_OVER;
flags = STEP_OVER;
bytes = 2;
}
else if (opcode >= 0x70 && opcode <= 0x7F)
@ -346,12 +352,12 @@ CPU_DISASSEMBLE(cop420)
case 0x48:
util::stream_format(stream, "RET");
flags = DASMFLAG_STEP_OUT;
flags = STEP_OUT;
break;
case 0x49:
util::stream_format(stream, "RETSK");
flags = DASMFLAG_STEP_OUT;
flags = STEP_OUT;
break;
case 0x4A:
@ -396,5 +402,5 @@ CPU_DISASSEMBLE(cop420)
}
}
return bytes | flags | DASMFLAG_SUPPORTED;
return bytes | flags | SUPPORTED;
}

26
src/devices/cpu/cop400/cop420ds.h Normal file
View File

@ -0,0 +1,26 @@
// license:BSD-3-Clause
// copyright-holders:Curt Coder
/***************************************************************************
cop420ds.c
National Semiconductor COP420 Emulator.
***************************************************************************/
#ifndef MAME_CPU_COP420_COP420DS_H
#define MAME_CPU_COP420_COP420DS_H
#pragma once
class cop420_disassembler : public util::disasm_interface
{
public:
cop420_disassembler() = default;
virtual ~cop420_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
#endif

22
src/devices/cpu/cop400/cop424ds.cpp
View File

@ -9,11 +9,17 @@
***************************************************************************/
#include "emu.h"
#include "cop424ds.h"
CPU_DISASSEMBLE(cop424)
u32 cop424_disassembler::opcode_alignment() const
{
uint8_t opcode = oprom[0];
uint8_t next_opcode = oprom[1];
return 1;
}
offs_t cop424_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint8_t opcode = opcodes.r8(pc);
uint8_t next_opcode = opcodes.r8(pc+1);
uint16_t address;
uint32_t flags = 0;
int bytes = 1;
@ -38,7 +44,7 @@ CPU_DISASSEMBLE(cop424)
{
address = (uint16_t)(0x80 | (opcode & 0x3F));
util::stream_format(stream, "JSRP %03X", address);
flags = DASMFLAG_STEP_OVER;
flags = STEP_OVER;
}
}
}
@ -72,7 +78,7 @@ CPU_DISASSEMBLE(cop424)
{
address = ((opcode & 0x07) << 8) | next_opcode;
util::stream_format(stream, "JSR %03X", address);
flags = DASMFLAG_STEP_OVER;
flags = STEP_OVER;
bytes = 2;
}
else if (opcode >= 0x70 && opcode <= 0x7F)
@ -347,12 +353,12 @@ CPU_DISASSEMBLE(cop424)
case 0x48:
util::stream_format(stream, "RET");
flags = DASMFLAG_STEP_OUT;
flags = STEP_OUT;
break;
case 0x49:
util::stream_format(stream, "RETSK");
flags = DASMFLAG_STEP_OUT;
flags = STEP_OUT;
break;
case 0x4A:
@ -397,5 +403,5 @@ CPU_DISASSEMBLE(cop424)
}
}
return bytes | flags | DASMFLAG_SUPPORTED;
return bytes | flags | SUPPORTED;
}

26
src/devices/cpu/cop400/cop424ds.h Normal file
View File

@ -0,0 +1,26 @@
// license:BSD-3-Clause
// copyright-holders:Curt Coder
/***************************************************************************
cop424ds.c
National Semiconductor COP424 Emulator.
***************************************************************************/
#ifndef MAME_CPU_COP424_COP424DS_H
#define MAME_CPU_COP424_COP424DS_H
#pragma once
class cop424_disassembler : public util::disasm_interface
{
public:
cop424_disassembler() = default;
virtual ~cop424_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
#endif

22
src/devices/cpu/cop400/cop444ds.cpp
View File

@ -9,11 +9,17 @@
***************************************************************************/
#include "emu.h"
#include "cop444ds.h"
CPU_DISASSEMBLE(cop444)
u32 cop444_disassembler::opcode_alignment() const
{
uint8_t opcode = oprom[0];
uint8_t next_opcode = oprom[1];
return 1;
}
offs_t cop444_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint8_t opcode = opcodes.r8(pc);
uint8_t next_opcode = opcodes.r8(pc+1);
uint16_t address;
uint32_t flags = 0;
int bytes = 1;
@ -38,7 +44,7 @@ CPU_DISASSEMBLE(cop444)
{
address = (uint16_t)(0x80 | (opcode & 0x3F));
util::stream_format(stream, "JSRP %03X", address);
flags = DASMFLAG_STEP_OVER;
flags = STEP_OVER;
}
}
}
@ -72,7 +78,7 @@ CPU_DISASSEMBLE(cop444)
{
address = ((opcode & 0x07) << 8) | next_opcode;
util::stream_format(stream, "JSR %03X", address);
flags = DASMFLAG_STEP_OVER;
flags = STEP_OVER;
bytes = 2;
}
else if (opcode >= 0x70 && opcode <= 0x7F)
@ -330,12 +336,12 @@ CPU_DISASSEMBLE(cop444)
case 0x48:
util::stream_format(stream, "RET");
flags = DASMFLAG_STEP_OUT;
flags = STEP_OUT;
break;
case 0x49:
util::stream_format(stream, "RETSK");
flags = DASMFLAG_STEP_OUT;
flags = STEP_OUT;
break;
case 0x4A:
@ -380,5 +386,5 @@ CPU_DISASSEMBLE(cop444)
}
}
return bytes | flags | DASMFLAG_SUPPORTED;
return bytes | flags | SUPPORTED;
}

26
src/devices/cpu/cop400/cop444ds.h Normal file
View File

@ -0,0 +1,26 @@
// license:BSD-3-Clause
// copyright-holders:Curt Coder
/***************************************************************************
cop444ds.c
National Semiconductor COP444 Emulator.
***************************************************************************/
#ifndef MAME_CPU_COP444_COP444DS_H
#define MAME_CPU_COP444_COP444DS_H
#pragma once
class cop444_disassembler : public util::disasm_interface
{
public:
cop444_disassembler() = default;
virtual ~cop444_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
#endif

124
src/devices/cpu/cosmac/cosdasm.cpp
View File

@ -10,56 +10,62 @@
***************************************************************************/
#include "emu.h"
enum
{
TYPE_1801,
TYPE_1802
};
#include "cosdasm.h"
#define CDP1801_OPCODE(...) \
util::stream_format(stream, __VA_ARGS__)
#define CDP1802_OPCODE(...) \
if (variant < TYPE_1802) stream << "illegal"; else util::stream_format(stream, __VA_ARGS__)
if (m_variant < TYPE_1802) stream << "illegal"; else util::stream_format(stream, __VA_ARGS__)
static offs_t implied(const uint8_t opcode)
offs_t cosmac_disassembler::implied(const uint8_t opcode)
{
return opcode & 0x0f;
}
static offs_t immediate(const uint8_t **opram)
offs_t cosmac_disassembler::immediate(offs_t &pc, const data_buffer &params)
{
return *(*opram)++;
return params.r8(pc++);
}
static offs_t short_branch(offs_t pc, const uint8_t **opram)
offs_t cosmac_disassembler::short_branch(offs_t base_pc, offs_t &pc, const data_buffer &params)
{
return (pc & 0xff00) | immediate(opram);
return (base_pc & 0xff00) | immediate(pc, params);
}
static offs_t long_branch(const uint8_t **opram)
offs_t cosmac_disassembler::long_branch(offs_t &pc, const data_buffer &params)
{
return (immediate(opram) << 8) | immediate(opram);
u16 res = params.r16(pc);
pc += 2;
return res;
}
static offs_t short_skip(offs_t pc)
offs_t cosmac_disassembler::short_skip(offs_t pc)
{
return pc + 2;
}
static offs_t long_skip(offs_t pc)
offs_t cosmac_disassembler::long_skip(offs_t pc)
{
return pc + 3;
}
static uint32_t disassemble(device_t *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t variant)
u32 cosmac_disassembler::opcode_alignment() const
{
const uint8_t *startram = opram;
return 1;
}
cosmac_disassembler::cosmac_disassembler(int variant) : m_variant(variant)
{
}
offs_t cosmac_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
offs_t base_pc = pc;
uint32_t flags = 0;
opram++;
uint8_t opcode = *oprom++;
uint8_t opcode = opcodes.r8(pc++);
switch (opcode)
{
@ -73,20 +79,20 @@ static uint32_t disassemble(device_t *device, std::ostream &stream, offs_t pc, c
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
CDP1801_OPCODE("DEC R%01X", implied(opcode)); break;
case 0x30: CDP1801_OPCODE("BR %04X", short_branch(pc, &opram)); break;
case 0x32: CDP1801_OPCODE("BZ %04X", short_branch(pc, &opram)); break;
case 0x33: CDP1801_OPCODE("BDF %04X", short_branch(pc, &opram)); break;
case 0x34: CDP1801_OPCODE("B1 %04X", short_branch(pc, &opram)); break;
case 0x35: CDP1801_OPCODE("B2 %04X", short_branch(pc, &opram)); break;
case 0x36: CDP1801_OPCODE("B3 %04X", short_branch(pc, &opram)); break;
case 0x37: CDP1801_OPCODE("B4 %04X", short_branch(pc, &opram)); break;
case 0x30: CDP1801_OPCODE("BR %04X", short_branch(base_pc, pc, params)); break;
case 0x32: CDP1801_OPCODE("BZ %04X", short_branch(base_pc, pc, params)); break;
case 0x33: CDP1801_OPCODE("BDF %04X", short_branch(base_pc, pc, params)); break;
case 0x34: CDP1801_OPCODE("B1 %04X", short_branch(base_pc, pc, params)); break;
case 0x35: CDP1801_OPCODE("B2 %04X", short_branch(base_pc, pc, params)); break;
case 0x36: CDP1801_OPCODE("B3 %04X", short_branch(base_pc, pc, params)); break;
case 0x37: CDP1801_OPCODE("B4 %04X", short_branch(base_pc, pc, params)); break;
case 0x38: CDP1801_OPCODE("SKP %04X", short_skip(pc)); break;
case 0x3a: CDP1801_OPCODE("BNZ %04X", short_branch(pc, &opram)); break;
case 0x3b: CDP1801_OPCODE("BNF %04X", short_branch(pc, &opram)); break;
case 0x3c: CDP1801_OPCODE("BN1 %04X", short_branch(pc, &opram)); break;
case 0x3d: CDP1801_OPCODE("BN2 %04X", short_branch(pc, &opram)); break;
case 0x3e: CDP1801_OPCODE("BN3 %04X", short_branch(pc, &opram)); break;
case 0x3f: CDP1801_OPCODE("BN4 %04X", short_branch(pc, &opram)); break;
case 0x3a: CDP1801_OPCODE("BNZ %04X", short_branch(base_pc, pc, params)); break;
case 0x3b: CDP1801_OPCODE("BNF %04X", short_branch(base_pc, pc, params)); break;
case 0x3c: CDP1801_OPCODE("BN1 %04X", short_branch(base_pc, pc, params)); break;
case 0x3d: CDP1801_OPCODE("BN2 %04X", short_branch(base_pc, pc, params)); break;
case 0x3e: CDP1801_OPCODE("BN3 %04X", short_branch(base_pc, pc, params)); break;
case 0x3f: CDP1801_OPCODE("BN4 %04X", short_branch(base_pc, pc, params)); break;
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
CDP1801_OPCODE("LDA R%01X", implied(opcode)); break;
@ -107,8 +113,8 @@ static uint32_t disassemble(device_t *device, std::ostream &stream, offs_t pc, c
case 0x6d: CDP1801_OPCODE("INP 5"); break;
case 0x6e: CDP1801_OPCODE("INP 6"); break;
case 0x6f: CDP1801_OPCODE("INP 7"); break;
case 0x70: CDP1801_OPCODE("RET"); flags = DASMFLAG_STEP_OUT; break;
case 0x71: CDP1801_OPCODE("DIS"); flags = DASMFLAG_STEP_OUT; break;
case 0x70: CDP1801_OPCODE("RET"); flags = STEP_OUT; break;
case 0x71: CDP1801_OPCODE("DIS"); flags = STEP_OUT; break;
case 0x78: CDP1801_OPCODE("SAV"); break;
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
@ -124,7 +130,7 @@ static uint32_t disassemble(device_t *device, std::ostream &stream, offs_t pc, c
CDP1801_OPCODE("PHI R%01X", implied(opcode)); break;
case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
CDP1801_OPCODE("SEP R%01X", implied(opcode)); flags = DASMFLAG_STEP_OVER; break;
CDP1801_OPCODE("SEP R%01X", implied(opcode)); flags = STEP_OVER; break;
case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7:
case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef:
CDP1801_OPCODE("SEX R%01X", implied(opcode)); break;
@ -136,16 +142,16 @@ static uint32_t disassemble(device_t *device, std::ostream &stream, offs_t pc, c
case 0xf5: CDP1801_OPCODE("SD"); break;
case 0xf6: CDP1801_OPCODE("SHR"); break;
case 0xf7: CDP1801_OPCODE("SM"); break;
case 0xf8: CDP1801_OPCODE("LDI #%02X", immediate(&opram)); break;
case 0xf9: CDP1801_OPCODE("ORI #%02X", immediate(&opram)); break;
case 0xfa: CDP1801_OPCODE("ANI #%02X", immediate(&opram)); break;
case 0xfb: CDP1801_OPCODE("XRI #%02X", immediate(&opram)); break;
case 0xfc: CDP1801_OPCODE("ADI #%02X", immediate(&opram)); break;
case 0xfd: CDP1801_OPCODE("SDI #%02X", immediate(&opram)); break;
case 0xff: CDP1801_OPCODE("SMI #%02X", immediate(&opram)); break;
case 0xf8: CDP1801_OPCODE("LDI #%02X", immediate(pc, params)); break;
case 0xf9: CDP1801_OPCODE("ORI #%02X", immediate(pc, params)); break;
case 0xfa: CDP1801_OPCODE("ANI #%02X", immediate(pc, params)); break;
case 0xfb: CDP1801_OPCODE("XRI #%02X", immediate(pc, params)); break;
case 0xfc: CDP1801_OPCODE("ADI #%02X", immediate(pc, params)); break;
case 0xfd: CDP1801_OPCODE("SDI #%02X", immediate(pc, params)); break;
case 0xff: CDP1801_OPCODE("SMI #%02X", immediate(pc, params)); break;
// CDP1802
case 0x31: CDP1802_OPCODE("BQ %04X", short_branch(pc, &opram)); break;
case 0x39: CDP1802_OPCODE("BNQ %04X", short_branch(pc, &opram)); break;
case 0x31: CDP1802_OPCODE("BQ %04X", short_branch(base_pc, pc, params)); break;
case 0x39: CDP1802_OPCODE("BNQ %04X", short_branch(base_pc, pc, params)); break;
case 0x60: CDP1802_OPCODE("IRX"); break;
case 0x72: CDP1802_OPCODE("LDXA"); break;
case 0x73: CDP1802_OPCODE("STXD"); break;
@ -156,14 +162,14 @@ static uint32_t disassemble(device_t *device, std::ostream &stream, offs_t pc, c
case 0x79: CDP1802_OPCODE("MARK"); break;
case 0x7a: CDP1802_OPCODE("REQ"); break;
case 0x7b: CDP1802_OPCODE("SEQ"); break;
case 0x7c: CDP1802_OPCODE("ADCI #%02X", immediate(&opram)); break;
case 0x7d: CDP1802_OPCODE("SDBI #%02X", immediate(&opram)); break;
case 0x7c: CDP1802_OPCODE("ADCI #%02X", immediate(pc, params)); break;
case 0x7d: CDP1802_OPCODE("SDBI #%02X", immediate(pc, params)); break;
case 0x7e: CDP1802_OPCODE("SHLC"); break;
case 0x7f: CDP1802_OPCODE("SMBI #%02X", immediate(&opram)); break;
case 0xc0: CDP1802_OPCODE("LBR %04X", long_branch(&opram)); break;
case 0xc1: CDP1802_OPCODE("LBQ %04X", long_branch(&opram)); break;
case 0xc2: CDP1802_OPCODE("LBZ %04X", long_branch(&opram)); break;
case 0xc3: CDP1802_OPCODE("LBDF %04X", long_branch(&opram)); break;
case 0x7f: CDP1802_OPCODE("SMBI #%02X", immediate(pc, params)); break;
case 0xc0: CDP1802_OPCODE("LBR %04X", long_branch(pc, params)); break;
case 0xc1: CDP1802_OPCODE("LBQ %04X", long_branch(pc, params)); break;
case 0xc2: CDP1802_OPCODE("LBZ %04X", long_branch(pc, params)); break;
case 0xc3: CDP1802_OPCODE("LBDF %04X", long_branch(pc, params)); break;
case 0xc4: CDP1802_OPCODE("NOP"); break;
case 0xc5: CDP1802_OPCODE("LSNQ %04X", long_skip(pc)); break;
case 0xc6: CDP1802_OPCODE("LSNZ %04X", long_skip(pc)); break;
@ -181,17 +187,5 @@ static uint32_t disassemble(device_t *device, std::ostream &stream, offs_t pc, c
default: CDP1801_OPCODE("illegal"); break;
}
return (opram - startram) | flags | DASMFLAG_SUPPORTED;
}
CPU_DISASSEMBLE( cdp1801 )
{
return disassemble(device, stream, pc, oprom, opram, TYPE_1801);
}
CPU_DISASSEMBLE( cdp1802 )
{
return disassemble(device, stream, pc, oprom, opram, TYPE_1802);
return (pc - base_pc) | flags | SUPPORTED;
}

43
src/devices/cpu/cosmac/cosdasm.h Normal file
View File

@ -0,0 +1,43 @@
// license:BSD-3-Clause
// copyright-holders:Curt Coder
/***************************************************************************
cosdasm.c
Simple RCA COSMAC disassembler.
Written by Curt Coder
***************************************************************************/
#ifndef MAME_CPU_COSMAC_COSDASM_H
#define MAME_CPU_COSMAC_COSDASM_H
#pragma once
class cosmac_disassembler : public util::disasm_interface
{
public:
enum
{
TYPE_1801,
TYPE_1802
};
cosmac_disassembler(int variant);
virtual ~cosmac_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
int m_variant;
offs_t implied(const uint8_t opcode);
offs_t immediate(offs_t &pc, const data_buffer &params);
offs_t short_branch(offs_t base_pc, offs_t &pc, const data_buffer &params);
offs_t long_branch(offs_t &pc, const data_buffer &params);
offs_t short_skip(offs_t pc);
offs_t long_skip(offs_t pc);
};
#endif

39
src/devices/cpu/cosmac/cosmac.cpp
View File

@ -9,6 +9,7 @@
#include "emu.h"
#include "debugger.h"
#include "cosmac.h"
#include "cosdasm.h"
#include "coreutil.h"
// permit our enums to be saved
@ -479,44 +480,20 @@ void cosmac_device::state_string_export(const device_state_entry &entry, std::st
//-------------------------------------------------
// disasm_min_opcode_bytes - return the length
// of the shortest instruction, in bytes
//-------------------------------------------------
uint32_t cosmac_device::disasm_min_opcode_bytes() const
{
return 1;
}
//-------------------------------------------------
// disasm_max_opcode_bytes - return the length
// of the longest instruction, in bytes
//-------------------------------------------------
uint32_t cosmac_device::disasm_max_opcode_bytes() const
{
return 3;
}
//-------------------------------------------------
// disasm_disassemble - call the disassembly
// disassemble - call the disassembly
// helper function
//-------------------------------------------------
offs_t cdp1801_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *cdp1801_device::create_disassembler()
{
extern CPU_DISASSEMBLE( cdp1801 );
return CPU_DISASSEMBLE_NAME( cdp1801 )(this, stream, pc, oprom, opram, options);
return new cosmac_disassembler(cosmac_disassembler::TYPE_1801);
}
offs_t cdp1802_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( cdp1802 );
return CPU_DISASSEMBLE_NAME( cdp1802 )(this, stream, pc, oprom, opram, options);
}
util::disasm_interface *cdp1802_device::create_disassembler()
{
return new cosmac_disassembler(cosmac_disassembler::TYPE_1802);
}
//**************************************************************************
// INLINE HELPERS

8
src/devices/cpu/cosmac/cosmac.h
View File

@ -240,10 +240,6 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override;
virtual uint32_t disasm_max_opcode_bytes() const override;
// helpers
inline uint8_t read_opcode(offs_t pc);
inline uint8_t read_byte(offs_t address);
@ -459,7 +455,7 @@ public:
protected:
// device_disasm_interface overrides
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) override;
@ -477,7 +473,7 @@ public:
protected:
// device_disasm_interface overrides
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
virtual cosmac_device::ophandler get_ophandler(uint8_t opcode) override;

12
src/devices/cpu/cp1610/1610dasm.cpp
View File

@ -1,12 +1,16 @@
// license:BSD-3-Clause
// copyright-holders:Frank Palazzolo
#include "emu.h"
#include "debugger.h"
#include "cp1610.h"
#include "1610dasm.h"
CPU_DISASSEMBLE(cp1610)
u32 cp1610_disassembler::opcode_alignment() const
{
uint16_t oprom16[4]={ static_cast<uint16_t>((oprom[0] << 8) | oprom[1]), static_cast<uint16_t>((oprom[2] << 8) | oprom[3]), static_cast<uint16_t>((oprom[4] << 8) | oprom[5]), static_cast<uint16_t>((oprom[6] << 8) | oprom[7]) };
return 1;
}
offs_t cp1610_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint16_t oprom16[4]={ opcodes.r16(pc), opcodes.r16(pc+1), opcodes.r16(pc+2), opcodes.r16(pc+3) };
uint16_t op = oprom16[0]; uint16_t subop;
uint16_t ea, ea1, ea2;
unsigned size = 1;

19
src/devices/cpu/cp1610/1610dasm.h Normal file
View File

@ -0,0 +1,19 @@
// license:BSD-3-Clause
// copyright-holders:Frank Palazzolo
#ifndef MAME_CPU_CP1610_CP1610DASM_H
#define MAME_CPU_CP1610_CP1610DASM_H
#pragma once
class cp1610_disassembler : public util::disasm_interface
{
public:
cp1610_disassembler() = default;
virtual ~cp1610_disassembler() = default;
virtual u32 opcode_alignment() const override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
#endif

8
src/devices/cpu/cp1610/cp1610.cpp
View File

@ -16,7 +16,7 @@
#include "emu.h"
#include "cp1610.h"
#include "debugger.h"
#include "1610dasm.h"
DEFINE_DEVICE_TYPE(CP1610, cp1610_cpu_device, "cp1610", "GI CP1610")
@ -3422,9 +3422,7 @@ void cp1610_cpu_device::state_string_export(const device_state_entry &entry, std
}
}
offs_t cp1610_cpu_device::disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
util::disasm_interface *cp1610_cpu_device::create_disassembler()
{
extern CPU_DISASSEMBLE( cp1610 );
return CPU_DISASSEMBLE_NAME(cp1610)(this, stream, pc, oprom, opram, options);
return new cp1610_disassembler;
}

7
src/devices/cpu/cp1610/cp1610.h
View File

@ -60,9 +60,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
virtual uint32_t disasm_min_opcode_bytes() const override { return 2; }
virtual uint32_t disasm_max_opcode_bytes() const override { return 8; }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual util::disasm_interface *create_disassembler() override;
private:
address_space_config m_program_config;
@ -211,7 +209,4 @@ private:
DECLARE_DEVICE_TYPE(CP1610, cp1610_cpu_device)
CPU_DISASSEMBLE( cp1610 );
#endif // MAME_CPU_CP1610_CP1610_H

30
src/devices/cpu/cubeqcpu/cubedasm.cpp
View File

@ -9,7 +9,7 @@
***************************************************************************/
#include "emu.h"
#include "cubeqcpu.h"
#include "cubedasm.h"
/***************************************************************************
@ -17,7 +17,7 @@
***************************************************************************/
/* Am2901 Instruction Fields */
static const char *const ins[] =
const char *const cubeq_disassembler::ins[] =
{
"ADD ",
"SUBR ",
@ -29,7 +29,7 @@ static const char *const ins[] =
"EXNOR",
};
static const char *const src[] =
const char *const cubeq_disassembler::src[] =
{
"A,Q",
"A,B",
@ -41,7 +41,7 @@ static const char *const src[] =
"D,0",
};
static const char *const dst[] =
const char *const cubeq_disassembler::dst[] =
{
"QREG ",
"NOP ",
@ -53,12 +53,16 @@ static const char *const dst[] =
"RAMU ",
};
u32 cubeq_disassembler::opcode_alignment() const
{
return 1;
}
/***************************************************************************
SOUND DISASSEMBLY HOOK
***************************************************************************/
CPU_DISASSEMBLE(cquestsnd)
offs_t cquestsnd_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
static const char *const jmps[] =
{
@ -81,7 +85,7 @@ CPU_DISASSEMBLE(cquestsnd)
" ",
};
uint64_t inst = big_endianize_int64(*(uint64_t *)oprom);
uint64_t inst = opcodes.r64(pc);
uint32_t inslow = inst & 0xffffffff;
uint32_t inshig = inst >> 32;
@ -121,7 +125,7 @@ CPU_DISASSEMBLE(cquestsnd)
_ipwrt ? ' ' : 'W',
inca ? 'I' : ' ');
return 1 | DASMFLAG_SUPPORTED;
return 1 | SUPPORTED;
}
@ -129,7 +133,7 @@ CPU_DISASSEMBLE(cquestsnd)
ROTATE DISASSEMBLY HOOK
***************************************************************************/
CPU_DISASSEMBLE(cquestrot)
offs_t cquestrot_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
static const char *const jmps[] =
{
@ -185,7 +189,7 @@ CPU_DISASSEMBLE(cquestrot)
"??? "
};
uint64_t inst = big_endianize_int64(*(uint64_t *)oprom);
uint64_t inst = opcodes.r64(pc);
uint32_t inslow = inst & 0xffffffff;
uint32_t inshig = inst >> 32;
@ -217,7 +221,7 @@ CPU_DISASSEMBLE(cquestrot)
spfs[spf],
t);
return 1 | DASMFLAG_SUPPORTED;
return 1 | SUPPORTED;
}
@ -225,7 +229,7 @@ CPU_DISASSEMBLE(cquestrot)
LINE DRAWER DISASSEMBLY HOOK
***************************************************************************/
CPU_DISASSEMBLE(cquestlin)
offs_t cquestlin_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
static const char *const jmps[] =
{
@ -272,7 +276,7 @@ CPU_DISASSEMBLE(cquestlin)
"BRES ",
};
uint64_t inst = big_endianize_int64(*(uint64_t *)oprom);
uint64_t inst = opcodes.r64(pc);
uint32_t inslow = inst & 0xffffffff;
uint32_t inshig = inst >> 32;
@ -303,5 +307,5 @@ CPU_DISASSEMBLE(cquestlin)
_pbcs ? " " : "PB",
spfs[spf]);
return 1 | DASMFLAG_SUPPORTED;
return 1 | SUPPORTED;
}

54
src/devices/cpu/cubeqcpu/cubedasm.h Normal file
View File

@ -0,0 +1,54 @@
// license:BSD-3-Clause
// copyright-holders:Philip Bennett
/***************************************************************************
cubedasm.c
Implementation of the Cube Quest AM2901-based CPUs
***************************************************************************/
#ifndef MAME_CPU_CUBEQCPU_CUBEDASM_H
#define MAME_CPU_CUBEQCPU_CUBEDASM_H
#pragma once
class cubeq_disassembler : public util::disasm_interface
{
public:
cubeq_disassembler() = default;
virtual ~cubeq_disassembler() = default;
virtual u32 opcode_alignment() const override;
protected:
static const char *const ins[];
static const char *const src[];
static const char *const dst[];
};
class cquestsnd_disassembler : public cubeq_disassembler
{
public:
cquestsnd_disassembler() = default;
virtual ~cquestsnd_disassembler() = default;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
class cquestrot_disassembler : public cubeq_disassembler
{
public:
cquestrot_disassembler() = default;
virtual ~cquestrot_disassembler() = default;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
class cquestlin_disassembler : public cubeq_disassembler
{
public:
cquestlin_disassembler() = default;
virtual ~cquestlin_disassembler() = default;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
#endif

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