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checkpoint (nw)

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mamehaze 2014-12-27 00:29:35 +00:00
parent 0b0f6429bd
commit d59a524856
3 changed files with 52 additions and 91 deletions
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5
src/emu/cpu/arcompact/arcompact.h
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@ -165,7 +165,7 @@ protected:
ARCOMPACT_RETTYPE arcompact_handle04_10(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_11(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_12(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_13(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_13(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_14(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_15(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_16(OPS_32);
@ -774,6 +774,7 @@ protected:
ARCOMPACT_HANDLER04_TYPE_PM(04_07);
ARCOMPACT_HANDLER04_TYPE_PM(04_0a);
ARCOMPACT_HANDLER04_TYPE_PM(04_0f);
ARCOMPACT_HANDLER04_TYPE_PM(04_13);
ARCOMPACT_HANDLER04_TYPE_PM(04_15);
ARCOMPACT_HANDLER04_TYPE_PM(04_16);
ARCOMPACT_HANDLER04_TYPE_PM(04_20);
@ -851,6 +852,8 @@ private:
#define CONDITION_LE ((STATUS32_CHECK_Z) || (STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V)) // Z or (N and /V) or (/N and V)
#define CONDITION_EQ (STATUS32_CHECK_Z)
#define CONDITION_CS (STATUS32_CHECK_C)
#define CONDITION_LT ((STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V))
extern const device_type ARCA5;

106
src/emu/cpu/arcompact/arcompact_execute.c
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@ -1861,10 +1861,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_12(OPS_32)
return arcompact_handle04_helper(PARAMS, opcodes_04[0x12], /*"BXOR"*/ 0,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_13(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x13], /*"BMSK"*/ 0,0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_14(OPS_32)
{
@ -2705,90 +2702,20 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0x_helper(OPS_16, const c
return m_pc + (2 >> 0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_02(OPS_16) // SUB_S b <- b,c
{
int breg, creg;
COMMON16_GET_breg;
COMMON16_GET_creg;
REG_16BIT_RANGE(breg);
REG_16BIT_RANGE(creg);
m_regs[breg] = m_regs[breg] - m_regs[creg];
return m_pc + (2 >> 0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_04(OPS_16) // AND_S b <- b, c
{
int breg, creg;
COMMON16_GET_breg;
COMMON16_GET_creg;
REG_16BIT_RANGE(breg);
REG_16BIT_RANGE(creg);
m_regs[breg] = m_regs[breg] & m_regs[creg];
return m_pc + (2 >> 0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_05(OPS_16) // OR_S b <- b,c
{
int breg, creg;
COMMON16_GET_breg;
COMMON16_GET_creg;
REG_16BIT_RANGE(breg);
REG_16BIT_RANGE(creg);
m_regs[breg] = m_regs[breg] | m_regs[creg];
return m_pc + (2 >> 0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_06(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "BIC_S",0); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_07(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "XOR_S",0); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0b(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "TST_S",1); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0c(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "MUL64_S",2); } // actual destination is special multiply registers
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0d(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "SEXB_S",0); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0e(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "SEXW_S",0); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_0f(OPS_16) // EXTB_S
{
int breg, creg;
COMMON16_GET_breg;
COMMON16_GET_creg;
REG_16BIT_RANGE(breg);
REG_16BIT_RANGE(creg);
m_regs[breg] = m_regs[creg] & 0x000000ff;
return m_pc + (2 >> 0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_10(OPS_16) // EXTW_S
{
int breg, creg;
COMMON16_GET_breg;
COMMON16_GET_creg;
REG_16BIT_RANGE(breg);
REG_16BIT_RANGE(creg);
m_regs[breg] = m_regs[creg] & 0x0000ffff;
return m_pc + (2 >> 0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_11(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "ABS_S",0); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_12(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "NOT_S",0); }
@ -2800,20 +2727,6 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_18(OPS_16) { return arco
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_19(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "LSR_S",0); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_1a(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "ASR_S",0); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_1b(OPS_16) // ASL b, c asl 1 (can also be impleneted as b = c + c)
{
int breg, creg;
COMMON16_GET_breg;
COMMON16_GET_creg;
REG_16BIT_RANGE(breg);
REG_16BIT_RANGE(creg);
m_regs[breg] = m_regs[creg] << 1;
return m_pc + (2 >> 0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_1c(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "ASR1_S",0); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_1d(OPS_16) { return arcompact_handle0f_0x_helper(PARAMS, "LSR1_S",0); }
@ -3302,7 +3215,20 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_0x_helper(OPS_16, cons
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_00(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BGT_S"); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_01(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BGE_S"); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_02(OPS_16) { return arcompact_handle1e_03_0x_helper(PARAMS, "BLT_S"); }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_02(OPS_16) // BLT_S
{
if (CONDITION_LT)
{
int s = (op & 0x003f) >> 0; op &= ~0x003f;
if (s & 0x020) s = -0x20 + (s & 0x1f);
UINT32 realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
return realaddress;
}
return m_pc + (2 >> 0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_03(OPS_16) // BLE_S
{

32
src/emu/cpu/arcompact/arcompact_make.py
View File

@ -251,6 +251,25 @@ def EmitGroup04(f,funcname, opname, opexecute, opwrite, opwrite_alt, ignore_a, b
print >>f, ""
print >>f, ""
# xxx_S b <- b,c format opcodes
def EmitGroup0f(f,funcname, opname, opexecute, opwrite):
print >>f, "ARCOMPACT_RETTYPE arcompact_device::arcompact_handle%s(OPS_16)"% (funcname)
print >>f, "{"
print >>f, " int breg, creg;"
print >>f, ""
print >>f, " COMMON16_GET_breg;"
print >>f, " COMMON16_GET_creg;"
print >>f, ""
print >>f, " REG_16BIT_RANGE(breg);"
print >>f, " REG_16BIT_RANGE(creg);"
print >>f, ""
print >>f, " %s" % (opexecute)
print >>f, " %s" % (opwrite)
print >>f, ""
print >>f, " return m_pc + (2 >> 0);"
print >>f, "}"
# xxx_S b, b, u5 format opcodes
def EmitGroup17(f,funcname, opname, opexecute):
print >>f, "ARCOMPACT_RETTYPE arcompact_device::arcompact_handle%s(OPS_16)" % (funcname)
@ -291,6 +310,10 @@ EmitGroup04(f, "04_0a", "MOV", "UINT32 result = c;", "m_regs[breg] = result;", "
EmitGroup04(f, "04_0f", "BSET", "UINT32 result = b | (1 << (c & 0x1f));", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
EmitGroup04(f, "04_13", "BMSK", "UINT32 result = b & ((1<<(c+1))-1);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
EmitGroup04(f, "04_15", "ADD2", "UINT32 result = b + (c << 2);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
EmitGroup04(f, "04_16", "ADD3", "UINT32 result = b + (c << 3);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags )
@ -303,6 +326,15 @@ EmitGroup04(f, "04_2f_02", "LSR1", "UINT32 result = c >> 1;", "m_regs[b
EmitGroup04(f, "04_2f_07", "EXTB", "UINT32 result = c & 0x000000ff;", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_unsupported_Flags ) # ^
EmitGroup04(f, "04_2f_08", "EXTW", "UINT32 result = c & 0x0000ffff;", "m_regs[breg] = result;","", 2,1, -1, EmitGroup04_unsupported_Flags ) # ^
# xxx_S b <- b,c format opcodes (or in some cases xxx_S b,c)
EmitGroup0f(f, "0f_02", "SUB_S", "UINT32 result = m_regs[breg] - m_regs[creg];", "m_regs[breg] = result;" )
EmitGroup0f(f, "0f_04", "AND_S", "UINT32 result = m_regs[breg] & m_regs[creg];", "m_regs[breg] = result;" )
EmitGroup0f(f, "0f_05", "OR_S", "UINT32 result = m_regs[breg] | m_regs[creg];", "m_regs[breg] = result;" )
EmitGroup0f(f, "0f_07", "XOR_S", "UINT32 result = m_regs[breg] ^ m_regs[creg];", "m_regs[breg] = result;" )
EmitGroup0f(f, "0f_0f", "EXTB_S","UINT32 result = m_regs[creg] & 0x000000ff;", "m_regs[breg] = result;" )
EmitGroup0f(f, "0f_10", "EXTW_S","UINT32 result = m_regs[creg] & 0x0000ffff;", "m_regs[breg] = result;" )
EmitGroup0f(f, "0f_1b", "ASL1_S","UINT32 result = m_regs[creg] << 1;", "m_regs[breg] = result;" )
# xxx_S b, b, u5 format opcodes
EmitGroup17(f, "17_00", "ASL_S", "m_regs[breg] = m_regs[breg] << (u&0x1f);" )