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https://github.com/holub/mame
synced 2025-04-28 03:02:52 +03:00
tidied up DPCS, improved flag calculation and added support for lm/sf fields.
This commit is contained in:
smf-
parent
e6a6d2f1fb
commit
d713e9cce6
@ -2992,7 +2992,7 @@ static void setcp3cr( int reg, UINT32 value )
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#define B ( mipscpu.cp2dr[ 6 ].b.h2 )
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#define CODE ( mipscpu.cp2dr[ 6 ].b.h3 )
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#define OTZ ( mipscpu.cp2dr[ 7 ].w.l )
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#define IR0 ( mipscpu.cp2dr[ 8 ].d )
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#define IR0 ( mipscpu.cp2dr[ 8 ].sw.l )
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#define IR1 ( mipscpu.cp2dr[ 9 ].d )
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#define IR2 ( mipscpu.cp2dr[ 10 ].d )
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#define IR3 ( mipscpu.cp2dr[ 11 ].d )
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@ -3029,9 +3029,9 @@ static void setcp3cr( int reg, UINT32 value )
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#define CD2 ( mipscpu.cp2dr[ 22 ].b.h3 )
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#define RES1 ( mipscpu.cp2dr[ 23 ].d )
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#define MAC0 ( mipscpu.cp2dr[ 24 ].d )
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#define MAC1 ( mipscpu.cp2dr[ 25 ].d )
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#define MAC2 ( mipscpu.cp2dr[ 26 ].d )
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#define MAC3 ( mipscpu.cp2dr[ 27 ].d )
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#define MAC1 ( mipscpu.cp2dr[ 25 ].sd )
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#define MAC2 ( mipscpu.cp2dr[ 26 ].sd )
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#define MAC3 ( mipscpu.cp2dr[ 27 ].sd )
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#define IRGB ( mipscpu.cp2dr[ 28 ].d )
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#define ORGB ( mipscpu.cp2dr[ 29 ].d )
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#define LZCS ( mipscpu.cp2dr[ 30 ].d )
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@ -3049,9 +3049,9 @@ static void setcp3cr( int reg, UINT32 value )
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#define R32 ( mipscpu.cp2cr[ 3 ].w.h )
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#define D3 ( mipscpu.cp2cr[ 4 ].d )
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#define R33 ( mipscpu.cp2cr[ 4 ].w.l )
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#define TRX ( mipscpu.cp2cr[ 5 ].d )
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#define TRY ( mipscpu.cp2cr[ 6 ].d )
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#define TRZ ( mipscpu.cp2cr[ 7 ].d )
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#define TRX ( mipscpu.cp2cr[ 5 ].sd )
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#define TRY ( mipscpu.cp2cr[ 6 ].sd )
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#define TRZ ( mipscpu.cp2cr[ 7 ].sd )
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#define L11 ( mipscpu.cp2cr[ 8 ].w.l )
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#define L12 ( mipscpu.cp2cr[ 8 ].w.h )
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#define L13 ( mipscpu.cp2cr[ 9 ].w.l )
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@ -3061,9 +3061,9 @@ static void setcp3cr( int reg, UINT32 value )
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#define L31 ( mipscpu.cp2cr[ 11 ].w.l )
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#define L32 ( mipscpu.cp2cr[ 11 ].w.h )
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#define L33 ( mipscpu.cp2cr[ 12 ].w.l )
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#define RBK ( mipscpu.cp2cr[ 13 ].d )
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#define GBK ( mipscpu.cp2cr[ 14 ].d )
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#define BBK ( mipscpu.cp2cr[ 15 ].d )
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#define RBK ( mipscpu.cp2cr[ 13 ].sd )
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#define GBK ( mipscpu.cp2cr[ 14 ].sd )
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#define BBK ( mipscpu.cp2cr[ 15 ].sd )
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#define LR1 ( mipscpu.cp2cr[ 16 ].w.l )
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#define LR2 ( mipscpu.cp2cr[ 16 ].w.h )
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#define LR3 ( mipscpu.cp2cr[ 17 ].w.l )
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@ -3073,9 +3073,9 @@ static void setcp3cr( int reg, UINT32 value )
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#define LB1 ( mipscpu.cp2cr[ 19 ].w.l )
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#define LB2 ( mipscpu.cp2cr[ 19 ].w.h )
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#define LB3 ( mipscpu.cp2cr[ 20 ].w.l )
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#define RFC ( mipscpu.cp2cr[ 21 ].d )
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#define GFC ( mipscpu.cp2cr[ 22 ].d )
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#define BFC ( mipscpu.cp2cr[ 23 ].d )
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#define RFC ( mipscpu.cp2cr[ 21 ].sd )
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#define GFC ( mipscpu.cp2cr[ 22 ].sd )
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#define BFC ( mipscpu.cp2cr[ 23 ].sd )
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#define OFX ( mipscpu.cp2cr[ 24 ].d )
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#define OFY ( mipscpu.cp2cr[ 25 ].d )
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#define H ( mipscpu.cp2cr[ 26 ].w.l )
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@ -3229,7 +3229,7 @@ INLINE INT64 BOUNDS( INT64 n_value, INT64 n_max, int n_maxflag, INT64 n_min, int
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#define A3( a ) BOUNDS( ( a ), 0x7fffffff, ( 1 << 28 ), -(INT64)0x80000000, ( 1 << 25 ) )
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#define Lm_B1( a, l ) LIM( ( a ), 0x7fff, -0x8000 * !l, ( 1 << 31 ) | ( 1 << 24 ) )
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#define Lm_B2( a, l ) LIM( ( a ), 0x7fff, -0x8000 * !l, ( 1 << 31 ) | ( 1 << 23 ) )
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#define Lm_B3( a, l ) LIM( ( a ), 0x7fff, -0x8000 * !l, ( 1 << 31 ) | ( 1 << 22 ) )
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#define Lm_B3( a, l ) LIM( ( a ), 0x7fff, -0x8000 * !l, ( 1 << 22 ) )
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#define Lm_C1( a ) LIM( ( a ), 0x00ff, 0x0000, ( 1 << 21 ) )
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#define Lm_C2( a ) LIM( ( a ), 0x00ff, 0x0000, ( 1 << 20 ) )
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#define Lm_C3( a ) LIM( ( a ), 0x00ff, 0x0000, ( 1 << 19 ) )
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@ -3264,9 +3264,9 @@ static void docop2( int gteop )
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UINT16 n_v2;
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UINT16 n_v3;
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const UINT16 *const *p_n_mx;
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const UINT32 *const *p_n_cv;
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const INT32 *const *p_n_cv;
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static const UINT16 n_zm = 0;
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static const UINT32 n_zc = 0;
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static const INT32 n_zc = 0;
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static const UINT16 *const p_n_vx[] = { &VX0, &VX1, &VX2 };
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static const UINT16 *const p_n_vy[] = { &VY0, &VY1, &VY2 };
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static const UINT16 *const p_n_vz[] = { &VZ0, &VZ1, &VZ2 };
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@ -3275,11 +3275,11 @@ static void docop2( int gteop )
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static const UINT16 *const p_n_cm[] = { &LR1, &LR2, &LR3, &LG1, &LG2, &LG3, &LB1, &LB2, &LB3 };
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static const UINT16 *const p_n_zm[] = { &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm };
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static const UINT16 *const *const p_p_n_mx[] = { p_n_rm, p_n_lm, p_n_cm, p_n_zm };
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static const UINT32 *const p_n_tr[] = { &TRX, &TRY, &TRZ };
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static const UINT32 *const p_n_bk[] = { &RBK, &GBK, &BBK };
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static const UINT32 *const p_n_fc[] = { &RFC, &GFC, &BFC };
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static const UINT32 *const p_n_zc[] = { &n_zc, &n_zc, &n_zc };
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static const UINT32 *const *const p_p_n_cv[] = { p_n_tr, p_n_bk, p_n_fc, p_n_zc };
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static const INT32 *const p_n_tr[] = { &TRX, &TRY, &TRZ };
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static const INT32 *const p_n_bk[] = { &RBK, &GBK, &BBK };
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static const INT32 *const p_n_fc[] = { &RFC, &GFC, &BFC };
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static const INT32 *const p_n_zc[] = { &n_zc, &n_zc, &n_zc };
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static const INT32 *const *const p_p_n_cv[] = { p_n_tr, p_n_bk, p_n_fc, p_n_zc };
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INT64 mac0;
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switch( GTE_FUNCT( gteop ) )
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@ -3333,33 +3333,37 @@ static void docop2( int gteop )
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return;
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}
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break;
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case 0x10:
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if( gteop == 0x0780010 )
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{
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GTELOG( "DPCS" );
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FLAG = 0;
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MAC1 = A1( ( ( (INT64)R << 16 ) + ( (INT64)(INT16)IR0 * ( Lm_B1( (INT32)RFC - ( R << 4 ), 0 ) ) ) ) >> 12 );
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MAC2 = A2( ( ( (INT64)G << 16 ) + ( (INT64)(INT16)IR0 * ( Lm_B1( (INT32)GFC - ( G << 4 ), 0 ) ) ) ) >> 12 );
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MAC3 = A3( ( ( (INT64)B << 16 ) + ( (INT64)(INT16)IR0 * ( Lm_B1( (INT32)BFC - ( B << 4 ), 0 ) ) ) ) >> 12 );
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IR1 = Lm_B1( (INT32)MAC1, 0 );
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IR2 = Lm_B2( (INT32)MAC2, 0 );
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IR3 = Lm_B3( (INT32)MAC3, 0 );
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CD0 = CD1;
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CD1 = CD2;
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CD2 = CODE;
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R0 = R1;
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R1 = R2;
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R2 = Lm_C1( (INT32)MAC1 >> 4 );
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G0 = G1;
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G1 = G2;
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G2 = Lm_C2( (INT32)MAC2 >> 4 );
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B0 = B1;
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B1 = B2;
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B2 = Lm_C3( (INT32)MAC3 >> 4 );
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return;
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case 0x10:
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GTELOG( "DPCS" );
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FLAG = 0;
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n_lm = GTE_LM( gteop );
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if( GTE_SF( gteop ) == 1 )
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{
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MAC1 = ( ( R << 16 ) + ( IR0 * Lm_B1( A1( (INT64) RFC - ( R << 4 ) ), 0 ) ) ) >> 12;
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MAC2 = ( ( G << 16 ) + ( IR0 * Lm_B2( A2( (INT64) GFC - ( G << 4 ) ), 0 ) ) ) >> 12;
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MAC3 = ( ( B << 16 ) + ( IR0 * Lm_B3( A3( (INT64) BFC - ( B << 4 ) ), 0 ) ) ) >> 12;
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}
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break;
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else
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{
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MAC1 = ( ( R << 16 ) + ( IR0 * Lm_B1( A1( ( (INT64) ( RFC << 12 ) - ( R << 16 ) ) ), 0 ) ) );
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MAC2 = ( ( G << 16 ) + ( IR0 * Lm_B2( A2( ( (INT64) ( GFC << 12 ) - ( G << 16 ) ) ), 0 ) ) );
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MAC3 = ( ( B << 16 ) + ( IR0 * Lm_B3( A3( ( (INT64) ( BFC << 12 ) - ( B << 16 ) ) ), 0 ) ) );
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}
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IR1 = Lm_B1( MAC1, n_lm );
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IR2 = Lm_B2( MAC2, n_lm );
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IR3 = Lm_B3( MAC3, n_lm );
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RGB0 = RGB1;
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RGB1 = RGB2;
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CD2 = CODE;
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R2 = Lm_C1( MAC1 >> 4 );
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G2 = Lm_C2( MAC2 >> 4 );
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B2 = Lm_C3( MAC3 >> 4 );
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return;
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case 0x11:
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if( gteop == 0x0980011 )
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{
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