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https://github.com/holub/mame
synced 2025-07-06 18:39:28 +03:00
mcs51: clean up source code spacing
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hap
parent
252941fe51
commit
d74df7ffaa
@ -52,6 +52,7 @@
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*****************************************************************************/
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/******************************************************************************
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*
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* Notes:
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*
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* The term cycles is used here to really refer to clock oscilations, because 1 machine cycle
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@ -588,12 +589,12 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
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/* Macros for Setting Flags */
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#define SET_X(R, v) do { R = (v);} while (0)
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#define SET_CY(n) SET_PSW((PSW & 0x7f) | (n<<7)) //Carry Flag
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#define SET_AC(n) SET_PSW((PSW & 0xbf) | (n<<6)) //Aux.Carry Flag
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#define SET_FO(n) SET_PSW((PSW & 0xdf) | (n<<5)) //User Flag
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#define SET_RS(n) SET_PSW((PSW & 0xe7) | (n<<3)) //R Bank Select
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#define SET_OV(n) SET_PSW((PSW & 0xfb) | (n<<2)) //Overflow Flag
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#define SET_P(n) SET_PSW((PSW & 0xfe) | (n<<0)) //Parity Flag
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#define SET_CY(n) SET_PSW((PSW & 0x7f) | ((n) << 7)) //Carry Flag
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#define SET_AC(n) SET_PSW((PSW & 0xbf) | ((n) << 6)) //Aux.Carry Flag
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#define SET_FO(n) SET_PSW((PSW & 0xdf) | ((n) << 5)) //User Flag
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#define SET_RS(n) SET_PSW((PSW & 0xe7) | ((n) << 3)) //R Bank Select
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#define SET_OV(n) SET_PSW((PSW & 0xfb) | ((n) << 2)) //Overflow Flag
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#define SET_P(n) SET_PSW((PSW & 0xfe) | ((n) << 0)) //Parity Flag
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#define SET_BIT(R, n, v) do { R = (R & ~(1 << (n))) | ((v) << (n)); } while (0)
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#define GET_BIT(R, n) (((R) >> (n)) & 0x01)
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@ -608,7 +609,7 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
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#define SET_ET2(n) SET_BIT(IE, 5, n) //Timer 2 Interrupt Enable/Disable
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/* 8052 Only flags */
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#define SET_PT2(n) SET_BIT(IP, 5, n); //Set Timer 2 Priority Level
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#define SET_PT2(n) SET_BIT(IP, 5, n) //Set Timer 2 Priority Level
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#define SET_PS0(n) SET_BIT(IP, 4, n) //Set Serial Priority Level
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#define SET_PT1(n) SET_BIT(IP, 3, n) //Set Timer 1 Priority Level
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@ -720,7 +721,7 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
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#define GET_GF1 GET_BIT(PCON, 3)
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#define GET_GF0 GET_BIT(PCON, 2)
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#define GET_PD GET_BIT(PCON, 1)
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#define GET_IDL (GET_BIT(PCON, 0) & ~(GET_PD)) /* PD takes precedence! */
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#define GET_IDL (GET_BIT(PCON, 0) & ~(GET_PD)) // PD takes precedence!
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/* 8052 Only flags */
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#define GET_TF2 GET_BIT(T2CON, 7)
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@ -753,7 +754,7 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
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#define GET_SL GET_BIT(MCON, 0)
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/* RPCTL Flags - DS5002FP */
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#define GET_RNR GET_BIT(RPCTL, 7) /* Bit 6 ?? */
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#define GET_RNR GET_BIT(RPCTL, 7) // Bit 6 ??
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#define GET_EXBS GET_BIT(RPCTL, 5)
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#define GET_AE GET_BIT(RPCTL, 4)
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#define GET_IBI GET_BIT(RPCTL, 3)
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@ -842,9 +843,11 @@ offs_t mcs51_cpu_device::external_ram_iaddr(offs_t offset, offs_t mem_mask)
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/* Memory Range (RG1 and RG0 @ MCON and RPCTL registers) */
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static const uint16_t ds5002fp_ranges[4] = { 0x1fff, 0x3fff, 0x7fff, 0xffff };
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/* Memory Partition Table (RG1 & RG0 @ MCON & RPCTL registers) */
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static const uint32_t ds5002fp_partitions[16] = {
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static const uint32_t ds5002fp_partitions[16] =
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{
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0x0000, 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000,
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0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0x10000 };
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0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0x10000
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};
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/* if partition mode is set, adjust offset based on the bus */
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if (m_features & FEATURE_DS5002FP)
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@ -872,12 +875,12 @@ offs_t mcs51_cpu_device::external_ram_iaddr(offs_t offset, offs_t mem_mask)
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uint8_t mcs51_cpu_device::iram_read(size_t offset)
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{
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return (((offset) < 0x80) ? m_data.read_byte(offset) : sfr_read(offset));
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return ((offset < 0x80) ? m_data.read_byte(offset) : sfr_read(offset));
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}
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void mcs51_cpu_device::iram_write(size_t offset, uint8_t data)
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{
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if ((offset) < 0x80)
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if (offset < 0x80)
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m_data.write_byte(offset, data);
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else
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sfr_write(offset, data);
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@ -907,10 +910,9 @@ void mcs51_cpu_device::set_parity()
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{
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//This flag will be set when the accumulator contains an odd # of bits set..
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uint8_t p = 0;
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int i;
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uint8_t a = ACC;
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for (i=0; i<8; i++) //Test for each of the 8 bits in the ACC!
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for (int i = 0; i < 8; i++) //Test for each of the 8 bits in the ACC!
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{
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p ^= (a & 1);
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a = (a >> 1);
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@ -1359,9 +1361,7 @@ void mcs51_cpu_device::update_timer_t1(int cycles)
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count = ((uint32_t)TL1) + delta;
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overflow = count & 0xffffff00; /* Check for overflow */
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if (overflow)
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{
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count += TH1; /* Reload timer */
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}
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/* Update new values of the counter */
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TL1 = count & 0xff;
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break;
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@ -1404,9 +1404,7 @@ void mcs51_cpu_device::update_timer_t1(int cycles)
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count = ((uint32_t)TL1) + delta;
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overflow = count & 0xffffff00; /* Check for overflow */
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if (overflow)
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{
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count += TH1; /* Reload timer */
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}
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/* Update new values of the counter */
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TL1 = count & 0xff;
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break;
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@ -1859,8 +1857,7 @@ const uint8_t mcs51_cpu_device::mcs51_cycles[256] =
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**********************************************************************************/
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void mcs51_cpu_device::check_irqs()
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{
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uint8_t ints = (GET_IE0 | (GET_TF0<<1) | (GET_IE1<<2) | (GET_TF1<<3)
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| ((GET_RI|GET_TI)<<4));
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uint8_t ints = (GET_IE0 | (GET_TF0 << 1) | (GET_IE1 << 2) | (GET_TF1 << 3) | ((GET_RI | GET_TI) << 4));
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uint8_t int_vec = 0;
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uint8_t int_mask;
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int priority_request = -1;
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@ -149,7 +149,7 @@ OPHANDLER( anl_c_bitaddr )
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int cy = GET_CY;
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uint8_t addr = ROP_ARG(PC++); //Grab bit address
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uint8_t bit = BIT_R(addr); //Grab bit data from bit address
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SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Bit
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SET_CY(cy & bit); //Set Carry flag to Carry Flag Value Logical AND with Bit
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}
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//ANL C,/bit addr /* 1: 1011 0000 */
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@ -158,8 +158,8 @@ OPHANDLER( anl_c_nbitaddr )
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int cy = GET_CY;
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uint8_t addr = ROP_ARG(PC++); //Grab bit address
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uint8_t bit = BIT_R(addr); //Grab bit data from bit address
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bit = ((~bit)&1); //Complement bit
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SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Complemented Bit
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bit = (~bit & 1); //Complement bit
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SET_CY(cy & bit); //Set Carry flag to Carry Flag Value Logical AND with Complemented Bit
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}
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//CJNE A, #data, code addr /* 1: 1011 0100 */
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@ -174,7 +174,7 @@ OPHANDLER( cjne_a_byte )
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}
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//Set carry flag to 1 if 1st compare value is < 2nd compare value
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SET_CY( (ACC < data) );
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SET_CY(ACC < data);
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}
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//CJNE A, data addr, code addr /* 1: 1011 0101 */
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@ -190,7 +190,7 @@ OPHANDLER( cjne_a_mem )
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}
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//Set carry flag to 1 if 1st compare value is < 2nd compare value
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SET_CY( (ACC < data) );
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SET_CY(ACC < data);
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}
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//CJNE @R0/@R1, #data, code addr /* 1: 1011 011i */
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@ -206,7 +206,7 @@ OPHANDLER( cjne_ir_byte )
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}
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//Set carry flag to 1 if 1st compare value is < 2nd compare value
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SET_CY( (srcdata < data) );
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SET_CY(srcdata < data);
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}
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//CJNE R0 to R7, #data, code addr /* 1: 1011 1rrr */
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@ -222,7 +222,7 @@ OPHANDLER( cjne_r_byte )
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}
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//Set carry flag to 1 if 1st compare value is < 2nd compare value
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SET_CY( (srcdata < data) );
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SET_CY(srcdata < data);
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}
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//CLR bit addr /* 1: 1100 0010 */
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@ -317,14 +317,16 @@ OPHANDLER( dec_r )
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//DIV AB /* 1: 1000 0100 */
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OPHANDLER( div_ab )
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{
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if( B == 0 ) {
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if (B == 0)
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{
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//Overflow flag is set!
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SET_OV(1);
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//Really the values are undefined according to the manual, but we'll just leave them as is..
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//SET_ACC(0xff);
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//SFR_W(B, 0xff);
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}
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else {
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else
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{
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int a = (int)ACC / B;
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int b = (int)ACC % B;
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//A gets quotient byte, B gets remainder byte
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@ -411,7 +413,8 @@ OPHANDLER( jbc )
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{
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uint8_t addr = ROP_ARG(PC++); //Grab bit address
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int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
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if(BIT_R(addr)) { //If bit set at specified bit address, jump
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if (BIT_R(addr)) //If bit set at specified bit address, jump
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{
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PC = PC + rel_addr;
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BIT_W(addr, 0); //Clear Bit also
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}
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@ -626,7 +629,7 @@ OPHANDLER( movc_a_iapc )
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OPHANDLER( mov_c_bitaddr )
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{
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uint8_t addr = ROP_ARG(PC++); //Grab bit address
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SET_CY( (BIT_R(addr)) ); //Store Bit from Bit Address to Carry Flag
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SET_CY(BIT_R(addr)); //Store Bit from Bit Address to Carry Flag
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}
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//MOVC A, @A + DPTR /* 1: 1001 0011 */
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@ -642,7 +645,7 @@ OPHANDLER( movc_a_iadptr )
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OPHANDLER( movx_a_idptr )
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{
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// uint8_t byte = DATAMEM_R(R_DPTR); //Grab 1 byte from External DATA memory pointed to by dptr
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uint32_t addr = ERAM_ADDR(DPTR, 0xFFFF);
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uint32_t addr = ERAM_ADDR(DPTR, 0xffff);
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uint8_t byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by dptr
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SET_ACC(byte); //Store to ACC
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}
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@ -651,7 +654,7 @@ OPHANDLER( movx_a_idptr )
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//(Move External Ram 8 bit address to A)
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OPHANDLER( movx_a_ir )
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{
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uint32_t addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
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uint32_t addr = ERAM_ADDR(R_REG(r), 0xff); //Grab address by reading location pointed to by R0 or R1
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uint8_t byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by address
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SET_ACC(byte); //Store to ACC
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}
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@ -661,7 +664,7 @@ OPHANDLER( movx_a_ir )
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OPHANDLER( movx_idptr_a )
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{
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// DATAMEM_W(R_DPTR, ACC); //Store ACC to External DATA memory address pointed to by DPTR
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uint32_t addr = ERAM_ADDR(DPTR, 0xFFFF);
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uint32_t addr = ERAM_ADDR(DPTR, 0xffff);
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DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address pointed to by DPTR
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}
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@ -669,7 +672,7 @@ OPHANDLER( movx_idptr_a )
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//(Move A to External Ram 8 bit address)
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OPHANDLER( movx_ir_a )
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{
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uint32_t addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
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uint32_t addr = ERAM_ADDR(R_REG(r), 0xff); //Grab address by reading location pointed to by R0 or R1
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DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address
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}
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@ -678,10 +681,10 @@ OPHANDLER( mul_ab )
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{
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uint16_t result = ACC * B;
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//A gets lo bits, B gets hi bits of result
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B = (uint8_t) ((result & 0xFF00) >> 8);
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SET_ACC((uint8_t)(result & 0x00FF));
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B = (uint8_t)((result & 0xff00) >> 8);
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SET_ACC((uint8_t)(result & 0x00ff));
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//Set flags
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SET_OV( ((result & 0x100) >> 8) ); //Set/Clear Overflow Flag if result > 255
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SET_OV((result & 0x100) >> 8); //Set/Clear Overflow Flag if result > 255
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SET_CY(0); //Carry Flag always cleared
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}
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@ -742,7 +745,7 @@ OPHANDLER( orl_c_bitaddr )
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int cy = GET_CY;
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uint8_t addr = ROP_ARG(PC++); //Grab bit address
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uint8_t bit = BIT_R(addr); //Grab bit data from bit address
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SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Bit
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SET_CY(cy | bit); //Set Carry flag to Carry Flag Value Logical OR with Bit
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}
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//ORL C, /bit addr /* 1: 1010 0000 */
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@ -751,8 +754,8 @@ OPHANDLER( orl_c_nbitaddr )
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int cy = GET_CY;
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uint8_t addr = ROP_ARG(PC++); //Grab bit address
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uint8_t bit = BIT_R(addr); //Grab bit data from bit address
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bit = ((~bit)&1); //Complement bit
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SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Complemented Bit
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bit = (~bit & 1); //Complement bit
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SET_CY(cy | bit); //Set Carry flag to Carry Flag Value Logical OR with Complemented Bit
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}
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//POP data addr /* 1: 1101 0000 */
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@ -827,7 +830,8 @@ OPHANDLER( rrc_a )
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//SETB C /* 1: 1101 0011 */
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OPHANDLER( setb_c )
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{
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SET_CY(1); //Set Carry Flag
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//Set Carry Flag
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SET_CY(1);
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}
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//SETB bit addr /* 1: 1101 0010 */
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