mcs51: clean up source code spacing

This commit is contained in:
hap 2025-01-22 20:44:02 +01:00
parent 252941fe51
commit d74df7ffaa
2 changed files with 558 additions and 557 deletions

View File

@ -52,6 +52,7 @@
*****************************************************************************/
/******************************************************************************
*
* Notes:
*
* The term cycles is used here to really refer to clock oscilations, because 1 machine cycle
@ -588,12 +589,12 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
/* Macros for Setting Flags */
#define SET_X(R, v) do { R = (v);} while (0)
#define SET_CY(n) SET_PSW((PSW & 0x7f) | (n<<7)) //Carry Flag
#define SET_AC(n) SET_PSW((PSW & 0xbf) | (n<<6)) //Aux.Carry Flag
#define SET_FO(n) SET_PSW((PSW & 0xdf) | (n<<5)) //User Flag
#define SET_RS(n) SET_PSW((PSW & 0xe7) | (n<<3)) //R Bank Select
#define SET_OV(n) SET_PSW((PSW & 0xfb) | (n<<2)) //Overflow Flag
#define SET_P(n) SET_PSW((PSW & 0xfe) | (n<<0)) //Parity Flag
#define SET_CY(n) SET_PSW((PSW & 0x7f) | ((n) << 7)) //Carry Flag
#define SET_AC(n) SET_PSW((PSW & 0xbf) | ((n) << 6)) //Aux.Carry Flag
#define SET_FO(n) SET_PSW((PSW & 0xdf) | ((n) << 5)) //User Flag
#define SET_RS(n) SET_PSW((PSW & 0xe7) | ((n) << 3)) //R Bank Select
#define SET_OV(n) SET_PSW((PSW & 0xfb) | ((n) << 2)) //Overflow Flag
#define SET_P(n) SET_PSW((PSW & 0xfe) | ((n) << 0)) //Parity Flag
#define SET_BIT(R, n, v) do { R = (R & ~(1 << (n))) | ((v) << (n)); } while (0)
#define GET_BIT(R, n) (((R) >> (n)) & 0x01)
@ -608,7 +609,7 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
#define SET_ET2(n) SET_BIT(IE, 5, n) //Timer 2 Interrupt Enable/Disable
/* 8052 Only flags */
#define SET_PT2(n) SET_BIT(IP, 5, n); //Set Timer 2 Priority Level
#define SET_PT2(n) SET_BIT(IP, 5, n) //Set Timer 2 Priority Level
#define SET_PS0(n) SET_BIT(IP, 4, n) //Set Serial Priority Level
#define SET_PT1(n) SET_BIT(IP, 3, n) //Set Timer 1 Priority Level
@ -720,7 +721,7 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
#define GET_GF1 GET_BIT(PCON, 3)
#define GET_GF0 GET_BIT(PCON, 2)
#define GET_PD GET_BIT(PCON, 1)
#define GET_IDL (GET_BIT(PCON, 0) & ~(GET_PD)) /* PD takes precedence! */
#define GET_IDL (GET_BIT(PCON, 0) & ~(GET_PD)) // PD takes precedence!
/* 8052 Only flags */
#define GET_TF2 GET_BIT(T2CON, 7)
@ -753,7 +754,7 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
#define GET_SL GET_BIT(MCON, 0)
/* RPCTL Flags - DS5002FP */
#define GET_RNR GET_BIT(RPCTL, 7) /* Bit 6 ?? */
#define GET_RNR GET_BIT(RPCTL, 7) // Bit 6 ??
#define GET_EXBS GET_BIT(RPCTL, 5)
#define GET_AE GET_BIT(RPCTL, 4)
#define GET_IBI GET_BIT(RPCTL, 3)
@ -842,9 +843,11 @@ offs_t mcs51_cpu_device::external_ram_iaddr(offs_t offset, offs_t mem_mask)
/* Memory Range (RG1 and RG0 @ MCON and RPCTL registers) */
static const uint16_t ds5002fp_ranges[4] = { 0x1fff, 0x3fff, 0x7fff, 0xffff };
/* Memory Partition Table (RG1 & RG0 @ MCON & RPCTL registers) */
static const uint32_t ds5002fp_partitions[16] = {
static const uint32_t ds5002fp_partitions[16] =
{
0x0000, 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000,
0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0x10000 };
0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0x10000
};
/* if partition mode is set, adjust offset based on the bus */
if (m_features & FEATURE_DS5002FP)
@ -872,12 +875,12 @@ offs_t mcs51_cpu_device::external_ram_iaddr(offs_t offset, offs_t mem_mask)
uint8_t mcs51_cpu_device::iram_read(size_t offset)
{
return (((offset) < 0x80) ? m_data.read_byte(offset) : sfr_read(offset));
return ((offset < 0x80) ? m_data.read_byte(offset) : sfr_read(offset));
}
void mcs51_cpu_device::iram_write(size_t offset, uint8_t data)
{
if ((offset) < 0x80)
if (offset < 0x80)
m_data.write_byte(offset, data);
else
sfr_write(offset, data);
@ -907,10 +910,9 @@ void mcs51_cpu_device::set_parity()
{
//This flag will be set when the accumulator contains an odd # of bits set..
uint8_t p = 0;
int i;
uint8_t a = ACC;
for (i=0; i<8; i++) //Test for each of the 8 bits in the ACC!
for (int i = 0; i < 8; i++) //Test for each of the 8 bits in the ACC!
{
p ^= (a & 1);
a = (a >> 1);
@ -1359,9 +1361,7 @@ void mcs51_cpu_device::update_timer_t1(int cycles)
count = ((uint32_t)TL1) + delta;
overflow = count & 0xffffff00; /* Check for overflow */
if (overflow)
{
count += TH1; /* Reload timer */
}
/* Update new values of the counter */
TL1 = count & 0xff;
break;
@ -1404,9 +1404,7 @@ void mcs51_cpu_device::update_timer_t1(int cycles)
count = ((uint32_t)TL1) + delta;
overflow = count & 0xffffff00; /* Check for overflow */
if (overflow)
{
count += TH1; /* Reload timer */
}
/* Update new values of the counter */
TL1 = count & 0xff;
break;
@ -1859,8 +1857,7 @@ const uint8_t mcs51_cpu_device::mcs51_cycles[256] =
**********************************************************************************/
void mcs51_cpu_device::check_irqs()
{
uint8_t ints = (GET_IE0 | (GET_TF0<<1) | (GET_IE1<<2) | (GET_TF1<<3)
| ((GET_RI|GET_TI)<<4));
uint8_t ints = (GET_IE0 | (GET_TF0 << 1) | (GET_IE1 << 2) | (GET_TF1 << 3) | ((GET_RI | GET_TI) << 4));
uint8_t int_vec = 0;
uint8_t int_mask;
int priority_request = -1;

View File

@ -149,7 +149,7 @@ OPHANDLER( anl_c_bitaddr )
int cy = GET_CY;
uint8_t addr = ROP_ARG(PC++); //Grab bit address
uint8_t bit = BIT_R(addr); //Grab bit data from bit address
SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Bit
SET_CY(cy & bit); //Set Carry flag to Carry Flag Value Logical AND with Bit
}
//ANL C,/bit addr /* 1: 1011 0000 */
@ -158,8 +158,8 @@ OPHANDLER( anl_c_nbitaddr )
int cy = GET_CY;
uint8_t addr = ROP_ARG(PC++); //Grab bit address
uint8_t bit = BIT_R(addr); //Grab bit data from bit address
bit = ((~bit)&1); //Complement bit
SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Complemented Bit
bit = (~bit & 1); //Complement bit
SET_CY(cy & bit); //Set Carry flag to Carry Flag Value Logical AND with Complemented Bit
}
//CJNE A, #data, code addr /* 1: 1011 0100 */
@ -174,7 +174,7 @@ OPHANDLER( cjne_a_byte )
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
SET_CY( (ACC < data) );
SET_CY(ACC < data);
}
//CJNE A, data addr, code addr /* 1: 1011 0101 */
@ -190,7 +190,7 @@ OPHANDLER( cjne_a_mem )
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
SET_CY( (ACC < data) );
SET_CY(ACC < data);
}
//CJNE @R0/@R1, #data, code addr /* 1: 1011 011i */
@ -206,7 +206,7 @@ OPHANDLER( cjne_ir_byte )
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
SET_CY( (srcdata < data) );
SET_CY(srcdata < data);
}
//CJNE R0 to R7, #data, code addr /* 1: 1011 1rrr */
@ -222,7 +222,7 @@ OPHANDLER( cjne_r_byte )
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
SET_CY( (srcdata < data) );
SET_CY(srcdata < data);
}
//CLR bit addr /* 1: 1100 0010 */
@ -317,14 +317,16 @@ OPHANDLER( dec_r )
//DIV AB /* 1: 1000 0100 */
OPHANDLER( div_ab )
{
if( B == 0 ) {
if (B == 0)
{
//Overflow flag is set!
SET_OV(1);
//Really the values are undefined according to the manual, but we'll just leave them as is..
//SET_ACC(0xff);
//SFR_W(B, 0xff);
}
else {
else
{
int a = (int)ACC / B;
int b = (int)ACC % B;
//A gets quotient byte, B gets remainder byte
@ -411,7 +413,8 @@ OPHANDLER( jbc )
{
uint8_t addr = ROP_ARG(PC++); //Grab bit address
int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
if(BIT_R(addr)) { //If bit set at specified bit address, jump
if (BIT_R(addr)) //If bit set at specified bit address, jump
{
PC = PC + rel_addr;
BIT_W(addr, 0); //Clear Bit also
}
@ -626,7 +629,7 @@ OPHANDLER( movc_a_iapc )
OPHANDLER( mov_c_bitaddr )
{
uint8_t addr = ROP_ARG(PC++); //Grab bit address
SET_CY( (BIT_R(addr)) ); //Store Bit from Bit Address to Carry Flag
SET_CY(BIT_R(addr)); //Store Bit from Bit Address to Carry Flag
}
//MOVC A, @A + DPTR /* 1: 1001 0011 */
@ -642,7 +645,7 @@ OPHANDLER( movc_a_iadptr )
OPHANDLER( movx_a_idptr )
{
// uint8_t byte = DATAMEM_R(R_DPTR); //Grab 1 byte from External DATA memory pointed to by dptr
uint32_t addr = ERAM_ADDR(DPTR, 0xFFFF);
uint32_t addr = ERAM_ADDR(DPTR, 0xffff);
uint8_t byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by dptr
SET_ACC(byte); //Store to ACC
}
@ -651,7 +654,7 @@ OPHANDLER( movx_a_idptr )
//(Move External Ram 8 bit address to A)
OPHANDLER( movx_a_ir )
{
uint32_t addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
uint32_t addr = ERAM_ADDR(R_REG(r), 0xff); //Grab address by reading location pointed to by R0 or R1
uint8_t byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by address
SET_ACC(byte); //Store to ACC
}
@ -661,7 +664,7 @@ OPHANDLER( movx_a_ir )
OPHANDLER( movx_idptr_a )
{
// DATAMEM_W(R_DPTR, ACC); //Store ACC to External DATA memory address pointed to by DPTR
uint32_t addr = ERAM_ADDR(DPTR, 0xFFFF);
uint32_t addr = ERAM_ADDR(DPTR, 0xffff);
DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address pointed to by DPTR
}
@ -669,7 +672,7 @@ OPHANDLER( movx_idptr_a )
//(Move A to External Ram 8 bit address)
OPHANDLER( movx_ir_a )
{
uint32_t addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
uint32_t addr = ERAM_ADDR(R_REG(r), 0xff); //Grab address by reading location pointed to by R0 or R1
DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address
}
@ -678,10 +681,10 @@ OPHANDLER( mul_ab )
{
uint16_t result = ACC * B;
//A gets lo bits, B gets hi bits of result
B = (uint8_t) ((result & 0xFF00) >> 8);
SET_ACC((uint8_t)(result & 0x00FF));
B = (uint8_t)((result & 0xff00) >> 8);
SET_ACC((uint8_t)(result & 0x00ff));
//Set flags
SET_OV( ((result & 0x100) >> 8) ); //Set/Clear Overflow Flag if result > 255
SET_OV((result & 0x100) >> 8); //Set/Clear Overflow Flag if result > 255
SET_CY(0); //Carry Flag always cleared
}
@ -742,7 +745,7 @@ OPHANDLER( orl_c_bitaddr )
int cy = GET_CY;
uint8_t addr = ROP_ARG(PC++); //Grab bit address
uint8_t bit = BIT_R(addr); //Grab bit data from bit address
SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Bit
SET_CY(cy | bit); //Set Carry flag to Carry Flag Value Logical OR with Bit
}
//ORL C, /bit addr /* 1: 1010 0000 */
@ -751,8 +754,8 @@ OPHANDLER( orl_c_nbitaddr )
int cy = GET_CY;
uint8_t addr = ROP_ARG(PC++); //Grab bit address
uint8_t bit = BIT_R(addr); //Grab bit data from bit address
bit = ((~bit)&1); //Complement bit
SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Complemented Bit
bit = (~bit & 1); //Complement bit
SET_CY(cy | bit); //Set Carry flag to Carry Flag Value Logical OR with Complemented Bit
}
//POP data addr /* 1: 1101 0000 */
@ -827,7 +830,8 @@ OPHANDLER( rrc_a )
//SETB C /* 1: 1101 0011 */
OPHANDLER( setb_c )
{
SET_CY(1); //Set Carry Flag
//Set Carry Flag
SET_CY(1);
}
//SETB bit addr /* 1: 1101 0010 */