Moved CD4020_DIP implementation to macro lib. (nw)

This commit is contained in:
couriersud 2015-07-12 17:28:54 +02:00
parent 1184ed0a3a
commit d76c3d1193
5 changed files with 51 additions and 52 deletions

View File

@ -126,7 +126,6 @@ void initialize_factory(factory_list_t &factory)
//ENTRY(4066, CD_4066, "+A,B")
ENTRY(NE555, NE555, "-")
ENTRY(r2r_dac, R2R_DAC, "+VIN,R,N")
ENTRY(CD4020_DIP, CD4020_DIP, "-")
ENTRY(CD4016_DIP, CD4016_DIP, "-")
ENTRY(CD4066_DIP, CD4066_DIP, "-")
ENTRY(4538_dip, CD4538_DIP, "-")

View File

@ -104,49 +104,4 @@ inline NETLIB_FUNC_VOID(CD4020_sub, update_outputs, (const UINT16 cnt))
OUTLOGIC(m_Q[i], (cnt >> i) & 1, out_delayQn[i]);
}
NETLIB_START(CD4020_DIP)
{
NETLIB_NAME(CD4020)::start();
/* +--------------+
* Q12 |1 ++ 16| VDD
* Q13 |2 15| Q11
* Q14 |3 14| Q10
* Q6 |4 4020 13| Q8
* Q5 |5 12| Q9
* Q7 |6 11| RESET
* Q4 |7 10| IP (Input pulses)
* VSS |8 9| Q1
* +--------------+
*/
register_subalias("1", sub.m_Q[11]);
register_subalias("2", sub.m_Q[12]);
register_subalias("3", sub.m_Q[13]);
register_subalias("4", sub.m_Q[5]);
register_subalias("5", sub.m_Q[4]);
register_subalias("6", sub.m_Q[6]);
register_subalias("7", sub.m_Q[3]);
register_subalias("8", m_supply.m_vss);
register_subalias("9", sub.m_Q[0]);
register_subalias("10", sub.m_IP);
register_subalias("11", m_RESET);
register_subalias("12", sub.m_Q[8]);
register_subalias("13", sub.m_Q[7]);
register_subalias("14", sub.m_Q[9]);
register_subalias("15", sub.m_Q[10]);
register_subalias("16", m_supply.m_vdd);
}
NETLIB_UPDATE(CD4020_DIP)
{
NETLIB_NAME(CD4020)::update();
}
NETLIB_RESET(CD4020_DIP)
{
NETLIB_NAME(CD4020)::reset();
}
NETLIB_NAMESPACE_DEVICES_END()

View File

@ -38,12 +38,9 @@
NET_CONNECT(_name, VDD, _VDD) \
NET_CONNECT(_name, VSS, _VSS)
#define CD4020(_name, _IP, _RESET, _VDD, _VSS) \
#define CD4020(_name) \
NET_REGISTER_DEV(CD4020, _name)
#define CD4020_DIP(_name) \
NET_REGISTER_DEV(CD4020_DIP, _name)
NETLIB_NAMESPACE_DEVICES_START()
NETLIB_SUBDEVICE(CD4020_sub,
@ -65,8 +62,6 @@ NETLIB_DEVICE(CD4020,
logic_input_t m_RESET;
);
NETLIB_DEVICE_DERIVED_PURE(CD4020_DIP, CD4020);
NETLIB_NAMESPACE_DEVICES_END()
#endif /* NLD_4020_H_ */

View File

@ -2,6 +2,7 @@
#include "CD4XXX.h"
#include "devices/nld_truthtable.h"
#include "devices/nld_system.h"
#include "devices/nld_4020.h"
/*
* CD4001BC: Quad 2-Input NOR Buffered B Series Gate
@ -40,6 +41,45 @@ NETLIST_START(CD4001_DIP)
NETLIST_END()
/* CD4020: 14-Stage Ripple Carry Binary Counters
*
* +--------------+
* Q12 |1 ++ 16| VDD
* Q13 |2 15| Q11
* Q14 |3 14| Q10
* Q6 |4 4020 13| Q8
* Q5 |5 12| Q9
* Q7 |6 11| RESET
* Q4 |7 10| IP (Input pulses)
* VSS |8 9| Q1
* +--------------+
*
* Naming conventions follow Texas Instruments datasheet
*
* FIXME: Timing depends on VDD-VSS
* This needs a cmos d-a/a-d proxy implementation.
*/
NETLIST_START(CD4020_DIP)
CD4020(s1)
DIPPINS( /* +--------------+ */
s1.Q12, /* Q12 |1 ++ 16| VDD */ s1.VDD,
s1.Q13, /* Q13 |2 15| Q11 */ s1.Q11,
s1.Q14, /* Q14 |3 14| Q10 */ s1.Q10,
s1.Q6, /* Q6 |4 4020 13| Q8 */ s1.Q8,
s1.Q5, /* Q5 |5 12| Q9 */ s1.Q9,
s1.Q7, /* Q7 |6 11| RESET */ s1.RESET,
s1.Q4, /* Q4 |7 10| IP */ s1.IP,
s1.VSS, /* VSS |8 9| Q1 */ s1.Q1
/* +--------------+ */
)
/*
* IP = (Input pulses)
*/
NETLIST_END()
NETLIST_START(CD4XXX_lib)
TRUTHTABLE_START(CD4001_NOR, 2, 1, 0, "")
TT_HEAD("A , B | Q ")
@ -51,4 +91,7 @@ NETLIST_START(CD4XXX_lib)
LOCAL_LIB_ENTRY(CD4001_DIP)
/* DIP ONLY */
LOCAL_LIB_ENTRY(CD4020_DIP)
NETLIST_END()

View File

@ -15,6 +15,13 @@
#define CD4001_DIP(_name) \
NET_REGISTER_DEV_X(CD4001_DIP, _name)
/* ----------------------------------------------------------------------------
* DIP only macros
* ---------------------------------------------------------------------------*/
#define CD4020_DIP(_name) \
NET_REGISTER_DEV(CD4020_DIP, _name)
/* ----------------------------------------------------------------------------
* External declarations
* ---------------------------------------------------------------------------*/