mirror of
https://github.com/holub/mame
synced 2025-05-07 23:02:33 +03:00
Modernization of drivers part 25 (no whatsnew)
This commit is contained in:
parent
85a6b693d2
commit
d76ec3b040
@ -121,6 +121,11 @@ public:
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virtual void palette_init();
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UINT32 screen_update_cyclemb(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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UINT32 screen_update_skydest(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void cyclemb_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void cyclemb_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void skydest_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void skydest_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void skydest_i8741_reset();
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};
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@ -157,30 +162,27 @@ void cyclemb_state::video_start()
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{
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}
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static void cyclemb_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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void cyclemb_state::cyclemb_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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cyclemb_state *state = screen.machine().driver_data<cyclemb_state>();
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gfx_element *gfx = screen.machine().gfx[0];
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int x,y,count;
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UINT8 flip_screen = state->flip_screen();
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count = 0;
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for (y=0;y<32;y++)
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{
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for (x=0;x<64;x++)
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{
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int attr = state->m_cram[count];
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int tile = (state->m_vram[count]) | ((attr & 3)<<8);
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int attr = m_cram[count];
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int tile = (m_vram[count]) | ((attr & 3)<<8);
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int color = ((attr & 0xf8) >> 3) ^ 0x1f;
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int odd_line = y & 1 ? 0x40 : 0x00;
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// int sx_offs = flip_screen ? 512 : 0
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int scrollx = ((state->m_vram[(y/2)+odd_line]) + (state->m_cram[(y/2)+odd_line]<<8) + 48) & 0x1ff;
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// int sx_offs = flip_screen() ? 512 : 0
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int scrollx = ((m_vram[(y/2)+odd_line]) + (m_cram[(y/2)+odd_line]<<8) + 48) & 0x1ff;
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if(!(attr & 4))
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color += 0x20;//screen.machine().rand();
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if(flip_screen)
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if(flip_screen())
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{
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drawgfx_opaque(bitmap,cliprect,gfx,tile,color,1,1,512-(x*8)-scrollx,256-(y*8));
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/* wrap-around */
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@ -209,10 +211,8 @@ static void cyclemb_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, co
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bank 3
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---- ---x [1] sprite enable flag?
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*/
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static void cyclemb_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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void cyclemb_state::cyclemb_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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cyclemb_state *state = screen.machine().driver_data<cyclemb_state>();
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UINT8 flip_screen = state->flip_screen();
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UINT8 col,fx,fy,region;
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UINT16 spr_offs,i;
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INT16 x,y;
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@ -228,27 +228,27 @@ static void cyclemb_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, co
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for(i=0;i<0x40;i+=2)
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{
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y = 0xf1 - state->m_obj2_ram[i];
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x = state->m_obj2_ram[i+1] - 56;
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spr_offs = (state->m_obj1_ram[i+0]);
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spr_offs += ((state->m_obj3_ram[i+0] & 3) << 8);
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col = (state->m_obj1_ram[i+1] & 0x3f);
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region = ((state->m_obj3_ram[i] & 0x10) >> 4) + 1;
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y = 0xf1 - m_obj2_ram[i];
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x = m_obj2_ram[i+1] - 56;
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spr_offs = (m_obj1_ram[i+0]);
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spr_offs += ((m_obj3_ram[i+0] & 3) << 8);
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col = (m_obj1_ram[i+1] & 0x3f);
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region = ((m_obj3_ram[i] & 0x10) >> 4) + 1;
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if(region == 2)
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{
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spr_offs >>= 2;
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//spr_offs += ((state->m_obj3_ram[i+0] & 3) << 5);
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//spr_offs += ((m_obj3_ram[i+0] & 3) << 5);
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y-=16;
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}
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if(state->m_obj3_ram[i+1] & 1)
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if(m_obj3_ram[i+1] & 1)
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x+=256;
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//if(state->m_obj3_ram[i+1] & 2)
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//if(m_obj3_ram[i+1] & 2)
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// x-=256;
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fx = (state->m_obj3_ram[i+0] & 4) >> 2;
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fy = (state->m_obj3_ram[i+0] & 8) >> 3;
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fx = (m_obj3_ram[i+0] & 4) >> 2;
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fy = (m_obj3_ram[i+0] & 8) >> 3;
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if(flip_screen)
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if(flip_screen())
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{
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fx = !fx;
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fy = !fy;
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@ -258,12 +258,10 @@ static void cyclemb_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, co
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}
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static void skydest_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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void cyclemb_state::skydest_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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cyclemb_state *state = screen.machine().driver_data<cyclemb_state>();
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gfx_element *gfx = screen.machine().gfx[0];
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int x,y;
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//UINT8 flip_screen = state->flip_screen();
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for (y=0;y<32;y++)
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@ -272,13 +270,13 @@ static void skydest_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, co
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{
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/* upper bits of the first address of cram seems to be related to colour cycling */
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int attr = state->m_cram[x+y*64];
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int tile = (state->m_vram[x+y*64]) | ((attr & 3)<<8);
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int attr = m_cram[x+y*64];
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int tile = (m_vram[x+y*64]) | ((attr & 3)<<8);
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int color = ((attr & 0xfc) >> 2);
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int scrollx = state->m_vram[0*64+0];
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scrollx |= (state->m_cram[0*64+0] & 0x01)<<8;
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int scrollx = m_vram[0*64+0];
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scrollx |= (m_cram[0*64+0] & 0x01)<<8;
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int cycle = (state->m_cram[0*64+0] & 0xf0)>>4;
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int cycle = (m_cram[0*64+0] & 0xf0)>>4;
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color ^= 0x3f;
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// hardcoded to thie palette bit?
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@ -288,9 +286,9 @@ static void skydest_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, co
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int scrolly;
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if (x<32)
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scrolly = state->m_vram[(x)*64+0];
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scrolly = m_vram[(x)*64+0];
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else
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scrolly = state->m_vram[(x-32)*64+1];
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scrolly = m_vram[(x-32)*64+1];
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drawgfx_opaque(bitmap,cliprect,gfx,tile,color,0,0,x*8+scrollx,((y*8)-scrolly)&0xff);
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@ -313,42 +311,40 @@ static void skydest_draw_tilemap(screen_device &screen, bitmap_ind16 &bitmap, co
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---- ---x [1] sprite enable flag?
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*/
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static void skydest_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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void cyclemb_state::skydest_draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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cyclemb_state *state = screen.machine().driver_data<cyclemb_state>();
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UINT8 flip_screen = state->flip_screen();
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UINT8 col,fx,fy,region;
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UINT16 spr_offs,i;
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INT16 x,y;
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// popmessage("%d %d",state->m_obj2_ram[0x0d], 0xf1 - state->m_obj2_ram[0x0c+1] + 68);
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// popmessage("%d %d",m_obj2_ram[0x0d], 0xf1 - m_obj2_ram[0x0c+1] + 68);
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for(i=0;i<0x80;i+=2)
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{
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y = state->m_obj2_ram[i] - 1;
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x = state->m_obj2_ram[i+1];
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y = m_obj2_ram[i] - 1;
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x = m_obj2_ram[i+1];
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if(state->m_obj3_ram[i+1] & 1)
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if(m_obj3_ram[i+1] & 1)
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x |= 0x100;
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x = 0x138 - x;
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spr_offs = (state->m_obj1_ram[i+0]);
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spr_offs += ((state->m_obj3_ram[i+0] & 3) << 8);
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col = (state->m_obj1_ram[i+1] & 0x3f);
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region = ((state->m_obj3_ram[i] & 0x10) >> 4) + 1;
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spr_offs = (m_obj1_ram[i+0]);
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spr_offs += ((m_obj3_ram[i+0] & 3) << 8);
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col = (m_obj1_ram[i+1] & 0x3f);
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region = ((m_obj3_ram[i] & 0x10) >> 4) + 1;
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if(region == 2)
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{
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spr_offs >>= 2;
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// spr_offs += ((state->m_obj3_ram[i+0] & 3) << 5);
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// spr_offs += ((m_obj3_ram[i+0] & 3) << 5);
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x-=16;
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}
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fx = (state->m_obj3_ram[i+0] & 4) >> 2;
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fy = (state->m_obj3_ram[i+0] & 8) >> 3;
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fx = (m_obj3_ram[i+0] & 4) >> 2;
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fy = (m_obj3_ram[i+0] & 8) >> 3;
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if(flip_screen)
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if(flip_screen())
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{
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fx = !fx;
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fy = !fy;
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@ -407,15 +403,14 @@ WRITE8_MEMBER(cyclemb_state::cyclemb_flip_w)
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// a bunch of other things are setted here
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}
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static void skydest_i8741_reset(running_machine &machine)
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void cyclemb_state::skydest_i8741_reset()
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{
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cyclemb_state *state = machine.driver_data<cyclemb_state>();
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state->m_mcu[0].rxd = 0;
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state->m_mcu[0].txd = 0;
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state->m_mcu[0].rst = 0;
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state->m_mcu[0].state = 0;
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state->m_mcu[0].packet_type = 0;
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m_mcu[0].rxd = 0;
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m_mcu[0].txd = 0;
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m_mcu[0].rst = 0;
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m_mcu[0].state = 0;
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m_mcu[0].packet_type = 0;
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}
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READ8_MEMBER( cyclemb_state::skydest_i8741_0_r )
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@ -595,7 +590,7 @@ ADDRESS_MAP_END
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void cyclemb_state::machine_reset()
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{
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skydest_i8741_reset(machine());
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skydest_i8741_reset();
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}
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@ -351,6 +351,7 @@ public:
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virtual void palette_init();
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UINT32 screen_update_dwarfd(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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TIMER_DEVICE_CALLBACK_MEMBER(dwarfd_interrupt);
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void drawCrt( bitmap_rgb32 &bitmap,const rectangle &cliprect );
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};
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@ -783,9 +784,8 @@ void dwarfd_state::video_start()
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{
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}
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static void drawCrt( running_machine &machine, bitmap_rgb32 &bitmap,const rectangle &cliprect )
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void dwarfd_state::drawCrt( bitmap_rgb32 &bitmap,const rectangle &cliprect )
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{
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dwarfd_state *state = machine.driver_data<dwarfd_state>();
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int x, y;
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for (y = 0; y < maxy; y++)
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{
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@ -804,7 +804,7 @@ static void drawCrt( running_machine &machine, bitmap_rgb32 &bitmap,const rectan
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while (b == 0)
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{
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if (count < 0x8000)
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tile = state->m_videobuf[count++];
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tile = m_videobuf[count++];
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else
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return;
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@ -823,19 +823,19 @@ static void drawCrt( running_machine &machine, bitmap_rgb32 &bitmap,const rectan
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}
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if ((tile & 0xc0) == 0x80)
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{
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state->m_bank = (tile >> 2) & 3;
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m_bank = (tile >> 2) & 3;
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}
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if ((tile & 0xc0) == 0xc0)
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{
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b = 1;
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tile = machine.rand() & 0x7f;//(tile >> 2) & 0xf;
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tile = machine().rand() & 0x7f;//(tile >> 2) & 0xf;
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}
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}
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else
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b = 1;
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}
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drawgfx_transpen(bitmap, cliprect, machine.gfx[0],
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tile + (state->m_bank + bank2) * 128,
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drawgfx_transpen(bitmap, cliprect, machine().gfx[0],
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tile + (m_bank + bank2) * 128,
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0,
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0, 0,
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x*8,y*8,0);
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@ -847,7 +847,7 @@ static void drawCrt( running_machine &machine, bitmap_rgb32 &bitmap,const rectan
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UINT32 dwarfd_state::screen_update_dwarfd(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
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{
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bitmap.fill(get_black_pen(machine()), cliprect);
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drawCrt(machine(), bitmap, cliprect);
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drawCrt(bitmap, cliprect);
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return 0;
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}
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@ -269,6 +269,13 @@ public:
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TIMER_CALLBACK_MEMBER(blitter_reset);
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TIMER_DEVICE_CALLBACK_MEMBER(halleys_scanline);
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TIMER_DEVICE_CALLBACK_MEMBER(benberob_scanline);
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void halleys_decode_rgb(UINT32 *r, UINT32 *g, UINT32 *b, int addr, int data);
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void copy_scroll_op(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy);
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void copy_scroll_xp(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy);
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void copy_fixed_xp(bitmap_ind16 &bitmap, UINT16 *source);
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void copy_fixed_2b(bitmap_ind16 &bitmap, UINT16 *source);
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void filter_bitmap(bitmap_ind16 &bitmap, int mask);
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void init_common();
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};
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@ -1159,14 +1166,13 @@ void halleys_state::palette_init()
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}
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}
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static void halleys_decode_rgb(running_machine &machine, UINT32 *r, UINT32 *g, UINT32 *b, int addr, int data)
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void halleys_state::halleys_decode_rgb(UINT32 *r, UINT32 *g, UINT32 *b, int addr, int data)
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{
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/*
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proms contain:
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00 00 00 00 c5 0b f3 17 fd cf 1f ef df bf 7f ff
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00 00 00 00 01 61 29 26 0b f5 e2 17 57 fb cf f7
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*/
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halleys_state *state = machine.driver_data<halleys_state>();
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int latch1_273, latch2_273;
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UINT8 *sram_189;
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UINT8 *prom_6330;
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@ -1174,10 +1180,10 @@ static void halleys_decode_rgb(running_machine &machine, UINT32 *r, UINT32 *g, U
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int bit0, bit1, bit2, bit3, bit4;
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// the four 16x4-bit SN74S189 SRAM chips are assumed be the game's 32-byte palette RAM
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sram_189 = state->m_generic_paletteram_8;
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sram_189 = m_generic_paletteram_8;
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// each of the three 32-byte 6330 PROM is wired to an RGB component output
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prom_6330 = state->memregion("proms")->base();
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prom_6330 = memregion("proms")->base();
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// latch1 holds 8 bits from the selected palette RAM address
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latch1_273 = sram_189[addr];
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@ -1229,7 +1235,7 @@ WRITE8_MEMBER(halleys_state::halleys_paletteram_IIRRGGBB_w)
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palette_set_color(machine(), offset+SP_ALPHA, MAKE_RGB(r, g, b));
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palette_set_color(machine(), offset+SP_COLLD, MAKE_RGB(r, g, b));
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halleys_decode_rgb(machine(), &r, &g, &b, offset, 0);
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halleys_decode_rgb(&r, &g, &b, offset, 0);
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palette_set_color(machine(), offset+0x20, MAKE_RGB(r, g, b));
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}
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@ -1263,7 +1269,7 @@ void halleys_state::video_start()
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}
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static void copy_scroll_op(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy)
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void halleys_state::copy_scroll_op(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy)
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{
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//--------------------------------------------------------------------------
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@ -1300,7 +1306,7 @@ static void copy_scroll_op(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy)
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}
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static void copy_scroll_xp(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy)
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void halleys_state::copy_scroll_xp(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy)
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{
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//--------------------------------------------------------------------------
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@ -1358,7 +1364,7 @@ static void copy_scroll_xp(bitmap_ind16 &bitmap, UINT16 *source, int sx, int sy)
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static void copy_fixed_xp(bitmap_ind16 &bitmap, UINT16 *source)
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void halleys_state::copy_fixed_xp(bitmap_ind16 &bitmap, UINT16 *source)
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{
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UINT16 *esi, *edi;
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int dst_pitch, ecx, edx;
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@ -1393,7 +1399,7 @@ static void copy_fixed_xp(bitmap_ind16 &bitmap, UINT16 *source)
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}
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static void copy_fixed_2b(bitmap_ind16 &bitmap, UINT16 *source)
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void halleys_state::copy_fixed_2b(bitmap_ind16 &bitmap, UINT16 *source)
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{
|
||||
UINT16 *esi, *edi;
|
||||
int dst_pitch, ecx, edx;
|
||||
@ -1440,15 +1446,14 @@ static void copy_fixed_2b(bitmap_ind16 &bitmap, UINT16 *source)
|
||||
}
|
||||
|
||||
|
||||
static void filter_bitmap(running_machine &machine, bitmap_ind16 &bitmap, int mask)
|
||||
void halleys_state::filter_bitmap(bitmap_ind16 &bitmap, int mask)
|
||||
{
|
||||
halleys_state *state = machine.driver_data<halleys_state>();
|
||||
int dst_pitch;
|
||||
|
||||
UINT32 *pal_ptr, *edi;
|
||||
int esi, eax, ebx, ecx, edx;
|
||||
|
||||
pal_ptr = state->m_internal_palette;
|
||||
pal_ptr = m_internal_palette;
|
||||
esi = mask | 0xffffff00;
|
||||
edi = (UINT32*)&bitmap.pix16(VIS_MINY, VIS_MINX + CLIP_W);
|
||||
dst_pitch = bitmap.rowpixels() >> 1;
|
||||
@ -1504,7 +1509,7 @@ UINT32 halleys_state::screen_update_halleys(screen_device &screen, bitmap_ind16
|
||||
// HALF-HACK: apply RGB filter when the following conditions are met
|
||||
i = m_io_ram[0xa0];
|
||||
j = m_io_ram[0xa1];
|
||||
if (m_io_ram[0x2b] && (i>0xc6 && i<0xfe) && (j==0xc0 || j==0xed)) filter_bitmap(machine(), bitmap, i);
|
||||
if (m_io_ram[0x2b] && (i>0xc6 && i<0xfe) && (j==0xc0 || j==0xed)) filter_bitmap(bitmap, i);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -2148,44 +2153,43 @@ ROM_END
|
||||
//**************************************************************************
|
||||
// Driver Initializations
|
||||
|
||||
static void init_common(running_machine &machine)
|
||||
void halleys_state::init_common()
|
||||
{
|
||||
halleys_state *state = machine.driver_data<halleys_state>();
|
||||
UINT8 *buf, *rom;
|
||||
int addr, i;
|
||||
UINT8 al, ah, dl, dh;
|
||||
|
||||
|
||||
// allocate memory for unpacked graphics
|
||||
buf = auto_alloc_array(machine, UINT8, 0x100000);
|
||||
state->m_gfx_plane02 = buf;
|
||||
state->m_gfx_plane13 = buf + 0x80000;
|
||||
buf = auto_alloc_array(machine(), UINT8, 0x100000);
|
||||
m_gfx_plane02 = buf;
|
||||
m_gfx_plane13 = buf + 0x80000;
|
||||
|
||||
|
||||
// allocate memory for render layers
|
||||
buf = auto_alloc_array(machine, UINT8, SCREEN_BYTESIZE * MAX_LAYERS);
|
||||
for (i=0; i<MAX_LAYERS; buf+=SCREEN_BYTESIZE, i++) state->m_render_layer[i] = (UINT16*)buf;
|
||||
buf = auto_alloc_array(machine(), UINT8, SCREEN_BYTESIZE * MAX_LAYERS);
|
||||
for (i=0; i<MAX_LAYERS; buf+=SCREEN_BYTESIZE, i++) m_render_layer[i] = (UINT16*)buf;
|
||||
|
||||
|
||||
// allocate memory for pre-processed ROMs
|
||||
state->m_gfx1_base = auto_alloc_array(machine, UINT8, 0x20000);
|
||||
m_gfx1_base = auto_alloc_array(machine(), UINT8, 0x20000);
|
||||
|
||||
|
||||
// allocate memory for alpha table
|
||||
state->m_alpha_table = auto_alloc_array(machine, UINT32, 0x10000);
|
||||
m_alpha_table = auto_alloc_array(machine(), UINT32, 0x10000);
|
||||
|
||||
|
||||
// allocate memory for internal palette
|
||||
state->m_internal_palette = auto_alloc_array(machine, UINT32, PALETTE_SIZE);
|
||||
m_internal_palette = auto_alloc_array(machine(), UINT32, PALETTE_SIZE);
|
||||
|
||||
|
||||
// allocate memory for hardware collision list
|
||||
state->m_collision_list = auto_alloc_array(machine, UINT8, MAX_SPRITES);
|
||||
m_collision_list = auto_alloc_array(machine(), UINT8, MAX_SPRITES);
|
||||
|
||||
|
||||
// decrypt main program ROM
|
||||
rom = state->m_cpu1_base = state->memregion("maincpu")->base();
|
||||
buf = state->m_gfx1_base;
|
||||
rom = m_cpu1_base = memregion("maincpu")->base();
|
||||
buf = m_gfx1_base;
|
||||
|
||||
for (i=0; i<0x10000; i++)
|
||||
{
|
||||
@ -2197,15 +2201,15 @@ static void init_common(running_machine &machine)
|
||||
|
||||
|
||||
// swap graphics ROM addresses and unpack each pixel
|
||||
rom = machine.root_device().memregion("gfx1")->base();
|
||||
buf = state->m_gfx_plane02;
|
||||
rom = memregion("gfx1")->base();
|
||||
buf = m_gfx_plane02;
|
||||
|
||||
for (i=0xffff; i>=0; i--)
|
||||
{
|
||||
al = rom[i];
|
||||
ah = rom[i+0x10000];
|
||||
state->m_gfx1_base[0xffff-i] = al;
|
||||
state->m_gfx1_base[0x1ffff-i] = ah;
|
||||
m_gfx1_base[0xffff-i] = al;
|
||||
m_gfx1_base[0x1ffff-i] = ah;
|
||||
|
||||
buf[0] = dl = (al & 1) | (ah<<2 & 4); dl <<= 1;
|
||||
buf[1] = dh = (al>>1 & 1) | (ah<<1 & 4); dh <<= 1;
|
||||
@ -2233,7 +2237,7 @@ DRIVER_INIT_MEMBER(halleys_state,benberob)
|
||||
{
|
||||
m_game_id = GAME_BENBEROB;
|
||||
|
||||
init_common(machine());
|
||||
init_common();
|
||||
|
||||
m_blitter_reset_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(halleys_state::blitter_reset),this));
|
||||
}
|
||||
@ -2244,7 +2248,7 @@ DRIVER_INIT_MEMBER(halleys_state,halleys)
|
||||
m_game_id = GAME_HALLEYS;
|
||||
m_collision_detection = 0xb114;
|
||||
|
||||
init_common(machine());
|
||||
init_common();
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(halleys_state,halley87)
|
||||
@ -2252,7 +2256,7 @@ DRIVER_INIT_MEMBER(halleys_state,halley87)
|
||||
m_game_id = GAME_HALLEYS;
|
||||
m_collision_detection = 0xb10d;
|
||||
|
||||
init_common(machine());
|
||||
init_common();
|
||||
}
|
||||
|
||||
|
||||
|
@ -207,6 +207,16 @@ public:
|
||||
UINT32 screen_update_jalmah(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
UINT32 screen_update_urashima(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(jalmah_mcu_sim);
|
||||
void jalmah_priority_system();
|
||||
void draw_sc0_layer(bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void draw_sc1_layer(bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void draw_sc2_layer(bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void draw_sc3_layer(bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void daireika_palette_dma(UINT16 val);
|
||||
void daireika_mcu_run();
|
||||
void mjzoomin_mcu_run();
|
||||
void urashima_mcu_run();
|
||||
void second_mcu_run();
|
||||
};
|
||||
|
||||
|
||||
@ -366,76 +376,71 @@ etc.)
|
||||
In the end the final results always are one bit assigned to each priority (i.e. most
|
||||
priority = 8, then 4, 2 and finally 1).
|
||||
***************************************************************************************/
|
||||
static void jalmah_priority_system(running_machine &machine)
|
||||
void jalmah_state::jalmah_priority_system()
|
||||
{
|
||||
jalmah_state *state = machine.driver_data<jalmah_state>();
|
||||
UINT8 *pri_rom = state->memregion("user1")->base();
|
||||
UINT8 *pri_rom = memregion("user1")->base();
|
||||
UINT8 i;
|
||||
UINT8 prinum[0x10];
|
||||
|
||||
state->m_sc0_prin = 0;
|
||||
state->m_sc1_prin = 0;
|
||||
state->m_sc2_prin = 0;
|
||||
state->m_sc3_prin = 0;
|
||||
m_sc0_prin = 0;
|
||||
m_sc1_prin = 0;
|
||||
m_sc2_prin = 0;
|
||||
m_sc3_prin = 0;
|
||||
|
||||
for(i=0;i<0x10;i++)
|
||||
{
|
||||
prinum[i] = pri_rom[i+state->m_pri*0x10];
|
||||
prinum[i] = pri_rom[i+m_pri*0x10];
|
||||
|
||||
if(prinum[i] == 0) { state->m_sc0_prin++; }
|
||||
if(prinum[i] == 1) { state->m_sc1_prin++; }
|
||||
if(prinum[i] == 2) { state->m_sc2_prin++; }
|
||||
if(prinum[i] == 3) { state->m_sc3_prin++; }
|
||||
if(prinum[i] == 0) { m_sc0_prin++; }
|
||||
if(prinum[i] == 1) { m_sc1_prin++; }
|
||||
if(prinum[i] == 2) { m_sc2_prin++; }
|
||||
if(prinum[i] == 3) { m_sc3_prin++; }
|
||||
}
|
||||
|
||||
//popmessage("%02x %02x %02x %02x",state->m_sc0_prin,state->m_sc1_prin,state->m_sc2_prin,state->m_sc3_prin);
|
||||
//popmessage("%02x %02x %02x %02x",m_sc0_prin,m_sc1_prin,m_sc2_prin,m_sc3_prin);
|
||||
}
|
||||
|
||||
static void draw_sc0_layer(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
void jalmah_state::draw_sc0_layer(bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
jalmah_state *state = machine.driver_data<jalmah_state>();
|
||||
switch(state->m_jm_vregs[0] & 3)
|
||||
switch(m_jm_vregs[0] & 3)
|
||||
{
|
||||
case 0: state->m_sc0_tilemap_0->draw(bitmap, cliprect, 0,0); break;
|
||||
case 1: state->m_sc0_tilemap_1->draw(bitmap, cliprect, 0,0); break;
|
||||
case 2: state->m_sc0_tilemap_2->draw(bitmap, cliprect, 0,0); break;
|
||||
case 3: state->m_sc0_tilemap_3->draw(bitmap, cliprect, 0,0); break;
|
||||
case 0: m_sc0_tilemap_0->draw(bitmap, cliprect, 0,0); break;
|
||||
case 1: m_sc0_tilemap_1->draw(bitmap, cliprect, 0,0); break;
|
||||
case 2: m_sc0_tilemap_2->draw(bitmap, cliprect, 0,0); break;
|
||||
case 3: m_sc0_tilemap_3->draw(bitmap, cliprect, 0,0); break;
|
||||
}
|
||||
}
|
||||
|
||||
static void draw_sc1_layer(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
void jalmah_state::draw_sc1_layer(bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
jalmah_state *state = machine.driver_data<jalmah_state>();
|
||||
switch(state->m_jm_vregs[1] & 3)
|
||||
switch(m_jm_vregs[1] & 3)
|
||||
{
|
||||
case 0: state->m_sc1_tilemap_0->draw(bitmap, cliprect, 0,0); break;
|
||||
case 1: state->m_sc1_tilemap_1->draw(bitmap, cliprect, 0,0); break;
|
||||
case 2: state->m_sc1_tilemap_2->draw(bitmap, cliprect, 0,0); break;
|
||||
case 3: state->m_sc1_tilemap_3->draw(bitmap, cliprect, 0,0); break;
|
||||
case 0: m_sc1_tilemap_0->draw(bitmap, cliprect, 0,0); break;
|
||||
case 1: m_sc1_tilemap_1->draw(bitmap, cliprect, 0,0); break;
|
||||
case 2: m_sc1_tilemap_2->draw(bitmap, cliprect, 0,0); break;
|
||||
case 3: m_sc1_tilemap_3->draw(bitmap, cliprect, 0,0); break;
|
||||
}
|
||||
}
|
||||
|
||||
static void draw_sc2_layer(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
void jalmah_state::draw_sc2_layer(bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
jalmah_state *state = machine.driver_data<jalmah_state>();
|
||||
switch(state->m_jm_vregs[2] & 3)
|
||||
switch(m_jm_vregs[2] & 3)
|
||||
{
|
||||
case 0: state->m_sc2_tilemap_0->draw(bitmap, cliprect, 0,0); break;
|
||||
case 1: state->m_sc2_tilemap_1->draw(bitmap, cliprect, 0,0); break;
|
||||
case 2: state->m_sc2_tilemap_2->draw(bitmap, cliprect, 0,0); break;
|
||||
case 3: state->m_sc2_tilemap_3->draw(bitmap, cliprect, 0,0); break;
|
||||
case 0: m_sc2_tilemap_0->draw(bitmap, cliprect, 0,0); break;
|
||||
case 1: m_sc2_tilemap_1->draw(bitmap, cliprect, 0,0); break;
|
||||
case 2: m_sc2_tilemap_2->draw(bitmap, cliprect, 0,0); break;
|
||||
case 3: m_sc2_tilemap_3->draw(bitmap, cliprect, 0,0); break;
|
||||
}
|
||||
}
|
||||
|
||||
static void draw_sc3_layer(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
void jalmah_state::draw_sc3_layer(bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
jalmah_state *state = machine.driver_data<jalmah_state>();
|
||||
switch(state->m_jm_vregs[3] & 3)
|
||||
switch(m_jm_vregs[3] & 3)
|
||||
{
|
||||
case 0:
|
||||
case 1: state->m_sc3_tilemap_0->draw(bitmap, cliprect, 0,0); break;
|
||||
case 2: state->m_sc3_tilemap_2->draw(bitmap, cliprect, 0,0); break;
|
||||
case 3: state->m_sc3_tilemap_3->draw(bitmap, cliprect, 0,0); break;
|
||||
case 1: m_sc3_tilemap_0->draw(bitmap, cliprect, 0,0); break;
|
||||
case 2: m_sc3_tilemap_2->draw(bitmap, cliprect, 0,0); break;
|
||||
case 3: m_sc3_tilemap_3->draw(bitmap, cliprect, 0,0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -443,7 +448,7 @@ UINT32 jalmah_state::screen_update_jalmah(screen_device &screen, bitmap_ind16 &b
|
||||
{
|
||||
UINT16 *jm_scrollram = m_jm_scrollram;
|
||||
UINT8 cur_prin;
|
||||
jalmah_priority_system(machine());
|
||||
jalmah_priority_system();
|
||||
|
||||
m_sc0_tilemap_0->set_scrollx(0, jm_scrollram[0] & 0xfff);
|
||||
m_sc0_tilemap_1->set_scrollx(0, jm_scrollram[0] & 0x7ff);
|
||||
@ -490,10 +495,10 @@ UINT32 jalmah_state::screen_update_jalmah(screen_device &screen, bitmap_ind16 &b
|
||||
|
||||
for(cur_prin=1;cur_prin<=0x8;cur_prin<<=1)
|
||||
{
|
||||
if(cur_prin==m_sc0_prin) { draw_sc0_layer(machine(),bitmap,cliprect); }
|
||||
if(cur_prin==m_sc1_prin) { draw_sc1_layer(machine(),bitmap,cliprect); }
|
||||
if(cur_prin==m_sc2_prin) { draw_sc2_layer(machine(),bitmap,cliprect); }
|
||||
if(cur_prin==m_sc3_prin) { draw_sc3_layer(machine(),bitmap,cliprect); }
|
||||
if(cur_prin==m_sc0_prin) { draw_sc0_layer(bitmap,cliprect); }
|
||||
if(cur_prin==m_sc1_prin) { draw_sc1_layer(bitmap,cliprect); }
|
||||
if(cur_prin==m_sc2_prin) { draw_sc2_layer(bitmap,cliprect); }
|
||||
if(cur_prin==m_sc3_prin) { draw_sc3_layer(bitmap,cliprect); }
|
||||
}
|
||||
|
||||
return 0;
|
||||
@ -712,7 +717,7 @@ xxxx ---- MCU program revision
|
||||
|
||||
|
||||
#define MCU_READ(tag, _bit_, _offset_, _retval_) \
|
||||
if((0xffff - machine.root_device().ioport(tag)->read()) & _bit_) { jm_shared_ram[_offset_] = _retval_; }
|
||||
if((0xffff - ioport(tag)->read()) & _bit_) { jm_shared_ram[_offset_] = _retval_; }
|
||||
|
||||
/*Funky "DMA" / protection thing*/
|
||||
/*---- -x-- "DMA" execute.*/
|
||||
@ -728,10 +733,9 @@ WRITE16_MEMBER(jalmah_state::urashima_dma_w)
|
||||
}
|
||||
|
||||
/*same as $f00c0 sub-routine,but with additional work-around,to remove from here...*/
|
||||
static void daireika_palette_dma(running_machine &machine, UINT16 val)
|
||||
void jalmah_state::daireika_palette_dma(UINT16 val)
|
||||
{
|
||||
//jalmah_state *state = machine.driver_data<jalmah_state>();
|
||||
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM);
|
||||
address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM);
|
||||
UINT32 index_1, index_2, src_addr, tmp_addr;
|
||||
/*a0=301c0+jm_shared_ram[0x540/2] & 0xf00 */
|
||||
/*a1=88000*/
|
||||
@ -750,25 +754,24 @@ static void daireika_palette_dma(running_machine &machine, UINT16 val)
|
||||
}
|
||||
|
||||
/*RAM-based protection handlings*/
|
||||
static void daireika_mcu_run(running_machine &machine)
|
||||
void jalmah_state::daireika_mcu_run()
|
||||
{
|
||||
jalmah_state *state = machine.driver_data<jalmah_state>();
|
||||
UINT16 *jm_shared_ram = state->m_jm_shared_ram;
|
||||
UINT16 *jm_shared_ram = m_jm_shared_ram;
|
||||
|
||||
if(((jm_shared_ram[0x550/2] & 0xf00) == 0x700) && ((jm_shared_ram[0x540/2] & 0xf00) != state->m_dma_old))
|
||||
if(((jm_shared_ram[0x550/2] & 0xf00) == 0x700) && ((jm_shared_ram[0x540/2] & 0xf00) != m_dma_old))
|
||||
{
|
||||
state->m_dma_old = jm_shared_ram[0x540/2] & 0xf00;
|
||||
daireika_palette_dma(machine,((jm_shared_ram[0x540/2] & 0x0f00) >> 8));
|
||||
m_dma_old = jm_shared_ram[0x540/2] & 0xf00;
|
||||
daireika_palette_dma(((jm_shared_ram[0x540/2] & 0x0f00) >> 8));
|
||||
}
|
||||
|
||||
if(state->m_test_mode) //service_mode
|
||||
if(m_test_mode) //service_mode
|
||||
{
|
||||
jm_shared_ram[0x000/2] = machine.root_device().ioport("KEY0")->read();
|
||||
jm_shared_ram[0x002/2] = machine.root_device().ioport("KEY1")->read();
|
||||
jm_shared_ram[0x004/2] = machine.root_device().ioport("KEY2")->read();
|
||||
jm_shared_ram[0x006/2] = machine.root_device().ioport("KEY3")->read();
|
||||
jm_shared_ram[0x008/2] = machine.root_device().ioport("KEY4")->read();
|
||||
jm_shared_ram[0x00a/2] = machine.root_device().ioport("KEY5")->read();
|
||||
jm_shared_ram[0x000/2] = ioport("KEY0")->read();
|
||||
jm_shared_ram[0x002/2] = ioport("KEY1")->read();
|
||||
jm_shared_ram[0x004/2] = ioport("KEY2")->read();
|
||||
jm_shared_ram[0x006/2] = ioport("KEY3")->read();
|
||||
jm_shared_ram[0x008/2] = ioport("KEY4")->read();
|
||||
jm_shared_ram[0x00a/2] = ioport("KEY5")->read();
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -795,24 +798,23 @@ static void daireika_mcu_run(running_machine &machine)
|
||||
MCU_READ("KEY1", 0x0002, 0x000/2, 0x13); /*CHI (trusted)*/
|
||||
MCU_READ("KEY0", 0x0004, 0x000/2, 0x14); /*START1*/
|
||||
}
|
||||
state->m_prg_prot++;
|
||||
if(state->m_prg_prot > 0x10) { state->m_prg_prot = 0; }
|
||||
jm_shared_ram[0x00e/2] = state->m_prg_prot;
|
||||
m_prg_prot++;
|
||||
if(m_prg_prot > 0x10) { m_prg_prot = 0; }
|
||||
jm_shared_ram[0x00e/2] = m_prg_prot;
|
||||
}
|
||||
|
||||
static void mjzoomin_mcu_run(running_machine &machine)
|
||||
void jalmah_state::mjzoomin_mcu_run()
|
||||
{
|
||||
jalmah_state *state = machine.driver_data<jalmah_state>();
|
||||
UINT16 *jm_shared_ram = state->m_jm_shared_ram;
|
||||
UINT16 *jm_shared_ram = m_jm_shared_ram;
|
||||
|
||||
if(state->m_test_mode) //service_mode
|
||||
if(m_test_mode) //service_mode
|
||||
{
|
||||
jm_shared_ram[0x000/2] = state->ioport("KEY0")->read();
|
||||
jm_shared_ram[0x002/2] = state->ioport("KEY1")->read();
|
||||
jm_shared_ram[0x004/2] = state->ioport("KEY2")->read();
|
||||
jm_shared_ram[0x006/2] = state->ioport("KEY3")->read();
|
||||
jm_shared_ram[0x008/2] = state->ioport("KEY4")->read();
|
||||
jm_shared_ram[0x00a/2] = state->ioport("KEY5")->read();
|
||||
jm_shared_ram[0x000/2] = ioport("KEY0")->read();
|
||||
jm_shared_ram[0x002/2] = ioport("KEY1")->read();
|
||||
jm_shared_ram[0x004/2] = ioport("KEY2")->read();
|
||||
jm_shared_ram[0x006/2] = ioport("KEY3")->read();
|
||||
jm_shared_ram[0x008/2] = ioport("KEY4")->read();
|
||||
jm_shared_ram[0x00a/2] = ioport("KEY5")->read();
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -839,25 +841,24 @@ static void mjzoomin_mcu_run(running_machine &machine)
|
||||
MCU_READ("KEY1", 0x0002, 0x000/2, 0x13); /*CHI (trusted)*/
|
||||
MCU_READ("KEY0", 0x0004, 0x000/2, 0x14); /*START1*/
|
||||
}
|
||||
jm_shared_ram[0x00c/2] = machine.rand() & 0xffff;
|
||||
state->m_prg_prot++;
|
||||
if(state->m_prg_prot > 0x10) { state->m_prg_prot = 0; }
|
||||
jm_shared_ram[0x00e/2] = state->m_prg_prot;
|
||||
jm_shared_ram[0x00c/2] = machine().rand() & 0xffff;
|
||||
m_prg_prot++;
|
||||
if(m_prg_prot > 0x10) { m_prg_prot = 0; }
|
||||
jm_shared_ram[0x00e/2] = m_prg_prot;
|
||||
}
|
||||
|
||||
static void urashima_mcu_run(running_machine &machine)
|
||||
void jalmah_state::urashima_mcu_run()
|
||||
{
|
||||
jalmah_state *state = machine.driver_data<jalmah_state>();
|
||||
UINT16 *jm_shared_ram = state->m_jm_shared_ram;
|
||||
UINT16 *jm_shared_ram = m_jm_shared_ram;
|
||||
|
||||
if(state->m_test_mode) //service_mode
|
||||
if(m_test_mode) //service_mode
|
||||
{
|
||||
jm_shared_ram[0x300/2] = state->ioport("KEY0")->read();
|
||||
jm_shared_ram[0x302/2] = state->ioport("KEY1")->read();
|
||||
jm_shared_ram[0x304/2] = state->ioport("KEY2")->read();
|
||||
jm_shared_ram[0x306/2] = state->ioport("KEY3")->read();
|
||||
jm_shared_ram[0x308/2] = state->ioport("KEY4")->read();
|
||||
jm_shared_ram[0x30a/2] = state->ioport("KEY5")->read();
|
||||
jm_shared_ram[0x300/2] = ioport("KEY0")->read();
|
||||
jm_shared_ram[0x302/2] = ioport("KEY1")->read();
|
||||
jm_shared_ram[0x304/2] = ioport("KEY2")->read();
|
||||
jm_shared_ram[0x306/2] = ioport("KEY3")->read();
|
||||
jm_shared_ram[0x308/2] = ioport("KEY4")->read();
|
||||
jm_shared_ram[0x30a/2] = ioport("KEY5")->read();
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -884,21 +885,20 @@ static void urashima_mcu_run(running_machine &machine)
|
||||
MCU_READ("KEY1", 0x0002, 0x300/2, 0x13); /*CHI (trusted)*/
|
||||
MCU_READ("KEY0", 0x0004, 0x300/2, 0x14); /*START1*/
|
||||
}
|
||||
jm_shared_ram[0x30c/2] = machine.rand() & 0xffff;
|
||||
state->m_prg_prot++;
|
||||
if(state->m_prg_prot > 0x10) { state->m_prg_prot = 0; }
|
||||
jm_shared_ram[0x30e/2] = state->m_prg_prot;
|
||||
jm_shared_ram[0x30c/2] = machine().rand() & 0xffff;
|
||||
m_prg_prot++;
|
||||
if(m_prg_prot > 0x10) { m_prg_prot = 0; }
|
||||
jm_shared_ram[0x30e/2] = m_prg_prot;
|
||||
}
|
||||
|
||||
static void second_mcu_run(running_machine &machine)
|
||||
void jalmah_state::second_mcu_run()
|
||||
{
|
||||
jalmah_state *state = machine.driver_data<jalmah_state>();
|
||||
UINT16 *jm_shared_ram = state->m_jm_shared_ram;
|
||||
if(state->m_test_mode) //service_mode
|
||||
UINT16 *jm_shared_ram = m_jm_shared_ram;
|
||||
if(m_test_mode) //service_mode
|
||||
{
|
||||
jm_shared_ram[0x200/2] = state->ioport("KEY0")->read();
|
||||
jm_shared_ram[0x202/2] = state->ioport("KEY1")->read();
|
||||
jm_shared_ram[0x204/2] = state->ioport("KEY2")->read();
|
||||
jm_shared_ram[0x200/2] = ioport("KEY0")->read();
|
||||
jm_shared_ram[0x202/2] = ioport("KEY1")->read();
|
||||
jm_shared_ram[0x204/2] = ioport("KEY2")->read();
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -927,7 +927,7 @@ static void second_mcu_run(running_machine &machine)
|
||||
|
||||
// MCU_READ("KEY0", 0x0004, 0x7b8/2, 0x03); /*START1(correct?) */
|
||||
}
|
||||
jm_shared_ram[0x20c/2] = machine.rand() & 0xffff; //kakumei2
|
||||
jm_shared_ram[0x20c/2] = machine().rand() & 0xffff; //kakumei2
|
||||
|
||||
}
|
||||
|
||||
@ -943,12 +943,12 @@ TIMER_DEVICE_CALLBACK_MEMBER(jalmah_state::jalmah_mcu_sim)
|
||||
#define KAKUMEI2_MCU (0x22)
|
||||
#define SUCHIPI_MCU (0x23)
|
||||
*/
|
||||
case MJZOOMIN_MCU: mjzoomin_mcu_run(machine()); break;
|
||||
case DAIREIKA_MCU: daireika_mcu_run(machine()); break;
|
||||
case URASHIMA_MCU: urashima_mcu_run(machine()); break;
|
||||
case MJZOOMIN_MCU: mjzoomin_mcu_run(); break;
|
||||
case DAIREIKA_MCU: daireika_mcu_run(); break;
|
||||
case URASHIMA_MCU: urashima_mcu_run(); break;
|
||||
case KAKUMEI_MCU:
|
||||
case KAKUMEI2_MCU:
|
||||
case SUCHIPI_MCU: second_mcu_run(machine()); break;
|
||||
case SUCHIPI_MCU: second_mcu_run(); break;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -91,6 +91,8 @@ public:
|
||||
DECLARE_MACHINE_RESET(common);
|
||||
UINT32 screen_update_jangou(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
TIMER_CALLBACK_MEMBER(cvsd_bit_timer_callback);
|
||||
UINT8 jangou_gfx_nibble( UINT16 niboffset );
|
||||
void plot_jangou_gfx_pixel( UINT8 pix, int x, int y );
|
||||
};
|
||||
|
||||
|
||||
@ -177,9 +179,9 @@ h [$16]
|
||||
w [$17]
|
||||
*/
|
||||
|
||||
static UINT8 jangou_gfx_nibble( running_machine &machine, UINT16 niboffset )
|
||||
UINT8 jangou_state::jangou_gfx_nibble( UINT16 niboffset )
|
||||
{
|
||||
const UINT8 *const blit_rom = machine.root_device().memregion("gfx")->base();
|
||||
const UINT8 *const blit_rom = memregion("gfx")->base();
|
||||
|
||||
if (niboffset & 1)
|
||||
return (blit_rom[(niboffset >> 1) & 0xffff] & 0xf0) >> 4;
|
||||
@ -187,18 +189,17 @@ static UINT8 jangou_gfx_nibble( running_machine &machine, UINT16 niboffset )
|
||||
return (blit_rom[(niboffset >> 1) & 0xffff] & 0x0f);
|
||||
}
|
||||
|
||||
static void plot_jangou_gfx_pixel( running_machine &machine, UINT8 pix, int x, int y )
|
||||
void jangou_state::plot_jangou_gfx_pixel( UINT8 pix, int x, int y )
|
||||
{
|
||||
jangou_state *state = machine.driver_data<jangou_state>();
|
||||
if (y < 0 || y >= 512)
|
||||
return;
|
||||
if (x < 0 || x >= 512)
|
||||
return;
|
||||
|
||||
if (x & 1)
|
||||
state->m_blit_buffer[(y * 256) + (x >> 1)] = (state->m_blit_buffer[(y * 256) + (x >> 1)] & 0x0f) | ((pix << 4) & 0xf0);
|
||||
m_blit_buffer[(y * 256) + (x >> 1)] = (m_blit_buffer[(y * 256) + (x >> 1)] & 0x0f) | ((pix << 4) & 0xf0);
|
||||
else
|
||||
state->m_blit_buffer[(y * 256) + (x >> 1)] = (state->m_blit_buffer[(y * 256) + (x >> 1)] & 0xf0) | (pix & 0x0f);
|
||||
m_blit_buffer[(y * 256) + (x >> 1)] = (m_blit_buffer[(y * 256) + (x >> 1)] & 0xf0) | (pix & 0x0f);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jangou_state::blitter_process_w)
|
||||
@ -233,14 +234,14 @@ WRITE8_MEMBER(jangou_state::blitter_process_w)
|
||||
{
|
||||
int drawx = (x + xcount) & 0xff;
|
||||
int drawy = (y + ycount) & 0xff;
|
||||
UINT8 dat = jangou_gfx_nibble(machine(), src + count);
|
||||
UINT8 dat = jangou_gfx_nibble(src + count);
|
||||
UINT8 cur_pen_hi = m_pen_data[(dat & 0xf0) >> 4];
|
||||
UINT8 cur_pen_lo = m_pen_data[(dat & 0x0f) >> 0];
|
||||
|
||||
dat = cur_pen_lo | (cur_pen_hi << 4);
|
||||
|
||||
if ((dat & 0xff) != 0)
|
||||
plot_jangou_gfx_pixel(machine(), dat, drawx, drawy);
|
||||
plot_jangou_gfx_pixel(dat, drawx, drawy);
|
||||
|
||||
if (!flipx)
|
||||
count--;
|
||||
|
@ -111,6 +111,7 @@ public:
|
||||
DECLARE_PALETTE_INIT(kingdrby);
|
||||
DECLARE_PALETTE_INIT(kingdrbb);
|
||||
UINT32 screen_update_kingdrby(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
};
|
||||
|
||||
|
||||
@ -183,10 +184,9 @@ static const UINT8 hw_sprite[16] =
|
||||
0x22, 0x22, 0x22, 0x22, 0x22, 0x11, 0x22, 0x22
|
||||
};
|
||||
|
||||
static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
void kingdrby_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
kingdrby_state *state = machine.driver_data<kingdrby_state>();
|
||||
UINT8 *spriteram = state->m_spriteram;
|
||||
UINT8 *spriteram = m_spriteram;
|
||||
int count = 0;
|
||||
|
||||
/*sprites not fully understood.*/
|
||||
@ -217,13 +217,13 @@ static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const r
|
||||
{
|
||||
for(dy=0;dy<h;dy++)
|
||||
for(dx=0;dx<w;dx++)
|
||||
drawgfx_transpen(bitmap,cliprect,machine.gfx[0],spr_offs++,colour,1,0,((x+16*w)-(dx+1)*16),(y+dy*16),0);
|
||||
drawgfx_transpen(bitmap,cliprect,machine().gfx[0],spr_offs++,colour,1,0,((x+16*w)-(dx+1)*16),(y+dy*16),0);
|
||||
}
|
||||
else
|
||||
{
|
||||
for(dy=0;dy<h;dy++)
|
||||
for(dx=0;dx<w;dx++)
|
||||
drawgfx_transpen(bitmap,cliprect,machine.gfx[0],spr_offs++,colour,0,0,(x+dx*16),(y+dy*16),0);
|
||||
drawgfx_transpen(bitmap,cliprect,machine().gfx[0],spr_offs++,colour,0,0,(x+dx*16),(y+dy*16),0);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -243,7 +243,7 @@ UINT32 kingdrby_state::screen_update_kingdrby(screen_device &screen, bitmap_ind1
|
||||
|
||||
/*TILEMAP_DRAW_CATEGORY + TILEMAP_DRAW_OPAQUE doesn't suit well?*/
|
||||
m_sc0_tilemap->draw(bitmap, cliprect, 0,0);
|
||||
draw_sprites(machine(),bitmap,cliprect);
|
||||
draw_sprites(bitmap,cliprect);
|
||||
m_sc1_tilemap->draw(bitmap, cliprect, TILEMAP_DRAW_CATEGORY(1),0);
|
||||
m_sc0w_tilemap->draw(bitmap, clip, 0,0);
|
||||
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -88,11 +88,10 @@ public:
|
||||
TILE_GET_INFO_MEMBER(get_fg_tile_info);
|
||||
virtual void video_start();
|
||||
UINT32 screen_update_limenko(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void draw_sprites(UINT32 *sprites, const rectangle &cliprect, int count);
|
||||
void copy_sprites(bitmap_ind16 &bitmap, bitmap_ind16 &sprites_bitmap, bitmap_ind8 &priority_bitmap, const rectangle &cliprect);
|
||||
};
|
||||
|
||||
|
||||
static void draw_sprites(running_machine &machine, UINT32 *sprites, const rectangle &cliprect, int count);
|
||||
|
||||
/*****************************************************************************************************
|
||||
MISC FUNCTIONS
|
||||
*****************************************************************************************************/
|
||||
@ -156,12 +155,12 @@ WRITE32_MEMBER(limenko_state::spriteram_buffer_w)
|
||||
if(m_spriteram_bit)
|
||||
{
|
||||
// draw the sprites to the frame buffer
|
||||
draw_sprites(machine(),m_spriteram2,clip,m_prev_sprites_count);
|
||||
draw_sprites(m_spriteram2,clip,m_prev_sprites_count);
|
||||
}
|
||||
else
|
||||
{
|
||||
// draw the sprites to the frame buffer
|
||||
draw_sprites(machine(),m_spriteram,clip,m_prev_sprites_count);
|
||||
draw_sprites(m_spriteram,clip,m_prev_sprites_count);
|
||||
}
|
||||
|
||||
// buffer the next number of sprites to draw
|
||||
@ -420,13 +419,12 @@ static void draw_single_sprite(bitmap_ind16 &dest_bmp,const rectangle &clip,gfx_
|
||||
}
|
||||
|
||||
// sprites aren't tile based (except for 8x8 ones)
|
||||
static void draw_sprites(running_machine &machine, UINT32 *sprites, const rectangle &cliprect, int count)
|
||||
void limenko_state::draw_sprites(UINT32 *sprites, const rectangle &cliprect, int count)
|
||||
{
|
||||
limenko_state *state = machine.driver_data<limenko_state>();
|
||||
int i;
|
||||
|
||||
UINT8 *base_gfx = state->memregion("gfx1")->base();
|
||||
UINT8 *gfx_max = base_gfx + state->memregion("gfx1")->bytes();
|
||||
UINT8 *base_gfx = memregion("gfx1")->base();
|
||||
UINT8 *gfx_max = base_gfx + memregion("gfx1")->bytes();
|
||||
|
||||
UINT8 *gfxdata;
|
||||
|
||||
@ -463,31 +461,30 @@ static void draw_sprites(running_machine &machine, UINT32 *sprites, const rectan
|
||||
continue;
|
||||
|
||||
/* prepare GfxElement on the fly */
|
||||
gfx_element gfx(machine, gfxdata, width, height, width, 0, 256);
|
||||
gfx_element gfx(machine(), gfxdata, width, height, width, 0, 256);
|
||||
|
||||
draw_single_sprite(state->m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x,y,pri);
|
||||
draw_single_sprite(m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x,y,pri);
|
||||
|
||||
// wrap around x
|
||||
draw_single_sprite(state->m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x-512,y,pri);
|
||||
draw_single_sprite(m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x-512,y,pri);
|
||||
|
||||
// wrap around y
|
||||
draw_single_sprite(state->m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x,y-512,pri);
|
||||
draw_single_sprite(m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x,y-512,pri);
|
||||
|
||||
// wrap around x and y
|
||||
draw_single_sprite(state->m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x-512,y-512,pri);
|
||||
draw_single_sprite(m_sprites_bitmap,cliprect,&gfx,0,color,flipx,flipy,x-512,y-512,pri);
|
||||
}
|
||||
}
|
||||
|
||||
static void copy_sprites(running_machine &machine, bitmap_ind16 &bitmap, bitmap_ind16 &sprites_bitmap, bitmap_ind8 &priority_bitmap, const rectangle &cliprect)
|
||||
void limenko_state::copy_sprites(bitmap_ind16 &bitmap, bitmap_ind16 &sprites_bitmap, bitmap_ind8 &priority_bitmap, const rectangle &cliprect)
|
||||
{
|
||||
limenko_state *state = machine.driver_data<limenko_state>();
|
||||
int y;
|
||||
for( y=cliprect.min_y; y<=cliprect.max_y; y++ )
|
||||
{
|
||||
UINT16 *source = &sprites_bitmap.pix16(y);
|
||||
UINT16 *dest = &bitmap.pix16(y);
|
||||
UINT8 *dest_pri = &priority_bitmap.pix8(y);
|
||||
UINT8 *source_pri = &state->m_sprites_bitmap_pri.pix8(y);
|
||||
UINT8 *source_pri = &m_sprites_bitmap_pri.pix8(y);
|
||||
|
||||
int x;
|
||||
for( x=cliprect.min_x; x<=cliprect.max_x; x++ )
|
||||
@ -537,7 +534,7 @@ UINT32 limenko_state::screen_update_limenko(screen_device &screen, bitmap_ind16
|
||||
m_fg_tilemap->draw(bitmap, cliprect, 0,1);
|
||||
|
||||
if(m_videoreg[0] & 8)
|
||||
copy_sprites(machine(), bitmap, m_sprites_bitmap, machine().priority_bitmap, cliprect);
|
||||
copy_sprites(bitmap, m_sprites_bitmap, machine().priority_bitmap, cliprect);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -245,6 +245,12 @@ public:
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(meritm_interrupt);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(vblank_start_tick);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(vblank_end_tick);
|
||||
void ds1204_w( ds1204_t *ds1204, int rst, int clk, int dq );
|
||||
int ds1204_r(ds1204_t *ds1204);
|
||||
void ds1204_init(const UINT8* key, const UINT8* nvram);
|
||||
void meritm_crt250_switch_banks( );
|
||||
void meritm_switch_banks( );
|
||||
UINT8 binary_to_BCD(UINT8 data);
|
||||
};
|
||||
|
||||
|
||||
@ -265,7 +271,7 @@ public:
|
||||
#define DS1204_STATE_WRITE_SECURITY_MATCH 3
|
||||
#define DS1204_STATE_READ_NVRAM 4
|
||||
|
||||
static void ds1204_w( ds1204_t *ds1204, int rst, int clk, int dq )
|
||||
void meritm_state::ds1204_w( ds1204_t *ds1204, int rst, int clk, int dq )
|
||||
{
|
||||
//logerror("ds1204_w: rst = %d, clk = %d, dq = %d\n", rst, clk, dq );
|
||||
if ( rst == 0 )
|
||||
@ -344,26 +350,25 @@ static void ds1204_w( ds1204_t *ds1204, int rst, int clk, int dq )
|
||||
}
|
||||
};
|
||||
|
||||
static int ds1204_r(ds1204_t *ds1204)
|
||||
int meritm_state::ds1204_r(ds1204_t *ds1204)
|
||||
{
|
||||
//logerror("ds1204_r\n");
|
||||
return ds1204->out_bit;
|
||||
};
|
||||
|
||||
static void ds1204_init(running_machine &machine, const UINT8* key, const UINT8* nvram)
|
||||
void meritm_state::ds1204_init(const UINT8* key, const UINT8* nvram)
|
||||
{
|
||||
meritm_state *state = machine.driver_data<meritm_state>();
|
||||
memset(&state->m_ds1204, 0, sizeof(state->m_ds1204));
|
||||
memset(&m_ds1204, 0, sizeof(m_ds1204));
|
||||
if (key)
|
||||
memcpy(state->m_ds1204.key, key, sizeof(state->m_ds1204.key));
|
||||
memcpy(m_ds1204.key, key, sizeof(m_ds1204.key));
|
||||
if (nvram)
|
||||
memcpy(state->m_ds1204.nvram, nvram, sizeof(state->m_ds1204.nvram));
|
||||
memcpy(m_ds1204.nvram, nvram, sizeof(m_ds1204.nvram));
|
||||
|
||||
state_save_register_item(machine, "ds1204", NULL, 0, state->m_ds1204.state);
|
||||
state_save_register_item(machine, "ds1204", NULL, 0, state->m_ds1204.read_ptr);
|
||||
state_save_register_item(machine, "ds1204", NULL, 0, state->m_ds1204.last_clk);
|
||||
state_save_register_item(machine, "ds1204", NULL, 0, state->m_ds1204.out_bit);
|
||||
state_save_register_item_array(machine, "ds1204", NULL, 0, state->m_ds1204.command);
|
||||
state_save_register_item(machine(), "ds1204", NULL, 0, m_ds1204.state);
|
||||
state_save_register_item(machine(), "ds1204", NULL, 0, m_ds1204.read_ptr);
|
||||
state_save_register_item(machine(), "ds1204", NULL, 0, m_ds1204.last_clk);
|
||||
state_save_register_item(machine(), "ds1204", NULL, 0, m_ds1204.out_bit);
|
||||
state_save_register_item_array(machine(), "ds1204", NULL, 0, m_ds1204.command);
|
||||
};
|
||||
|
||||
/*************************************
|
||||
@ -498,45 +503,43 @@ UINT32 meritm_state::screen_update_meritm(screen_device &screen, bitmap_ind16 &b
|
||||
*************************************/
|
||||
|
||||
|
||||
static void meritm_crt250_switch_banks( running_machine &machine )
|
||||
void meritm_state::meritm_crt250_switch_banks( )
|
||||
{
|
||||
meritm_state *state = machine.driver_data<meritm_state>();
|
||||
int rombank = (state->m_bank & 0x07) ^ 0x07;
|
||||
int rombank = (m_bank & 0x07) ^ 0x07;
|
||||
|
||||
//logerror( "CRT250: Switching banks: rom = %0x (bank = %x)\n", rombank, state->m_bank );
|
||||
state->membank("bank1")->set_entry(rombank );
|
||||
//logerror( "CRT250: Switching banks: rom = %0x (bank = %x)\n", rombank, m_bank );
|
||||
membank("bank1")->set_entry(rombank );
|
||||
};
|
||||
|
||||
WRITE8_MEMBER(meritm_state::meritm_crt250_bank_w)
|
||||
{
|
||||
meritm_crt250_switch_banks(machine());
|
||||
meritm_crt250_switch_banks();
|
||||
};
|
||||
|
||||
static void meritm_switch_banks( running_machine &machine )
|
||||
void meritm_state::meritm_switch_banks( )
|
||||
{
|
||||
meritm_state *state = machine.driver_data<meritm_state>();
|
||||
int rambank = (state->m_psd_a15 >> 2) & 0x3;
|
||||
int rombank = (((state->m_bank >> 3) & 0x3) << 5) |
|
||||
(((state->m_psd_a15 >> 1) & 0x1) << 4) |
|
||||
(((state->m_bank & 0x07) ^ 0x07) << 1) |
|
||||
(state->m_psd_a15 & 0x1);
|
||||
int rambank = (m_psd_a15 >> 2) & 0x3;
|
||||
int rombank = (((m_bank >> 3) & 0x3) << 5) |
|
||||
(((m_psd_a15 >> 1) & 0x1) << 4) |
|
||||
(((m_bank & 0x07) ^ 0x07) << 1) |
|
||||
(m_psd_a15 & 0x1);
|
||||
|
||||
//logerror( "Switching banks: rom = %0x (bank = %x), ram = %0x\n", rombank, state->m_bank, rambank);
|
||||
state->membank("bank1")->set_entry(rombank );
|
||||
state->membank("bank2")->set_entry(rombank | 0x01);
|
||||
state->membank("bank3")->set_entry(rambank);
|
||||
//logerror( "Switching banks: rom = %0x (bank = %x), ram = %0x\n", rombank, m_bank, rambank);
|
||||
membank("bank1")->set_entry(rombank );
|
||||
membank("bank2")->set_entry(rombank | 0x01);
|
||||
membank("bank3")->set_entry(rambank);
|
||||
};
|
||||
|
||||
WRITE8_MEMBER(meritm_state::meritm_psd_a15_w)
|
||||
{
|
||||
m_psd_a15 = data;
|
||||
//logerror( "Writing PSD_A15 with %02x at PC=%04X\n", data, space.device().safe_pc() );
|
||||
meritm_switch_banks(machine());
|
||||
meritm_switch_banks();
|
||||
};
|
||||
|
||||
WRITE8_MEMBER(meritm_state::meritm_bank_w)
|
||||
{
|
||||
meritm_switch_banks(machine());
|
||||
meritm_switch_banks();
|
||||
};
|
||||
|
||||
/*************************************
|
||||
@ -626,7 +629,7 @@ WRITE8_MEMBER(meritm_state::meritm_ds1644_w)
|
||||
}
|
||||
};
|
||||
|
||||
static UINT8 binary_to_BCD(UINT8 data)
|
||||
UINT8 meritm_state::binary_to_BCD(UINT8 data)
|
||||
{
|
||||
data %= 100;
|
||||
|
||||
@ -1107,7 +1110,7 @@ void meritm_state::machine_start()
|
||||
{
|
||||
membank("bank1")->configure_entries(0, 8, memregion("maincpu")->base(), 0x10000);
|
||||
m_bank = 0xff;
|
||||
meritm_crt250_switch_banks(machine());
|
||||
meritm_crt250_switch_banks();
|
||||
MACHINE_START_CALL_MEMBER(merit_common);
|
||||
state_save_register_global(machine(), m_bank);
|
||||
|
||||
@ -1135,7 +1138,7 @@ MACHINE_START_MEMBER(meritm_state,meritm_crt260)
|
||||
membank("bank3")->configure_entries(0, 4, m_ram, 0x2000);
|
||||
m_bank = 0xff;
|
||||
m_psd_a15 = 0;
|
||||
meritm_switch_banks(machine());
|
||||
meritm_switch_banks();
|
||||
MACHINE_START_CALL_MEMBER(merit_common);
|
||||
pc16552d_init(machine(), 0, UART_CLK, NULL, pc16650d_tx_callback);
|
||||
state_save_register_global(machine(), m_bank);
|
||||
@ -2003,7 +2006,7 @@ DRIVER_INIT_MEMBER(meritm_state,pitbossm)
|
||||
static const UINT8 pitbossm_ds1204_nvram[16] =
|
||||
{ 0x16, 0x90, 0xa0, 0x52, 0xd8, 0x6c, 0x12, 0xaf, 0x36, 0x22, 0x61, 0x35, 0x0d, 0x58, 0x0c, 0x00 };
|
||||
|
||||
ds1204_init(machine(), pitbossm_ds1204_key, pitbossm_ds1204_nvram);
|
||||
ds1204_init(pitbossm_ds1204_key, pitbossm_ds1204_nvram);
|
||||
|
||||
};
|
||||
|
||||
@ -2015,7 +2018,7 @@ DRIVER_INIT_MEMBER(meritm_state,pbst30)
|
||||
static const UINT8 pbst30b_ds1204_nvram[16] =
|
||||
{ 0x3e, 0x9a, 0x3c, 0x3f, 0x1d, 0x51, 0x72, 0xc9, 0x28, 0x2c, 0x1d, 0x2d, 0x0e, 0x56, 0x41, 0x00 };
|
||||
|
||||
ds1204_init(machine(), pbst30b_ds1204_key, pbst30b_ds1204_nvram);
|
||||
ds1204_init(pbst30b_ds1204_key, pbst30b_ds1204_nvram);
|
||||
|
||||
};
|
||||
|
||||
@ -2027,7 +2030,7 @@ DRIVER_INIT_MEMBER(meritm_state,pbst30b)
|
||||
static const UINT8 pbst30b_ds1204_nvram[16] =
|
||||
{ 0xa9, 0xdb, 0x41, 0xf8, 0xe4, 0x42, 0x20, 0x6e, 0xde, 0xaf, 0x4f, 0x046, 0x3d, 0x55, 0x44, 0x00 };
|
||||
|
||||
ds1204_init(machine(), pbst30b_ds1204_key, pbst30b_ds1204_nvram);
|
||||
ds1204_init(pbst30b_ds1204_key, pbst30b_ds1204_nvram);
|
||||
|
||||
};
|
||||
|
||||
@ -2039,7 +2042,7 @@ DRIVER_INIT_MEMBER(meritm_state,megat2)
|
||||
static const UINT8 pitbosmt_ds1204_nvram[16] =
|
||||
{ 0x00, 0xfe, 0x03, 0x03, 0x08, 0x00, 0xa2, 0x03, 0x4b, 0x07, 0x00, 0xe6, 0x02, 0xd3, 0x05, 0x00 };
|
||||
|
||||
ds1204_init(machine(), pitbosmt_ds1204_key, pitbosmt_ds1204_nvram);
|
||||
ds1204_init(pitbosmt_ds1204_key, pitbosmt_ds1204_nvram);
|
||||
|
||||
};
|
||||
|
||||
@ -2051,7 +2054,7 @@ DRIVER_INIT_MEMBER(meritm_state,megat3)
|
||||
static const UINT8 megat3_ds1204_nvram[16] =
|
||||
{ 0x51, 0xa1, 0xc0, 0x7c, 0x27, 0x6e, 0x51, 0xb9, 0xa5, 0xb2, 0x27, 0x0c, 0xb9, 0x88, 0x82, 0x2c };
|
||||
|
||||
ds1204_init(machine(), megat3_ds1204_key, megat3_ds1204_nvram);
|
||||
ds1204_init(megat3_ds1204_key, megat3_ds1204_nvram);
|
||||
|
||||
};
|
||||
|
||||
@ -2063,7 +2066,7 @@ DRIVER_INIT_MEMBER(meritm_state,megat3te)
|
||||
static const UINT8 megat3_ds1204_nvram[16] =
|
||||
{ 0x99, 0x53, 0xfc, 0x29, 0x3a, 0x95, 0x8b, 0x58, 0xca, 0xca, 0x00, 0xc2, 0x30, 0x62, 0x0b, 0x96 };
|
||||
|
||||
ds1204_init(machine(), megat3_ds1204_key, megat3_ds1204_nvram);
|
||||
ds1204_init(megat3_ds1204_key, megat3_ds1204_nvram);
|
||||
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xfff8, 0xffff, read8_delegate(FUNC(meritm_state::meritm_ds1644_r), this), write8_delegate(FUNC(meritm_state::meritm_ds1644_w), this));
|
||||
|
||||
@ -2074,7 +2077,7 @@ DRIVER_INIT_MEMBER(meritm_state,megat4)
|
||||
static const UINT8 megat4_ds1204_nvram[16] =
|
||||
{ 0xe3, 0x08, 0x39, 0xd8, 0x4c, 0xbb, 0xc4, 0xf8, 0xf0, 0xe2, 0xd8, 0x77, 0xa8, 0x3d, 0x95, 0x02 };
|
||||
|
||||
ds1204_init(machine(), 0, megat4_ds1204_nvram);
|
||||
ds1204_init(0, megat4_ds1204_nvram);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(meritm_state,megat4c)
|
||||
@ -2085,7 +2088,7 @@ DRIVER_INIT_MEMBER(meritm_state,megat4c)
|
||||
static const UINT8 megat4_ds1204_nvram[16] =
|
||||
{ 0xe3, 0x08, 0x39, 0xd8, 0x4c, 0xbb, 0xc4, 0xf8, 0xf0, 0xe2, 0xd8, 0x77, 0xa8, 0x3d, 0x95, 0x02 };
|
||||
|
||||
ds1204_init(machine(), megat4c_ds1204_key, megat4_ds1204_nvram);
|
||||
ds1204_init(megat4c_ds1204_key, megat4_ds1204_nvram);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(meritm_state,megat4te)
|
||||
@ -2093,7 +2096,7 @@ DRIVER_INIT_MEMBER(meritm_state,megat4te)
|
||||
static const UINT8 megat4te_ds1204_nvram[16] =
|
||||
{ 0x05, 0x21, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00 };
|
||||
|
||||
ds1204_init(machine(), 0, megat4te_ds1204_nvram);
|
||||
ds1204_init(0, megat4te_ds1204_nvram);
|
||||
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xfff8, 0xffff, read8_delegate(FUNC(meritm_state::meritm_ds1644_r), this), write8_delegate(FUNC(meritm_state::meritm_ds1644_w), this));
|
||||
|
||||
@ -2104,7 +2107,7 @@ DRIVER_INIT_MEMBER(meritm_state,megat4st)
|
||||
static const UINT8 megat4te_ds1204_nvram[16] =
|
||||
{ 0x11, 0x04, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00 };
|
||||
|
||||
ds1204_init(machine(), 0, megat4te_ds1204_nvram);
|
||||
ds1204_init(0, megat4te_ds1204_nvram);
|
||||
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xfff8, 0xffff, read8_delegate(FUNC(meritm_state::meritm_ds1644_r), this), write8_delegate(FUNC(meritm_state::meritm_ds1644_w), this));
|
||||
|
||||
@ -2115,7 +2118,7 @@ DRIVER_INIT_MEMBER(meritm_state,megat5)
|
||||
static const UINT8 megat5_ds1204_nvram[16] =
|
||||
{ 0x06, 0x23, 0x97, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00 };
|
||||
|
||||
ds1204_init(machine(), 0, megat5_ds1204_nvram);
|
||||
ds1204_init(0, megat5_ds1204_nvram);
|
||||
|
||||
}
|
||||
|
||||
@ -2124,7 +2127,7 @@ DRIVER_INIT_MEMBER(meritm_state,megat5t)
|
||||
static const UINT8 megat5_ds1204_nvram[16] =
|
||||
{ 0x08, 0x22, 0x97, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00 };
|
||||
|
||||
ds1204_init(machine(), 0, megat5_ds1204_nvram);
|
||||
ds1204_init(0, megat5_ds1204_nvram);
|
||||
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0xfff8, 0xffff, read8_delegate(FUNC(meritm_state::meritm_ds1644_r), this), write8_delegate(FUNC(meritm_state::meritm_ds1644_w), this));
|
||||
|
||||
@ -2135,7 +2138,7 @@ DRIVER_INIT_MEMBER(meritm_state,megat6)
|
||||
static const UINT8 megat6_ds1204_nvram[16] =
|
||||
{ 0x07, 0x15, 0x98, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00 };
|
||||
|
||||
ds1204_init(machine(), 0, megat6_ds1204_nvram);
|
||||
ds1204_init(0, megat6_ds1204_nvram);
|
||||
|
||||
}
|
||||
|
||||
|
@ -146,6 +146,13 @@ public:
|
||||
DECLARE_MACHINE_START(supergm3);
|
||||
UINT32 screen_update_multigam(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
TIMER_CALLBACK_MEMBER(mmc1_resync_callback);
|
||||
void set_videorom_bank( int start, int count, int bank, int bank_size_in_kb);
|
||||
void set_videoram_bank( int start, int count, int bank, int bank_size_in_kb);
|
||||
void multigam_init_mmc3(UINT8 *prg_base, int prg_size, int chr_bank_base);
|
||||
void multigam_init_mapper02(UINT8* prg_base, int prg_size);
|
||||
void multigam_init_mmc1(UINT8 *prg_base, int prg_size, int chr_bank_base);
|
||||
void supergm3_set_bank();
|
||||
void multigm3_decrypt(UINT8* mem, int memsize, const UINT8* decode_nibble);
|
||||
};
|
||||
|
||||
|
||||
@ -203,7 +210,7 @@ READ8_MEMBER(multigam_state::multigam_nt_r)
|
||||
|
||||
static const char * const banknames[] = { "bank2", "bank3", "bank4", "bank5", "bank6", "bank7", "bank8", "bank9" };
|
||||
|
||||
static void set_videorom_bank(running_machine& machine, int start, int count, int bank, int bank_size_in_kb)
|
||||
void multigam_state::set_videorom_bank( int start, int count, int bank, int bank_size_in_kb)
|
||||
{
|
||||
int i;
|
||||
int offset = bank * (bank_size_in_kb * 0x400);
|
||||
@ -211,20 +218,19 @@ static void set_videorom_bank(running_machine& machine, int start, int count, in
|
||||
/* count determines the size of the area mapped in KB */
|
||||
for (i = 0; i < count; i++, offset += 0x400)
|
||||
{
|
||||
machine.root_device().membank(banknames[i + start])->set_base(machine.root_device().memregion("gfx1")->base() + offset);
|
||||
membank(banknames[i + start])->set_base(memregion("gfx1")->base() + offset);
|
||||
}
|
||||
}
|
||||
|
||||
static void set_videoram_bank(running_machine& machine, int start, int count, int bank, int bank_size_in_kb)
|
||||
void multigam_state::set_videoram_bank( int start, int count, int bank, int bank_size_in_kb)
|
||||
{
|
||||
multigam_state *state = machine.driver_data<multigam_state>();
|
||||
int i;
|
||||
int offset = bank * (bank_size_in_kb * 0x400);
|
||||
/* bank_size_in_kb is used to determine how large the "bank" parameter is */
|
||||
/* count determines the size of the area mapped in KB */
|
||||
for (i = 0; i < count; i++, offset += 0x400)
|
||||
{
|
||||
state->membank(banknames[i + start])->set_base(state->m_vram + offset);
|
||||
membank(banknames[i + start])->set_base(m_vram + offset);
|
||||
}
|
||||
}
|
||||
|
||||
@ -466,7 +472,7 @@ WRITE8_MEMBER(multigam_state::multigam3_mmc3_rom_switch_w)
|
||||
case 1: /* char banking */
|
||||
data &= 0xfe;
|
||||
page ^= (cmd << 1);
|
||||
set_videorom_bank(machine(), page, 2, m_multigam3_mmc3_chr_bank_base + data, 1);
|
||||
set_videorom_bank(page, 2, m_multigam3_mmc3_chr_bank_base + data, 1);
|
||||
break;
|
||||
|
||||
case 2: /* char banking */
|
||||
@ -474,7 +480,7 @@ WRITE8_MEMBER(multigam_state::multigam3_mmc3_rom_switch_w)
|
||||
case 4: /* char banking */
|
||||
case 5: /* char banking */
|
||||
page ^= cmd + 2;
|
||||
set_videorom_bank(machine(), page, 1, m_multigam3_mmc3_chr_bank_base + data, 1);
|
||||
set_videorom_bank(page, 1, m_multigam3_mmc3_chr_bank_base + data, 1);
|
||||
break;
|
||||
|
||||
case 6: /* program banking */
|
||||
@ -559,36 +565,35 @@ WRITE8_MEMBER(multigam_state::multigam3_mmc3_rom_switch_w)
|
||||
}
|
||||
}
|
||||
|
||||
static void multigam_init_mmc3(running_machine &machine, UINT8 *prg_base, int prg_size, int chr_bank_base)
|
||||
void multigam_state::multigam_init_mmc3(UINT8 *prg_base, int prg_size, int chr_bank_base)
|
||||
{
|
||||
multigam_state *state = machine.driver_data<multigam_state>();
|
||||
UINT8* dst = state->memregion("maincpu")->base();
|
||||
UINT8* dst = memregion("maincpu")->base();
|
||||
|
||||
// Tom & Jerry in Super Game III enables 6000 ram, but does not read/write it
|
||||
// however, it expects ROM from 6000 there (code jumps to $6xxx)
|
||||
memcpy(state->m_multigmc_mmc3_6000_ram, dst + 0x6000, 0x2000);
|
||||
memcpy(m_multigmc_mmc3_6000_ram, dst + 0x6000, 0x2000);
|
||||
|
||||
memcpy(&dst[0x8000], prg_base + (prg_size - 0x4000), 0x4000);
|
||||
memcpy(&dst[0xc000], prg_base + (prg_size - 0x4000), 0x4000);
|
||||
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mmc3_rom_switch_w),state));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mmc3_rom_switch_w),this));
|
||||
|
||||
state->m_multigam3_mmc3_banks[0] = 0x1e;
|
||||
state->m_multigam3_mmc3_banks[1] = 0x1f;
|
||||
state->m_multigam3_mmc3_scanline_counter = 0;
|
||||
state->m_multigam3_mmc3_scanline_latch = 0;
|
||||
state->m_multigam3_mmc3_4screen = 0;
|
||||
state->m_multigam3_mmc3_last_bank = 0xff;
|
||||
state->m_multigam3_mmc3_prg_base = prg_base;
|
||||
state->m_multigam3_mmc3_chr_bank_base = chr_bank_base;
|
||||
state->m_multigam3_mmc3_prg_size = prg_size;
|
||||
m_multigam3_mmc3_banks[0] = 0x1e;
|
||||
m_multigam3_mmc3_banks[1] = 0x1f;
|
||||
m_multigam3_mmc3_scanline_counter = 0;
|
||||
m_multigam3_mmc3_scanline_latch = 0;
|
||||
m_multigam3_mmc3_4screen = 0;
|
||||
m_multigam3_mmc3_last_bank = 0xff;
|
||||
m_multigam3_mmc3_prg_base = prg_base;
|
||||
m_multigam3_mmc3_chr_bank_base = chr_bank_base;
|
||||
m_multigam3_mmc3_prg_size = prg_size;
|
||||
};
|
||||
|
||||
WRITE8_MEMBER(multigam_state::multigm3_mapper2_w)
|
||||
{
|
||||
if (m_game_gfx_bank & 0x80)
|
||||
{
|
||||
set_videorom_bank(machine(), 0, 8, (m_game_gfx_bank & 0x3c) + (data & 0x3), 8);
|
||||
set_videorom_bank(0, 8, (m_game_gfx_bank & 0x3c) + (data & 0x3), 8);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -598,7 +603,7 @@ WRITE8_MEMBER(multigam_state::multigm3_mapper2_w)
|
||||
|
||||
WRITE8_MEMBER(multigam_state::multigm3_switch_gfx_rom)
|
||||
{
|
||||
set_videorom_bank(machine(), 0, 8, data & 0x3f, 8);
|
||||
set_videorom_bank(0, 8, data & 0x3f, 8);
|
||||
set_mirroring(data & 0x40 ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
|
||||
m_game_gfx_bank = data;
|
||||
};
|
||||
@ -611,7 +616,7 @@ WRITE8_MEMBER(multigam_state::multigm3_switch_prg_rom)
|
||||
|
||||
if (data == 0xa8)
|
||||
{
|
||||
multigam_init_mmc3(machine(), src + 0xa0000, 0x40000, 0x180);
|
||||
multigam_init_mmc3(src + 0xa0000, 0x40000, 0x180);
|
||||
return;
|
||||
}
|
||||
else
|
||||
@ -674,16 +679,15 @@ WRITE8_MEMBER(multigam_state::multigam3_mapper02_rom_switch_w)
|
||||
memcpy(mem + 0x8000, m_mapper02_prg_base + 0x4000*(data & bankmask), 0x4000);
|
||||
}
|
||||
|
||||
static void multigam_init_mapper02(running_machine &machine, UINT8* prg_base, int prg_size)
|
||||
void multigam_state::multigam_init_mapper02(UINT8* prg_base, int prg_size)
|
||||
{
|
||||
multigam_state *state = machine.driver_data<multigam_state>();
|
||||
ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
|
||||
UINT8* mem = state->memregion("maincpu")->base();
|
||||
ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
|
||||
UINT8* mem = memregion("maincpu")->base();
|
||||
memcpy(mem + 0x8000, prg_base + prg_size - 0x8000, 0x8000);
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mapper02_rom_switch_w),state));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::multigam3_mapper02_rom_switch_w),this));
|
||||
|
||||
state->m_mapper02_prg_base = prg_base;
|
||||
state->m_mapper02_prg_size = prg_size;
|
||||
m_mapper02_prg_base = prg_base;
|
||||
m_mapper02_prg_size = prg_size;
|
||||
ppu->set_scanline_callback(0);
|
||||
}
|
||||
|
||||
@ -779,18 +783,18 @@ WRITE8_MEMBER(multigam_state::mmc1_rom_switch_w)
|
||||
|
||||
case 1: /* video rom banking - bank 0 - 4k or 8k */
|
||||
if (m_mmc1_chr_bank_base == 0)
|
||||
set_videoram_bank(machine(), 0, (m_vrom4k) ? 4 : 8, (m_mmc1_shiftreg & 0x1f), 4);
|
||||
set_videoram_bank(0, (m_vrom4k) ? 4 : 8, (m_mmc1_shiftreg & 0x1f), 4);
|
||||
else
|
||||
set_videorom_bank(machine(), 0, (m_vrom4k) ? 4 : 8, m_mmc1_chr_bank_base + (m_mmc1_shiftreg & 0x1f), 4);
|
||||
set_videorom_bank(0, (m_vrom4k) ? 4 : 8, m_mmc1_chr_bank_base + (m_mmc1_shiftreg & 0x1f), 4);
|
||||
break;
|
||||
|
||||
case 2: /* video rom banking - bank 1 - 4k only */
|
||||
if (m_vrom4k)
|
||||
{
|
||||
if (m_mmc1_chr_bank_base == 0)
|
||||
set_videoram_bank(machine(), 0, (m_vrom4k) ? 4 : 8, (m_mmc1_shiftreg & 0x1f), 4);
|
||||
set_videoram_bank(0, (m_vrom4k) ? 4 : 8, (m_mmc1_shiftreg & 0x1f), 4);
|
||||
else
|
||||
set_videorom_bank(machine(), 4, 4, m_mmc1_chr_bank_base + (m_mmc1_shiftreg & 0x1f), 4);
|
||||
set_videorom_bank(4, 4, m_mmc1_chr_bank_base + (m_mmc1_shiftreg & 0x1f), 4);
|
||||
}
|
||||
break;
|
||||
|
||||
@ -827,21 +831,20 @@ WRITE8_MEMBER(multigam_state::mmc1_rom_switch_w)
|
||||
}
|
||||
}
|
||||
|
||||
static void multigam_init_mmc1(running_machine &machine, UINT8 *prg_base, int prg_size, int chr_bank_base)
|
||||
void multigam_state::multigam_init_mmc1(UINT8 *prg_base, int prg_size, int chr_bank_base)
|
||||
{
|
||||
multigam_state *state = machine.driver_data<multigam_state>();
|
||||
UINT8* dst = state->memregion("maincpu")->base();
|
||||
ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
|
||||
UINT8* dst = memregion("maincpu")->base();
|
||||
ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
|
||||
|
||||
memcpy(&dst[0x8000], prg_base + (prg_size - 0x8000), 0x8000);
|
||||
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::mmc1_rom_switch_w),state));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x8000, 0xffff, write8_delegate(FUNC(multigam_state::mmc1_rom_switch_w),this));
|
||||
|
||||
state->m_mmc1_reg_write_enable = 1;
|
||||
state->m_mmc1_rom_mask = (prg_size / 0x4000) - 1;
|
||||
state->m_mmc1_prg_base = prg_base;
|
||||
state->m_mmc1_prg_size = prg_size;
|
||||
state->m_mmc1_chr_bank_base = chr_bank_base;
|
||||
m_mmc1_reg_write_enable = 1;
|
||||
m_mmc1_rom_mask = (prg_size / 0x4000) - 1;
|
||||
m_mmc1_prg_base = prg_base;
|
||||
m_mmc1_prg_size = prg_size;
|
||||
m_mmc1_chr_bank_base = chr_bank_base;
|
||||
|
||||
ppu->set_scanline_callback(0);
|
||||
};
|
||||
@ -869,23 +872,22 @@ static void multigam_init_mmc1(running_machine &machine, UINT8 *prg_base, int pr
|
||||
*/
|
||||
|
||||
|
||||
static void supergm3_set_bank(running_machine &machine)
|
||||
void multigam_state::supergm3_set_bank()
|
||||
{
|
||||
multigam_state *state = machine.driver_data<multigam_state>();
|
||||
ppu2c0x_device *ppu = machine.device<ppu2c0x_device>("ppu");
|
||||
UINT8* mem = state->memregion("maincpu")->base();
|
||||
ppu2c0x_device *ppu = machine().device<ppu2c0x_device>("ppu");
|
||||
UINT8* mem = memregion("maincpu")->base();
|
||||
|
||||
// video bank
|
||||
if (state->m_supergm3_chr_bank == 0x10 ||
|
||||
state->m_supergm3_chr_bank == 0x40 )
|
||||
if (m_supergm3_chr_bank == 0x10 ||
|
||||
m_supergm3_chr_bank == 0x40 )
|
||||
{
|
||||
// VRAM
|
||||
ppu->space(AS_PROGRAM).install_read_bank(0x0000, 0x1fff, "bank1");
|
||||
ppu->space(AS_PROGRAM).install_write_bank(0x0000, 0x1fff, "bank1");
|
||||
state->membank("bank1")->set_base(state->m_vram);
|
||||
membank("bank1")->set_base(m_vram);
|
||||
|
||||
if (state->m_supergm3_chr_bank == 0x40)
|
||||
state->set_mirroring(PPU_MIRROR_VERT);
|
||||
if (m_supergm3_chr_bank == 0x40)
|
||||
set_mirroring(PPU_MIRROR_VERT);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -899,39 +901,36 @@ static void supergm3_set_bank(running_machine &machine)
|
||||
ppu->space(AS_PROGRAM).install_read_bank(0x1c00, 0x1fff, "bank9");
|
||||
ppu->space(AS_PROGRAM).unmap_write(0x0000, 0x1fff);
|
||||
|
||||
set_videorom_bank(machine, 0, 8, 0, 8);
|
||||
set_videorom_bank(0, 8, 0, 8);
|
||||
}
|
||||
|
||||
// prg bank
|
||||
if ((state->m_supergm3_prg_bank & 0x80) == 0)
|
||||
if ((m_supergm3_prg_bank & 0x80) == 0)
|
||||
{
|
||||
// title screen
|
||||
memcpy(mem + 0x8000, mem + 0x18000, 0x8000);
|
||||
state->membank("bank10")->set_base(mem + 0x6000);
|
||||
membank("bank10")->set_base(mem + 0x6000);
|
||||
ppu->set_scanline_callback(0);
|
||||
}
|
||||
else if ((state->m_supergm3_prg_bank & 0x40) == 0)
|
||||
else if ((m_supergm3_prg_bank & 0x40) == 0)
|
||||
{
|
||||
// mapper 02
|
||||
multigam_init_mapper02(machine,
|
||||
machine.root_device().memregion("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
|
||||
multigam_init_mapper02(memregion("user1")->base() + (m_supergm3_prg_bank & 0x1f)*0x20000,
|
||||
0x20000);
|
||||
}
|
||||
else if (state->m_supergm3_chr_bank & 0x10)
|
||||
else if (m_supergm3_chr_bank & 0x10)
|
||||
{
|
||||
// MMC3
|
||||
multigam_init_mmc3(machine,
|
||||
machine.root_device().memregion("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
|
||||
(state->m_supergm3_prg_bank & 0x20) ? 0x20000 : 0x40000,
|
||||
(state->m_supergm3_chr_bank & 0x0f)*0x80);
|
||||
multigam_init_mmc3(memregion("user1")->base() + (m_supergm3_prg_bank & 0x1f)*0x20000,
|
||||
(m_supergm3_prg_bank & 0x20) ? 0x20000 : 0x40000,
|
||||
(m_supergm3_chr_bank & 0x0f)*0x80);
|
||||
}
|
||||
else
|
||||
{
|
||||
//MMC1
|
||||
multigam_init_mmc1(machine,
|
||||
machine.root_device().memregion("user1")->base() + (state->m_supergm3_prg_bank & 0x1f)*0x20000,
|
||||
multigam_init_mmc1(memregion("user1")->base() + (m_supergm3_prg_bank & 0x1f)*0x20000,
|
||||
0x20000,
|
||||
(state->m_supergm3_chr_bank & 0x0f)*0x80/4 );
|
||||
(m_supergm3_chr_bank & 0x0f)*0x80/4 );
|
||||
}
|
||||
}
|
||||
|
||||
@ -943,7 +942,7 @@ WRITE8_MEMBER(multigam_state::supergm3_prg_bank_w)
|
||||
WRITE8_MEMBER(multigam_state::supergm3_chr_bank_w)
|
||||
{
|
||||
m_supergm3_chr_bank = data;
|
||||
supergm3_set_bank(machine());
|
||||
supergm3_set_bank();
|
||||
}
|
||||
|
||||
/******************************************************
|
||||
@ -1176,7 +1175,7 @@ MACHINE_START_MEMBER(multigam_state,multigm3)
|
||||
machine().device("ppu")->memory().space(AS_PROGRAM).install_read_bank(0x1800, 0x1bff, "bank8");
|
||||
machine().device("ppu")->memory().space(AS_PROGRAM).install_read_bank(0x1c00, 0x1fff, "bank9");
|
||||
|
||||
set_videorom_bank(machine(), 0, 8, 0, 8);
|
||||
set_videorom_bank(0, 8, 0, 8);
|
||||
};
|
||||
|
||||
MACHINE_START_MEMBER(multigam_state,supergm3)
|
||||
@ -1365,7 +1364,7 @@ DRIVER_INIT_MEMBER(multigam_state,multigam)
|
||||
multigam_switch_prg_rom(space, 0x0, 0x01);
|
||||
}
|
||||
|
||||
static void multigm3_decrypt(UINT8* mem, int memsize, const UINT8* decode_nibble)
|
||||
void multigam_state::multigm3_decrypt(UINT8* mem, int memsize, const UINT8* decode_nibble)
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < memsize; i++)
|
||||
|
@ -344,9 +344,13 @@ public:
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq0_cb);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(mcu_irq2_cb);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(mcu_adc_cb);
|
||||
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
|
||||
inline void bankswitch_rom8( address_space &space, const char *bank, int n_data );
|
||||
inline void bankswitch_rom64( address_space &space, const char *bank, int n_data );
|
||||
void namcos11_init_common(int n_daughterboard);
|
||||
};
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
|
||||
inline void ATTR_PRINTF(3,4) namcos11_state::verboselog( int n_level, const char *s_fmt, ... )
|
||||
{
|
||||
if( VERBOSE_LEVEL >= n_level )
|
||||
{
|
||||
@ -355,13 +359,13 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: %s", machine.describe_context(), buf );
|
||||
logerror( "%s: %s", machine().describe_context(), buf );
|
||||
}
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(namcos11_state::keycus_w)
|
||||
{
|
||||
verboselog( machine(), 1, "keycus_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "keycus_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
COMBINE_DATA( &m_keycus[ offset ] );
|
||||
}
|
||||
|
||||
@ -383,7 +387,7 @@ READ32_MEMBER(namcos11_state::keycus_c406_r)
|
||||
( ( namcos11_keycus[ 1 ] >> 8 ) & 0xf );
|
||||
break;
|
||||
}
|
||||
verboselog( machine(), 1, "keycus_c406_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "keycus_c406_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -400,7 +404,7 @@ READ32_MEMBER(namcos11_state::keycus_c409_r)
|
||||
data = ( data & 0x0000ffff ) | 0x000f0000;
|
||||
break;
|
||||
}
|
||||
verboselog( machine(), 1, "keycus_c409_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "keycus_c409_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -435,7 +439,7 @@ READ32_MEMBER(namcos11_state::keycus_c410_r)
|
||||
( ( ( n_value / 10000 ) % 10 ) << 16 );
|
||||
break;
|
||||
}
|
||||
verboselog( machine(), 1, "keycus_c410_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "keycus_c410_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -469,7 +473,7 @@ READ32_MEMBER(namcos11_state::keycus_c411_r)
|
||||
break;
|
||||
}
|
||||
|
||||
verboselog( machine(), 1, "keycus_c411_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "keycus_c411_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -504,7 +508,7 @@ READ32_MEMBER(namcos11_state::keycus_c430_r)
|
||||
( ( ( n_value / 1 ) % 10 ) << 16 );
|
||||
break;
|
||||
}
|
||||
verboselog( machine(), 1, "keycus_c430_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "keycus_c430_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -537,7 +541,7 @@ READ32_MEMBER(namcos11_state::keycus_c431_r)
|
||||
data = ( data & 0xffff0000 ) | ( ( n_value / 10000 ) % 10 );
|
||||
break;
|
||||
}
|
||||
verboselog( machine(), 1, "keycus_c431_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "keycus_c431_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -571,7 +575,7 @@ READ32_MEMBER(namcos11_state::keycus_c432_r)
|
||||
break;
|
||||
}
|
||||
|
||||
verboselog( machine(), 1, "keycus_c432_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "keycus_c432_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -592,7 +596,7 @@ READ32_MEMBER(namcos11_state::keycus_c442_r)
|
||||
}
|
||||
break;
|
||||
}
|
||||
verboselog( machine(), 1, "keycus_c442_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "keycus_c442_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -625,20 +629,20 @@ READ32_MEMBER(namcos11_state::keycus_c443_r)
|
||||
}
|
||||
break;
|
||||
}
|
||||
verboselog( machine(), 1, "keycus_c443_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "keycus_c443_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
INLINE void bankswitch_rom8( address_space &space, const char *bank, int n_data )
|
||||
inline void namcos11_state::bankswitch_rom8( address_space &space, const char *bank, int n_data )
|
||||
{
|
||||
space.machine().root_device().membank( bank )->set_entry( ( ( n_data & 0xc0 ) >> 4 ) + ( n_data & 0x03 ) );
|
||||
membank( bank )->set_entry( ( ( n_data & 0xc0 ) >> 4 ) + ( n_data & 0x03 ) );
|
||||
}
|
||||
|
||||
static const char * const bankname[] = { "bank1", "bank2", "bank3", "bank4", "bank5", "bank6", "bank7", "bank8" };
|
||||
|
||||
WRITE32_MEMBER(namcos11_state::bankswitch_rom32_w)
|
||||
{
|
||||
verboselog( machine(), 2, "bankswitch_rom32_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(2, "bankswitch_rom32_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
|
||||
if( ACCESSING_BITS_0_15 )
|
||||
{
|
||||
@ -652,7 +656,7 @@ WRITE32_MEMBER(namcos11_state::bankswitch_rom32_w)
|
||||
|
||||
WRITE32_MEMBER(namcos11_state::bankswitch_rom64_upper_w)
|
||||
{
|
||||
verboselog( machine(), 2, "bankswitch_rom64_upper_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(2, "bankswitch_rom64_upper_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
|
||||
if( ACCESSING_BITS_0_15 )
|
||||
{
|
||||
@ -664,17 +668,15 @@ WRITE32_MEMBER(namcos11_state::bankswitch_rom64_upper_w)
|
||||
}
|
||||
}
|
||||
|
||||
INLINE void bankswitch_rom64( address_space &space, const char *bank, int n_data )
|
||||
inline void namcos11_state::bankswitch_rom64( address_space &space, const char *bank, int n_data )
|
||||
{
|
||||
namcos11_state *state = space.machine().driver_data<namcos11_state>();
|
||||
|
||||
/* todo: verify behaviour */
|
||||
state->membank( bank )->set_entry( ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ state->m_n_bankoffset ) );
|
||||
membank( bank )->set_entry( ( ( ( ( n_data & 0xc0 ) >> 3 ) + ( n_data & 0x07 ) ) ^ m_n_bankoffset ) );
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(namcos11_state::bankswitch_rom64_w)
|
||||
{
|
||||
verboselog( machine(), 2, "bankswitch_rom64_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(2, "bankswitch_rom64_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
|
||||
if( ACCESSING_BITS_0_15 )
|
||||
{
|
||||
@ -695,11 +697,11 @@ WRITE32_MEMBER(namcos11_state::lightgun_w)
|
||||
output_set_value( "recoil0", !( data & 0x02 ) );
|
||||
output_set_value( "recoil1", !( data & 0x01 ) );
|
||||
|
||||
verboselog( machine(), 1, "lightgun_w: outputs (%08x %08x)\n", data, mem_mask );
|
||||
verboselog(1, "lightgun_w: outputs (%08x %08x)\n", data, mem_mask );
|
||||
}
|
||||
if( ACCESSING_BITS_16_31 )
|
||||
{
|
||||
verboselog( machine(), 2, "lightgun_w: start reading (%08x %08x)\n", data, mem_mask );
|
||||
verboselog(2, "lightgun_w: start reading (%08x %08x)\n", data, mem_mask );
|
||||
}
|
||||
}
|
||||
|
||||
@ -721,7 +723,7 @@ READ32_MEMBER(namcos11_state::lightgun_r)
|
||||
data = ( ioport( "GUN2Y" )->read() ) | ( ( ioport( "GUN2Y" )->read() + 1 ) << 16 );
|
||||
break;
|
||||
}
|
||||
verboselog( machine(), 2, "lightgun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
verboselog(2, "lightgun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -867,96 +869,95 @@ WRITE16_MEMBER(namcos11_state::c76_speedup_w)
|
||||
COMBINE_DATA(&m_su_83);
|
||||
}
|
||||
|
||||
static void namcos11_init_common(running_machine &machine, int n_daughterboard)
|
||||
void namcos11_state::namcos11_init_common(int n_daughterboard)
|
||||
{
|
||||
namcos11_state *state = machine.driver_data<namcos11_state>();
|
||||
|
||||
// C76 idle skipping, large speedboost
|
||||
if (C76_SPEEDUP)
|
||||
{
|
||||
state->save_item( NAME(state->m_su_83) );
|
||||
machine.device("c76")->memory().space(AS_PROGRAM).install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos11_state::c76_speedup_r),state), write16_delegate(FUNC(namcos11_state::c76_speedup_w),state));
|
||||
save_item( NAME(m_su_83) );
|
||||
machine().device("c76")->memory().space(AS_PROGRAM).install_readwrite_handler(0x82, 0x83, read16_delegate(FUNC(namcos11_state::c76_speedup_r),this), write16_delegate(FUNC(namcos11_state::c76_speedup_w),this));
|
||||
}
|
||||
|
||||
if (!n_daughterboard)
|
||||
{
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).nop_write(0x1fa10020, 0x1fa1002f);
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).nop_write(0x1fa10020, 0x1fa1002f);
|
||||
return;
|
||||
}
|
||||
|
||||
// init banks
|
||||
int bank;
|
||||
UINT32 len = machine.root_device().memregion( "user2" )->bytes();
|
||||
UINT8 *rgn = machine.root_device().memregion( "user2" )->base();
|
||||
UINT32 len = memregion( "user2" )->bytes();
|
||||
UINT8 *rgn = memregion( "user2" )->base();
|
||||
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f000000, 0x1f0fffff, "bank1" );
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f100000, 0x1f1fffff, "bank2" );
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f200000, 0x1f2fffff, "bank3" );
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f300000, 0x1f3fffff, "bank4" );
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f400000, 0x1f4fffff, "bank5" );
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f500000, 0x1f5fffff, "bank6" );
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f600000, 0x1f6fffff, "bank7" );
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f700000, 0x1f7fffff, "bank8" );
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f000000, 0x1f0fffff, "bank1" );
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f100000, 0x1f1fffff, "bank2" );
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f200000, 0x1f2fffff, "bank3" );
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f300000, 0x1f3fffff, "bank4" );
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f400000, 0x1f4fffff, "bank5" );
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f500000, 0x1f5fffff, "bank6" );
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f600000, 0x1f6fffff, "bank7" );
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x1f700000, 0x1f7fffff, "bank8" );
|
||||
|
||||
for (bank = 0; bank < 8; bank++)
|
||||
{
|
||||
state->membank(bankname[bank])->configure_entries(0, len / ( 1024 * 1024 ), rgn, 1024 * 1024 );
|
||||
state->membank(bankname[bank])->set_entry(0 );
|
||||
membank(bankname[bank])->configure_entries(0, len / ( 1024 * 1024 ), rgn, 1024 * 1024 );
|
||||
membank(bankname[bank])->set_entry(0 );
|
||||
}
|
||||
|
||||
if (n_daughterboard == 32)
|
||||
{
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1fa10020, 0x1fa1002f, write32_delegate(FUNC(namcos11_state::bankswitch_rom32_w),state));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1fa10020, 0x1fa1002f, write32_delegate(FUNC(namcos11_state::bankswitch_rom32_w),this));
|
||||
}
|
||||
if (n_daughterboard == 64)
|
||||
{
|
||||
state->m_n_bankoffset = 0;
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f080000, 0x1f080003, write32_delegate(FUNC(namcos11_state::bankswitch_rom64_upper_w),state));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).nop_read(0x1fa10020, 0x1fa1002f);
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1fa10020, 0x1fa1002f, write32_delegate(FUNC(namcos11_state::bankswitch_rom64_w),state));
|
||||
state->save_item( NAME(state->m_n_bankoffset) );
|
||||
m_n_bankoffset = 0;
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f080000, 0x1f080003, write32_delegate(FUNC(namcos11_state::bankswitch_rom64_upper_w),this));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).nop_read(0x1fa10020, 0x1fa1002f);
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1fa10020, 0x1fa1002f, write32_delegate(FUNC(namcos11_state::bankswitch_rom64_w),this));
|
||||
save_item( NAME(m_n_bankoffset) );
|
||||
}
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,tekken)
|
||||
{
|
||||
namcos11_init_common(machine(), 32);
|
||||
namcos11_init_common(32);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,tekken2)
|
||||
{
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c406_r),this));
|
||||
namcos11_init_common(machine(), 32);
|
||||
namcos11_init_common(32);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,souledge)
|
||||
{
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c409_r),this));
|
||||
namcos11_init_common(machine(), 32);
|
||||
namcos11_init_common(32);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,dunkmnia)
|
||||
{
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c410_r),this));
|
||||
namcos11_init_common(machine(), 32);
|
||||
namcos11_init_common(32);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,primglex)
|
||||
{
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c411_r),this));
|
||||
namcos11_init_common(machine(), 32);
|
||||
namcos11_init_common(32);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,xevi3dg)
|
||||
{
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c430_r),this));
|
||||
namcos11_init_common(machine(), 32);
|
||||
namcos11_init_common(32);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,danceyes)
|
||||
{
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c431_r),this));
|
||||
namcos11_init_common(machine(), 32);
|
||||
namcos11_init_common(32);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,pocketrc)
|
||||
@ -965,25 +966,25 @@ DRIVER_INIT_MEMBER(namcos11_state,pocketrc)
|
||||
machine().device("c76")->memory().space(AS_IO).install_read_handler(M37710_ADC1_L, M37710_ADC1_L, read8_delegate(FUNC(namcos11_state::pocketrc_gas_r),this));
|
||||
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c432_r),this));
|
||||
namcos11_init_common(machine(), 32);
|
||||
namcos11_init_common(32);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,starswep)
|
||||
{
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c442_r),this));
|
||||
namcos11_init_common(machine(), 0);
|
||||
namcos11_init_common(0);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,myangel3)
|
||||
{
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c443_r),this));
|
||||
namcos11_init_common(machine(), 64);
|
||||
namcos11_init_common(64);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos11_state,ptblank2ua)
|
||||
{
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler( 0x1fa20000, 0x1fa2ffff, read32_delegate(FUNC(namcos11_state::keycus_c443_r),this));
|
||||
namcos11_init_common(machine(), 64);
|
||||
namcos11_init_common(64);
|
||||
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f788000, 0x1f788003, write32_delegate(FUNC(namcos11_state::lightgun_w),this));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler (0x1f780000, 0x1f78000f, read32_delegate(FUNC(namcos11_state::lightgun_r),this));
|
||||
|
@ -1096,9 +1096,13 @@ public:
|
||||
DECLARE_DRIVER_INIT(ghlpanic);
|
||||
DECLARE_DRIVER_INIT(ptblank2);
|
||||
DECLARE_MACHINE_RESET(namcos12);
|
||||
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
|
||||
void namcos12_rom_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
|
||||
void namcos12_sub_irq( screen_device &screen, bool vblank_state );
|
||||
void system11gun_install( );
|
||||
};
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
|
||||
inline void ATTR_PRINTF(3,4) namcos12_state::verboselog( int n_level, const char *s_fmt, ... )
|
||||
{
|
||||
if( VERBOSE_LEVEL >= n_level )
|
||||
{
|
||||
@ -1107,19 +1111,19 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: %s", machine.describe_context(), buf );
|
||||
logerror( "%s: %s", machine().describe_context(), buf );
|
||||
}
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(namcos12_state::sharedram_w)
|
||||
{
|
||||
verboselog( machine(), 1, "sharedram_w( %08x, %08x, %08x )\n", ( offset * 4 ), data, mem_mask );
|
||||
verboselog(1, "sharedram_w( %08x, %08x, %08x )\n", ( offset * 4 ), data, mem_mask );
|
||||
COMBINE_DATA( &m_sharedram[ offset ] );
|
||||
}
|
||||
|
||||
READ32_MEMBER(namcos12_state::sharedram_r)
|
||||
{
|
||||
verboselog( machine(), 1, "sharedram_r( %08x, %08x ) %08x\n", ( offset * 4 ), mem_mask, m_sharedram[ offset ] );
|
||||
verboselog(1, "sharedram_r( %08x, %08x ) %08x\n", ( offset * 4 ), mem_mask, m_sharedram[ offset ] );
|
||||
return m_sharedram[ offset ];
|
||||
}
|
||||
|
||||
@ -1159,7 +1163,7 @@ WRITE32_MEMBER(namcos12_state::bankoffset_w)
|
||||
|
||||
membank( "bank1" )->set_entry( m_n_bankoffset );
|
||||
|
||||
verboselog( machine(), 1, "bankoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_bankoffset );
|
||||
verboselog(1, "bankoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_bankoffset );
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(namcos12_state::dmaoffset_w)
|
||||
@ -1172,10 +1176,10 @@ WRITE32_MEMBER(namcos12_state::dmaoffset_w)
|
||||
{
|
||||
m_n_dmaoffset = ( ( offset * 4 ) + 2 ) | ( data & 0xffff0000 );
|
||||
}
|
||||
verboselog( machine(), 1, "dmaoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_dmaoffset );
|
||||
verboselog(1, "dmaoffset_w( %08x, %08x, %08x ) %08x\n", offset, data, mem_mask, m_n_dmaoffset );
|
||||
}
|
||||
|
||||
static void namcos12_rom_read( namcos12_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
|
||||
void namcos12_state::namcos12_rom_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
|
||||
{
|
||||
const char *n_region;
|
||||
int n_offset;
|
||||
@ -1187,32 +1191,32 @@ static void namcos12_rom_read( namcos12_state *state, UINT32 *p_n_psxram, UINT32
|
||||
INT32 n_ramleft;
|
||||
|
||||
// TODO: the check for going past the end of ram should be in dma.c
|
||||
UINT32 m_n_psxramsize = state->memshare("share1")->bytes();
|
||||
UINT32 m_n_psxramsize = memshare("share1")->bytes();
|
||||
|
||||
if(state->m_has_tektagt_dma && !state->m_n_dmaoffset)
|
||||
if(m_has_tektagt_dma && !m_n_dmaoffset)
|
||||
{
|
||||
n_region = "user2";
|
||||
n_offset = state->m_n_tektagdmaoffset & 0x7fffffff;
|
||||
verboselog( state->machine(), 1, "namcos12_rom_read( %08x, %08x ) tektagt %08x\n", n_address, n_size, n_offset );
|
||||
n_offset = m_n_tektagdmaoffset & 0x7fffffff;
|
||||
verboselog(1, "namcos12_rom_read( %08x, %08x ) tektagt %08x\n", n_address, n_size, n_offset );
|
||||
}
|
||||
else if( ( state->m_n_dmaoffset >= 0x80000000 ) || ( state->m_n_dmabias == 0x1f300000 ) )
|
||||
else if( ( m_n_dmaoffset >= 0x80000000 ) || ( m_n_dmabias == 0x1f300000 ) )
|
||||
{
|
||||
n_region = "user1";
|
||||
n_offset = state->m_n_dmaoffset & 0x003fffff;
|
||||
verboselog( state->machine(), 1, "namcos12_rom_read( %08x, %08x ) boot %08x\n", n_address, n_size, n_offset );
|
||||
n_offset = m_n_dmaoffset & 0x003fffff;
|
||||
verboselog(1, "namcos12_rom_read( %08x, %08x ) boot %08x\n", n_address, n_size, n_offset );
|
||||
}
|
||||
else
|
||||
{
|
||||
n_region = "user2";
|
||||
n_offset = state->m_n_dmaoffset & 0x7fffffff;
|
||||
verboselog( state->machine(), 1, "namcos12_rom_read( %08x, %08x ) game %08x\n", n_address, n_size, n_offset );
|
||||
n_offset = m_n_dmaoffset & 0x7fffffff;
|
||||
verboselog(1, "namcos12_rom_read( %08x, %08x ) game %08x\n", n_address, n_size, n_offset );
|
||||
}
|
||||
|
||||
source = (UINT16 *) state->memregion( n_region )->base();
|
||||
n_romleft = ( state->memregion( n_region )->bytes() - n_offset ) / 4;
|
||||
source = (UINT16 *) memregion( n_region )->base();
|
||||
n_romleft = ( memregion( n_region )->bytes() - n_offset ) / 4;
|
||||
if( n_size > n_romleft )
|
||||
{
|
||||
verboselog( state->machine(), 1, "namcos12_rom_read dma truncated %d to %d passed end of rom\n", n_size, n_romleft );
|
||||
verboselog(1, "namcos12_rom_read dma truncated %d to %d passed end of rom\n", n_size, n_romleft );
|
||||
n_size = n_romleft;
|
||||
}
|
||||
|
||||
@ -1221,7 +1225,7 @@ static void namcos12_rom_read( namcos12_state *state, UINT32 *p_n_psxram, UINT32
|
||||
n_ramleft = ( m_n_psxramsize - n_address ) / 4;
|
||||
if( n_size > n_ramleft )
|
||||
{
|
||||
verboselog( state->machine(), 1, "namcos12_rom_read dma truncated %d to %d passed end of ram\n", n_size, n_ramleft );
|
||||
verboselog(1, "namcos12_rom_read dma truncated %d to %d passed end of ram\n", n_size, n_ramleft );
|
||||
n_size = n_ramleft;
|
||||
}
|
||||
|
||||
@ -1238,9 +1242,9 @@ static void namcos12_rom_read( namcos12_state *state, UINT32 *p_n_psxram, UINT32
|
||||
}
|
||||
}
|
||||
|
||||
static void namcos12_sub_irq( namcos12_state *state, screen_device &screen, bool vblank_state )
|
||||
void namcos12_state::namcos12_sub_irq( screen_device &screen, bool vblank_state )
|
||||
{
|
||||
irq1_line_pulse( state->machine().device( "sub" ) );
|
||||
irq1_line_pulse( *machine().device( "sub" ) );
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(namcos12_state::s12_dma_bias_w)
|
||||
@ -1279,11 +1283,11 @@ WRITE32_MEMBER(namcos12_state::system11gun_w)
|
||||
output_set_value("P2_Start_lamp", (~data & 0x04)>>2);
|
||||
|
||||
|
||||
verboselog( machine(), 1, "system11gun_w: outputs (%08x %08x)\n", data, mem_mask );
|
||||
verboselog(1, "system11gun_w: outputs (%08x %08x)\n", data, mem_mask );
|
||||
}
|
||||
if( ACCESSING_BITS_16_31 )
|
||||
{
|
||||
verboselog( machine(), 2, "system11gun_w: start reading (%08x %08x)\n", data, mem_mask );
|
||||
verboselog(2, "system11gun_w: start reading (%08x %08x)\n", data, mem_mask );
|
||||
}
|
||||
}
|
||||
|
||||
@ -1305,15 +1309,14 @@ READ32_MEMBER(namcos12_state::system11gun_r)
|
||||
data = ( ioport("LIGHT1_Y")->read() ) | ( ( ioport("LIGHT1_Y")->read() + 1 ) << 16 );
|
||||
break;
|
||||
}
|
||||
verboselog( machine(), 2, "system11gun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
verboselog(2, "system11gun_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
return data;
|
||||
}
|
||||
|
||||
static void system11gun_install( running_machine &machine )
|
||||
void namcos12_state::system11gun_install( )
|
||||
{
|
||||
namcos12_state *state = machine.driver_data<namcos12_state>();
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f788000, 0x1f788003, write32_delegate(FUNC(namcos12_state::system11gun_w),state));
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler (0x1f780000, 0x1f78000f, read32_delegate(FUNC(namcos12_state::system11gun_r),state));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x1f788000, 0x1f788003, write32_delegate(FUNC(namcos12_state::system11gun_w),this));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler (0x1f780000, 0x1f78000f, read32_delegate(FUNC(namcos12_state::system11gun_r),this));
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(namcos12_state::kcoff_w)
|
||||
@ -1606,14 +1609,14 @@ DRIVER_INIT_MEMBER(namcos12_state,ptblank2)
|
||||
/* patch out wait for dma 5 to complete */
|
||||
*( (UINT32 *)( memregion( "user1" )->base() + 0x331c4 ) ) = 0;
|
||||
|
||||
system11gun_install(machine());
|
||||
system11gun_install();
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(namcos12_state,ghlpanic)
|
||||
{
|
||||
DRIVER_INIT_CALL(namcos12);
|
||||
|
||||
system11gun_install(machine());
|
||||
system11gun_install();
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_START( coh700, namcos12_state )
|
||||
@ -1621,7 +1624,7 @@ static MACHINE_CONFIG_START( coh700, namcos12_state )
|
||||
MCFG_CPU_ADD( "maincpu", CXD8661R, XTAL_100MHz )
|
||||
MCFG_CPU_PROGRAM_MAP( namcos12_map)
|
||||
|
||||
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( namcos12_rom_read ), (namcos12_state *) owner ) )
|
||||
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( namcos12_state::namcos12_rom_read ), (namcos12_state *) owner ) )
|
||||
|
||||
MCFG_CPU_ADD("sub", H83002, 16737350 )
|
||||
MCFG_CPU_PROGRAM_MAP( s12h8rwmap)
|
||||
@ -1633,7 +1636,7 @@ static MACHINE_CONFIG_START( coh700, namcos12_state )
|
||||
|
||||
/* video hardware */
|
||||
MCFG_PSXGPU_ADD( "maincpu", "gpu", CXD8654Q, 0x200000, XTAL_53_693175MHz )
|
||||
MCFG_PSXGPU_VBLANK_CALLBACK( vblank_state_delegate( FUNC( namcos12_sub_irq ), (namcos12_state *) owner ) )
|
||||
MCFG_PSXGPU_VBLANK_CALLBACK( vblank_state_delegate( FUNC( namcos12_state::namcos12_sub_irq ), (namcos12_state *) owner ) )
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
|
||||
|
@ -1486,16 +1486,37 @@ public:
|
||||
UINT32 screen_update_s23(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(s23_interrupt);
|
||||
TIMER_CALLBACK_MEMBER(c361_timer_cb);
|
||||
UINT8 nthbyte(const UINT32 *pSource, int offs);
|
||||
UINT16 nthword(const UINT32 *pSource, int offs);
|
||||
inline INT32 u32_to_s24(UINT32 v);
|
||||
inline INT32 u32_to_s10(UINT32 v);
|
||||
INT32 *p3d_getv(UINT16 id);
|
||||
INT16 *p3d_getm(UINT16 id);
|
||||
void p3d_matrix_set(const UINT16 *p, int size);
|
||||
void p3d_vector_set(const UINT16 *p, int size);
|
||||
void p3d_scaling_set(const UINT16 *p, int size);
|
||||
void p3d_vector_matrix_mul(const UINT16 *p, int size);
|
||||
void p3d_matrix_vector_mul(const UINT16 *p, int size);
|
||||
void p3d_matrix_matrix_mul(const UINT16 *p, int size);
|
||||
void p3d_render(const UINT16 *p, int size, bool use_scaling);
|
||||
void p3d_flush(const UINT16 *p, int size);
|
||||
void p3d_dma(address_space &space, UINT32 adr, UINT32 size);
|
||||
void render_apply_transform(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, poly_vertex &pv);
|
||||
void render_apply_matrot(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, INT32 &x, INT32 &y, INT32 &z);
|
||||
void render_project(poly_vertex &pv);
|
||||
void render_one_model(const namcos23_render_entry *re);
|
||||
void render_flush(bitmap_rgb32 &bitmap);
|
||||
void render_run(bitmap_rgb32 &bitmap);
|
||||
};
|
||||
|
||||
|
||||
static UINT8 nthbyte(const UINT32 *pSource, int offs)
|
||||
UINT8 namcos23_state::nthbyte(const UINT32 *pSource, int offs)
|
||||
{
|
||||
pSource += offs/4;
|
||||
return (pSource[0]<<((offs&3)*8))>>24;
|
||||
}
|
||||
|
||||
static UINT16 nthword(const UINT32 *pSource, int offs)
|
||||
UINT16 namcos23_state::nthword(const UINT32 *pSource, int offs)
|
||||
{
|
||||
pSource += offs/2;
|
||||
return (pSource[0]<<((offs&1)*16))>>16;
|
||||
@ -1513,12 +1534,12 @@ static UINT16 nthword(const UINT32 *pSource, int offs)
|
||||
|
||||
// 3D hardware, to throw at least in part in video/namcos23.c
|
||||
|
||||
INLINE INT32 u32_to_s24(UINT32 v)
|
||||
inline INT32 namcos23_state::u32_to_s24(UINT32 v)
|
||||
{
|
||||
return v & 0x800000 ? v | 0xff000000 : v & 0xffffff;
|
||||
}
|
||||
|
||||
INLINE INT32 u32_to_s10(UINT32 v)
|
||||
inline INT32 namcos23_state::u32_to_s10(UINT32 v)
|
||||
{
|
||||
return v & 0x200 ? v | 0xfffffe00 : v & 0x1ff;
|
||||
}
|
||||
@ -1533,48 +1554,48 @@ INLINE UINT8 light(UINT8 c, float l)
|
||||
return UINT8(l);
|
||||
}
|
||||
|
||||
static INT32 *p3d_getv(namcos23_state *state, UINT16 id)
|
||||
INT32 *namcos23_state::p3d_getv(UINT16 id)
|
||||
{
|
||||
if(id == 0x8000)
|
||||
return state->m_light_vector;
|
||||
return m_light_vector;
|
||||
if(id >= 0x100)
|
||||
{
|
||||
memset(state->m_spv, 0, sizeof(state->m_spv));
|
||||
return state->m_spv;
|
||||
memset(m_spv, 0, sizeof(m_spv));
|
||||
return m_spv;
|
||||
}
|
||||
return state->m_vectors[id];
|
||||
return m_vectors[id];
|
||||
}
|
||||
|
||||
static INT16 *p3d_getm(namcos23_state *state, UINT16 id)
|
||||
INT16 *namcos23_state::p3d_getm(UINT16 id)
|
||||
{
|
||||
if(id >= 0x100)
|
||||
{
|
||||
memset(state->m_spm, 0, sizeof(state->m_spm));
|
||||
return state->m_spm;
|
||||
memset(m_spm, 0, sizeof(m_spm));
|
||||
return m_spm;
|
||||
}
|
||||
return state->m_matrices[id];
|
||||
return m_matrices[id];
|
||||
}
|
||||
|
||||
static void p3d_matrix_set(namcos23_state *state, const UINT16 *p, int size)
|
||||
void namcos23_state::p3d_matrix_set(const UINT16 *p, int size)
|
||||
{
|
||||
if(size != 10)
|
||||
{
|
||||
logerror("WARNING: p3d_matrix_set with size %d\n", size);
|
||||
return;
|
||||
}
|
||||
INT16 *t = p3d_getm(state, *p++);
|
||||
INT16 *t = p3d_getm(*p++);
|
||||
for(int i=0; i<9; i++)
|
||||
t[i] = *p++;
|
||||
}
|
||||
|
||||
static void p3d_vector_set(namcos23_state *state, const UINT16 *p, int size)
|
||||
void namcos23_state::p3d_vector_set(const UINT16 *p, int size)
|
||||
{
|
||||
if(size != 7)
|
||||
{
|
||||
logerror("WARNING: p3d_vector_set with size %d\n", size);
|
||||
return;
|
||||
}
|
||||
INT32 *t = p3d_getv(state, *p++);
|
||||
INT32 *t = p3d_getv(*p++);
|
||||
for(int i=0; i<3; i++)
|
||||
{
|
||||
t[i] = u32_to_s24((p[0] << 16) | p[1]);
|
||||
@ -1583,17 +1604,17 @@ static void p3d_vector_set(namcos23_state *state, const UINT16 *p, int size)
|
||||
}
|
||||
|
||||
|
||||
static void p3d_scaling_set(namcos23_state *state, const UINT16 *p, int size)
|
||||
void namcos23_state::p3d_scaling_set(const UINT16 *p, int size)
|
||||
{
|
||||
if(size != 1)
|
||||
{
|
||||
logerror("WARNING: p3d_scaling_set with size %d\n", size);
|
||||
return;
|
||||
}
|
||||
state->m_scaling = *p;
|
||||
m_scaling = *p;
|
||||
}
|
||||
|
||||
static void p3d_vector_matrix_mul(namcos23_state *state, const UINT16 *p, int size)
|
||||
void namcos23_state::p3d_vector_matrix_mul(const UINT16 *p, int size)
|
||||
{
|
||||
if(size != 4)
|
||||
{
|
||||
@ -1603,16 +1624,16 @@ static void p3d_vector_matrix_mul(namcos23_state *state, const UINT16 *p, int si
|
||||
if(p[2] != 0xffff)
|
||||
logerror("WARNING: p3d_vector_matrix_mul with +2=%04x\n", p[2]);
|
||||
|
||||
INT32 *t = p3d_getv(state, p[0]);
|
||||
const INT16 *m = p3d_getm(state, p[1]);
|
||||
const INT32 *v = p3d_getv(state, p[3]);
|
||||
INT32 *t = p3d_getv(p[0]);
|
||||
const INT16 *m = p3d_getm(p[1]);
|
||||
const INT32 *v = p3d_getv(p[3]);
|
||||
|
||||
t[0] = INT32((m[0]*INT64(v[0]) + m[3]*INT64(v[1]) + m[6]*INT64(v[2])) >> 14);
|
||||
t[1] = INT32((m[1]*INT64(v[0]) + m[4]*INT64(v[1]) + m[7]*INT64(v[2])) >> 14);
|
||||
t[2] = INT32((m[2]*INT64(v[0]) + m[5]*INT64(v[1]) + m[8]*INT64(v[2])) >> 14);
|
||||
}
|
||||
|
||||
static void p3d_matrix_vector_mul(namcos23_state *state, const UINT16 *p, int size)
|
||||
void namcos23_state::p3d_matrix_vector_mul(const UINT16 *p, int size)
|
||||
{
|
||||
if(size != 4)
|
||||
{
|
||||
@ -1622,9 +1643,9 @@ static void p3d_matrix_vector_mul(namcos23_state *state, const UINT16 *p, int si
|
||||
if(p[2] != 0xffff)
|
||||
logerror("WARNING: p3d_matrix_vector_mul with +2=%04x\n", p[2]);
|
||||
|
||||
INT32 *t = p3d_getv(state, p[0]);
|
||||
const INT16 *m = p3d_getm(state, p[1]);
|
||||
const INT32 *v = p3d_getv(state, p[3]);
|
||||
INT32 *t = p3d_getv(p[0]);
|
||||
const INT16 *m = p3d_getm(p[1]);
|
||||
const INT32 *v = p3d_getv(p[3]);
|
||||
|
||||
t[0] = INT32((m[0]*INT64(v[0]) + m[1]*INT64(v[1]) + m[2]*INT64(v[2])) >> 14);
|
||||
t[1] = INT32((m[3]*INT64(v[0]) + m[4]*INT64(v[1]) + m[7]*INT64(v[2])) >> 14);
|
||||
@ -1632,7 +1653,7 @@ static void p3d_matrix_vector_mul(namcos23_state *state, const UINT16 *p, int si
|
||||
}
|
||||
|
||||
|
||||
static void p3d_matrix_matrix_mul(namcos23_state *state, const UINT16 *p, int size)
|
||||
void namcos23_state::p3d_matrix_matrix_mul(const UINT16 *p, int size)
|
||||
{
|
||||
if(size != 4)
|
||||
{
|
||||
@ -1642,9 +1663,9 @@ static void p3d_matrix_matrix_mul(namcos23_state *state, const UINT16 *p, int si
|
||||
if(p[2] != 0xffff)
|
||||
logerror("WARNING: p3d_matrix_matrix_mul with +2=%04x\n", p[2]);
|
||||
|
||||
INT16 *t = p3d_getm(state, p[0]);
|
||||
const INT16 *m1 = p3d_getm(state, p[1]);
|
||||
const INT16 *m2 = p3d_getm(state, p[3]);
|
||||
INT16 *t = p3d_getm(p[0]);
|
||||
const INT16 *m1 = p3d_getm(p[1]);
|
||||
const INT16 *m2 = p3d_getm(p[3]);
|
||||
|
||||
t[0] = INT16((m1[0]*m2[0] + m1[1]*m2[3] + m1[2]*m2[6]) >> 14);
|
||||
t[1] = INT16((m1[0]*m2[1] + m1[1]*m2[4] + m1[2]*m2[7]) >> 14);
|
||||
@ -1658,9 +1679,9 @@ static void p3d_matrix_matrix_mul(namcos23_state *state, const UINT16 *p, int si
|
||||
}
|
||||
|
||||
|
||||
static void p3d_render(namcos23_state *state, const UINT16 *p, int size, bool use_scaling)
|
||||
void namcos23_state::p3d_render(const UINT16 *p, int size, bool use_scaling)
|
||||
{
|
||||
render_t &render = state->m_render;
|
||||
render_t &render = m_render;
|
||||
|
||||
if(size != 3)
|
||||
{
|
||||
@ -1677,13 +1698,13 @@ static void p3d_render(namcos23_state *state, const UINT16 *p, int size, bool us
|
||||
}
|
||||
|
||||
// Vector and matrix may be inverted
|
||||
const INT16 *m = p3d_getm(state, p[1]);
|
||||
const INT32 *v = p3d_getv(state, p[2]);
|
||||
const INT16 *m = p3d_getm(p[1]);
|
||||
const INT32 *v = p3d_getv(p[2]);
|
||||
|
||||
namcos23_render_entry *re = render.entries[render.cur] + render.count[render.cur];
|
||||
re->type = MODEL;
|
||||
re->model.model = p[0];
|
||||
re->model.scaling = use_scaling ? state->m_scaling / 16384.0 : 1.0;
|
||||
re->model.scaling = use_scaling ? m_scaling / 16384.0 : 1.0;
|
||||
memcpy(re->model.m, m, sizeof(re->model.m));
|
||||
memcpy(re->model.v, v, sizeof(re->model.v));
|
||||
if(0)
|
||||
@ -1698,9 +1719,9 @@ static void p3d_render(namcos23_state *state, const UINT16 *p, int size, bool us
|
||||
}
|
||||
|
||||
|
||||
static void p3d_flush(namcos23_state *state, const UINT16 *p, int size)
|
||||
void namcos23_state::p3d_flush(const UINT16 *p, int size)
|
||||
{
|
||||
render_t &render = state->m_render;
|
||||
render_t &render = m_render;
|
||||
|
||||
if(size != 0)
|
||||
{
|
||||
@ -1713,9 +1734,8 @@ static void p3d_flush(namcos23_state *state, const UINT16 *p, int size)
|
||||
render.count[render.cur]++;
|
||||
}
|
||||
|
||||
static void p3d_dma(address_space &space, UINT32 adr, UINT32 size)
|
||||
void namcos23_state::p3d_dma(address_space &space, UINT32 adr, UINT32 size)
|
||||
{
|
||||
namcos23_state *state = space.machine().driver_data<namcos23_state>();
|
||||
UINT16 buffer[256];
|
||||
adr &= 0x1fffffff;
|
||||
int pos = 0;
|
||||
@ -1753,15 +1773,15 @@ static void p3d_dma(address_space &space, UINT32 adr, UINT32 size)
|
||||
|
||||
switch(h1)
|
||||
{
|
||||
case 0x0040: p3d_matrix_set(state, buffer, psize); break;
|
||||
case 0x0050: p3d_vector_set(state, buffer, psize); break;
|
||||
case 0x0000: p3d_matrix_matrix_mul(state, buffer, psize); break;
|
||||
case 0x0810: p3d_matrix_vector_mul(state, buffer, psize); break;
|
||||
case 0x1010: p3d_vector_matrix_mul(state, buffer, psize); break;
|
||||
case 0x4400: p3d_scaling_set(state, buffer, psize); break;
|
||||
case 0x8000: p3d_render(state, buffer, psize, false); break;
|
||||
case 0x8080: p3d_render(state, buffer, psize, true); break;
|
||||
case 0xc000: p3d_flush(state, buffer, psize); break;
|
||||
case 0x0040: p3d_matrix_set(buffer, psize); break;
|
||||
case 0x0050: p3d_vector_set(buffer, psize); break;
|
||||
case 0x0000: p3d_matrix_matrix_mul(buffer, psize); break;
|
||||
case 0x0810: p3d_matrix_vector_mul(buffer, psize); break;
|
||||
case 0x1010: p3d_vector_matrix_mul(buffer, psize); break;
|
||||
case 0x4400: p3d_scaling_set(buffer, psize); break;
|
||||
case 0x8000: p3d_render(buffer, psize, false); break;
|
||||
case 0x8080: p3d_render(buffer, psize, true); break;
|
||||
case 0xc000: p3d_flush(buffer, psize); break;
|
||||
default:
|
||||
if(0)
|
||||
{
|
||||
@ -1840,21 +1860,21 @@ static void render_scanline(void *dest, INT32 scanline, const poly_extent *exten
|
||||
}
|
||||
}
|
||||
|
||||
static void render_apply_transform(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, poly_vertex &pv)
|
||||
void namcos23_state::render_apply_transform(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, poly_vertex &pv)
|
||||
{
|
||||
pv.x = (INT32((re->model.m[0]*INT64(xi) + re->model.m[3]*INT64(yi) + re->model.m[6]*INT64(zi)) >> 14)*re->model.scaling + re->model.v[0])/16384.0;
|
||||
pv.y = (INT32((re->model.m[1]*INT64(xi) + re->model.m[4]*INT64(yi) + re->model.m[7]*INT64(zi)) >> 14)*re->model.scaling + re->model.v[1])/16384.0;
|
||||
pv.p[0] = (INT32((re->model.m[2]*INT64(xi) + re->model.m[5]*INT64(yi) + re->model.m[8]*INT64(zi)) >> 14)*re->model.scaling + re->model.v[2])/16384.0;
|
||||
}
|
||||
|
||||
static void render_apply_matrot(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, INT32 &x, INT32 &y, INT32 &z)
|
||||
void namcos23_state::render_apply_matrot(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, INT32 &x, INT32 &y, INT32 &z)
|
||||
{
|
||||
x = (re->model.m[0]*xi + re->model.m[3]*yi + re->model.m[6]*zi) >> 14;
|
||||
y = (re->model.m[1]*xi + re->model.m[4]*yi + re->model.m[7]*zi) >> 14;
|
||||
z = (re->model.m[2]*xi + re->model.m[5]*yi + re->model.m[8]*zi) >> 14;
|
||||
}
|
||||
|
||||
static void render_project(poly_vertex &pv)
|
||||
void namcos23_state::render_project(poly_vertex &pv)
|
||||
{
|
||||
// 768 validated by the title screen size on tc2:
|
||||
// texture is 640x480, x range is 3.125, y range is 2.34375, z is 3.75
|
||||
@ -1886,23 +1906,22 @@ static UINT32 render_texture_lookup_nocache_point(running_machine &machine, cons
|
||||
return pens[color];
|
||||
}
|
||||
|
||||
static void render_one_model(running_machine &machine, const namcos23_render_entry *re)
|
||||
void namcos23_state::render_one_model(const namcos23_render_entry *re)
|
||||
{
|
||||
namcos23_state *state = machine.driver_data<namcos23_state>();
|
||||
render_t &render = state->m_render;
|
||||
UINT32 adr = state->m_ptrom[re->model.model];
|
||||
if(adr >= state->m_ptrom_limit)
|
||||
render_t &render = m_render;
|
||||
UINT32 adr = m_ptrom[re->model.model];
|
||||
if(adr >= m_ptrom_limit)
|
||||
{
|
||||
logerror("WARNING: model %04x base address %08x out-of-bounds - pointram?\n", re->model.model, adr);
|
||||
return;
|
||||
}
|
||||
|
||||
while(adr < state->m_ptrom_limit)
|
||||
while(adr < m_ptrom_limit)
|
||||
{
|
||||
poly_vertex pv[15];
|
||||
|
||||
UINT32 type = state->m_ptrom[adr++];
|
||||
UINT32 h = state->m_ptrom[adr++];
|
||||
UINT32 type = m_ptrom[adr++];
|
||||
UINT32 h = m_ptrom[adr++];
|
||||
|
||||
|
||||
float tbase = (type >> 24) << 12;
|
||||
@ -1923,16 +1942,16 @@ static void render_one_model(running_machine &machine, const namcos23_render_ent
|
||||
adr += ne;
|
||||
}
|
||||
else
|
||||
light = state->m_ptrom[adr++];
|
||||
light = m_ptrom[adr++];
|
||||
|
||||
float minz = FLT_MAX;
|
||||
float maxz = FLT_MIN;
|
||||
|
||||
for(int i=0; i<ne; i++)
|
||||
{
|
||||
UINT32 v1 = state->m_ptrom[adr++];
|
||||
UINT32 v2 = state->m_ptrom[adr++];
|
||||
UINT32 v3 = state->m_ptrom[adr++];
|
||||
UINT32 v1 = m_ptrom[adr++];
|
||||
UINT32 v2 = m_ptrom[adr++];
|
||||
UINT32 v3 = m_ptrom[adr++];
|
||||
|
||||
render_apply_transform(u32_to_s24(v1), u32_to_s24(v2), u32_to_s24(v3), re, pv[i]);
|
||||
pv[i].p[1] = (((v1 >> 20) & 0xf00) | ((v2 >> 24 & 0xff))) + 0.5;
|
||||
@ -1953,14 +1972,14 @@ static void render_one_model(running_machine &machine, const namcos23_render_ent
|
||||
break;
|
||||
case 3:
|
||||
{
|
||||
UINT32 norm = state->m_ptrom[extptr++];
|
||||
UINT32 norm = m_ptrom[extptr++];
|
||||
INT32 nx = u32_to_s10(norm >> 20);
|
||||
INT32 ny = u32_to_s10(norm >> 10);
|
||||
INT32 nz = u32_to_s10(norm);
|
||||
INT32 nrx, nry, nrz;
|
||||
render_apply_matrot(nx, ny, nz, re, nrx, nry, nrz);
|
||||
|
||||
float lsi = float(nrx*state->m_light_vector[0] + nry*state->m_light_vector[1] + nrz*state->m_light_vector[2])/4194304.0;
|
||||
float lsi = float(nrx*m_light_vector[0] + nry*m_light_vector[1] + nrz*m_light_vector[2])/4194304.0;
|
||||
if(lsi < 0)
|
||||
lsi = 0;
|
||||
|
||||
@ -1987,9 +2006,9 @@ static void render_one_model(running_machine &machine, const namcos23_render_ent
|
||||
}
|
||||
p->zkey = 0.5*(minz+maxz);
|
||||
p->front = !(h & 0x00000001);
|
||||
p->rd.machine = &machine;
|
||||
p->rd.machine = &machine();
|
||||
p->rd.texture_lookup = render_texture_lookup_nocache_point;
|
||||
p->rd.pens = machine.pens + (color << 8);
|
||||
p->rd.pens = machine().pens + (color << 8);
|
||||
render.poly_count++;
|
||||
}
|
||||
|
||||
@ -2009,10 +2028,9 @@ static int render_poly_compare(const void *i1, const void *i2)
|
||||
return p1->zkey < p2->zkey ? 1 : p1->zkey > p2->zkey ? -1 : 0;
|
||||
}
|
||||
|
||||
static void render_flush(running_machine &machine, bitmap_rgb32 &bitmap)
|
||||
void namcos23_state::render_flush(bitmap_rgb32 &bitmap)
|
||||
{
|
||||
namcos23_state *state = machine.driver_data<namcos23_state>();
|
||||
render_t &render = state->m_render;
|
||||
render_t &render = m_render;
|
||||
|
||||
if(!render.poly_count)
|
||||
return;
|
||||
@ -2034,10 +2052,9 @@ static void render_flush(running_machine &machine, bitmap_rgb32 &bitmap)
|
||||
render.poly_count = 0;
|
||||
}
|
||||
|
||||
static void render_run(running_machine &machine, bitmap_rgb32 &bitmap)
|
||||
void namcos23_state::render_run(bitmap_rgb32 &bitmap)
|
||||
{
|
||||
namcos23_state *state = machine.driver_data<namcos23_state>();
|
||||
render_t &render = state->m_render;
|
||||
render_t &render = m_render;
|
||||
const namcos23_render_entry *re = render.entries[!render.cur];
|
||||
|
||||
render.poly_count = 0;
|
||||
@ -2046,15 +2063,15 @@ static void render_run(running_machine &machine, bitmap_rgb32 &bitmap)
|
||||
switch(re->type)
|
||||
{
|
||||
case MODEL:
|
||||
render_one_model(machine, re);
|
||||
render_one_model(re);
|
||||
break;
|
||||
case FLUSH:
|
||||
render_flush(machine, bitmap);
|
||||
render_flush(bitmap);
|
||||
break;
|
||||
}
|
||||
re++;
|
||||
}
|
||||
render_flush(machine, bitmap);
|
||||
render_flush(bitmap);
|
||||
|
||||
poly_wait(render.polymgr, "render_run");
|
||||
}
|
||||
@ -2138,7 +2155,7 @@ UINT32 namcos23_state::screen_update_s23(screen_device &screen, bitmap_rgb32 &bi
|
||||
update_mixer();
|
||||
bitmap.fill(m_c404.bgcolor, cliprect);
|
||||
|
||||
render_run(machine(), bitmap);
|
||||
render_run(bitmap);
|
||||
|
||||
m_bgtilemap->set_palette_offset(m_c404.palbase);
|
||||
if (m_c404.layer & 4)
|
||||
|
@ -127,6 +127,7 @@ protected:
|
||||
required_ioport m_io_dswc;
|
||||
|
||||
UINT8 nightgal_gfx_nibble( int niboffset );
|
||||
void plot_nightgal_gfx_pixel( UINT8 pix, int x, int y );
|
||||
};
|
||||
|
||||
|
||||
@ -176,18 +177,17 @@ UINT8 nightgal_state::nightgal_gfx_nibble( int niboffset )
|
||||
}
|
||||
}
|
||||
|
||||
static void plot_nightgal_gfx_pixel( running_machine &machine, UINT8 pix, int x, int y )
|
||||
void nightgal_state::plot_nightgal_gfx_pixel( UINT8 pix, int x, int y )
|
||||
{
|
||||
nightgal_state *state = machine.driver_data<nightgal_state>();
|
||||
if (y >= 512) return;
|
||||
if (x >= 512) return;
|
||||
if (y < 0) return;
|
||||
if (x < 0) return;
|
||||
|
||||
if (x & 1)
|
||||
state->m_blit_buffer[(y * 256) + (x >> 1)] = (state->m_blit_buffer[(y * 256) + (x >> 1)] & 0x0f) | ((pix << 4) & 0xf0);
|
||||
m_blit_buffer[(y * 256) + (x >> 1)] = (m_blit_buffer[(y * 256) + (x >> 1)] & 0x0f) | ((pix << 4) & 0xf0);
|
||||
else
|
||||
state->m_blit_buffer[(y * 256) + (x >> 1)] = (state->m_blit_buffer[(y * 256) + (x >> 1)] & 0xf0) | (pix & 0x0f);
|
||||
m_blit_buffer[(y * 256) + (x >> 1)] = (m_blit_buffer[(y * 256) + (x >> 1)] & 0xf0) | (pix & 0x0f);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(nightgal_state::nsc_true_blitter_w)
|
||||
@ -231,7 +231,7 @@ WRITE8_MEMBER(nightgal_state::nsc_true_blitter_w)
|
||||
dat = cur_pen_lo | (cur_pen_hi << 4);
|
||||
|
||||
if ((dat & 0xff) != 0)
|
||||
plot_nightgal_gfx_pixel(machine(), dat, drawx, drawy);
|
||||
plot_nightgal_gfx_pixel(dat, drawx, drawy);
|
||||
|
||||
if (!flipx)
|
||||
count--;
|
||||
@ -286,7 +286,7 @@ WRITE8_MEMBER(nightgal_state::sexygal_nsc_true_blitter_w)
|
||||
dat = cur_pen_lo | cur_pen_hi << 4;
|
||||
|
||||
if ((dat & 0xff) != 0)
|
||||
plot_nightgal_gfx_pixel(machine(), dat, drawx, drawy);
|
||||
plot_nightgal_gfx_pixel(dat, drawx, drawy);
|
||||
|
||||
if (!flipx)
|
||||
count--;
|
||||
|
@ -279,6 +279,7 @@ public:
|
||||
virtual void machine_reset();
|
||||
virtual void video_start();
|
||||
UINT32 screen_update_nmg5(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void draw_bitmap( bitmap_ind16 &bitmap );
|
||||
};
|
||||
|
||||
|
||||
@ -854,9 +855,8 @@ void nmg5_state::video_start()
|
||||
|
||||
|
||||
|
||||
static void draw_bitmap( running_machine &machine, bitmap_ind16 &bitmap )
|
||||
void nmg5_state::draw_bitmap( bitmap_ind16 &bitmap )
|
||||
{
|
||||
nmg5_state *state = machine.driver_data<nmg5_state>();
|
||||
int yyy = 256;
|
||||
int xxx = 512 / 4;
|
||||
UINT16 x, y, count;
|
||||
@ -869,13 +869,13 @@ static void draw_bitmap( running_machine &machine, bitmap_ind16 &bitmap )
|
||||
{
|
||||
for (x = 0; x < xxx; x++)
|
||||
{
|
||||
pix = (state->m_bitmap[count] & 0xf000) >> 12;
|
||||
pix = (m_bitmap[count] & 0xf000) >> 12;
|
||||
if (pix) bitmap.pix16(y + yoff, x * 4 + 0 + xoff) = pix + 0x300;
|
||||
pix = (state->m_bitmap[count] & 0x0f00) >> 8;
|
||||
pix = (m_bitmap[count] & 0x0f00) >> 8;
|
||||
if (pix) bitmap.pix16(y + yoff, x * 4 + 1 + xoff) = pix + 0x300;
|
||||
pix = (state->m_bitmap[count] & 0x00f0) >> 4;
|
||||
pix = (m_bitmap[count] & 0x00f0) >> 4;
|
||||
if (pix) bitmap.pix16(y + yoff, x * 4 + 2 + xoff) = pix + 0x300;
|
||||
pix = (state->m_bitmap[count] & 0x000f) >> 0;
|
||||
pix = (m_bitmap[count] & 0x000f) >> 0;
|
||||
if (pix) bitmap.pix16(y + yoff, x * 4 + 3 + xoff) = pix + 0x300;
|
||||
|
||||
count++;
|
||||
@ -897,30 +897,30 @@ UINT32 nmg5_state::screen_update_nmg5(screen_device &screen, bitmap_ind16 &bitma
|
||||
{
|
||||
m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x400);
|
||||
m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
|
||||
draw_bitmap(machine(), bitmap);
|
||||
draw_bitmap(bitmap);
|
||||
}
|
||||
else if (m_priority_reg == 1)
|
||||
{
|
||||
draw_bitmap(machine(), bitmap);
|
||||
draw_bitmap(bitmap);
|
||||
m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x400);
|
||||
m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
|
||||
}
|
||||
else if (m_priority_reg == 2)
|
||||
{
|
||||
m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x400);
|
||||
draw_bitmap(machine(), bitmap);
|
||||
draw_bitmap(bitmap);
|
||||
m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
|
||||
}
|
||||
else if (m_priority_reg == 3)
|
||||
{
|
||||
m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
|
||||
m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x400);
|
||||
draw_bitmap(machine(), bitmap);
|
||||
draw_bitmap(bitmap);
|
||||
}
|
||||
else if (m_priority_reg == 7)
|
||||
{
|
||||
m_fg_tilemap->draw(bitmap, cliprect, 0, 0);
|
||||
draw_bitmap(machine(), bitmap);
|
||||
draw_bitmap(bitmap);
|
||||
m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x400);
|
||||
}
|
||||
return 0;
|
||||
|
@ -268,6 +268,8 @@ public:
|
||||
virtual void palette_init();
|
||||
UINT32 screen_update_peplus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
TIMER_CALLBACK_MEMBER(assert_lp_cb);
|
||||
void peplus_load_superdata(const char *bank_name);
|
||||
void peplus_init();
|
||||
};
|
||||
|
||||
static const UINT8 id_022[8] = { 0x00, 0x01, 0x04, 0x09, 0x13, 0x16, 0x18, 0x00 };
|
||||
@ -311,18 +313,17 @@ static MC6845_INTERFACE( mc6845_intf )
|
||||
* Memory Copy *
|
||||
***************/
|
||||
|
||||
static void peplus_load_superdata(running_machine &machine, const char *bank_name)
|
||||
void peplus_state::peplus_load_superdata(const char *bank_name)
|
||||
{
|
||||
peplus_state *state = machine.driver_data<peplus_state>();
|
||||
UINT8 *super_data = state->memregion(bank_name)->base();
|
||||
UINT8 *super_data = memregion(bank_name)->base();
|
||||
|
||||
/* Distribute Superboard Data */
|
||||
memcpy(state->m_s3000_ram, &super_data[0x3000], 0x1000);
|
||||
memcpy(state->m_s5000_ram, &super_data[0x5000], 0x1000);
|
||||
memcpy(state->m_s7000_ram, &super_data[0x7000], 0x1000);
|
||||
memcpy(state->m_sb000_ram, &super_data[0xb000], 0x1000);
|
||||
memcpy(state->m_sd000_ram, &super_data[0xd000], 0x1000);
|
||||
memcpy(state->m_sf000_ram, &super_data[0xf000], 0x1000);
|
||||
memcpy(m_s3000_ram, &super_data[0x3000], 0x1000);
|
||||
memcpy(m_s5000_ram, &super_data[0x5000], 0x1000);
|
||||
memcpy(m_s7000_ram, &super_data[0x7000], 0x1000);
|
||||
memcpy(m_sb000_ram, &super_data[0xb000], 0x1000);
|
||||
memcpy(m_sd000_ram, &super_data[0xd000], 0x1000);
|
||||
memcpy(m_sf000_ram, &super_data[0xf000], 0x1000);
|
||||
}
|
||||
|
||||
|
||||
@ -431,7 +432,7 @@ WRITE8_MEMBER(peplus_state::peplus_cmos_w)
|
||||
if (offset == 0x1fff && m_wingboard && data < 5)
|
||||
{
|
||||
sprintf(bank_name, "user%d", data + 1);
|
||||
peplus_load_superdata(machine(), bank_name);
|
||||
peplus_load_superdata(bank_name);
|
||||
}
|
||||
|
||||
m_cmos_ram[offset] = data;
|
||||
@ -1377,11 +1378,10 @@ MACHINE_CONFIG_END
|
||||
*****************/
|
||||
|
||||
/* Normal board */
|
||||
static void peplus_init(running_machine &machine)
|
||||
void peplus_state::peplus_init()
|
||||
{
|
||||
peplus_state *state = machine.driver_data<peplus_state>();
|
||||
/* default : no address to patch in program RAM to enable autohold feature */
|
||||
state->m_autohold_addr = 0;
|
||||
m_autohold_addr = 0;
|
||||
}
|
||||
|
||||
|
||||
@ -1394,7 +1394,7 @@ DRIVER_INIT_MEMBER(peplus_state,peplus)
|
||||
{
|
||||
m_wingboard = FALSE;
|
||||
m_jumper_e16_e17 = FALSE;
|
||||
peplus_init(machine());
|
||||
peplus_init();
|
||||
}
|
||||
|
||||
/* Superboard */
|
||||
@ -1402,9 +1402,9 @@ DRIVER_INIT_MEMBER(peplus_state,peplussb)
|
||||
{
|
||||
m_wingboard = FALSE;
|
||||
m_jumper_e16_e17 = FALSE;
|
||||
peplus_load_superdata(machine(), "user1");
|
||||
peplus_load_superdata("user1");
|
||||
|
||||
peplus_init(machine());
|
||||
peplus_init();
|
||||
}
|
||||
|
||||
/* Superboard with Attached Wingboard */
|
||||
@ -1412,9 +1412,9 @@ DRIVER_INIT_MEMBER(peplus_state,peplussbw)
|
||||
{
|
||||
m_wingboard = TRUE;
|
||||
m_jumper_e16_e17 = TRUE;
|
||||
peplus_load_superdata(machine(), "user1");
|
||||
peplus_load_superdata("user1");
|
||||
|
||||
peplus_init(machine());
|
||||
peplus_init();
|
||||
}
|
||||
|
||||
|
||||
|
@ -496,26 +496,23 @@ public:
|
||||
virtual void machine_reset();
|
||||
UINT32 screen_update_seattle(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
TIMER_CALLBACK_MEMBER(galileo_timer_callback);
|
||||
void ethernet_interrupt_machine(int state);
|
||||
void update_vblank_irq();
|
||||
UINT32 pci_bridge_r(address_space &space, UINT8 reg, UINT8 type);
|
||||
void pci_bridge_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data);
|
||||
UINT32 pci_3dfx_r(address_space &space, UINT8 reg, UINT8 type);
|
||||
void pci_3dfx_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data);
|
||||
UINT32 pci_ide_r(address_space &space, UINT8 reg, UINT8 type);
|
||||
void pci_ide_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data);
|
||||
void update_galileo_irqs();
|
||||
int galileo_dma_fetch_next(address_space &space, int which);
|
||||
void galileo_perform_dma(address_space &space, int which);
|
||||
void galileo_reset();
|
||||
void widget_reset();
|
||||
void update_widget_irq();
|
||||
void init_common(int ioasic, int serialnum, int yearoffs, int config);
|
||||
};
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Prototypes
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void vblank_assert(device_t *device, int state);
|
||||
static void update_vblank_irq(running_machine &machine);
|
||||
static void galileo_reset(running_machine &machine);
|
||||
|
||||
static void galileo_perform_dma(address_space &space, int which);
|
||||
static void voodoo_stall(device_t *device, int stall);
|
||||
static void widget_reset(running_machine &machine);
|
||||
static void update_widget_irq(running_machine &machine);
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Video start and update
|
||||
@ -607,9 +604,9 @@ void seattle_state::machine_reset()
|
||||
}
|
||||
|
||||
/* reset the other devices */
|
||||
galileo_reset(machine());
|
||||
galileo_reset();
|
||||
if (m_board_config == SEATTLE_WIDGET_CONFIG)
|
||||
widget_reset(machine());
|
||||
widget_reset();
|
||||
}
|
||||
|
||||
|
||||
@ -633,23 +630,23 @@ WRITE_LINE_MEMBER(seattle_state::ide_interrupt)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void ethernet_interrupt_machine(running_machine &machine, int state)
|
||||
void seattle_state::ethernet_interrupt_machine(int state)
|
||||
{
|
||||
seattle_state *drvstate = machine.driver_data<seattle_state>();
|
||||
drvstate->m_ethernet_irq_state = state;
|
||||
if (drvstate->m_board_config == FLAGSTAFF_CONFIG)
|
||||
m_ethernet_irq_state = state;
|
||||
if (m_board_config == FLAGSTAFF_CONFIG)
|
||||
{
|
||||
UINT8 assert = drvstate->m_ethernet_irq_state && (*drvstate->m_interrupt_enable & (1 << ETHERNET_IRQ_SHIFT));
|
||||
if (drvstate->m_ethernet_irq_num != 0)
|
||||
machine.device("maincpu")->execute().set_input_line(drvstate->m_ethernet_irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
|
||||
UINT8 assert = m_ethernet_irq_state && (*m_interrupt_enable & (1 << ETHERNET_IRQ_SHIFT));
|
||||
if (m_ethernet_irq_num != 0)
|
||||
machine().device("maincpu")->execute().set_input_line(m_ethernet_irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
else if (drvstate->m_board_config == SEATTLE_WIDGET_CONFIG)
|
||||
update_widget_irq(machine);
|
||||
else if (m_board_config == SEATTLE_WIDGET_CONFIG)
|
||||
update_widget_irq();
|
||||
}
|
||||
|
||||
static void ethernet_interrupt(device_t *device, int state)
|
||||
{
|
||||
ethernet_interrupt_machine(device->machine(), state);
|
||||
seattle_state *drvstate = device->machine().driver_data<seattle_state>();
|
||||
drvstate->ethernet_interrupt_machine(state);
|
||||
}
|
||||
|
||||
|
||||
@ -728,8 +725,8 @@ WRITE32_MEMBER(seattle_state::interrupt_config_w)
|
||||
}
|
||||
|
||||
/* update the states */
|
||||
update_vblank_irq(machine());
|
||||
ethernet_interrupt_machine(machine(), m_ethernet_irq_state);
|
||||
update_vblank_irq();
|
||||
ethernet_interrupt_machine(m_ethernet_irq_state);
|
||||
}
|
||||
|
||||
|
||||
@ -740,9 +737,9 @@ WRITE32_MEMBER(seattle_state::seattle_interrupt_enable_w)
|
||||
if (old != *m_interrupt_enable)
|
||||
{
|
||||
if (m_vblank_latch)
|
||||
update_vblank_irq(machine());
|
||||
update_vblank_irq();
|
||||
if (m_ethernet_irq_state)
|
||||
ethernet_interrupt_machine(machine(), m_ethernet_irq_state);
|
||||
ethernet_interrupt_machine(m_ethernet_irq_state);
|
||||
}
|
||||
}
|
||||
|
||||
@ -754,19 +751,18 @@ WRITE32_MEMBER(seattle_state::seattle_interrupt_enable_w)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void update_vblank_irq(running_machine &machine)
|
||||
void seattle_state::update_vblank_irq()
|
||||
{
|
||||
seattle_state *drvstate = machine.driver_data<seattle_state>();
|
||||
int state = CLEAR_LINE;
|
||||
|
||||
/* skip if no interrupt configured */
|
||||
if (drvstate->m_vblank_irq_num == 0)
|
||||
if (m_vblank_irq_num == 0)
|
||||
return;
|
||||
|
||||
/* if the VBLANK has been latched, and the interrupt is enabled, assert */
|
||||
if (drvstate->m_vblank_latch && (*drvstate->m_interrupt_enable & (1 << VBLANK_IRQ_SHIFT)))
|
||||
if (m_vblank_latch && (*m_interrupt_enable & (1 << VBLANK_IRQ_SHIFT)))
|
||||
state = ASSERT_LINE;
|
||||
machine.device("maincpu")->execute().set_input_line(drvstate->m_vblank_irq_num, state);
|
||||
machine().device("maincpu")->execute().set_input_line(m_vblank_irq_num, state);
|
||||
}
|
||||
|
||||
|
||||
@ -774,7 +770,7 @@ WRITE32_MEMBER(seattle_state::vblank_clear_w)
|
||||
{
|
||||
/* clear the latch and update the IRQ */
|
||||
m_vblank_latch = 0;
|
||||
update_vblank_irq(machine());
|
||||
update_vblank_irq();
|
||||
}
|
||||
|
||||
|
||||
@ -788,7 +784,7 @@ static void vblank_assert(device_t *device, int state)
|
||||
if ((state && !(*drvstate->m_interrupt_enable & 0x100)) || (!state && (*drvstate->m_interrupt_enable & 0x100)))
|
||||
{
|
||||
drvstate->m_vblank_latch = 1;
|
||||
update_vblank_irq(device->machine());
|
||||
drvstate->update_vblank_irq();
|
||||
}
|
||||
}
|
||||
|
||||
@ -800,10 +796,9 @@ static void vblank_assert(device_t *device, int state)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static UINT32 pci_bridge_r(address_space &space, UINT8 reg, UINT8 type)
|
||||
UINT32 seattle_state::pci_bridge_r(address_space &space, UINT8 reg, UINT8 type)
|
||||
{
|
||||
seattle_state *state = space.machine().driver_data<seattle_state>();
|
||||
UINT32 result = state->m_galileo.pci_bridge_regs[reg];
|
||||
UINT32 result = m_galileo.pci_bridge_regs[reg];
|
||||
|
||||
switch (reg)
|
||||
{
|
||||
@ -822,10 +817,9 @@ static UINT32 pci_bridge_r(address_space &space, UINT8 reg, UINT8 type)
|
||||
}
|
||||
|
||||
|
||||
static void pci_bridge_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
|
||||
{
|
||||
seattle_state *state = space.machine().driver_data<seattle_state>();
|
||||
state->m_galileo.pci_bridge_regs[reg] = data;
|
||||
void seattle_state::pci_bridge_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
|
||||
{
|
||||
m_galileo.pci_bridge_regs[reg] = data;
|
||||
if (LOG_PCI)
|
||||
logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", space.device().safe_pc(), reg, type, data);
|
||||
}
|
||||
@ -838,10 +832,9 @@ static void pci_bridge_w(address_space &space, UINT8 reg, UINT8 type, UINT32 dat
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static UINT32 pci_3dfx_r(address_space &space, UINT8 reg, UINT8 type)
|
||||
{
|
||||
seattle_state *state = space.machine().driver_data<seattle_state>();
|
||||
UINT32 result = state->m_galileo.pci_3dfx_regs[reg];
|
||||
UINT32 seattle_state::pci_3dfx_r(address_space &space, UINT8 reg, UINT8 type)
|
||||
{
|
||||
UINT32 result = m_galileo.pci_3dfx_regs[reg];
|
||||
|
||||
switch (reg)
|
||||
{
|
||||
@ -860,21 +853,20 @@ static UINT32 pci_3dfx_r(address_space &space, UINT8 reg, UINT8 type)
|
||||
}
|
||||
|
||||
|
||||
static void pci_3dfx_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
|
||||
void seattle_state::pci_3dfx_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
|
||||
{
|
||||
seattle_state *state = space.machine().driver_data<seattle_state>();
|
||||
state->m_galileo.pci_3dfx_regs[reg] = data;
|
||||
m_galileo.pci_3dfx_regs[reg] = data;
|
||||
|
||||
switch (reg)
|
||||
{
|
||||
case 0x04: /* address register */
|
||||
state->m_galileo.pci_3dfx_regs[reg] &= 0xff000000;
|
||||
m_galileo.pci_3dfx_regs[reg] &= 0xff000000;
|
||||
if (data != 0x08000000)
|
||||
logerror("3dfx not mapped where we expect it! (%08X)\n", data);
|
||||
break;
|
||||
|
||||
case 0x10: /* initEnable register */
|
||||
voodoo_set_init_enable(state->m_voodoo, data);
|
||||
voodoo_set_init_enable(m_voodoo, data);
|
||||
break;
|
||||
}
|
||||
if (LOG_PCI)
|
||||
@ -889,10 +881,9 @@ static void pci_3dfx_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static UINT32 pci_ide_r(address_space &space, UINT8 reg, UINT8 type)
|
||||
UINT32 seattle_state::pci_ide_r(address_space &space, UINT8 reg, UINT8 type)
|
||||
{
|
||||
seattle_state *state = space.machine().driver_data<seattle_state>();
|
||||
UINT32 result = state->m_galileo.pci_ide_regs[reg];
|
||||
UINT32 result = m_galileo.pci_ide_regs[reg];
|
||||
|
||||
switch (reg)
|
||||
{
|
||||
@ -911,10 +902,9 @@ static UINT32 pci_ide_r(address_space &space, UINT8 reg, UINT8 type)
|
||||
}
|
||||
|
||||
|
||||
static void pci_ide_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
|
||||
void seattle_state::pci_ide_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
|
||||
{
|
||||
seattle_state *state = space.machine().driver_data<seattle_state>();
|
||||
state->m_galileo.pci_ide_regs[reg] = data;
|
||||
m_galileo.pci_ide_regs[reg] = data;
|
||||
if (LOG_PCI)
|
||||
logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", space.device().safe_pc(), reg, type, data);
|
||||
}
|
||||
@ -927,15 +917,14 @@ static void pci_ide_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void update_galileo_irqs(running_machine &machine)
|
||||
void seattle_state::update_galileo_irqs()
|
||||
{
|
||||
seattle_state *drvstate = machine.driver_data<seattle_state>();
|
||||
int state = CLEAR_LINE;
|
||||
|
||||
/* if any unmasked interrupts are live, we generate */
|
||||
if (drvstate->m_galileo.reg[GREG_INT_STATE] & drvstate->m_galileo.reg[GREG_INT_MASK])
|
||||
if (m_galileo.reg[GREG_INT_STATE] & m_galileo.reg[GREG_INT_MASK])
|
||||
state = ASSERT_LINE;
|
||||
machine.device("maincpu")->execute().set_input_line(GALILEO_IRQ_NUM, state);
|
||||
machine().device("maincpu")->execute().set_input_line(GALILEO_IRQ_NUM, state);
|
||||
|
||||
if (LOG_GALILEO)
|
||||
logerror("Galileo IRQ %s\n", (state == ASSERT_LINE) ? "asserted" : "cleared");
|
||||
@ -963,7 +952,7 @@ TIMER_CALLBACK_MEMBER(seattle_state::galileo_timer_callback)
|
||||
|
||||
/* trigger the interrupt */
|
||||
m_galileo.reg[GREG_INT_STATE] |= 1 << (GINT_T0EXP_SHIFT + which);
|
||||
update_galileo_irqs(machine());
|
||||
update_galileo_irqs();
|
||||
}
|
||||
|
||||
|
||||
@ -974,10 +963,9 @@ TIMER_CALLBACK_MEMBER(seattle_state::galileo_timer_callback)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static int galileo_dma_fetch_next(address_space &space, int which)
|
||||
int seattle_state::galileo_dma_fetch_next(address_space &space, int which)
|
||||
{
|
||||
seattle_state *state = space.machine().driver_data<seattle_state>();
|
||||
galileo_data &galileo = state->m_galileo;
|
||||
galileo_data &galileo = m_galileo;
|
||||
offs_t address = 0;
|
||||
UINT32 data;
|
||||
|
||||
@ -991,7 +979,7 @@ static int galileo_dma_fetch_next(address_space &space, int which)
|
||||
if (galileo.reg[GREG_DMA0_CONTROL + which] & 0x400)
|
||||
{
|
||||
galileo.reg[GREG_INT_STATE] |= 1 << (GINT_DMA0COMP_SHIFT + which);
|
||||
update_galileo_irqs(space.machine());
|
||||
update_galileo_irqs();
|
||||
}
|
||||
galileo.reg[GREG_DMA0_CONTROL + which] &= ~0x5000;
|
||||
return 0;
|
||||
@ -1016,10 +1004,9 @@ static int galileo_dma_fetch_next(address_space &space, int which)
|
||||
}
|
||||
|
||||
|
||||
static void galileo_perform_dma(address_space &space, int which)
|
||||
void seattle_state::galileo_perform_dma(address_space &space, int which)
|
||||
{
|
||||
seattle_state *state = space.machine().driver_data<seattle_state>();
|
||||
galileo_data &galileo = state->m_galileo;
|
||||
galileo_data &galileo = m_galileo;
|
||||
do
|
||||
{
|
||||
offs_t srcaddr = galileo.reg[GREG_DMA0_SOURCE + which];
|
||||
@ -1061,7 +1048,7 @@ static void galileo_perform_dma(address_space &space, int which)
|
||||
while (bytesleft >= 4)
|
||||
{
|
||||
/* if the voodoo is stalled, stop early */
|
||||
if (state->m_voodoo_stalled)
|
||||
if (m_voodoo_stalled)
|
||||
{
|
||||
if (LOG_DMA)
|
||||
logerror("Stalled on voodoo with %d bytes left\n", bytesleft);
|
||||
@ -1069,7 +1056,7 @@ static void galileo_perform_dma(address_space &space, int which)
|
||||
}
|
||||
|
||||
/* write the data and advance */
|
||||
voodoo_w(state->m_voodoo, space, (dstaddr & 0xffffff) / 4, space.read_dword(srcaddr), 0xffffffff);
|
||||
voodoo_w(m_voodoo, space, (dstaddr & 0xffffff) / 4, space.read_dword(srcaddr), 0xffffffff);
|
||||
srcaddr += srcinc;
|
||||
dstaddr += dstinc;
|
||||
bytesleft -= 4;
|
||||
@ -1102,7 +1089,7 @@ static void galileo_perform_dma(address_space &space, int which)
|
||||
if (!(galileo.reg[GREG_DMA0_CONTROL + which] & 0x400))
|
||||
{
|
||||
galileo.reg[GREG_INT_STATE] |= 1 << (GINT_DMA0COMP_SHIFT + which);
|
||||
update_galileo_irqs(space.machine());
|
||||
update_galileo_irqs();
|
||||
}
|
||||
} while (galileo_dma_fetch_next(space, which));
|
||||
|
||||
@ -1117,10 +1104,9 @@ static void galileo_perform_dma(address_space &space, int which)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void galileo_reset(running_machine &machine)
|
||||
void seattle_state::galileo_reset()
|
||||
{
|
||||
seattle_state *state = machine.driver_data<seattle_state>();
|
||||
memset(&state->m_galileo.reg, 0, sizeof(state->m_galileo.reg));
|
||||
memset(&m_galileo.reg, 0, sizeof(m_galileo.reg));
|
||||
}
|
||||
|
||||
|
||||
@ -1296,7 +1282,7 @@ WRITE32_MEMBER(seattle_state::galileo_w)
|
||||
if (LOG_GALILEO)
|
||||
logerror("%08X:Galileo write to IRQ clear = %08X & %08X\n", offset*4, data, mem_mask);
|
||||
galileo.reg[offset] = oldata & data;
|
||||
update_galileo_irqs(machine());
|
||||
update_galileo_irqs();
|
||||
break;
|
||||
|
||||
case GREG_CONFIG_DATA:
|
||||
@ -1411,7 +1397,7 @@ static void voodoo_stall(device_t *device, int stall)
|
||||
state->m_galileo.dma_stalled_on_voodoo[which] = FALSE;
|
||||
|
||||
/* resume execution */
|
||||
galileo_perform_dma(space, which);
|
||||
state->galileo_perform_dma(space, which);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1550,25 +1536,23 @@ WRITE32_MEMBER(seattle_state::ethernet_w)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void widget_reset(running_machine &machine)
|
||||
void seattle_state::widget_reset()
|
||||
{
|
||||
seattle_state *state = machine.driver_data<seattle_state>();
|
||||
UINT8 saved_irq = state->m_widget.irq_num;
|
||||
memset(&state->m_widget, 0, sizeof(state->m_widget));
|
||||
state->m_widget.irq_num = saved_irq;
|
||||
UINT8 saved_irq = m_widget.irq_num;
|
||||
memset(&m_widget, 0, sizeof(m_widget));
|
||||
m_widget.irq_num = saved_irq;
|
||||
}
|
||||
|
||||
|
||||
static void update_widget_irq(running_machine &machine)
|
||||
void seattle_state::update_widget_irq()
|
||||
{
|
||||
seattle_state *drvstate = machine.driver_data<seattle_state>();
|
||||
UINT8 state = drvstate->m_ethernet_irq_state << WINT_ETHERNET_SHIFT;
|
||||
UINT8 mask = drvstate->m_widget.irq_mask;
|
||||
UINT8 assert = ((mask & state) != 0) && (*drvstate->m_interrupt_enable & (1 << WIDGET_IRQ_SHIFT));
|
||||
UINT8 state = m_ethernet_irq_state << WINT_ETHERNET_SHIFT;
|
||||
UINT8 mask = m_widget.irq_mask;
|
||||
UINT8 assert = ((mask & state) != 0) && (*m_interrupt_enable & (1 << WIDGET_IRQ_SHIFT));
|
||||
|
||||
/* update the IRQ state */
|
||||
if (drvstate->m_widget.irq_num != 0)
|
||||
machine.device("maincpu")->execute().set_input_line(drvstate->m_widget.irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
|
||||
if (m_widget.irq_num != 0)
|
||||
machine().device("maincpu")->execute().set_input_line(m_widget.irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
|
||||
@ -1617,7 +1601,7 @@ WRITE32_MEMBER(seattle_state::widget_w)
|
||||
|
||||
case WREG_INTERRUPT:
|
||||
m_widget.irq_mask = data;
|
||||
update_widget_irq(machine());
|
||||
update_widget_irq();
|
||||
break;
|
||||
|
||||
case WREG_ANALOG:
|
||||
@ -2856,33 +2840,32 @@ ROM_END
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void init_common(running_machine &machine, int ioasic, int serialnum, int yearoffs, int config)
|
||||
void seattle_state::init_common(int ioasic, int serialnum, int yearoffs, int config)
|
||||
{
|
||||
seattle_state *state = machine.driver_data<seattle_state>();
|
||||
|
||||
/* initialize the subsystems */
|
||||
midway_ioasic_init(machine, ioasic, serialnum, yearoffs, ioasic_irq);
|
||||
midway_ioasic_init(machine(),ioasic, serialnum, yearoffs, ioasic_irq);
|
||||
|
||||
/* switch off the configuration */
|
||||
state->m_board_config = config;
|
||||
m_board_config = config;
|
||||
switch (config)
|
||||
{
|
||||
case PHOENIX_CONFIG:
|
||||
/* original Phoenix board only has 4MB of RAM */
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).unmap_readwrite(0x00400000, 0x007fffff);
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).unmap_readwrite(0x00400000, 0x007fffff);
|
||||
break;
|
||||
|
||||
case SEATTLE_WIDGET_CONFIG:
|
||||
/* set up the widget board */
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x16c00000, 0x16c0001f, read32_delegate(FUNC(seattle_state::widget_r),state), write32_delegate(FUNC(seattle_state::widget_w),state));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x16c00000, 0x16c0001f, read32_delegate(FUNC(seattle_state::widget_r),this), write32_delegate(FUNC(seattle_state::widget_w),this));
|
||||
break;
|
||||
|
||||
case FLAGSTAFF_CONFIG:
|
||||
/* set up the analog inputs */
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x14000000, 0x14000003, read32_delegate(FUNC(seattle_state::analog_port_r),state), write32_delegate(FUNC(seattle_state::analog_port_w),state));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x14000000, 0x14000003, read32_delegate(FUNC(seattle_state::analog_port_r),this), write32_delegate(FUNC(seattle_state::analog_port_w),this));
|
||||
|
||||
/* set up the ethernet controller */
|
||||
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x16c00000, 0x16c0003f, read32_delegate(FUNC(seattle_state::ethernet_r),state), write32_delegate(FUNC(seattle_state::ethernet_w),state));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x16c00000, 0x16c0003f, read32_delegate(FUNC(seattle_state::ethernet_r),this), write32_delegate(FUNC(seattle_state::ethernet_w),this));
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -2891,7 +2874,7 @@ static void init_common(running_machine &machine, int ioasic, int serialnum, int
|
||||
DRIVER_INIT_MEMBER(seattle_state,wg3dh)
|
||||
{
|
||||
dcs2_init(machine(), 2, 0x3839);
|
||||
init_common(machine(), MIDWAY_IOASIC_STANDARD, 310/* others? */, 80, PHOENIX_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_STANDARD, 310/* others? */, 80, PHOENIX_CONFIG);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x8004413C, 0x0C0054B4, 250); /* confirmed */
|
||||
@ -2903,7 +2886,7 @@ DRIVER_INIT_MEMBER(seattle_state,wg3dh)
|
||||
DRIVER_INIT_MEMBER(seattle_state,mace)
|
||||
{
|
||||
dcs2_init(machine(), 2, 0x3839);
|
||||
init_common(machine(), MIDWAY_IOASIC_MACE, 319/* others? */, 80, SEATTLE_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_MACE, 319/* others? */, 80, SEATTLE_CONFIG);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x800108F8, 0x8C420000, 250); /* confirmed */
|
||||
@ -2913,7 +2896,7 @@ DRIVER_INIT_MEMBER(seattle_state,mace)
|
||||
DRIVER_INIT_MEMBER(seattle_state,sfrush)
|
||||
{
|
||||
cage_init(machine(), 0x5236);
|
||||
init_common(machine(), MIDWAY_IOASIC_STANDARD, 315/* no alternates */, 100, FLAGSTAFF_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_STANDARD, 315/* no alternates */, 100, FLAGSTAFF_CONFIG);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x80059F34, 0x3C028012, 250); /* confirmed */
|
||||
@ -2925,7 +2908,7 @@ DRIVER_INIT_MEMBER(seattle_state,sfrush)
|
||||
DRIVER_INIT_MEMBER(seattle_state,sfrushrk)
|
||||
{
|
||||
cage_init(machine(), 0x5329);
|
||||
init_common(machine(), MIDWAY_IOASIC_SFRUSHRK, 331/* unknown */, 100, FLAGSTAFF_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_SFRUSHRK, 331/* unknown */, 100, FLAGSTAFF_CONFIG);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x800343E8, 0x3C028012, 250); /* confirmed */
|
||||
@ -2938,7 +2921,7 @@ DRIVER_INIT_MEMBER(seattle_state,sfrushrk)
|
||||
DRIVER_INIT_MEMBER(seattle_state,calspeed)
|
||||
{
|
||||
dcs2_init(machine(), 2, 0x39c0);
|
||||
init_common(machine(), MIDWAY_IOASIC_CALSPEED, 328/* others? */, 100, SEATTLE_WIDGET_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_CALSPEED, 328/* others? */, 100, SEATTLE_WIDGET_CONFIG);
|
||||
midway_ioasic_set_auto_ack(1);
|
||||
|
||||
/* speedups */
|
||||
@ -2950,7 +2933,7 @@ DRIVER_INIT_MEMBER(seattle_state,calspeed)
|
||||
DRIVER_INIT_MEMBER(seattle_state,vaportrx)
|
||||
{
|
||||
dcs2_init(machine(), 2, 0x39c2);
|
||||
init_common(machine(), MIDWAY_IOASIC_VAPORTRX, 324/* 334? unknown */, 100, SEATTLE_WIDGET_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_VAPORTRX, 324/* 334? unknown */, 100, SEATTLE_WIDGET_CONFIG);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x80049F14, 0x3C028020, 250); /* confirmed */
|
||||
@ -2962,7 +2945,7 @@ DRIVER_INIT_MEMBER(seattle_state,vaportrx)
|
||||
DRIVER_INIT_MEMBER(seattle_state,biofreak)
|
||||
{
|
||||
dcs2_init(machine(), 2, 0x3835);
|
||||
init_common(machine(), MIDWAY_IOASIC_STANDARD, 231/* no alternates */, 80, SEATTLE_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_STANDARD, 231/* no alternates */, 80, SEATTLE_CONFIG);
|
||||
|
||||
/* speedups */
|
||||
}
|
||||
@ -2971,7 +2954,7 @@ DRIVER_INIT_MEMBER(seattle_state,biofreak)
|
||||
DRIVER_INIT_MEMBER(seattle_state,blitz)
|
||||
{
|
||||
dcs2_init(machine(), 2, 0x39c2);
|
||||
init_common(machine(), MIDWAY_IOASIC_BLITZ99, 444/* or 528 */, 80, SEATTLE_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_BLITZ99, 444/* or 528 */, 80, SEATTLE_CONFIG);
|
||||
|
||||
/* for some reason, the code in the ROM appears buggy; this is a small patch to fix it */
|
||||
m_rombase[0x934/4] += 4;
|
||||
@ -2985,7 +2968,7 @@ DRIVER_INIT_MEMBER(seattle_state,blitz)
|
||||
DRIVER_INIT_MEMBER(seattle_state,blitz99)
|
||||
{
|
||||
dcs2_init(machine(), 2, 0x0afb);
|
||||
init_common(machine(), MIDWAY_IOASIC_BLITZ99, 481/* or 484 or 520 */, 80, SEATTLE_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_BLITZ99, 481/* or 484 or 520 */, 80, SEATTLE_CONFIG);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x8014E41C, 0x3C038025, 250); /* confirmed */
|
||||
@ -2996,7 +2979,7 @@ DRIVER_INIT_MEMBER(seattle_state,blitz99)
|
||||
DRIVER_INIT_MEMBER(seattle_state,blitz2k)
|
||||
{
|
||||
dcs2_init(machine(), 2, 0x0b5d);
|
||||
init_common(machine(), MIDWAY_IOASIC_BLITZ99, 494/* or 498 */, 80, SEATTLE_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_BLITZ99, 494/* or 498 */, 80, SEATTLE_CONFIG);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x8015773C, 0x3C038025, 250); /* confirmed */
|
||||
@ -3007,7 +2990,7 @@ DRIVER_INIT_MEMBER(seattle_state,blitz2k)
|
||||
DRIVER_INIT_MEMBER(seattle_state,carnevil)
|
||||
{
|
||||
dcs2_init(machine(), 2, 0x0af7);
|
||||
init_common(machine(), MIDWAY_IOASIC_CARNEVIL, 469/* 469 or 486 or 528 */, 80, SEATTLE_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_CARNEVIL, 469/* 469 or 486 or 528 */, 80, SEATTLE_CONFIG);
|
||||
|
||||
/* set up the gun */
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x16800000, 0x1680001f, read32_delegate(FUNC(seattle_state::carnevil_gun_r),this), write32_delegate(FUNC(seattle_state::carnevil_gun_w),this));
|
||||
@ -3021,7 +3004,7 @@ DRIVER_INIT_MEMBER(seattle_state,carnevil)
|
||||
DRIVER_INIT_MEMBER(seattle_state,hyprdriv)
|
||||
{
|
||||
dcs2_init(machine(), 2, 0x0af7);
|
||||
init_common(machine(), MIDWAY_IOASIC_HYPRDRIV, 469/* unknown */, 80, SEATTLE_WIDGET_CONFIG);
|
||||
init_common(MIDWAY_IOASIC_HYPRDRIV, 469/* unknown */, 80, SEATTLE_WIDGET_CONFIG);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x801643BC, 0x3C03801B, 250); /* confirmed */
|
||||
|
@ -179,6 +179,7 @@ public:
|
||||
void screen_eof_sammymdl(screen_device &screen, bool state);
|
||||
INTERRUPT_GEN_MEMBER(gegege_vblank_interrupt);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(sammymd1_irq);
|
||||
void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri_mask);
|
||||
};
|
||||
|
||||
|
||||
@ -224,11 +225,10 @@ public:
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, int pri_mask)
|
||||
void sigmab98_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri_mask)
|
||||
{
|
||||
sigmab98_state *state = machine.driver_data<sigmab98_state>();
|
||||
UINT8 *end = state->m_spriteram - 0x10;
|
||||
UINT8 *s = end + state->m_spriteram.bytes();
|
||||
UINT8 *end = m_spriteram - 0x10;
|
||||
UINT8 *s = end + m_spriteram.bytes();
|
||||
|
||||
for ( ; s != end; s -= 0x10 )
|
||||
{
|
||||
@ -296,7 +296,7 @@ static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const r
|
||||
{
|
||||
for (x = x0; x != x1; x += dx)
|
||||
{
|
||||
drawgfxzoom_transpen( bitmap, cliprect, machine.gfx[gfx],
|
||||
drawgfxzoom_transpen( bitmap, cliprect, machine().gfx[gfx],
|
||||
code++, color,
|
||||
flipx, flipy,
|
||||
(sx + x * dim) / 0x10000, (sy + y * dim) / 0x10000,
|
||||
@ -325,10 +325,10 @@ UINT32 sigmab98_state::screen_update_sigmab98(screen_device &screen, bitmap_ind1
|
||||
bitmap.fill(get_black_pen(machine()), cliprect);
|
||||
|
||||
// Draw from priority 3 (bottom, converted to a bitmask) to priority 0 (top)
|
||||
draw_sprites(machine(), bitmap, cliprect, layers_ctrl & 8);
|
||||
draw_sprites(machine(), bitmap, cliprect, layers_ctrl & 4);
|
||||
draw_sprites(machine(), bitmap, cliprect, layers_ctrl & 2);
|
||||
draw_sprites(machine(), bitmap, cliprect, layers_ctrl & 1);
|
||||
draw_sprites(bitmap, cliprect, layers_ctrl & 8);
|
||||
draw_sprites(bitmap, cliprect, layers_ctrl & 4);
|
||||
draw_sprites(bitmap, cliprect, layers_ctrl & 2);
|
||||
draw_sprites(bitmap, cliprect, layers_ctrl & 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -393,15 +393,19 @@ public:
|
||||
DECLARE_DRIVER_INIT(coh3002t_mp);
|
||||
DECLARE_DRIVER_INIT(coh3002t);
|
||||
DECLARE_MACHINE_RESET(coh3002t);
|
||||
void rf5c296_reg_w(ATTR_UNUSED UINT8 reg, UINT8 data);
|
||||
UINT8 rf5c296_reg_r(ATTR_UNUSED UINT8 reg);
|
||||
UINT32 gen_flash_r(intelfsh16_device *device, offs_t offset, UINT32 mem_mask);
|
||||
void gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, UINT32 mem_mask);
|
||||
void install_handlers(int mode);
|
||||
};
|
||||
|
||||
|
||||
// rf5c296 is very inaccurate at that point, it hardcodes the gnet config
|
||||
|
||||
static void rf5c296_reg_w(ATTR_UNUSED running_machine &machine, UINT8 reg, UINT8 data)
|
||||
void taitogn_state::rf5c296_reg_w(ATTR_UNUSED UINT8 reg, UINT8 data)
|
||||
{
|
||||
taitogn_state *state = machine.driver_data<taitogn_state>();
|
||||
// fprintf(stderr, "rf5c296_reg_w %02x, %02x (%s)\n", reg, data, machine.describe_context());
|
||||
// fprintf(stderr, "rf5c296_reg_w %02x, %02x (%s)\n", reg, data, machine().describe_context());
|
||||
switch (reg)
|
||||
{
|
||||
// Interrupt and General Control Register
|
||||
@ -409,10 +413,10 @@ static void rf5c296_reg_w(ATTR_UNUSED running_machine &machine, UINT8 reg, UINT8
|
||||
// Check for card reset
|
||||
if (!(data & 0x40))
|
||||
{
|
||||
ide_controller_device *card = (ide_controller_device *) machine.device(":card");
|
||||
ide_controller_device *card = (ide_controller_device *) machine().device(":card");
|
||||
|
||||
card->reset();
|
||||
state->m_locked = 0x1ff;
|
||||
m_locked = 0x1ff;
|
||||
card->ide_set_gnet_readlock(1);
|
||||
}
|
||||
break;
|
||||
@ -422,9 +426,9 @@ static void rf5c296_reg_w(ATTR_UNUSED running_machine &machine, UINT8 reg, UINT8
|
||||
}
|
||||
}
|
||||
|
||||
static UINT8 rf5c296_reg_r(ATTR_UNUSED running_machine &machine, UINT8 reg)
|
||||
UINT8 taitogn_state::rf5c296_reg_r(ATTR_UNUSED UINT8 reg)
|
||||
{
|
||||
// fprintf(stderr, "rf5c296_reg_r %02x (%s)\n", reg, machine.describe_context());
|
||||
// fprintf(stderr, "rf5c296_reg_r %02x (%s)\n", reg, machine().describe_context());
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
@ -439,7 +443,7 @@ WRITE32_MEMBER(taitogn_state::rf5c296_io_w)
|
||||
if(ACCESSING_BITS_0_7)
|
||||
m_rf5c296_reg = data;
|
||||
if(ACCESSING_BITS_8_15)
|
||||
rf5c296_reg_w(machine(), m_rf5c296_reg, data >> 8);
|
||||
rf5c296_reg_w(m_rf5c296_reg, data >> 8);
|
||||
}
|
||||
}
|
||||
|
||||
@ -455,7 +459,7 @@ READ32_MEMBER(taitogn_state::rf5c296_io_r)
|
||||
if(ACCESSING_BITS_0_7)
|
||||
res |= m_rf5c296_reg;
|
||||
if(ACCESSING_BITS_8_15)
|
||||
res |= rf5c296_reg_r(machine(), m_rf5c296_reg) << 8;
|
||||
res |= rf5c296_reg_r(m_rf5c296_reg) << 8;
|
||||
return res;
|
||||
}
|
||||
|
||||
@ -507,7 +511,7 @@ WRITE32_MEMBER(taitogn_state::rf5c296_mem_w)
|
||||
|
||||
// Flash handling
|
||||
|
||||
static UINT32 gen_flash_r(intelfsh16_device *device, offs_t offset, UINT32 mem_mask)
|
||||
UINT32 taitogn_state::gen_flash_r(intelfsh16_device *device, offs_t offset, UINT32 mem_mask)
|
||||
{
|
||||
UINT32 res = 0;
|
||||
offset *= 2;
|
||||
@ -518,7 +522,7 @@ static UINT32 gen_flash_r(intelfsh16_device *device, offs_t offset, UINT32 mem_m
|
||||
return res;
|
||||
}
|
||||
|
||||
static void gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, UINT32 mem_mask)
|
||||
void taitogn_state::gen_flash_w(intelfsh16_device *device, offs_t offset, UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
offset *= 2;
|
||||
if(ACCESSING_BITS_0_15)
|
||||
@ -578,22 +582,21 @@ WRITE32_MEMBER(taitogn_state::flash_s3_w)
|
||||
gen_flash_w(m_sndflash[2], offset, data, mem_mask);
|
||||
}
|
||||
|
||||
static void install_handlers(running_machine &machine, int mode)
|
||||
void taitogn_state::install_handlers(int mode)
|
||||
{
|
||||
taitogn_state *state = machine.driver_data<taitogn_state>();
|
||||
address_space &a = machine.device("maincpu")->memory().space(AS_PROGRAM);
|
||||
address_space &a = machine().device("maincpu")->memory().space(AS_PROGRAM);
|
||||
if(mode == 0) {
|
||||
// Mode 0 has access to the subbios, the mn102 flash and the rf5c296 mem zone
|
||||
a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_subbios_r),state), write32_delegate(FUNC(taitogn_state::flash_subbios_w),state));
|
||||
a.install_readwrite_handler(0x1f200000, 0x1f2fffff, read32_delegate(FUNC(taitogn_state::rf5c296_mem_r),state), write32_delegate(FUNC(taitogn_state::rf5c296_mem_w),state));
|
||||
a.install_readwrite_handler(0x1f300000, 0x1f37ffff, read32_delegate(FUNC(taitogn_state::flash_mn102_r),state), write32_delegate(FUNC(taitogn_state::flash_mn102_w),state));
|
||||
a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_subbios_r),this), write32_delegate(FUNC(taitogn_state::flash_subbios_w),this));
|
||||
a.install_readwrite_handler(0x1f200000, 0x1f2fffff, read32_delegate(FUNC(taitogn_state::rf5c296_mem_r),this), write32_delegate(FUNC(taitogn_state::rf5c296_mem_w),this));
|
||||
a.install_readwrite_handler(0x1f300000, 0x1f37ffff, read32_delegate(FUNC(taitogn_state::flash_mn102_r),this), write32_delegate(FUNC(taitogn_state::flash_mn102_w),this));
|
||||
a.nop_readwrite(0x1f380000, 0x1f5fffff);
|
||||
|
||||
} else {
|
||||
// Mode 1 has access to the 3 samples flashes
|
||||
a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_s1_r),state), write32_delegate(FUNC(taitogn_state::flash_s1_w),state));
|
||||
a.install_readwrite_handler(0x1f200000, 0x1f3fffff, read32_delegate(FUNC(taitogn_state::flash_s2_r),state), write32_delegate(FUNC(taitogn_state::flash_s2_w),state));
|
||||
a.install_readwrite_handler(0x1f400000, 0x1f5fffff, read32_delegate(FUNC(taitogn_state::flash_s3_r),state), write32_delegate(FUNC(taitogn_state::flash_s3_w),state));
|
||||
a.install_readwrite_handler(0x1f000000, 0x1f1fffff, read32_delegate(FUNC(taitogn_state::flash_s1_r),this), write32_delegate(FUNC(taitogn_state::flash_s1_w),this));
|
||||
a.install_readwrite_handler(0x1f200000, 0x1f3fffff, read32_delegate(FUNC(taitogn_state::flash_s2_r),this), write32_delegate(FUNC(taitogn_state::flash_s2_w),this));
|
||||
a.install_readwrite_handler(0x1f400000, 0x1f5fffff, read32_delegate(FUNC(taitogn_state::flash_s3_r),this), write32_delegate(FUNC(taitogn_state::flash_s3_w),this));
|
||||
}
|
||||
}
|
||||
|
||||
@ -634,7 +637,7 @@ WRITE32_MEMBER(taitogn_state::control_w)
|
||||
#endif
|
||||
|
||||
if((p ^ m_control) & 0x04)
|
||||
install_handlers(machine(), m_control & 4 ? 1 : 0);
|
||||
install_handlers(m_control & 4 ? 1 : 0);
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(taitogn_state::control2_w)
|
||||
@ -785,7 +788,7 @@ DRIVER_INIT_MEMBER(taitogn_state,coh3002t_mp)
|
||||
MACHINE_RESET_MEMBER(taitogn_state,coh3002t)
|
||||
{
|
||||
m_locked = 0x1ff;
|
||||
install_handlers(machine(), 0);
|
||||
install_handlers(0);
|
||||
m_control = 0;
|
||||
|
||||
ide_controller_device *card = (ide_controller_device *) machine().device(":card");
|
||||
|
@ -614,13 +614,20 @@ public:
|
||||
DECLARE_READ8_MEMBER(tlcs_ide1_r);
|
||||
DECLARE_WRITE8_MEMBER(tlcs_ide1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
|
||||
void taitotz_exit();
|
||||
void draw_tile(taitotz_state *state, UINT32 pos, UINT32 tile);
|
||||
UINT32 video_mem_r(taitotz_state *state, UINT32 address);
|
||||
void video_mem_w(taitotz_state *state, UINT32 address, UINT32 data);
|
||||
UINT32 video_reg_r(taitotz_state *state, UINT32 reg);
|
||||
void video_reg_w(taitotz_state *state, UINT32 reg, UINT32 data);
|
||||
void init_taitotz_152();
|
||||
void init_taitotz_111a();
|
||||
};
|
||||
|
||||
/*
|
||||
static void taitotz_exit(running_machine &machine)
|
||||
void taitotz_state::taitotz_exit()
|
||||
{
|
||||
|
||||
taitotz_state *state = machine.driver_data<taitotz_state>();
|
||||
|
||||
FILE *file;
|
||||
int i;
|
||||
@ -628,30 +635,30 @@ static void taitotz_exit(running_machine &machine)
|
||||
file = fopen("screen_ram.bin","wb");
|
||||
for (i=0; i < 0x200000; i++)
|
||||
{
|
||||
fputc((UINT8)(state->m_screen_ram[i] >> 24), file);
|
||||
fputc((UINT8)(state->m_screen_ram[i] >> 16), file);
|
||||
fputc((UINT8)(state->m_screen_ram[i] >> 8), file);
|
||||
fputc((UINT8)(state->m_screen_ram[i] >> 0), file);
|
||||
fputc((UINT8)(m_screen_ram[i] >> 24), file);
|
||||
fputc((UINT8)(m_screen_ram[i] >> 16), file);
|
||||
fputc((UINT8)(m_screen_ram[i] >> 8), file);
|
||||
fputc((UINT8)(m_screen_ram[i] >> 0), file);
|
||||
}
|
||||
fclose(file);
|
||||
|
||||
file = fopen("frame_ram.bin","wb");
|
||||
for (i=0; i < 0x80000; i++)
|
||||
{
|
||||
fputc((UINT8)(state->m_frame_ram[i] >> 24), file);
|
||||
fputc((UINT8)(state->m_frame_ram[i] >> 16), file);
|
||||
fputc((UINT8)(state->m_frame_ram[i] >> 8), file);
|
||||
fputc((UINT8)(state->m_frame_ram[i] >> 0), file);
|
||||
fputc((UINT8)(m_frame_ram[i] >> 24), file);
|
||||
fputc((UINT8)(m_frame_ram[i] >> 16), file);
|
||||
fputc((UINT8)(m_frame_ram[i] >> 8), file);
|
||||
fputc((UINT8)(m_frame_ram[i] >> 0), file);
|
||||
}
|
||||
fclose(file);
|
||||
|
||||
file = fopen("texture_ram.bin","wb");
|
||||
for (i=0; i < 0x800000; i++)
|
||||
{
|
||||
fputc((UINT8)(state->m_texture_ram[i] >> 24), file);
|
||||
fputc((UINT8)(state->m_texture_ram[i] >> 16), file);
|
||||
fputc((UINT8)(state->m_texture_ram[i] >> 8), file);
|
||||
fputc((UINT8)(state->m_texture_ram[i] >> 0), file);
|
||||
fputc((UINT8)(m_texture_ram[i] >> 24), file);
|
||||
fputc((UINT8)(m_texture_ram[i] >> 16), file);
|
||||
fputc((UINT8)(m_texture_ram[i] >> 8), file);
|
||||
fputc((UINT8)(m_texture_ram[i] >> 0), file);
|
||||
}
|
||||
fclose(file);
|
||||
|
||||
@ -1396,7 +1403,7 @@ UINT32 taitotz_state::screen_update_taitotz(screen_device &screen, bitmap_rgb32
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void draw_tile(taitotz_state *state, UINT32 pos, UINT32 tile)
|
||||
void taitotz_state::draw_tile(taitotz_state *state, UINT32 pos, UINT32 tile)
|
||||
{
|
||||
int tileu = (tile & 0x1f) * 16;
|
||||
int tilev = ((tile >> 5)) * 16;
|
||||
@ -1404,8 +1411,8 @@ static void draw_tile(taitotz_state *state, UINT32 pos, UINT32 tile)
|
||||
int tilex = (pos & 0x1f) * 16;
|
||||
int tiley = ((pos >> 5) & 0x1f) * 16;
|
||||
|
||||
UINT16 *src_tile = (UINT16*)&state->m_screen_ram[0x180000];
|
||||
UINT16 *dst = (UINT16*)&state->m_screen_ram[state->m_scr_base];
|
||||
UINT16 *src_tile = (UINT16*)&m_screen_ram[0x180000];
|
||||
UINT16 *dst = (UINT16*)&m_screen_ram[m_scr_base];
|
||||
|
||||
int v = tilev;
|
||||
|
||||
@ -1438,19 +1445,19 @@ static void draw_tile(taitotz_state *state, UINT32 pos, UINT32 tile)
|
||||
batlgr2 into 0x9e0000
|
||||
*/
|
||||
|
||||
static UINT32 video_mem_r(taitotz_state *state, UINT32 address)
|
||||
UINT32 taitotz_state::video_mem_r(taitotz_state *state, UINT32 address)
|
||||
{
|
||||
if (address >= 0x800000 && address < 0x1000000)
|
||||
{
|
||||
return state->m_screen_ram[address - 0x800000];
|
||||
return m_screen_ram[address - 0x800000];
|
||||
}
|
||||
else if (address >= 0x1000000 && address < 0x1800000)
|
||||
{
|
||||
return state->m_texture_ram[address - 0x1000000];
|
||||
return m_texture_ram[address - 0x1000000];
|
||||
}
|
||||
else if (address >= 0x1800000 && address < 0x1880000)
|
||||
{
|
||||
return state->m_frame_ram[address - 0x1800000];
|
||||
return m_frame_ram[address - 0x1800000];
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -1459,19 +1466,19 @@ static UINT32 video_mem_r(taitotz_state *state, UINT32 address)
|
||||
}
|
||||
}
|
||||
|
||||
static void video_mem_w(taitotz_state *state, UINT32 address, UINT32 data)
|
||||
void taitotz_state::video_mem_w(taitotz_state *state, UINT32 address, UINT32 data)
|
||||
{
|
||||
if (address >= 0x800000 && address < 0x1000000)
|
||||
{
|
||||
state->m_screen_ram[address - 0x800000] = data;
|
||||
m_screen_ram[address - 0x800000] = data;
|
||||
}
|
||||
else if (address >= 0x1000000 && address < 0x1800000)
|
||||
{
|
||||
state->m_texture_ram[address - 0x1000000] = data;
|
||||
m_texture_ram[address - 0x1000000] = data;
|
||||
}
|
||||
else if (address >= 0x1800000 && address < 0x1880000)
|
||||
{
|
||||
state->m_frame_ram[address - 0x1800000] = data;
|
||||
m_frame_ram[address - 0x1800000] = data;
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -1479,7 +1486,7 @@ static void video_mem_w(taitotz_state *state, UINT32 address, UINT32 data)
|
||||
}
|
||||
}
|
||||
|
||||
static UINT32 video_reg_r(taitotz_state *state, UINT32 reg)
|
||||
UINT32 taitotz_state::video_reg_r(taitotz_state *state, UINT32 reg)
|
||||
{
|
||||
switch ((reg >> 28) & 0xf)
|
||||
{
|
||||
@ -1487,8 +1494,8 @@ static UINT32 video_reg_r(taitotz_state *state, UINT32 reg)
|
||||
{
|
||||
if (reg == 0x10000105) // Gets spammed a lot. Probably a status register.
|
||||
{
|
||||
state->m_reg105 ^= 0xffffffff;
|
||||
return state->m_reg105;
|
||||
m_reg105 ^= 0xffffffff;
|
||||
return m_reg105;
|
||||
}
|
||||
|
||||
logerror("video_reg_r: reg: %08X\n", reg);
|
||||
@ -1503,7 +1510,7 @@ static UINT32 video_reg_r(taitotz_state *state, UINT32 reg)
|
||||
|
||||
if (subreg < 0x10)
|
||||
{
|
||||
return state->m_video_unk_reg[subreg];
|
||||
return m_video_unk_reg[subreg];
|
||||
}
|
||||
break;
|
||||
}
|
||||
@ -1542,7 +1549,7 @@ video_reg_w: r: 20000003 d: 019501AA
|
||||
video_reg_w: r: 20000004 d: 00000000
|
||||
*/
|
||||
|
||||
static void video_reg_w(taitotz_state *state, UINT32 reg, UINT32 data)
|
||||
void taitotz_state::video_reg_w(taitotz_state *state, UINT32 reg, UINT32 data)
|
||||
{
|
||||
switch ((reg >> 28) & 0xf)
|
||||
{
|
||||
@ -1563,7 +1570,7 @@ static void video_reg_w(taitotz_state *state, UINT32 reg, UINT32 data)
|
||||
int subreg = reg & 0xfffffff;
|
||||
if (subreg < 0x10)
|
||||
{
|
||||
state->m_video_unk_reg[subreg] = data;
|
||||
m_video_unk_reg[subreg] = data;
|
||||
}
|
||||
logerror("video_reg_w: reg: %08X data: %08X\n", reg, data);
|
||||
break;
|
||||
@ -1577,8 +1584,8 @@ static void video_reg_w(taitotz_state *state, UINT32 reg, UINT32 data)
|
||||
}
|
||||
case 0xb: // RAM write?
|
||||
{
|
||||
video_mem_w(state, state->m_video_ram_ptr, data);
|
||||
state->m_video_ram_ptr++;
|
||||
video_mem_w(state, m_video_ram_ptr, data);
|
||||
m_video_ram_ptr++;
|
||||
break;
|
||||
}
|
||||
default:
|
||||
@ -2596,17 +2603,17 @@ MACHINE_CONFIG_END
|
||||
|
||||
|
||||
// Init for BIOS v1.52
|
||||
static void init_taitotz_152(running_machine &machine)
|
||||
void taitotz_state::init_taitotz_152()
|
||||
{
|
||||
UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
|
||||
UINT32 *rom = (UINT32*)machine().root_device().memregion("user1")->base();
|
||||
rom[(0x2c87c^4)/4] = 0x38600000; // skip sound load timeout...
|
||||
// rom[(0x2c620^4)/4] = 0x48000014; // ID check skip (not needed with correct serial number)
|
||||
}
|
||||
|
||||
// Init for BIOS 1.11a
|
||||
static void init_taitotz_111a(running_machine &machine)
|
||||
void taitotz_state::init_taitotz_111a()
|
||||
{
|
||||
UINT32 *rom = (UINT32*)machine.root_device().memregion("user1")->base();
|
||||
UINT32 *rom = (UINT32*)machine().root_device().memregion("user1")->base();
|
||||
rom[(0x2b748^4)/4] = 0x480000b8; // skip sound load timeout
|
||||
}
|
||||
|
||||
@ -2624,7 +2631,7 @@ static const char RAIZPIN_HDD_SERIAL[] = // "691934013492 "
|
||||
|
||||
DRIVER_INIT_MEMBER(taitotz_state,landhigh)
|
||||
{
|
||||
init_taitotz_152(machine());
|
||||
init_taitotz_152();
|
||||
|
||||
m_hdd_serial_number = LANDHIGH_HDD_SERIAL;
|
||||
|
||||
@ -2635,7 +2642,7 @@ DRIVER_INIT_MEMBER(taitotz_state,landhigh)
|
||||
|
||||
DRIVER_INIT_MEMBER(taitotz_state,batlgear)
|
||||
{
|
||||
init_taitotz_111a(machine());
|
||||
init_taitotz_111a();
|
||||
|
||||
// unknown, not used by BIOS 1.11a
|
||||
m_hdd_serial_number = NULL;
|
||||
@ -2647,7 +2654,7 @@ DRIVER_INIT_MEMBER(taitotz_state,batlgear)
|
||||
|
||||
DRIVER_INIT_MEMBER(taitotz_state,batlgr2)
|
||||
{
|
||||
init_taitotz_152(machine());
|
||||
init_taitotz_152();
|
||||
|
||||
m_hdd_serial_number = BATLGR2_HDD_SERIAL;
|
||||
|
||||
@ -2658,7 +2665,7 @@ DRIVER_INIT_MEMBER(taitotz_state,batlgr2)
|
||||
|
||||
DRIVER_INIT_MEMBER(taitotz_state,batlgr2a)
|
||||
{
|
||||
init_taitotz_152(machine());
|
||||
init_taitotz_152();
|
||||
|
||||
m_hdd_serial_number = BATLGR2A_HDD_SERIAL;
|
||||
|
||||
@ -2669,7 +2676,7 @@ DRIVER_INIT_MEMBER(taitotz_state,batlgr2a)
|
||||
|
||||
DRIVER_INIT_MEMBER(taitotz_state,pwrshovl)
|
||||
{
|
||||
init_taitotz_111a(machine());
|
||||
init_taitotz_111a();
|
||||
|
||||
// unknown, not used by BIOS 1.11a
|
||||
m_hdd_serial_number = NULL;
|
||||
@ -2681,7 +2688,7 @@ DRIVER_INIT_MEMBER(taitotz_state,pwrshovl)
|
||||
|
||||
DRIVER_INIT_MEMBER(taitotz_state,raizpin)
|
||||
{
|
||||
init_taitotz_152(machine());
|
||||
init_taitotz_152();
|
||||
|
||||
m_hdd_serial_number = RAIZPIN_HDD_SERIAL;
|
||||
|
||||
|
@ -138,7 +138,7 @@ public:
|
||||
UINT16 m_addr;
|
||||
UINT32 m_gfx_offs;
|
||||
UINT32 m_gfx_size;
|
||||
int (*m_compute_addr) (UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high);
|
||||
int (tmaster_state::*m_compute_addr) (UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high);
|
||||
UINT16 m_galgames_cart;
|
||||
UINT32 m_palette_offset;
|
||||
UINT8 m_palette_index;
|
||||
@ -185,6 +185,11 @@ public:
|
||||
DECLARE_VIDEO_START(galgames);
|
||||
UINT32 screen_update_tmaster(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(tm3k_interrupt);
|
||||
UINT8 binary_to_BCD(UINT8 data);
|
||||
int tmaster_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high);
|
||||
int galgames_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high);
|
||||
void tmaster_draw();
|
||||
void galgames_update_rombank(UINT32 cart);
|
||||
};
|
||||
|
||||
|
||||
@ -248,7 +253,7 @@ static const microtouch_interface tmaster_microtouch_config =
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
static UINT8 binary_to_BCD(UINT8 data)
|
||||
UINT8 tmaster_state::binary_to_BCD(UINT8 data)
|
||||
{
|
||||
data %= 100;
|
||||
|
||||
@ -328,12 +333,12 @@ WRITE16_MEMBER(tmaster_state::rtc_w)
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
static int tmaster_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high)
|
||||
int tmaster_state::tmaster_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high)
|
||||
{
|
||||
return (reg_low & 0xff) | ((reg_mid & 0x1ff) << 8) | (reg_high << 17);
|
||||
}
|
||||
|
||||
static int galgames_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high)
|
||||
int tmaster_state::galgames_compute_addr(UINT16 reg_low, UINT16 reg_mid, UINT16 reg_high)
|
||||
{
|
||||
return reg_low | (reg_mid << 16);
|
||||
}
|
||||
@ -350,13 +355,13 @@ VIDEO_START_MEMBER(tmaster_state,tmaster)
|
||||
}
|
||||
}
|
||||
|
||||
m_compute_addr = tmaster_compute_addr;
|
||||
m_compute_addr = &tmaster_state::tmaster_compute_addr;
|
||||
}
|
||||
|
||||
VIDEO_START_MEMBER(tmaster_state,galgames)
|
||||
{
|
||||
VIDEO_START_CALL_MEMBER( tmaster );
|
||||
m_compute_addr = galgames_compute_addr;
|
||||
m_compute_addr = &tmaster_state::galgames_compute_addr;
|
||||
}
|
||||
|
||||
UINT32 tmaster_state::screen_update_tmaster(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
@ -392,35 +397,34 @@ WRITE16_MEMBER(tmaster_state::tmaster_addr_w)
|
||||
COMBINE_DATA( &m_addr );
|
||||
}
|
||||
|
||||
static void tmaster_draw(running_machine &machine)
|
||||
void tmaster_state::tmaster_draw()
|
||||
{
|
||||
tmaster_state *state = machine.driver_data<tmaster_state>();
|
||||
int x,y,x0,x1,y0,y1,dx,dy,flipx,flipy,sx,sy,sw,sh, addr, mode, layer,buffer, color;
|
||||
|
||||
UINT8 *gfxdata = state->memregion( "blitter" )->base() + state->m_gfx_offs;
|
||||
UINT8 *gfxdata = memregion( "blitter" )->base() + m_gfx_offs;
|
||||
|
||||
UINT16 pen;
|
||||
|
||||
buffer = (state->m_regs[0x02/2] >> 8) & 3; // 1 bit per layer, selects the currently displayed buffer
|
||||
sw = state->m_regs[0x04/2];
|
||||
sx = state->m_regs[0x06/2];
|
||||
sh = state->m_regs[0x08/2] + 1;
|
||||
sy = state->m_regs[0x0a/2];
|
||||
addr = (*state->m_compute_addr)(
|
||||
state->m_regs[0x0c/2],
|
||||
state->m_regs[0x0e/2], state->m_addr);
|
||||
mode = state->m_regs[0x10/2];
|
||||
buffer = (m_regs[0x02/2] >> 8) & 3; // 1 bit per layer, selects the currently displayed buffer
|
||||
sw = m_regs[0x04/2];
|
||||
sx = m_regs[0x06/2];
|
||||
sh = m_regs[0x08/2] + 1;
|
||||
sy = m_regs[0x0a/2];
|
||||
addr = (this->*m_compute_addr)(
|
||||
m_regs[0x0c/2],
|
||||
m_regs[0x0e/2], m_addr);
|
||||
mode = m_regs[0x10/2];
|
||||
|
||||
layer = (mode >> 7) & 1; // layer to draw to
|
||||
buffer = ((mode >> 6) & 1) ^ ((buffer >> layer) & 1); // bit 6 selects whether to use the opposite buffer to that displayed
|
||||
bitmap_ind16 &bitmap = state->m_bitmap[layer][buffer];
|
||||
bitmap_ind16 &bitmap = m_bitmap[layer][buffer];
|
||||
|
||||
addr <<= 1;
|
||||
|
||||
#ifdef MAME_DEBUG
|
||||
#if 0
|
||||
logerror("%s: blit w %03x, h %02x, x %03x, y %02x, src %06x, fill/addr %04x, repl/color %04x, mode %02x\n", machine.describe_context(),
|
||||
sw,sh,sx,sy, addr, state->m_addr, state->m_color, mode
|
||||
logerror("%s: blit w %03x, h %02x, x %03x, y %02x, src %06x, fill/addr %04x, repl/color %04x, mode %02x\n", machine().describe_context(),
|
||||
sw,sh,sx,sy, addr, m_addr, m_color, mode
|
||||
);
|
||||
#endif
|
||||
#endif
|
||||
@ -437,23 +441,23 @@ static void tmaster_draw(running_machine &machine)
|
||||
sx = (sx & 0x7fff) - (sx & 0x8000);
|
||||
sy = (sy & 0x7fff) - (sy & 0x8000);
|
||||
|
||||
color = (state->m_color & 0x0f) << 8;
|
||||
color = (m_color & 0x0f) << 8;
|
||||
|
||||
switch (mode & 0x20)
|
||||
{
|
||||
case 0x00: // blit with transparency
|
||||
if (addr > state->m_gfx_size - sw*sh)
|
||||
if (addr > m_gfx_size - sw*sh)
|
||||
{
|
||||
logerror("%s: blit error, addr %06x out of bounds\n", machine.describe_context(),addr);
|
||||
addr = state->m_gfx_size - sw*sh;
|
||||
logerror("%s: blit error, addr %06x out of bounds\n", machine().describe_context(),addr);
|
||||
addr = m_gfx_size - sw*sh;
|
||||
}
|
||||
|
||||
if ( mode & 0x200 )
|
||||
{
|
||||
// copy from ROM, replacing occurrences of src pen with dst pen
|
||||
|
||||
UINT8 dst_pen = (state->m_color >> 8) & 0xff;
|
||||
UINT8 src_pen = (state->m_color >> 0) & 0xff;
|
||||
UINT8 dst_pen = (m_color >> 8) & 0xff;
|
||||
UINT8 src_pen = (m_color >> 0) & 0xff;
|
||||
|
||||
for (y = y0; y != y1; y += dy)
|
||||
{
|
||||
@ -487,7 +491,7 @@ static void tmaster_draw(running_machine &machine)
|
||||
break;
|
||||
|
||||
case 0x20: // solid fill
|
||||
pen = ((state->m_addr >> 8) & 0xff) + color;
|
||||
pen = ((m_addr >> 8) & 0xff) + color;
|
||||
|
||||
if ((pen & 0xff) == 0xff)
|
||||
pen = 0xff;
|
||||
@ -511,7 +515,7 @@ WRITE16_MEMBER(tmaster_state::tmaster_blitter_w)
|
||||
switch (offset*2)
|
||||
{
|
||||
case 0x0e:
|
||||
tmaster_draw(machine());
|
||||
tmaster_draw();
|
||||
machine().device("maincpu")->execute().set_input_line(2, HOLD_LINE);
|
||||
break;
|
||||
}
|
||||
@ -669,17 +673,16 @@ WRITE16_MEMBER(tmaster_state::galgames_okiram_w)
|
||||
|
||||
// Carts (preliminary, PIC communication is not implemented)
|
||||
|
||||
static void galgames_update_rombank(running_machine &machine, UINT32 cart)
|
||||
void tmaster_state::galgames_update_rombank(UINT32 cart)
|
||||
{
|
||||
tmaster_state *state = machine.driver_data<tmaster_state>();
|
||||
state->m_galgames_cart = cart;
|
||||
m_galgames_cart = cart;
|
||||
|
||||
state->m_gfx_offs = 0x200000 * cart;
|
||||
m_gfx_offs = 0x200000 * cart;
|
||||
|
||||
if (state->membank(GALGAMES_BANK_000000_R)->entry() == GALGAMES_RAM)
|
||||
state->membank(GALGAMES_BANK_200000_R)->set_entry(GALGAMES_ROM0 + state->m_galgames_cart); // rom
|
||||
if (membank(GALGAMES_BANK_000000_R)->entry() == GALGAMES_RAM)
|
||||
membank(GALGAMES_BANK_200000_R)->set_entry(GALGAMES_ROM0 + m_galgames_cart); // rom
|
||||
|
||||
state->membank(GALGAMES_BANK_240000_R)->set_entry(GALGAMES_ROM0 + state->m_galgames_cart); // rom
|
||||
membank(GALGAMES_BANK_240000_R)->set_entry(GALGAMES_ROM0 + m_galgames_cart); // rom
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(tmaster_state::galgames_cart_sel_w)
|
||||
@ -703,12 +706,12 @@ WRITE16_MEMBER(tmaster_state::galgames_cart_sel_w)
|
||||
case 0x03:
|
||||
case 0x04:
|
||||
machine().device<eeprom_device>(galgames_eeprom_names[data & 0xff])->set_cs_line(CLEAR_LINE);
|
||||
galgames_update_rombank(machine(), data & 0xff);
|
||||
galgames_update_rombank(data & 0xff);
|
||||
break;
|
||||
|
||||
default:
|
||||
machine().device<eeprom_device>(galgames_eeprom_names[0])->set_cs_line(CLEAR_LINE);
|
||||
galgames_update_rombank(machine(), 0);
|
||||
galgames_update_rombank(0);
|
||||
logerror("%06x: unknown cart sel = %04x\n", space.device().safe_pc(), data);
|
||||
break;
|
||||
}
|
||||
@ -730,7 +733,7 @@ WRITE16_MEMBER(tmaster_state::galgames_cart_clock_w)
|
||||
if ((data & 0xf7) == 0x05)
|
||||
{
|
||||
membank(GALGAMES_BANK_000000_R)->set_entry(GALGAMES_RAM); // ram
|
||||
galgames_update_rombank(machine(), m_galgames_cart);
|
||||
galgames_update_rombank(m_galgames_cart);
|
||||
logerror("%06x: romram bank = %04x\n", space.device().safe_pc(), data);
|
||||
}
|
||||
else
|
||||
@ -972,7 +975,7 @@ MACHINE_RESET_MEMBER(tmaster_state,galgames)
|
||||
|
||||
membank(GALGAMES_BANK_240000_R)->set_entry(GALGAMES_ROM0); // rom
|
||||
|
||||
galgames_update_rombank(machine(), 0);
|
||||
galgames_update_rombank(0);
|
||||
|
||||
machine().device("maincpu")->reset();
|
||||
}
|
||||
|
@ -505,6 +505,12 @@ public:
|
||||
UINT32 screen_update_vegas(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
TIMER_CALLBACK_MEMBER(nile_timer_callback);
|
||||
void remap_dynamic_addresses();
|
||||
void update_nile_irqs();
|
||||
void update_sio_irqs();
|
||||
inline void _add_dynamic_address(offs_t start, offs_t end, read32_space_func read, write32_space_func write, const char *rdname, const char *wrname);
|
||||
inline void _add_dynamic_device_address(device_t *device, offs_t start, offs_t end, read32_device_func read, write32_device_func write, const char *rdname, const char *wrname);
|
||||
|
||||
void init_common(int ioasic, int serialnum);
|
||||
};
|
||||
|
||||
|
||||
@ -843,49 +849,48 @@ static WRITE32_HANDLER( pci_3dfx_w )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void update_nile_irqs(running_machine &machine)
|
||||
void vegas_state::update_nile_irqs()
|
||||
{
|
||||
vegas_state *state = machine.driver_data<vegas_state>();
|
||||
UINT32 intctll = state->m_nile_regs[NREG_INTCTRL+0];
|
||||
UINT32 intctlh = state->m_nile_regs[NREG_INTCTRL+1];
|
||||
UINT32 intctll = m_nile_regs[NREG_INTCTRL+0];
|
||||
UINT32 intctlh = m_nile_regs[NREG_INTCTRL+1];
|
||||
UINT8 irq[6];
|
||||
int i;
|
||||
|
||||
/* check for UART transmit IRQ enable and synthsize one */
|
||||
if (state->m_nile_regs[NREG_UARTIER] & 2)
|
||||
state->m_nile_irq_state |= 0x0010;
|
||||
if (m_nile_regs[NREG_UARTIER] & 2)
|
||||
m_nile_irq_state |= 0x0010;
|
||||
else
|
||||
state->m_nile_irq_state &= ~0x0010;
|
||||
m_nile_irq_state &= ~0x0010;
|
||||
|
||||
irq[0] = irq[1] = irq[2] = irq[3] = irq[4] = irq[5] = 0;
|
||||
state->m_nile_regs[NREG_INTSTAT0+0] = 0;
|
||||
state->m_nile_regs[NREG_INTSTAT0+1] = 0;
|
||||
state->m_nile_regs[NREG_INTSTAT1+0] = 0;
|
||||
state->m_nile_regs[NREG_INTSTAT1+1] = 0;
|
||||
m_nile_regs[NREG_INTSTAT0+0] = 0;
|
||||
m_nile_regs[NREG_INTSTAT0+1] = 0;
|
||||
m_nile_regs[NREG_INTSTAT1+0] = 0;
|
||||
m_nile_regs[NREG_INTSTAT1+1] = 0;
|
||||
|
||||
/* handle the lower interrupts */
|
||||
for (i = 0; i < 8; i++)
|
||||
if (state->m_nile_irq_state & (1 << i))
|
||||
if (m_nile_irq_state & (1 << i))
|
||||
if ((intctll >> (4*i+3)) & 1)
|
||||
{
|
||||
int vector = (intctll >> (4*i)) & 7;
|
||||
if (vector < 6)
|
||||
{
|
||||
irq[vector] = 1;
|
||||
state->m_nile_regs[NREG_INTSTAT0 + vector/2] |= 1 << (i + 16*(vector&1));
|
||||
m_nile_regs[NREG_INTSTAT0 + vector/2] |= 1 << (i + 16*(vector&1));
|
||||
}
|
||||
}
|
||||
|
||||
/* handle the upper interrupts */
|
||||
for (i = 0; i < 8; i++)
|
||||
if (state->m_nile_irq_state & (1 << (i+8)))
|
||||
if (m_nile_irq_state & (1 << (i+8)))
|
||||
if ((intctlh >> (4*i+3)) & 1)
|
||||
{
|
||||
int vector = (intctlh >> (4*i)) & 7;
|
||||
if (vector < 6)
|
||||
{
|
||||
irq[vector] = 1;
|
||||
state->m_nile_regs[NREG_INTSTAT0 + vector/2] |= 1 << (i + 8 + 16*(vector&1));
|
||||
m_nile_regs[NREG_INTSTAT0 + vector/2] |= 1 << (i + 8 + 16*(vector&1));
|
||||
}
|
||||
}
|
||||
|
||||
@ -896,12 +901,12 @@ static void update_nile_irqs(running_machine &machine)
|
||||
if (irq[i])
|
||||
{
|
||||
if (LOG_NILE_IRQS) logerror(" 1");
|
||||
machine.device("maincpu")->execute().set_input_line(MIPS3_IRQ0 + i, ASSERT_LINE);
|
||||
machine().device("maincpu")->execute().set_input_line(MIPS3_IRQ0 + i, ASSERT_LINE);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (LOG_NILE_IRQS) logerror(" 0");
|
||||
machine.device("maincpu")->execute().set_input_line(MIPS3_IRQ0 + i, CLEAR_LINE);
|
||||
machine().device("maincpu")->execute().set_input_line(MIPS3_IRQ0 + i, CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
if (LOG_NILE_IRQS) logerror("\n");
|
||||
@ -929,7 +934,7 @@ TIMER_CALLBACK_MEMBER(vegas_state::nile_timer_callback)
|
||||
if (which == 3)
|
||||
m_nile_irq_state |= 1 << 5;
|
||||
|
||||
update_nile_irqs(machine());
|
||||
update_nile_irqs();
|
||||
}
|
||||
|
||||
|
||||
@ -1073,21 +1078,21 @@ static WRITE32_HANDLER( nile_w )
|
||||
case NREG_INTCTRL+1: /* Interrupt control */
|
||||
if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt control(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
|
||||
logit = 0;
|
||||
update_nile_irqs(space.machine());
|
||||
state->update_nile_irqs();
|
||||
break;
|
||||
|
||||
case NREG_INTSTAT0+0: /* Interrupt status 0 */
|
||||
case NREG_INTSTAT0+1: /* Interrupt status 0 */
|
||||
if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 0(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
|
||||
logit = 0;
|
||||
update_nile_irqs(space.machine());
|
||||
state->update_nile_irqs();
|
||||
break;
|
||||
|
||||
case NREG_INTSTAT1+0: /* Interrupt status 1 */
|
||||
case NREG_INTSTAT1+1: /* Interrupt status 1 */
|
||||
if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 1/enable(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
|
||||
logit = 0;
|
||||
update_nile_irqs(space.machine());
|
||||
state->update_nile_irqs();
|
||||
break;
|
||||
|
||||
case NREG_INTCLR+0: /* Interrupt clear */
|
||||
@ -1095,7 +1100,7 @@ static WRITE32_HANDLER( nile_w )
|
||||
if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt clear(%03X) = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
|
||||
logit = 0;
|
||||
state->m_nile_irq_state &= ~(state->m_nile_regs[offset] & ~0xf00);
|
||||
update_nile_irqs(space.machine());
|
||||
state->update_nile_irqs();
|
||||
break;
|
||||
|
||||
case NREG_INTPPES+0: /* PCI Interrupt control */
|
||||
@ -1170,7 +1175,7 @@ static WRITE32_HANDLER( nile_w )
|
||||
logit = 0;
|
||||
break;
|
||||
case NREG_UARTIER: /* serial interrupt enable */
|
||||
update_nile_irqs(space.machine());
|
||||
state->update_nile_irqs();
|
||||
break;
|
||||
|
||||
case NREG_VID:
|
||||
@ -1227,7 +1232,7 @@ WRITE_LINE_MEMBER(vegas_state::ide_interrupt)
|
||||
m_nile_irq_state |= 0x800;
|
||||
else
|
||||
m_nile_irq_state &= ~0x800;
|
||||
update_nile_irqs(machine());
|
||||
update_nile_irqs();
|
||||
}
|
||||
|
||||
|
||||
@ -1238,14 +1243,13 @@ WRITE_LINE_MEMBER(vegas_state::ide_interrupt)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void update_sio_irqs(running_machine &machine)
|
||||
void vegas_state::update_sio_irqs()
|
||||
{
|
||||
vegas_state *state = machine.driver_data<vegas_state>();
|
||||
if (state->m_sio_irq_state & state->m_sio_irq_enable)
|
||||
state->m_nile_irq_state |= 0x400;
|
||||
if (m_sio_irq_state & m_sio_irq_enable)
|
||||
m_nile_irq_state |= 0x400;
|
||||
else
|
||||
state->m_nile_irq_state &= ~0x400;
|
||||
update_nile_irqs(machine);
|
||||
m_nile_irq_state &= ~0x400;
|
||||
update_nile_irqs();
|
||||
}
|
||||
|
||||
|
||||
@ -1255,7 +1259,7 @@ static void vblank_assert(device_t *device, int state)
|
||||
if (!drvstate->m_vblank_state && state)
|
||||
{
|
||||
drvstate->m_sio_irq_state |= 0x20;
|
||||
update_sio_irqs(device->machine());
|
||||
drvstate->update_sio_irqs();
|
||||
}
|
||||
drvstate->m_vblank_state = state;
|
||||
|
||||
@ -1274,7 +1278,7 @@ static void ioasic_irq(running_machine &machine, int state)
|
||||
drvstate->m_sio_irq_state |= 0x04;
|
||||
else
|
||||
drvstate->m_sio_irq_state &= ~0x04;
|
||||
update_sio_irqs(machine);
|
||||
drvstate->update_sio_irqs();
|
||||
}
|
||||
|
||||
|
||||
@ -1285,7 +1289,7 @@ static void ethernet_interrupt(device_t *device, int state)
|
||||
drvstate->m_sio_irq_state |= 0x10;
|
||||
else
|
||||
drvstate->m_sio_irq_state &= ~0x10;
|
||||
update_sio_irqs(device->machine());
|
||||
drvstate->update_sio_irqs();
|
||||
}
|
||||
|
||||
|
||||
@ -1314,7 +1318,7 @@ static WRITE32_HANDLER( sio_irq_clear_w )
|
||||
if (!(data & 0x08))
|
||||
{
|
||||
state->m_sio_irq_state &= ~0x20;
|
||||
update_sio_irqs(space.machine());
|
||||
state->update_sio_irqs();
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -1333,7 +1337,7 @@ static WRITE32_HANDLER( sio_irq_enable_w )
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
state->m_sio_irq_enable = data;
|
||||
update_sio_irqs(space.machine());
|
||||
state->update_sio_irqs();
|
||||
}
|
||||
}
|
||||
|
||||
@ -1507,37 +1511,37 @@ static WRITE32_HANDLER( dcs3_fifo_full_w )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
#define add_dynamic_address(st,s,e,r,w) _add_dynamic_address(st,s,e,r,w,#r,#w)
|
||||
#define add_dynamic_device_address(st,d,s,e,r,w) _add_dynamic_device_address(st,d,s,e,r,w,#r,#w)
|
||||
#define add_dynamic_address(s,e,r,w) _add_dynamic_address(s,e,r,w,#r,#w)
|
||||
#define add_dynamic_device_address(d,s,e,r,w) _add_dynamic_device_address(d,s,e,r,w,#r,#w)
|
||||
|
||||
INLINE void _add_dynamic_address(vegas_state *state, offs_t start, offs_t end, read32_space_func read, write32_space_func write, const char *rdname, const char *wrname)
|
||||
inline void vegas_state::_add_dynamic_address(offs_t start, offs_t end, read32_space_func read, write32_space_func write, const char *rdname, const char *wrname)
|
||||
{
|
||||
dynamic_address *dynamic = state->m_dynamic;
|
||||
dynamic[state->m_dynamic_count].start = start;
|
||||
dynamic[state->m_dynamic_count].end = end;
|
||||
dynamic[state->m_dynamic_count].mread = read;
|
||||
dynamic[state->m_dynamic_count].mwrite = write;
|
||||
dynamic[state->m_dynamic_count].dread = NULL;
|
||||
dynamic[state->m_dynamic_count].dwrite = NULL;
|
||||
dynamic[state->m_dynamic_count].device = NULL;
|
||||
dynamic[state->m_dynamic_count].rdname = rdname;
|
||||
dynamic[state->m_dynamic_count].wrname = wrname;
|
||||
state->m_dynamic_count++;
|
||||
dynamic_address *dynamic = m_dynamic;
|
||||
dynamic[m_dynamic_count].start = start;
|
||||
dynamic[m_dynamic_count].end = end;
|
||||
dynamic[m_dynamic_count].mread = read;
|
||||
dynamic[m_dynamic_count].mwrite = write;
|
||||
dynamic[m_dynamic_count].dread = NULL;
|
||||
dynamic[m_dynamic_count].dwrite = NULL;
|
||||
dynamic[m_dynamic_count].device = NULL;
|
||||
dynamic[m_dynamic_count].rdname = rdname;
|
||||
dynamic[m_dynamic_count].wrname = wrname;
|
||||
m_dynamic_count++;
|
||||
}
|
||||
|
||||
INLINE void _add_dynamic_device_address(vegas_state *state, device_t *device, offs_t start, offs_t end, read32_device_func read, write32_device_func write, const char *rdname, const char *wrname)
|
||||
inline void vegas_state::_add_dynamic_device_address(device_t *device, offs_t start, offs_t end, read32_device_func read, write32_device_func write, const char *rdname, const char *wrname)
|
||||
{
|
||||
dynamic_address *dynamic = state->m_dynamic;
|
||||
dynamic[state->m_dynamic_count].start = start;
|
||||
dynamic[state->m_dynamic_count].end = end;
|
||||
dynamic[state->m_dynamic_count].mread = NULL;
|
||||
dynamic[state->m_dynamic_count].mwrite = NULL;
|
||||
dynamic[state->m_dynamic_count].dread = read;
|
||||
dynamic[state->m_dynamic_count].dwrite = write;
|
||||
dynamic[state->m_dynamic_count].device = device;
|
||||
dynamic[state->m_dynamic_count].rdname = rdname;
|
||||
dynamic[state->m_dynamic_count].wrname = wrname;
|
||||
state->m_dynamic_count++;
|
||||
dynamic_address *dynamic = m_dynamic;
|
||||
dynamic[m_dynamic_count].start = start;
|
||||
dynamic[m_dynamic_count].end = end;
|
||||
dynamic[m_dynamic_count].mread = NULL;
|
||||
dynamic[m_dynamic_count].mwrite = NULL;
|
||||
dynamic[m_dynamic_count].dread = read;
|
||||
dynamic[m_dynamic_count].dwrite = write;
|
||||
dynamic[m_dynamic_count].device = device;
|
||||
dynamic[m_dynamic_count].rdname = rdname;
|
||||
dynamic[m_dynamic_count].wrname = wrname;
|
||||
m_dynamic_count++;
|
||||
}
|
||||
|
||||
|
||||
@ -1561,43 +1565,43 @@ void vegas_state::remap_dynamic_addresses()
|
||||
base = m_nile_regs[NREG_DCS2] & 0x1fffff00;
|
||||
if (base >= m_rambase.bytes())
|
||||
{
|
||||
add_dynamic_address(this, base + 0x0000, base + 0x0003, sio_irq_clear_r, sio_irq_clear_w);
|
||||
add_dynamic_address(this, base + 0x1000, base + 0x1003, sio_irq_enable_r, sio_irq_enable_w);
|
||||
add_dynamic_address(this, base + 0x2000, base + 0x2003, sio_irq_cause_r, NULL);
|
||||
add_dynamic_address(this, base + 0x3000, base + 0x3003, sio_irq_status_r, NULL);
|
||||
add_dynamic_address(this, base + 0x4000, base + 0x4003, sio_led_r, sio_led_w);
|
||||
add_dynamic_address(this, base + 0x5000, base + 0x5007, NOP_HANDLER, NULL);
|
||||
add_dynamic_address(this, base + 0x6000, base + 0x6003, NULL, cmos_unlock_w);
|
||||
add_dynamic_address(this, base + 0x7000, base + 0x7003, NULL, vegas_watchdog_w);
|
||||
add_dynamic_address(base + 0x0000, base + 0x0003, sio_irq_clear_r, sio_irq_clear_w);
|
||||
add_dynamic_address(base + 0x1000, base + 0x1003, sio_irq_enable_r, sio_irq_enable_w);
|
||||
add_dynamic_address(base + 0x2000, base + 0x2003, sio_irq_cause_r, NULL);
|
||||
add_dynamic_address(base + 0x3000, base + 0x3003, sio_irq_status_r, NULL);
|
||||
add_dynamic_address(base + 0x4000, base + 0x4003, sio_led_r, sio_led_w);
|
||||
add_dynamic_address(base + 0x5000, base + 0x5007, NOP_HANDLER, NULL);
|
||||
add_dynamic_address(base + 0x6000, base + 0x6003, NULL, cmos_unlock_w);
|
||||
add_dynamic_address(base + 0x7000, base + 0x7003, NULL, vegas_watchdog_w);
|
||||
}
|
||||
|
||||
/* DCS3 */
|
||||
base = m_nile_regs[NREG_DCS3] & 0x1fffff00;
|
||||
if (base >= m_rambase.bytes())
|
||||
add_dynamic_address(this, base + 0x0000, base + 0x0003, analog_port_r, analog_port_w);
|
||||
add_dynamic_address(base + 0x0000, base + 0x0003, analog_port_r, analog_port_w);
|
||||
|
||||
/* DCS4 */
|
||||
base = m_nile_regs[NREG_DCS4] & 0x1fffff00;
|
||||
if (base >= m_rambase.bytes())
|
||||
add_dynamic_address(this, base + 0x0000, base + 0x7fff, timekeeper_r, timekeeper_w);
|
||||
add_dynamic_address(base + 0x0000, base + 0x7fff, timekeeper_r, timekeeper_w);
|
||||
|
||||
/* DCS5 */
|
||||
base = m_nile_regs[NREG_DCS5] & 0x1fffff00;
|
||||
if (base >= m_rambase.bytes())
|
||||
add_dynamic_address(this, base + 0x0000, base + 0x0003, sio_r, sio_w);
|
||||
add_dynamic_address(base + 0x0000, base + 0x0003, sio_r, sio_w);
|
||||
|
||||
/* DCS6 */
|
||||
base = m_nile_regs[NREG_DCS6] & 0x1fffff00;
|
||||
if (base >= m_rambase.bytes())
|
||||
{
|
||||
add_dynamic_address(this, base + 0x0000, base + 0x003f, midway_ioasic_packed_r, midway_ioasic_packed_w);
|
||||
add_dynamic_address(this, base + 0x1000, base + 0x1003, NULL, asic_fifo_w);
|
||||
add_dynamic_address(base + 0x0000, base + 0x003f, midway_ioasic_packed_r, midway_ioasic_packed_w);
|
||||
add_dynamic_address(base + 0x1000, base + 0x1003, NULL, asic_fifo_w);
|
||||
if (m_dcs_idma_cs != 0)
|
||||
add_dynamic_address(this, base + 0x3000, base + 0x3003, NULL, dcs3_fifo_full_w);
|
||||
add_dynamic_address(base + 0x3000, base + 0x3003, NULL, dcs3_fifo_full_w);
|
||||
if (m_dcs_idma_cs == 6)
|
||||
{
|
||||
add_dynamic_address(this, base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
|
||||
add_dynamic_address(this, base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w);
|
||||
add_dynamic_address(base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
|
||||
add_dynamic_address(base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1605,11 +1609,11 @@ void vegas_state::remap_dynamic_addresses()
|
||||
base = m_nile_regs[NREG_DCS7] & 0x1fffff00;
|
||||
if (base >= m_rambase.bytes())
|
||||
{
|
||||
add_dynamic_device_address(this, ethernet, base + 0x1000, base + 0x100f, ethernet_r, ethernet_w);
|
||||
add_dynamic_device_address(ethernet, base + 0x1000, base + 0x100f, ethernet_r, ethernet_w);
|
||||
if (m_dcs_idma_cs == 7)
|
||||
{
|
||||
add_dynamic_address(this, base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
|
||||
add_dynamic_address(this, base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w);
|
||||
add_dynamic_address(base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
|
||||
add_dynamic_address(base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1619,8 +1623,8 @@ void vegas_state::remap_dynamic_addresses()
|
||||
base = m_nile_regs[NREG_PCIW1] & 0x1fffff00;
|
||||
if (base >= m_rambase.bytes())
|
||||
{
|
||||
add_dynamic_address(this, base + (1 << (21 + 4)) + 0x0000, base + (1 << (21 + 4)) + 0x00ff, pci_3dfx_r, pci_3dfx_w);
|
||||
add_dynamic_address(this, base + (1 << (21 + 5)) + 0x0000, base + (1 << (21 + 5)) + 0x00ff, pci_ide_r, pci_ide_w);
|
||||
add_dynamic_address(base + (1 << (21 + 4)) + 0x0000, base + (1 << (21 + 4)) + 0x00ff, pci_3dfx_r, pci_3dfx_w);
|
||||
add_dynamic_address(base + (1 << (21 + 5)) + 0x0000, base + (1 << (21 + 5)) + 0x00ff, pci_ide_r, pci_ide_w);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1630,39 +1634,39 @@ void vegas_state::remap_dynamic_addresses()
|
||||
/* IDE controller */
|
||||
base = m_pci_ide_regs[0x04] & 0xfffffff0;
|
||||
if (base >= m_rambase.bytes() && base < 0x20000000)
|
||||
add_dynamic_device_address(this, ide, base + 0x0000, base + 0x000f, ide_main_r, ide_main_w);
|
||||
add_dynamic_device_address(ide, base + 0x0000, base + 0x000f, ide_main_r, ide_main_w);
|
||||
|
||||
base = m_pci_ide_regs[0x05] & 0xfffffffc;
|
||||
if (base >= m_rambase.bytes() && base < 0x20000000)
|
||||
add_dynamic_device_address(this, ide, base + 0x0000, base + 0x0003, ide_alt_r, ide_alt_w);
|
||||
add_dynamic_device_address(ide, base + 0x0000, base + 0x0003, ide_alt_r, ide_alt_w);
|
||||
|
||||
base = m_pci_ide_regs[0x08] & 0xfffffff0;
|
||||
if (base >= m_rambase.bytes() && base < 0x20000000)
|
||||
add_dynamic_device_address(this, ide, base + 0x0000, base + 0x0007, ide_bus_master32_r, ide_bus_master32_w);
|
||||
add_dynamic_device_address(ide, base + 0x0000, base + 0x0007, ide_bus_master32_r, ide_bus_master32_w);
|
||||
|
||||
/* 3dfx card */
|
||||
base = m_pci_3dfx_regs[0x04] & 0xfffffff0;
|
||||
if (base >= m_rambase.bytes() && base < 0x20000000)
|
||||
{
|
||||
if (voodoo_type == TYPE_VOODOO_2)
|
||||
add_dynamic_device_address(this, m_voodoo, base + 0x000000, base + 0xffffff, voodoo_r, voodoo_w);
|
||||
add_dynamic_device_address(m_voodoo, base + 0x000000, base + 0xffffff, voodoo_r, voodoo_w);
|
||||
else
|
||||
add_dynamic_device_address(this, m_voodoo, base + 0x000000, base + 0x1ffffff, banshee_r, banshee_w);
|
||||
add_dynamic_device_address(m_voodoo, base + 0x000000, base + 0x1ffffff, banshee_r, banshee_w);
|
||||
}
|
||||
|
||||
if (voodoo_type >= TYPE_VOODOO_BANSHEE)
|
||||
{
|
||||
base = m_pci_3dfx_regs[0x05] & 0xfffffff0;
|
||||
if (base >= m_rambase.bytes() && base < 0x20000000)
|
||||
add_dynamic_device_address(this, m_voodoo, base + 0x0000000, base + 0x1ffffff, banshee_fb_r, banshee_fb_w);
|
||||
add_dynamic_device_address(m_voodoo, base + 0x0000000, base + 0x1ffffff, banshee_fb_r, banshee_fb_w);
|
||||
|
||||
base = m_pci_3dfx_regs[0x06] & 0xfffffff0;
|
||||
if (base >= m_rambase.bytes() && base < 0x20000000)
|
||||
add_dynamic_device_address(this, m_voodoo, base + 0x0000000, base + 0x00000ff, banshee_io_r, banshee_io_w);
|
||||
add_dynamic_device_address(m_voodoo, base + 0x0000000, base + 0x00000ff, banshee_io_r, banshee_io_w);
|
||||
|
||||
base = m_pci_3dfx_regs[0x0c] & 0xffff0000;
|
||||
if (base >= m_rambase.bytes() && base < 0x20000000)
|
||||
add_dynamic_device_address(this, m_voodoo, base + 0x0000000, base + 0x000ffff, banshee_rom_r, NULL);
|
||||
add_dynamic_device_address(m_voodoo, base + 0x0000000, base + 0x000ffff, banshee_rom_r, NULL);
|
||||
}
|
||||
}
|
||||
|
||||
@ -2473,10 +2477,10 @@ ROM_END
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void init_common(running_machine &machine, int ioasic, int serialnum)
|
||||
void vegas_state::init_common(int ioasic, int serialnum)
|
||||
{
|
||||
/* initialize the subsystems */
|
||||
midway_ioasic_init(machine, ioasic, serialnum, 80, ioasic_irq);
|
||||
midway_ioasic_init(machine(), ioasic, serialnum, 80, ioasic_irq);
|
||||
midway_ioasic_set_auto_ack(1);
|
||||
}
|
||||
|
||||
@ -2484,7 +2488,7 @@ static void init_common(running_machine &machine, int ioasic, int serialnum)
|
||||
DRIVER_INIT_MEMBER(vegas_state,gauntleg)
|
||||
{
|
||||
dcs2_init(machine(), 4, 0x0b5d);
|
||||
init_common(machine(), MIDWAY_IOASIC_CALSPEED, 340/* 340=39", 322=27", others? */);
|
||||
init_common(MIDWAY_IOASIC_CALSPEED, 340/* 340=39", 322=27", others? */);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x80015430, 0x8CC38060, 250); /* confirmed */
|
||||
@ -2497,7 +2501,7 @@ DRIVER_INIT_MEMBER(vegas_state,gauntleg)
|
||||
DRIVER_INIT_MEMBER(vegas_state,gauntdl)
|
||||
{
|
||||
dcs2_init(machine(), 4, 0x0b5d);
|
||||
init_common(machine(), MIDWAY_IOASIC_GAUNTDL, 346/* 347, others? */);
|
||||
init_common(MIDWAY_IOASIC_GAUNTDL, 346/* 347, others? */);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x800158B8, 0x8CC3CC40, 250); /* confirmed */
|
||||
@ -2510,7 +2514,7 @@ DRIVER_INIT_MEMBER(vegas_state,gauntdl)
|
||||
DRIVER_INIT_MEMBER(vegas_state,warfa)
|
||||
{
|
||||
dcs2_init(machine(), 4, 0x0b5d);
|
||||
init_common(machine(), MIDWAY_IOASIC_MACE, 337/* others? */);
|
||||
init_common(MIDWAY_IOASIC_MACE, 337/* others? */);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x8009436C, 0x0C031663, 250); /* confirmed */
|
||||
@ -2520,7 +2524,7 @@ DRIVER_INIT_MEMBER(vegas_state,warfa)
|
||||
DRIVER_INIT_MEMBER(vegas_state,tenthdeg)
|
||||
{
|
||||
dcs2_init(machine(), 4, 0x0afb);
|
||||
init_common(machine(), MIDWAY_IOASIC_GAUNTDL, 330/* others? */);
|
||||
init_common(MIDWAY_IOASIC_GAUNTDL, 330/* others? */);
|
||||
|
||||
/* speedups */
|
||||
mips3drc_add_hotspot(machine().device("maincpu"), 0x80051CD8, 0x0C023C15, 250); /* confirmed */
|
||||
@ -2533,21 +2537,21 @@ DRIVER_INIT_MEMBER(vegas_state,tenthdeg)
|
||||
DRIVER_INIT_MEMBER(vegas_state,roadburn)
|
||||
{
|
||||
dcs2_init(machine(), 4, 0); /* no place to hook :-( */
|
||||
init_common(machine(), MIDWAY_IOASIC_STANDARD, 325/* others? */);
|
||||
init_common(MIDWAY_IOASIC_STANDARD, 325/* others? */);
|
||||
}
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(vegas_state,nbashowt)
|
||||
{
|
||||
dcs2_init(machine(), 4, 0);
|
||||
init_common(machine(), MIDWAY_IOASIC_MACE, 528/* or 478 or 487 */);
|
||||
init_common(MIDWAY_IOASIC_MACE, 528/* or 478 or 487 */);
|
||||
}
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(vegas_state,nbanfl)
|
||||
{
|
||||
dcs2_init(machine(), 4, 0);
|
||||
init_common(machine(), MIDWAY_IOASIC_BLITZ99, 498/* or 478 or 487 */);
|
||||
init_common(MIDWAY_IOASIC_BLITZ99, 498/* or 478 or 487 */);
|
||||
/* NOT: MACE */
|
||||
}
|
||||
|
||||
@ -2555,28 +2559,28 @@ DRIVER_INIT_MEMBER(vegas_state,nbanfl)
|
||||
DRIVER_INIT_MEMBER(vegas_state,sf2049)
|
||||
{
|
||||
dcs2_init(machine(), 8, 0);
|
||||
init_common(machine(), MIDWAY_IOASIC_STANDARD, 336/* others? */);
|
||||
init_common(MIDWAY_IOASIC_STANDARD, 336/* others? */);
|
||||
}
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(vegas_state,sf2049se)
|
||||
{
|
||||
dcs2_init(machine(), 8, 0);
|
||||
init_common(machine(), MIDWAY_IOASIC_SFRUSHRK, 336/* others? */);
|
||||
init_common(MIDWAY_IOASIC_SFRUSHRK, 336/* others? */);
|
||||
}
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(vegas_state,sf2049te)
|
||||
{
|
||||
dcs2_init(machine(), 8, 0);
|
||||
init_common(machine(), MIDWAY_IOASIC_SFRUSHRK, 348/* others? */);
|
||||
init_common(MIDWAY_IOASIC_SFRUSHRK, 348/* others? */);
|
||||
}
|
||||
|
||||
|
||||
DRIVER_INIT_MEMBER(vegas_state,cartfury)
|
||||
{
|
||||
dcs2_init(machine(), 4, 0);
|
||||
init_common(machine(), MIDWAY_IOASIC_CARNEVIL, 495/* others? */);
|
||||
init_common(MIDWAY_IOASIC_CARNEVIL, 495/* others? */);
|
||||
}
|
||||
|
||||
|
||||
|
@ -351,6 +351,13 @@ public:
|
||||
INTERRUPT_GEN_MEMBER(viper_vblank);
|
||||
TIMER_CALLBACK_MEMBER(epic_global_timer_callback);
|
||||
TIMER_CALLBACK_MEMBER(ds2430_timer_callback);
|
||||
const char* epic_get_register_name(UINT32 reg);
|
||||
void epic_update_interrupts();
|
||||
void mpc8240_interrupt(int irq);
|
||||
void mpc8240_epic_init();
|
||||
void mpc8240_epic_reset(void);
|
||||
int ds2430_insert_cmd_bit(int bit);
|
||||
void DS2430_w(int bit);
|
||||
};
|
||||
|
||||
UINT32 viper_state::screen_update_viper(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
@ -454,8 +461,6 @@ WRITE64_MEMBER(viper_state::pci_config_data_w)
|
||||
/*****************************************************************************/
|
||||
// MPC8240 Embedded Programmable Interrupt Controller (EPIC)
|
||||
|
||||
static void mpc8240_interrupt(running_machine &machine, int irq);
|
||||
|
||||
#define MPC8240_IRQ0 0
|
||||
#define MPC8240_IRQ1 1
|
||||
#define MPC8240_IRQ2 2
|
||||
@ -530,7 +535,7 @@ struct MPC8240_EPIC
|
||||
static MPC8240_EPIC epic;
|
||||
|
||||
#if VIPER_DEBUG_EPIC_REGS
|
||||
static const char* epic_get_register_name(UINT32 reg)
|
||||
const viper_state::char* epic_get_register_name(UINT32 reg)
|
||||
{
|
||||
switch (reg >> 16)
|
||||
{
|
||||
@ -663,11 +668,11 @@ TIMER_CALLBACK_MEMBER(viper_state::epic_global_timer_callback)
|
||||
epic.global_timer[timer_num].timer->reset();
|
||||
}
|
||||
|
||||
mpc8240_interrupt(machine(), MPC8240_GTIMER0_IRQ + timer_num);
|
||||
mpc8240_interrupt(MPC8240_GTIMER0_IRQ + timer_num);
|
||||
}
|
||||
|
||||
|
||||
static void epic_update_interrupts(running_machine &machine)
|
||||
void viper_state::epic_update_interrupts()
|
||||
{
|
||||
int i;
|
||||
|
||||
@ -709,11 +714,11 @@ static void epic_update_interrupts(running_machine &machine)
|
||||
printf("vector = %02X\n", epic.iack);
|
||||
#endif
|
||||
|
||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
|
||||
machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
|
||||
}
|
||||
else
|
||||
{
|
||||
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
||||
machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
|
||||
@ -783,7 +788,7 @@ READ32_MEMBER(viper_state::epic_r)
|
||||
if (epic.i2c_cr & 0x40)
|
||||
{
|
||||
printf("I2C interrupt\n");
|
||||
mpc8240_interrupt(machine(), MPC8240_I2C_IRQ);
|
||||
mpc8240_interrupt(MPC8240_I2C_IRQ);
|
||||
|
||||
// set interrupt flag in status register
|
||||
epic.i2c_sr |= 0x2;
|
||||
@ -802,7 +807,7 @@ READ32_MEMBER(viper_state::epic_r)
|
||||
/*if (epic.i2c_cr & 0x40)
|
||||
{
|
||||
printf("I2C interrupt\n");
|
||||
mpc8240_interrupt(machine, MPC8240_I2C_IRQ);
|
||||
mpc8240_interrupt(MPC8240_I2C_IRQ);
|
||||
|
||||
// set interrupt flag in status register
|
||||
epic.i2c_sr |= 0x2;
|
||||
@ -886,7 +891,7 @@ READ32_MEMBER(viper_state::epic_r)
|
||||
{
|
||||
case 0x00a0: // Offset 0x600A0 - IACK
|
||||
{
|
||||
epic_update_interrupts(machine());
|
||||
epic_update_interrupts();
|
||||
|
||||
if (epic.active_irq >= 0)
|
||||
{
|
||||
@ -988,7 +993,7 @@ WRITE32_MEMBER(viper_state::epic_w)
|
||||
#if VIPER_DEBUG_EPIC_I2C
|
||||
printf("I2C interrupt\n");
|
||||
#endif
|
||||
mpc8240_interrupt(machine(), MPC8240_I2C_IRQ);
|
||||
mpc8240_interrupt(MPC8240_I2C_IRQ);
|
||||
|
||||
// set interrupt flag in status register
|
||||
epic.i2c_sr |= 0x2;
|
||||
@ -1010,7 +1015,7 @@ WRITE32_MEMBER(viper_state::epic_w)
|
||||
#if VIPER_DEBUG_EPIC_I2C
|
||||
printf("I2C interrupt\n");
|
||||
#endif
|
||||
mpc8240_interrupt(machine(), MPC8240_I2C_IRQ);
|
||||
mpc8240_interrupt(MPC8240_I2C_IRQ);
|
||||
|
||||
// set interrupt flag in status register
|
||||
epic.i2c_sr |= 0x2;
|
||||
@ -1051,7 +1056,7 @@ WRITE32_MEMBER(viper_state::epic_w)
|
||||
epic.irq[MPC8240_GTIMER0_IRQ + timer_num].priority = (data >> 16) & 0xf;
|
||||
epic.irq[MPC8240_GTIMER0_IRQ + timer_num].vector = data & 0xff;
|
||||
|
||||
epic_update_interrupts(machine());
|
||||
epic_update_interrupts();
|
||||
break;
|
||||
}
|
||||
case 0x1130: // Offset 0x41130 - Global timer 0 destination register
|
||||
@ -1063,7 +1068,7 @@ WRITE32_MEMBER(viper_state::epic_w)
|
||||
|
||||
epic.irq[MPC8240_GTIMER0_IRQ + timer_num].destination = data & 0x1;
|
||||
|
||||
epic_update_interrupts(machine());
|
||||
epic_update_interrupts();
|
||||
break;
|
||||
}
|
||||
case 0x1110: // Offset 0x41110 - Global timer 0 base count register
|
||||
@ -1123,7 +1128,7 @@ WRITE32_MEMBER(viper_state::epic_w)
|
||||
epic.irq[MPC8240_IRQ0 + irq].priority = (data >> 16) & 0xf;
|
||||
epic.irq[MPC8240_IRQ0 + irq].vector = data & 0xff;
|
||||
|
||||
epic_update_interrupts(machine());
|
||||
epic_update_interrupts();
|
||||
break;
|
||||
}
|
||||
case 0x1020: // Offset 0x51020 - I2C IRQ vector/priority register
|
||||
@ -1132,7 +1137,7 @@ WRITE32_MEMBER(viper_state::epic_w)
|
||||
epic.irq[MPC8240_I2C_IRQ].priority = (data >> 16) & 0xf;
|
||||
epic.irq[MPC8240_I2C_IRQ].vector = data & 0xff;
|
||||
|
||||
epic_update_interrupts(machine());
|
||||
epic_update_interrupts();
|
||||
break;
|
||||
}
|
||||
case 0x0210: // Offset 0x50210 - IRQ0 destination register
|
||||
@ -1156,13 +1161,13 @@ WRITE32_MEMBER(viper_state::epic_w)
|
||||
|
||||
epic.irq[MPC8240_IRQ0 + irq].destination = data & 0x1;
|
||||
|
||||
epic_update_interrupts(machine());
|
||||
epic_update_interrupts();
|
||||
break;
|
||||
}
|
||||
case 0x1030: // Offset 0x51030 - I2C IRQ destination register
|
||||
{
|
||||
epic.irq[MPC8240_I2C_IRQ].destination = data & 0x1;
|
||||
epic_update_interrupts(machine());
|
||||
epic_update_interrupts();
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1182,7 +1187,7 @@ WRITE32_MEMBER(viper_state::epic_w)
|
||||
epic.irq[epic.active_irq].active = 0;
|
||||
epic.active_irq = -1;
|
||||
|
||||
epic_update_interrupts(machine());
|
||||
epic_update_interrupts();
|
||||
break;
|
||||
}
|
||||
break;
|
||||
@ -1200,22 +1205,21 @@ WRITE64_MEMBER(viper_state::epic_64be_w)
|
||||
}
|
||||
*/
|
||||
|
||||
static void mpc8240_interrupt(running_machine &machine, int irq)
|
||||
void viper_state::mpc8240_interrupt(int irq)
|
||||
{
|
||||
epic.irq[irq].pending = 1;
|
||||
epic_update_interrupts(machine);
|
||||
epic_update_interrupts();
|
||||
}
|
||||
|
||||
static void mpc8240_epic_init(running_machine &machine)
|
||||
void viper_state::mpc8240_epic_init()
|
||||
{
|
||||
viper_state *state = machine.driver_data<viper_state>();
|
||||
epic.global_timer[0].timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),state));
|
||||
epic.global_timer[1].timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),state));
|
||||
epic.global_timer[2].timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),state));
|
||||
epic.global_timer[3].timer = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),state));
|
||||
epic.global_timer[0].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),this));
|
||||
epic.global_timer[1].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),this));
|
||||
epic.global_timer[2].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),this));
|
||||
epic.global_timer[3].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::epic_global_timer_callback),this));
|
||||
}
|
||||
|
||||
static void mpc8240_epic_reset(void)
|
||||
void viper_state::mpc8240_epic_reset(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
@ -1706,7 +1710,7 @@ READ64_MEMBER(viper_state::unk1_r)
|
||||
}
|
||||
|
||||
|
||||
static int ds2430_insert_cmd_bit(int bit)
|
||||
int viper_state::ds2430_insert_cmd_bit(int bit)
|
||||
{
|
||||
ds2430_data <<= 1;
|
||||
ds2430_data |= bit & 1;
|
||||
@ -1722,7 +1726,7 @@ static int ds2430_insert_cmd_bit(int bit)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void DS2430_w(int bit)
|
||||
void viper_state::DS2430_w(int bit)
|
||||
{
|
||||
switch (ds2430_state)
|
||||
{
|
||||
@ -1986,20 +1990,21 @@ static const powerpc_config viper_ppc_cfg =
|
||||
|
||||
INTERRUPT_GEN_MEMBER(viper_state::viper_vblank)
|
||||
{
|
||||
mpc8240_interrupt(machine(), MPC8240_IRQ0);
|
||||
mpc8240_interrupt(MPC8240_IRQ0);
|
||||
//mpc8240_interrupt(device.machine, MPC8240_IRQ3);
|
||||
}
|
||||
|
||||
static void voodoo_vblank(device_t *device, int state)
|
||||
{
|
||||
mpc8240_interrupt(device->machine(), MPC8240_IRQ4);
|
||||
viper_state *drvstate = device->machine().driver_data<viper_state>();
|
||||
drvstate->mpc8240_interrupt(MPC8240_IRQ4);
|
||||
}
|
||||
|
||||
void viper_state::machine_start()
|
||||
{
|
||||
ds2430_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(viper_state::ds2430_timer_callback),this));
|
||||
ds2430_bit_timer = machine().device<timer_device>("ds2430_timer2");
|
||||
mpc8240_epic_init(machine());
|
||||
mpc8240_epic_init();
|
||||
|
||||
/* set conservative DRC options */
|
||||
ppcdrc_set_options(machine().device("maincpu"), PPCDRC_COMPATIBLE_OPTIONS);
|
||||
|
@ -124,9 +124,16 @@ public:
|
||||
DECLARE_MACHINE_RESET(coh1002v);
|
||||
DECLARE_MACHINE_RESET(coh1002m);
|
||||
INTERRUPT_GEN_MEMBER(qsound_interrupt);
|
||||
inline void ATTR_PRINTF(3,4) verboselog( int n_level, const char *s_fmt, ... );
|
||||
inline UINT8 psxreadbyte( UINT32 *p_n_psxram, UINT32 n_address );
|
||||
inline void psxwritebyte( UINT32 *p_n_psxram, UINT32 n_address, UINT8 n_data );
|
||||
void zn_driver_init( );
|
||||
void atpsx_dma_read(UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
|
||||
void atpsx_dma_write(UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size );
|
||||
void jdredd_vblank(screen_device &screen, bool vblank_state);
|
||||
};
|
||||
|
||||
INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
|
||||
inline void ATTR_PRINTF(3,4) zn_state::verboselog( int n_level, const char *s_fmt, ... )
|
||||
{
|
||||
if( VERBOSE_LEVEL >= n_level )
|
||||
{
|
||||
@ -135,18 +142,18 @@ INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level,
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
logerror( "%s: %s", machine.describe_context(), buf );
|
||||
logerror( "%s: %s", machine().describe_context(), buf );
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef UNUSED_FUNCTION
|
||||
INLINE UINT8 psxreadbyte( UINT32 *p_n_psxram, UINT32 n_address )
|
||||
inline UINT8 zn_state::psxreadbyte( UINT32 *p_n_psxram, UINT32 n_address )
|
||||
{
|
||||
return *( (UINT8 *)p_n_psxram + BYTE4_XOR_LE( n_address ) );
|
||||
}
|
||||
#endif
|
||||
|
||||
INLINE void psxwritebyte( UINT32 *p_n_psxram, UINT32 n_address, UINT8 n_data )
|
||||
inline void zn_state::psxwritebyte( UINT32 *p_n_psxram, UINT32 n_address, UINT8 n_data )
|
||||
{
|
||||
*( (UINT8 *)p_n_psxram + BYTE4_XOR_LE( n_address ) ) = n_data;
|
||||
}
|
||||
@ -312,7 +319,7 @@ static const struct
|
||||
|
||||
READ32_MEMBER(zn_state::znsecsel_r)
|
||||
{
|
||||
verboselog( machine(), 2, "znsecsel_r( %08x, %08x )\n", offset, mem_mask );
|
||||
verboselog(2, "znsecsel_r( %08x, %08x )\n", offset, mem_mask );
|
||||
return m_n_znsecsel;
|
||||
}
|
||||
|
||||
@ -324,7 +331,7 @@ WRITE32_MEMBER(zn_state::znsecsel_w)
|
||||
m_znsec1->select( ( m_n_znsecsel >> 3 ) & 1 );
|
||||
m_zndip->select( ( m_n_znsecsel & 0x8c ) != 0x8c );
|
||||
|
||||
verboselog( machine(), 2, "znsecsel_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(2, "znsecsel_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
}
|
||||
|
||||
READ32_MEMBER(zn_state::boardconfig_r)
|
||||
@ -360,7 +367,7 @@ READ32_MEMBER(zn_state::boardconfig_r)
|
||||
|
||||
READ32_MEMBER(zn_state::unknown_r)
|
||||
{
|
||||
verboselog( machine(), 0, "unknown_r( %08x, %08x )\n", offset, mem_mask );
|
||||
verboselog(0, "unknown_r( %08x, %08x )\n", offset, mem_mask );
|
||||
return 0xffffffff;
|
||||
}
|
||||
|
||||
@ -374,7 +381,7 @@ WRITE32_MEMBER(zn_state::coin_w)
|
||||
*/
|
||||
if( ( data & ~0x23 ) != 0 )
|
||||
{
|
||||
verboselog( machine(), 0, "coin_w %08x\n", data );
|
||||
verboselog(0, "coin_w %08x\n", data );
|
||||
}
|
||||
}
|
||||
|
||||
@ -406,18 +413,17 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( link_map, AS_PROGRAM, 8, zn_state )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static void zn_driver_init( running_machine &machine )
|
||||
void zn_state::zn_driver_init( )
|
||||
{
|
||||
zn_state *state = machine.driver_data<zn_state>();
|
||||
int n_game;
|
||||
|
||||
n_game = 0;
|
||||
while( zn_config_table[ n_game ].s_name != NULL )
|
||||
{
|
||||
if( strcmp( machine.system().name, zn_config_table[ n_game ].s_name ) == 0 )
|
||||
if( strcmp( machine().system().name, zn_config_table[ n_game ].s_name ) == 0 )
|
||||
{
|
||||
state->m_znsec0->init( zn_config_table[ n_game ].p_n_mainsec );
|
||||
state->m_znsec1->init( zn_config_table[ n_game ].p_n_gamesec );
|
||||
m_znsec0->init( zn_config_table[ n_game ].p_n_mainsec );
|
||||
m_znsec1->init( zn_config_table[ n_game ].p_n_gamesec );
|
||||
// psx_sio_install_handler( machine, 0, sio_pad_handler );
|
||||
break;
|
||||
}
|
||||
@ -591,7 +597,7 @@ Notes:
|
||||
READ32_MEMBER(zn_state::capcom_kickharness_r)
|
||||
{
|
||||
/* required for buttons 4,5&6 */
|
||||
verboselog( machine(), 2, "capcom_kickharness_r( %08x, %08x )\n", offset, mem_mask );
|
||||
verboselog(2, "capcom_kickharness_r( %08x, %08x )\n", offset, mem_mask );
|
||||
return 0xffffffff;
|
||||
}
|
||||
|
||||
@ -626,7 +632,7 @@ DRIVER_INIT_MEMBER(zn_state,coh1000c)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank ( 0x1fb80000, 0x1fbfffff, "bank3" ); /* country rom */
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb60000, 0x1fb60003, write32_delegate(FUNC(zn_state::zn_qsound_w),this));
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
|
||||
if( strcmp( machine().system().name, "glpracr" ) == 0 ||
|
||||
strcmp( machine().system().name, "glpracr2l" ) == 0 )
|
||||
@ -842,7 +848,7 @@ DRIVER_INIT_MEMBER(zn_state,coh3002c)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank ( 0x1fb80000, 0x1fbfffff, "bank3" ); /* country rom */
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb60000, 0x1fb60003, write32_delegate(FUNC(zn_state::zn_qsound_w),this));
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(zn_state,coh3002c)
|
||||
@ -1088,7 +1094,7 @@ WRITE32_MEMBER(zn_state::bank_coh1000t_w)
|
||||
{
|
||||
device_t *mb3773 = machine().device("mb3773");
|
||||
mb3773_set_ck(mb3773, (data & 0x20) >> 5);
|
||||
verboselog( machine(), 1, "bank_coh1000t_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "bank_coh1000t_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
membank( "bank1" )->set_base( memregion( "user2" )->base() + ( ( data & 3 ) * 0x800000 ) );
|
||||
}
|
||||
|
||||
@ -1127,7 +1133,7 @@ DRIVER_INIT_MEMBER(zn_state,coh1000ta)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler( 0x1fb80000, 0x1fb80003, read32_delegate(FUNC(zn_state::taitofx1a_ymsound_r),this), write32_delegate(FUNC(zn_state::taitofx1a_ymsound_w),this));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_bank( 0x1fbe0000, 0x1fbe0000 + ( m_taitofx1_eeprom_size1 - 1 ), "bank2" );
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(zn_state,coh1000ta)
|
||||
@ -1186,18 +1192,18 @@ MACHINE_CONFIG_END
|
||||
|
||||
WRITE32_MEMBER(zn_state::taitofx1b_volume_w)
|
||||
{
|
||||
verboselog( machine(), 1, "taitofx1_volume_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "taitofx1_volume_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(zn_state::taitofx1b_sound_w)
|
||||
{
|
||||
verboselog( machine(), 1, "taitofx1_sound_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "taitofx1_sound_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
}
|
||||
|
||||
READ32_MEMBER(zn_state::taitofx1b_sound_r)
|
||||
{
|
||||
UINT32 data = 0; // bit 0 = busy?
|
||||
verboselog( machine(), 1, "taitofx1_sound_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "taitofx1_sound_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -1217,7 +1223,7 @@ DRIVER_INIT_MEMBER(zn_state,coh1000tb)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_handler ( 0x1fbc0000, 0x1fbc0003, read32_delegate(FUNC(zn_state::taitofx1b_sound_r),this));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_bank( 0x1fbe0000, 0x1fbe0000 + ( m_taitofx1_eeprom_size2 - 1 ), "bank3" );
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(zn_state,coh1000tb)
|
||||
@ -1354,9 +1360,9 @@ Notes:
|
||||
*2 - Unpopulated DIP28 socket
|
||||
*/
|
||||
|
||||
static void atpsx_dma_read( zn_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
|
||||
void zn_state::atpsx_dma_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
|
||||
{
|
||||
device_t *ide = state->machine().device("ide");
|
||||
device_t *ide = machine().device("ide");
|
||||
|
||||
logerror("DMA read: %d bytes (%d words) to %08x\n", n_size<<2, n_size, n_address);
|
||||
|
||||
@ -1369,7 +1375,7 @@ static void atpsx_dma_read( zn_state *state, UINT32 *p_n_psxram, UINT32 n_addres
|
||||
|
||||
/* dma size is in 32-bit words, convert to bytes */
|
||||
n_size <<= 2;
|
||||
address_space &space = state->machine().firstcpu->space(AS_PROGRAM);
|
||||
address_space &space = machine().firstcpu->space(AS_PROGRAM);
|
||||
while( n_size > 0 )
|
||||
{
|
||||
psxwritebyte( p_n_psxram, n_address, ide_controller32_r( ide, space, 0x1f0 / 4, 0x000000ff ) );
|
||||
@ -1378,7 +1384,7 @@ static void atpsx_dma_read( zn_state *state, UINT32 *p_n_psxram, UINT32 n_addres
|
||||
}
|
||||
}
|
||||
|
||||
static void atpsx_dma_write( zn_state *state, UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
|
||||
void zn_state::atpsx_dma_write( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_size )
|
||||
{
|
||||
logerror("DMA write from %08x for %d bytes\n", n_address, n_size<<2);
|
||||
}
|
||||
@ -1393,7 +1399,7 @@ DRIVER_INIT_MEMBER(zn_state,coh1000w)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).nop_readwrite ( 0x1f7e8000, 0x1f7e8003);
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler( *ide, 0x1f7f4000, 0x1f7f4fff, FUNC(ide_controller32_r), FUNC(ide_controller32_w) );
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(zn_state,coh1000w)
|
||||
@ -1408,8 +1414,8 @@ static MACHINE_CONFIG_DERIVED( coh1000w, zn1_2mb_vram )
|
||||
|
||||
MCFG_IDE_CONTROLLER_ADD("ide", ide_devices, "hdd", NULL, true)
|
||||
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin10))
|
||||
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( atpsx_dma_read ), (zn_state *) owner ) )
|
||||
MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( atpsx_dma_write ), (zn_state *) owner ) )
|
||||
MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( zn_state::atpsx_dma_read ), (zn_state *) owner ) )
|
||||
MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( zn_state::atpsx_dma_write ), (zn_state *) owner ) )
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
/*
|
||||
@ -1580,7 +1586,7 @@ DRIVER_INIT_MEMBER(zn_state,coh1002e)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fa10300, 0x1fa10303, write32_delegate(FUNC(zn_state::coh1002e_bank_w),this));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb00000, 0x1fb00007, write32_delegate(FUNC(zn_state::coh1002e_latch_w),this));
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(zn_state,coh1002e)
|
||||
@ -1722,7 +1728,7 @@ DRIVER_INIT_MEMBER(zn_state,bam2)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fa10300, 0x1fa10303, write32_delegate(FUNC(zn_state::bam2_sec_w),this));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb00000, 0x1fb00007, write32_delegate(FUNC(zn_state::bam2_mcu_w),this));
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(zn_state,bam2)
|
||||
@ -1963,47 +1969,47 @@ CUSTOM_INPUT_MEMBER(zn_state::jdredd_gun_mux_read)
|
||||
return m_jdredd_gun_mux;
|
||||
}
|
||||
|
||||
void jdredd_vblank(zn_state *state, screen_device &screen, bool vblank_state)
|
||||
void zn_state::jdredd_vblank(screen_device &screen, bool vblank_state)
|
||||
{
|
||||
int x;
|
||||
int y;
|
||||
|
||||
if( vblank_state )
|
||||
{
|
||||
state->m_jdredd_gun_mux = !state->m_jdredd_gun_mux;
|
||||
m_jdredd_gun_mux = !m_jdredd_gun_mux;
|
||||
|
||||
if( state->m_jdredd_gun_mux == 0 )
|
||||
if( m_jdredd_gun_mux == 0 )
|
||||
{
|
||||
x = state->ioport("GUN1X")->read();
|
||||
y = state->ioport("GUN1Y")->read();
|
||||
x = ioport("GUN1X")->read();
|
||||
y = ioport("GUN1Y")->read();
|
||||
}
|
||||
else
|
||||
{
|
||||
x = state->ioport("GUN2X")->read();
|
||||
y = state->ioport("GUN2Y")->read();
|
||||
x = ioport("GUN2X")->read();
|
||||
y = ioport("GUN2Y")->read();
|
||||
}
|
||||
|
||||
if( x > 0x393 && x < 0xcb2 &&
|
||||
y > 0x02d && y < 0x217 )
|
||||
{
|
||||
state->m_gpu->lightgun_set( x, y );
|
||||
m_gpu->lightgun_set( x, y );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(zn_state::acpsx_00_w)
|
||||
{
|
||||
verboselog( machine(), 0, "acpsx_00_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(0, "acpsx_00_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(zn_state::acpsx_10_w)
|
||||
{
|
||||
verboselog( machine(), 0, "acpsx_10_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(0, "acpsx_10_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(zn_state::nbajamex_80_w)
|
||||
{
|
||||
verboselog( machine(), 0, "nbajamex_80_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(0, "nbajamex_80_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
psxirq_device *psxirq = (psxirq_device *) machine().device("maincpu:irq");
|
||||
psxirq->intin10(1);
|
||||
}
|
||||
@ -2011,14 +2017,14 @@ WRITE32_MEMBER(zn_state::nbajamex_80_w)
|
||||
READ32_MEMBER(zn_state::nbajamex_08_r)
|
||||
{
|
||||
UINT32 data = 0xffffffff;
|
||||
verboselog( machine(), 0, "nbajamex_08_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(0, "nbajamex_08_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
READ32_MEMBER(zn_state::nbajamex_80_r)
|
||||
{
|
||||
UINT32 data = 0xffffffff;
|
||||
verboselog( machine(), 0, "nbajamex_80_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(0, "nbajamex_80_r( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
return data;
|
||||
}
|
||||
|
||||
@ -2048,7 +2054,7 @@ DRIVER_INIT_MEMBER(zn_state,coh1000a)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x1fbfff90, 0x1fbfff9f, read32_delegate(FUNC(zn_state::jdredd_ide_r),this), write32_delegate(FUNC(zn_state::jdredd_ide_w),this) );
|
||||
}
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(zn_state,coh1000a)
|
||||
@ -2069,7 +2075,7 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_DERIVED( coh1000a_ide, zn1_2mb_vram )
|
||||
|
||||
MCFG_DEVICE_MODIFY( "gpu" )
|
||||
MCFG_PSXGPU_VBLANK_CALLBACK( vblank_state_delegate( FUNC( jdredd_vblank ), (zn_state *) owner ) )
|
||||
MCFG_PSXGPU_VBLANK_CALLBACK( vblank_state_delegate( FUNC( zn_state::jdredd_vblank ), (zn_state *) owner ) )
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(zn_state, coh1000a )
|
||||
|
||||
@ -2203,7 +2209,7 @@ DRIVER_INIT_MEMBER(zn_state,coh1001l)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank ( 0x1f000000, 0x1f7fffff, "bank1" ); /* banked rom */
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb00000, 0x1fb00003, write32_delegate(FUNC(zn_state::coh1001l_bnk_w),this) );
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(zn_state,coh1001l)
|
||||
@ -2245,7 +2251,7 @@ DRIVER_INIT_MEMBER(zn_state,coh1002v)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_read_bank ( 0x1fb00000, 0x1fbfffff, "bank2" );
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler( 0x1fb00000, 0x1fb00003, write32_delegate(FUNC(zn_state::coh1002v_bnk_w),this));
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(zn_state,coh1002v)
|
||||
@ -2418,7 +2424,7 @@ Notes:
|
||||
|
||||
WRITE32_MEMBER(zn_state::coh1002m_bank_w)
|
||||
{
|
||||
verboselog( machine(), 1, "coh1002m_bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
verboselog(1, "coh1002m_bank_w( %08x, %08x, %08x )\n", offset, data, mem_mask );
|
||||
membank( "bank1" )->set_base( memregion( "user2" )->base() + ((data>>16) * 0x800000) );
|
||||
}
|
||||
|
||||
@ -2447,7 +2453,7 @@ DRIVER_INIT_MEMBER(zn_state,coh1002m)
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler( 0x1fb00000, 0x1fb00003, read32_delegate(FUNC(zn_state::cbaj_z80_r),this), write32_delegate(FUNC(zn_state::cbaj_z80_w),this));
|
||||
machine().device("maincpu")->memory().space(AS_PROGRAM).install_write_handler ( 0x1fb00004, 0x1fb00007, write32_delegate(FUNC(zn_state::coh1002m_bank_w),this));
|
||||
|
||||
zn_driver_init(machine());
|
||||
zn_driver_init();
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(zn_state,coh1002m)
|
||||
|
Loading…
Reference in New Issue
Block a user