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cpu/saturn: clean up a little (nw)

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This commit is contained in:
Vas Crabb 2019-10-27 02:16:50 +11:00
parent 236c87cfea
commit d80e7f95eb
5 changed files with 524 additions and 554 deletions
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4
scripts/src/cpu.lua
View File

@ -2031,8 +2031,8 @@ if (CPUS["SATURN"]~=null) then
files { files {
MAME_DIR .. "src/devices/cpu/saturn/saturn.cpp", MAME_DIR .. "src/devices/cpu/saturn/saturn.cpp",
MAME_DIR .. "src/devices/cpu/saturn/saturn.h", MAME_DIR .. "src/devices/cpu/saturn/saturn.h",
MAME_DIR .. "src/devices/cpu/saturn/satops.hxx", MAME_DIR .. "src/devices/cpu/saturn/satops.ipp",
MAME_DIR .. "src/devices/cpu/saturn/sattable.hxx", MAME_DIR .. "src/devices/cpu/saturn/sattable.ipp",
} }
end end

559
src/devices/cpu/saturn/satops.hxx → src/devices/cpu/saturn/satops.ipp
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File diff suppressed because it is too large Load Diff

246
src/devices/cpu/saturn/sattable.hxx → src/devices/cpu/saturn/sattable.ipp
View File

@ -1,34 +1,46 @@
// license:BSD-3-Clause // license:BSD-3-Clause
// copyright-holders:Peter Trauner,Antoine Mine // copyright-holders:Peter Trauner,Antoine Mine
#define IRQ_ADDRESS 0xf
#define BEGIN_B 0
#define COUNT_B 2
#define BEGIN_X 0
#define COUNT_X 3
#define BEGIN_XS 2
#define COUNT_XS 1
#define BEGIN_A 0
#define COUNT_A 5
#define BEGIN_M 3
#define COUNT_M 12
#define BEGIN_S 15
#define COUNT_S 1
#define BEGIN_W 0
#define COUNT_W 16
static const int adr_a_begin[]={ static const int adr_a_begin[]={
-1, -1, BEGIN_XS, BEGIN_X, BEGIN_S, BEGIN_M, BEGIN_B, BEGIN_W, -1, -1, BEGIN_XS, BEGIN_X, BEGIN_S, BEGIN_M, BEGIN_B, BEGIN_W,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, };
};
static const int adr_a_count[]={ static const int adr_a_count[]={
-1, -1, COUNT_XS, COUNT_X, COUNT_S, COUNT_M, COUNT_B, COUNT_W, -1, -1, COUNT_XS, COUNT_X, COUNT_S, COUNT_M, COUNT_B, COUNT_W,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, };
};
static const int adr_b_begin[]={ static const int adr_b_begin[]={
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, BEGIN_XS, BEGIN_X, BEGIN_S, BEGIN_M, BEGIN_B, BEGIN_W, -1, -1, BEGIN_XS, BEGIN_X, BEGIN_S, BEGIN_M, BEGIN_B, BEGIN_W, };
};
static const int adr_b_count[]={ static const int adr_b_count[]={
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, COUNT_XS, COUNT_X, COUNT_S, COUNT_M, COUNT_B, COUNT_W, -1, -1, COUNT_XS, COUNT_X, COUNT_S, COUNT_M, COUNT_B, COUNT_W, };
};
static const int adr_af_begin[]={ static const int adr_af_begin[]={
-1, -1, BEGIN_XS, BEGIN_X, BEGIN_S, BEGIN_M, BEGIN_B, BEGIN_W, -1, -1, BEGIN_XS, BEGIN_X, BEGIN_S, BEGIN_M, BEGIN_B, BEGIN_W,
-1, -1, -1, -1, -1, -1, -1, BEGIN_A -1, -1, -1, -1, -1, -1, -1, BEGIN_A };
};
static const int adr_af_count[]={ static const int adr_af_count[]={
-1, -1, COUNT_XS, COUNT_X, COUNT_S, COUNT_M, COUNT_B, COUNT_W, -1, -1, COUNT_XS, COUNT_X, COUNT_S, COUNT_M, COUNT_B, COUNT_W,
-1, -1, -1, -1, -1, -1, -1, COUNT_A -1, -1, -1, -1, -1, -1, -1, COUNT_A };
};
static const int reg_left[] ={A,B,C,D, B,C,A,C, I,I,I,I, I,I,I,I}; static const int reg_left[] ={A,B,C,D, B,C,A,C, I,I,I,I, I,I,I,I};
static const int reg_right[]={B,C,A,C, A,B,C,D, I,I,I,I, I,I,I,I}; static const int reg_right[]={B,C,A,C, A,B,C,D, I,I,I,I, I,I,I,I};
@ -37,28 +49,24 @@ static const int add_right[]={B,C,A,C, I,I,I,I, A,B,C,D, I,I,I,I};
static const int sub_left[] ={A,B,C,D, I,I,I,I, B,C,A,C, A,B,C,D}; static const int sub_left[] ={A,B,C,D, I,I,I,I, B,C,A,C, A,B,C,D};
static const int sub_right[]={B,C,A,C, I,I,I,I, A,B,C,D, B,C,A,C}; static const int sub_right[]={B,C,A,C, I,I,I,I, A,B,C,D, B,C,A,C};
void saturn_device::saturn_invalid3( int op1, int op2, int op3 ) void saturn_device::saturn_invalid3(int op1, int op2, int op3)
{ {
logerror( "SATURN '%s' invalid opcode %x%x%x at %05x\n", logerror("SATURN invalid opcode %x%x%x at %05x\n", op1, op2, op3, m_pc-3);
tag(), op1, op2, op3, m_pc-3 );
} }
void saturn_device::saturn_invalid4( int op1, int op2, int op3, int op4 ) void saturn_device::saturn_invalid4(int op1, int op2, int op3, int op4)
{ {
logerror( "SATURN '%s' invalid opcode %x%x%x%x at %05x\n", logerror("SATURN invalid opcode %x%x%x%x at %05x\n", op1, op2, op3, op4, m_pc-4);
tag(), op1, op2, op3, op4, m_pc-4 );
} }
void saturn_device::saturn_invalid5( int op1, int op2, int op3, int op4, int op5 ) void saturn_device::saturn_invalid5(int op1, int op2, int op3, int op4, int op5)
{ {
logerror( "SATURN '%s' invalid opcode %x%x%x%x%x at %05x\n", logerror("SATURN invalid opcode %x%x%x%x%x at %05x\n", op1, op2, op3, op4, op5, m_pc-5);
tag(), op1, op2, op3, op4, op5, m_pc-5 );
} }
void saturn_device::saturn_invalid6( int op1, int op2, int op3, int op4, int op5, int op6 ) void saturn_device::saturn_invalid6(int op1, int op2, int op3, int op4, int op5, int op6)
{ {
logerror( "SATURN '%s' invalid opcode %x%x%x%x%x%x at %05x\n", logerror("SATURN invalid opcode %x%x%x%x%x%x at %05x\n", op1, op2, op3, op4, op5, op6, m_pc-6);
tag(), op1, op2, op3, op4, op5, op6, m_pc-6 );
} }
@ -66,9 +74,9 @@ void saturn_device::saturn_instruction_0e()
{ {
int reg, adr; int reg, adr;
switch(adr=READ_OP()) { switch (adr=READ_OP()) {
case 0: case 0:
switch(reg=READ_OP()){ switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7:
saturn_and(reg_left[reg], m_p, 1, reg_right[reg]); saturn_and(reg_left[reg], m_p, 1, reg_right[reg]);
break; //A=A&B p break; //A=A&B p
@ -78,7 +86,7 @@ void saturn_device::saturn_instruction_0e()
} }
break; break;
case 1: case 1:
switch(reg=READ_OP()){ switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3:case 4: case 5: case 6: case 7: case 0: case 1: case 2: case 3:case 4: case 5: case 6: case 7:
saturn_and(reg_left[reg], 0, m_p+1, reg_right[reg]); saturn_and(reg_left[reg], 0, m_p+1, reg_right[reg]);
break; //A=A&B wp break; //A=A&B wp
@ -88,7 +96,7 @@ void saturn_device::saturn_instruction_0e()
} }
break; break;
case 2: case 3: case 4: case 5: case 6: case 7: case 0xf: case 2: case 3: case 4: case 5: case 6: case 7: case 0xf:
switch(reg=READ_OP()){ switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7:
saturn_and(reg_left[reg], adr_af_begin[adr], adr_af_count[adr], reg_right[reg]); saturn_and(reg_left[reg], adr_af_begin[adr], adr_af_count[adr], reg_right[reg]);
break; //A=A&B xs break; //A=A&B xs
@ -98,7 +106,7 @@ void saturn_device::saturn_instruction_0e()
} }
break; break;
default: default:
saturn_invalid3( 0, 0xe, adr ); saturn_invalid3(0, 0xe, adr);
break; break;
} }
} }
@ -117,7 +125,7 @@ void saturn_device::saturn_instruction_1()
saturn_copy(R0+(reg&7), BEGIN_W, COUNT_W, C); saturn_copy(R0+(reg&7), BEGIN_W, COUNT_W, C);
break; // r0=c w break; // r0=c w
default: default:
saturn_invalid3( 1, adr, reg ); saturn_invalid3(1, adr, reg);
break; break;
} }
break; break;
@ -130,7 +138,7 @@ void saturn_device::saturn_instruction_1()
saturn_copy(C, BEGIN_W, COUNT_W, R0+(reg&7)); saturn_copy(C, BEGIN_W, COUNT_W, R0+(reg&7));
break; // c=r0 w break; // c=r0 w
default: default:
saturn_invalid3( 1, adr, reg ); saturn_invalid3(1, adr, reg);
break; break;
} }
break; break;
@ -143,7 +151,7 @@ void saturn_device::saturn_instruction_1()
saturn_exchange(C, BEGIN_W, COUNT_W, R0+(reg&7)); saturn_exchange(C, BEGIN_W, COUNT_W, R0+(reg&7));
break; // cr0ex w break; // cr0ex w
default: default:
saturn_invalid3( 2, adr, reg ); saturn_invalid3(2, adr, reg);
break; break;
} }
break; break;
@ -201,7 +209,7 @@ void saturn_device::saturn_instruction_1()
saturn_store_nibbles(oper&4?C:A,adr_a_begin[adr],adr_a_count[adr],oper&1); saturn_store_nibbles(oper&4?C:A,adr_a_begin[adr],adr_a_count[adr],oper&1);
break; break;
default: default:
saturn_invalid4( 1, 5, oper, adr ); saturn_invalid4(1, 5, oper, adr);
break; break;
} }
break; break;
@ -217,7 +225,7 @@ void saturn_device::saturn_instruction_1()
saturn_load_nibbles(oper&4?C:A,adr_a_begin[adr],adr_a_count[adr],oper&1); saturn_load_nibbles(oper&4?C:A,adr_a_begin[adr],adr_a_count[adr],oper&1);
break; break;
default: default:
saturn_invalid4( 1, 5, oper, adr ); saturn_invalid4(1, 5, oper, adr);
break; break;
} }
break; break;
@ -247,7 +255,7 @@ void saturn_device::saturn_instruction_1()
void saturn_device::saturn_instruction_80() void saturn_device::saturn_instruction_80()
{ {
int op; int op;
switch(READ_OP()) { switch (READ_OP()) {
case 0: saturn_out_cs();break; case 0: saturn_out_cs();break;
case 1: saturn_out_c();break; case 1: saturn_out_c();break;
case 2: saturn_in(A);break; case 2: saturn_in(A);break;
@ -257,12 +265,12 @@ void saturn_device::saturn_instruction_80()
case 6: saturn_mem_id();break; case 6: saturn_mem_id();break;
case 7: saturn_shutdown();break; case 7: saturn_shutdown();break;
case 8: case 8:
switch(READ_OP()) { switch (READ_OP()) {
case 0: saturn_interrupt_on();break; case 0: saturn_interrupt_on();break;
case 1: case 1:
switch(op=READ_OP()) { switch (op=READ_OP()) {
case 0: saturn_reset_interrupt();break; case 0: saturn_reset_interrupt();break;
default: saturn_invalid5( 8, 0, 8, 1, op ); break; default: saturn_invalid5(8, 0, 8, 1, op); break;
} }
break; break;
case 2: saturn_load_reg(A);break; //la case 2: saturn_load_reg(A);break; //la
@ -294,11 +302,11 @@ void saturn_device::saturn_instruction_80()
void saturn_device::saturn_instruction_81a() void saturn_device::saturn_instruction_81a()
{ {
int reg, adr,op; int reg, adr,op;
switch(adr=READ_OP()) { switch (adr=READ_OP()) {
case 0: case 0:
switch(op=READ_OP()) { switch (op=READ_OP()) {
case 0: case 0:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 4: case 0: case 1: case 2: case 3: case 4:
saturn_copy(R0+reg,m_p,1,A); saturn_copy(R0+reg,m_p,1,A);
break; //r0=a p break; //r0=a p
@ -306,12 +314,12 @@ void saturn_device::saturn_instruction_81a()
saturn_copy(R0+(reg&7),m_p,1,C); saturn_copy(R0+(reg&7),m_p,1,C);
break; //r0=c p break; //r0=c p
default: default:
saturn_invalid6( 8, 1, 0xa, adr, op, reg); saturn_invalid6(8, 1, 0xa, adr, op, reg);
break; break;
} }
break; break;
case 1: case 1:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 4: case 0: case 1: case 2: case 3: case 4:
saturn_copy(A,m_p,1,R0+reg); saturn_copy(A,m_p,1,R0+reg);
break; //a=r0 p break; //a=r0 p
@ -319,7 +327,7 @@ void saturn_device::saturn_instruction_81a()
saturn_copy(C,m_p,1,R0+(reg&7)); saturn_copy(C,m_p,1,R0+(reg&7));
break; //c=r0 p break; //c=r0 p
default: default:
saturn_invalid6( 8, 1, 0xa, adr, op, reg); saturn_invalid6(8, 1, 0xa, adr, op, reg);
break; break;
} }
break; break;
@ -332,19 +340,19 @@ void saturn_device::saturn_instruction_81a()
saturn_exchange(C, m_p,1,R0+(reg&7)); saturn_exchange(C, m_p,1,R0+(reg&7));
break; // cr0ex p break; // cr0ex p
default: default:
saturn_invalid6( 8, 1, 0xa, adr, op, reg); saturn_invalid6(8, 1, 0xa, adr, op, reg);
break; break;
} }
break; break;
default: default:
saturn_invalid5( 8, 1, 0xa, adr, op ); saturn_invalid5(8, 1, 0xa, adr, op);
break; break;
} }
break; break;
case 1: case 1:
switch(op=READ_OP()) { switch (op=READ_OP()) {
case 0: case 0:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 4: case 0: case 1: case 2: case 3: case 4:
saturn_copy(R0+reg,0,m_p+1,A); saturn_copy(R0+reg,0,m_p+1,A);
break; //r0=a wp break; //r0=a wp
@ -352,12 +360,12 @@ void saturn_device::saturn_instruction_81a()
saturn_copy(R0+(reg&7),0,m_p+1,C); saturn_copy(R0+(reg&7),0,m_p+1,C);
break; //r0=c wp break; //r0=c wp
default: default:
saturn_invalid6( 8, 1, 0xa, adr, op, reg); saturn_invalid6(8, 1, 0xa, adr, op, reg);
break; break;
} }
break; break;
case 1: case 1:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 4: case 0: case 1: case 2: case 3: case 4:
saturn_copy(A,0,m_p+1,R0+reg); saturn_copy(A,0,m_p+1,R0+reg);
break; //a=r0 wp break; //a=r0 wp
@ -365,7 +373,7 @@ void saturn_device::saturn_instruction_81a()
saturn_copy(C,0,m_p+1,R0+(reg&7)); saturn_copy(C,0,m_p+1,R0+(reg&7));
break; //c=r0 wp break; //c=r0 wp
default: default:
saturn_invalid6( 8, 1, 0xa, adr, op, reg); saturn_invalid6(8, 1, 0xa, adr, op, reg);
break; break;
} }
break; break;
@ -378,19 +386,19 @@ void saturn_device::saturn_instruction_81a()
saturn_exchange(C, 0, m_p+1, R0+(reg&7)); saturn_exchange(C, 0, m_p+1, R0+(reg&7));
break; // cr0ex wp break; // cr0ex wp
default: default:
saturn_invalid6( 8, 1, 0xa, adr, op, reg); saturn_invalid6(8, 1, 0xa, adr, op, reg);
break; break;
} }
break; break;
default: default:
saturn_invalid5( 8, 1, 0xa, adr, op ); saturn_invalid5(8, 1, 0xa, adr, op);
break; break;
} }
break; break;
case 2: case 3: case 4: case 5: case 6: case 7: case 0xf: case 2: case 3: case 4: case 5: case 6: case 7: case 0xf:
switch(op=READ_OP()) { switch (op=READ_OP()) {
case 0: case 0:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 4: case 0: case 1: case 2: case 3: case 4:
saturn_copy(R0+reg,adr_af_begin[adr],adr_af_count[adr],A); saturn_copy(R0+reg,adr_af_begin[adr],adr_af_count[adr],A);
break; //r0=a xs break; //r0=a xs
@ -398,12 +406,12 @@ void saturn_device::saturn_instruction_81a()
saturn_copy(R0+(reg&7),adr_af_begin[adr], adr_af_count[adr],C); saturn_copy(R0+(reg&7),adr_af_begin[adr], adr_af_count[adr],C);
break; //r0=c xs break; //r0=c xs
default: default:
saturn_invalid6( 8, 1, 0xa, adr, op, reg); saturn_invalid6(8, 1, 0xa, adr, op, reg);
break; break;
} }
break; break;
case 1: case 1:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 4: case 0: case 1: case 2: case 3: case 4:
saturn_copy(A,adr_af_begin[adr],adr_af_count[adr],R0+reg); saturn_copy(A,adr_af_begin[adr],adr_af_count[adr],R0+reg);
break; //a=r0 xs break; //a=r0 xs
@ -411,7 +419,7 @@ void saturn_device::saturn_instruction_81a()
saturn_copy(C,adr_af_begin[adr],adr_af_count[adr],R0+(reg&7)); saturn_copy(C,adr_af_begin[adr],adr_af_count[adr],R0+(reg&7));
break; //c=r0 xs break; //c=r0 xs
default: default:
saturn_invalid6( 8, 1, 0xa, adr, op, reg); saturn_invalid6(8, 1, 0xa, adr, op, reg);
break; break;
} }
break; break;
@ -424,17 +432,17 @@ void saturn_device::saturn_instruction_81a()
saturn_exchange(C, adr_af_begin[adr], adr_af_count[adr], R0+(reg&7)); saturn_exchange(C, adr_af_begin[adr], adr_af_count[adr], R0+(reg&7));
break; // cr0ex xs break; // cr0ex xs
default: default:
saturn_invalid6( 8, 1, 0xa, adr, op, reg); saturn_invalid6(8, 1, 0xa, adr, op, reg);
break; break;
} }
break; break;
default: default:
saturn_invalid5( 8, 1, 0xa, adr, op ); saturn_invalid5(8, 1, 0xa, adr, op);
break; break;
} }
break; break;
default: default:
saturn_invalid4( 8, 1, 0xa, adr ); saturn_invalid4(8, 1, 0xa, adr);
break; break;
} }
} }
@ -443,13 +451,13 @@ void saturn_device::saturn_instruction_81()
{ {
int reg, adr; int reg, adr;
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_rotate_nibble_left_w(A+reg); break; // aslc w saturn_rotate_nibble_left_w(A+reg); break; // aslc w
case 4: case 5: case 6: case 7: case 4: case 5: case 6: case 7:
saturn_rotate_nibble_right_w(A+(reg&3)); break; // asrc w saturn_rotate_nibble_right_w(A+(reg&3)); break; // asrc w
case 8: case 8:
switch(adr=READ_OP()) { switch (adr=READ_OP()) {
case 0: case 0:
switch (reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
@ -459,7 +467,7 @@ void saturn_device::saturn_instruction_81()
saturn_sub_const(A+(reg&3), m_p, 1, READ_OP()+1); saturn_sub_const(A+(reg&3), m_p, 1, READ_OP()+1);
break; break;
default: default:
saturn_invalid5( 8, 1, 8, adr, reg ); saturn_invalid5(8, 1, 8, adr, reg);
break; break;
} }
break; break;
@ -472,7 +480,7 @@ void saturn_device::saturn_instruction_81()
saturn_sub_const(A+(reg&3), 0, m_p+1, READ_OP()+1); saturn_sub_const(A+(reg&3), 0, m_p+1, READ_OP()+1);
break; break;
default: default:
saturn_invalid5( 8, 1, 8, adr, reg ); saturn_invalid5(8, 1, 8, adr, reg);
break; break;
} }
break; break;
@ -485,49 +493,49 @@ void saturn_device::saturn_instruction_81()
saturn_sub_const(A+(reg&3), adr_af_begin[adr], adr_af_count[adr], READ_OP()+1); saturn_sub_const(A+(reg&3), adr_af_begin[adr], adr_af_count[adr], READ_OP()+1);
break; break;
default: default:
saturn_invalid5( 8, 1, 8, adr, reg ); saturn_invalid5(8, 1, 8, adr, reg);
break; break;
} }
break; break;
default: default:
saturn_invalid4( 8, 1, 8, adr ); saturn_invalid4(8, 1, 8, adr);
break; break;
} }
break; break;
case 9: case 9:
switch(adr=READ_OP()) { switch (adr=READ_OP()) {
case 0: case 0:
switch(reg=READ_OP()){ switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_shift_right(A+reg,m_p,1); saturn_shift_right(A+reg,m_p,1);
break; // asrb p break; // asrb p
default: default:
saturn_invalid5( 8, 1, 9, adr, reg ); saturn_invalid5(8, 1, 9, adr, reg);
break; break;
} }
break; break;
case 1: case 1:
switch(reg=READ_OP()){ switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_shift_right(A+reg, 0,m_p+1); saturn_shift_right(A+reg, 0,m_p+1);
break; // asrb wp break; // asrb wp
default: default:
saturn_invalid5( 8, 1, 9, adr, reg ); saturn_invalid5(8, 1, 9, adr, reg);
break; break;
} }
break; break;
case 2: case 3: case 4: case 5: case 6: case 7: case 0xf: case 2: case 3: case 4: case 5: case 6: case 7: case 0xf:
switch(reg=READ_OP()){ switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_shift_right(A+reg, adr_af_begin[adr], adr_af_count[adr]); saturn_shift_right(A+reg, adr_af_begin[adr], adr_af_count[adr]);
break; // asrb xs break; // asrb xs
default: default:
saturn_invalid5( 8, 1, 9, adr, reg ); saturn_invalid5(8, 1, 9, adr, reg);
break; break;
} }
break; break;
default: default:
saturn_invalid4( 8, 1, 9, adr ); saturn_invalid4(8, 1, 9, adr);
break; break;
} }
break; break;
@ -535,14 +543,14 @@ void saturn_device::saturn_instruction_81()
saturn_instruction_81a(); saturn_instruction_81a();
break; break;
case 0xb: case 0xb:
switch(adr=READ_OP()) { switch (adr=READ_OP()) {
case 2: saturn_load_pc(A);break; case 2: saturn_load_pc(A);break;
case 3: saturn_load_pc(C);break; case 3: saturn_load_pc(C);break;
case 4: saturn_store_pc(A);break; case 4: saturn_store_pc(A);break;
case 5: saturn_store_pc(C);break; case 5: saturn_store_pc(C);break;
case 6: saturn_exchange_pc(A);break; case 6: saturn_exchange_pc(A);break;
case 7: saturn_exchange_pc(C);break; case 7: saturn_exchange_pc(C);break;
default: saturn_invalid4( 8, 1, reg, adr ); break; default: saturn_invalid4(8, 1, reg, adr); break;
} }
break; break;
case 0xc: case 0xd: case 0xe: case 0xf: case 0xc: case 0xd: case 0xe: case 0xf:
@ -555,7 +563,7 @@ void saturn_device::saturn_instruction_8()
{ {
int oper, adr; int oper, adr;
switch(READ_OP()) { switch (READ_OP()) {
case 0: case 0:
saturn_instruction_80(); saturn_instruction_80();
break; break;
@ -571,7 +579,7 @@ void saturn_device::saturn_instruction_8()
case 8: saturn_p_not_equals(); break; case 8: saturn_p_not_equals(); break;
case 9: saturn_p_equals(); break; case 9: saturn_p_equals(); break;
case 0xa: case 0xa:
switch(oper=READ_OP()) { switch (oper=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_equals(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]); saturn_equals(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]);
break; break;
@ -587,7 +595,7 @@ void saturn_device::saturn_instruction_8()
} }
break; break;
case 0xb: case 0xb:
switch(oper=READ_OP()) { switch (oper=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_greater(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]); saturn_greater(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]);
break; break;
@ -625,9 +633,9 @@ void saturn_device::saturn_instruction_9()
{ {
int adr, oper; int adr, oper;
switch(adr=READ_OP()) { switch (adr=READ_OP()) {
case 0: case 0:
switch(oper=READ_OP()) { switch (oper=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_equals(reg_left[oper&3] , m_p, 1, reg_right[oper&3]); saturn_equals(reg_left[oper&3] , m_p, 1, reg_right[oper&3]);
break; break;
@ -643,7 +651,7 @@ void saturn_device::saturn_instruction_9()
} }
break; break;
case 1: case 1:
switch(oper=READ_OP()) { switch (oper=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_equals(reg_left[oper&3] , 0, m_p+1, reg_right[oper&3]); saturn_equals(reg_left[oper&3] , 0, m_p+1, reg_right[oper&3]);
break; break;
@ -659,7 +667,7 @@ void saturn_device::saturn_instruction_9()
} }
break; break;
case 2: case 3: case 4: case 5: case 6: case 7: case 2: case 3: case 4: case 5: case 6: case 7:
switch(oper=READ_OP()) { switch (oper=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_equals(reg_left[oper&3] ,adr_a_begin[adr], adr_a_count[adr], reg_right[oper&3]); saturn_equals(reg_left[oper&3] ,adr_a_begin[adr], adr_a_count[adr], reg_right[oper&3]);
break; break;
@ -675,7 +683,7 @@ void saturn_device::saturn_instruction_9()
} }
break; break;
case 8: case 8:
switch(oper=READ_OP()) { switch (oper=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_greater(reg_left[oper&3] ,m_p, 1, reg_right[oper&3]); saturn_greater(reg_left[oper&3] ,m_p, 1, reg_right[oper&3]);
break; break;
@ -691,7 +699,7 @@ void saturn_device::saturn_instruction_9()
} }
break; break;
case 9: case 9:
switch(oper=READ_OP()) { switch (oper=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_greater(reg_left[oper&3] , 0, m_p+1, reg_right[oper&3]); saturn_greater(reg_left[oper&3] , 0, m_p+1, reg_right[oper&3]);
break; break;
@ -707,7 +715,7 @@ void saturn_device::saturn_instruction_9()
} }
break; break;
case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf: case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf:
switch(oper=READ_OP()) { switch (oper=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_greater(reg_left[oper&3] ,adr_b_begin[adr], adr_b_count[adr], reg_right[oper&3]); saturn_greater(reg_left[oper&3] ,adr_b_begin[adr], adr_b_count[adr], reg_right[oper&3]);
break; break;
@ -729,7 +737,7 @@ void saturn_device::saturn_instruction_a()
{ {
int reg, adr; int reg, adr;
switch(adr=READ_OP()) { switch (adr=READ_OP()) {
case 0: case 0:
switch (reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
@ -773,7 +781,7 @@ void saturn_device::saturn_instruction_a()
} }
break; break;
case 8: case 8:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_clear(A+reg, m_p,1); saturn_clear(A+reg, m_p,1);
break; // a=0 p break; // a=0 p
@ -787,7 +795,7 @@ void saturn_device::saturn_instruction_a()
} }
break; break;
case 9: case 9:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_clear(A+reg,0,m_p+1); saturn_clear(A+reg,0,m_p+1);
break; // a=0 wp break; // a=0 wp
@ -801,7 +809,7 @@ void saturn_device::saturn_instruction_a()
} }
break; break;
case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf: case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_clear(A+reg, adr_b_begin[adr], adr_b_count[adr]); saturn_clear(A+reg, adr_b_begin[adr], adr_b_count[adr]);
break; // a=0 xs break; // a=0 xs
@ -821,9 +829,9 @@ void saturn_device::saturn_instruction_b()
{ {
int adr, reg; int adr, reg;
switch(adr=READ_OP()) { switch (adr=READ_OP()) {
case 0: case 0:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
case 8: case 9: case 0xa: case 0xb: case 8: case 9: case 0xa: case 0xb:
saturn_sub(sub_left[reg], m_p, 1, sub_right[reg]); saturn_sub(sub_left[reg], m_p, 1, sub_right[reg]);
@ -836,7 +844,7 @@ void saturn_device::saturn_instruction_b()
} }
break; break;
case 1: case 1:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
case 8: case 9: case 0xa: case 0xb: case 8: case 9: case 0xa: case 0xb:
saturn_sub(sub_left[reg], 0, m_p+1, sub_right[reg]); saturn_sub(sub_left[reg], 0, m_p+1, sub_right[reg]);
@ -849,7 +857,7 @@ void saturn_device::saturn_instruction_b()
} }
break; break;
case 2: case 3: case 4: case 5: case 6: case 7: case 2: case 3: case 4: case 5: case 6: case 7:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
case 8: case 9: case 0xa: case 0xb: case 8: case 9: case 0xa: case 0xb:
saturn_sub(sub_left[reg], adr_a_begin[adr], adr_a_count[adr], sub_right[reg]); saturn_sub(sub_left[reg], adr_a_begin[adr], adr_a_count[adr], sub_right[reg]);
@ -864,7 +872,7 @@ void saturn_device::saturn_instruction_b()
} }
break; break;
case 8: case 8:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_shift_nibble_left(A+reg, m_p, 1); break; // asl p saturn_shift_nibble_left(A+reg, m_p, 1); break; // asl p
case 4: case 5: case 6: case 7: case 4: case 5: case 6: case 7:
@ -876,7 +884,7 @@ void saturn_device::saturn_instruction_b()
} }
break; break;
case 9: case 9:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_shift_nibble_left(A+reg,0,m_p+1); break; // asl wp saturn_shift_nibble_left(A+reg,0,m_p+1); break; // asl wp
case 4: case 5: case 6: case 7: case 4: case 5: case 6: case 7:
@ -888,7 +896,7 @@ void saturn_device::saturn_instruction_b()
} }
break; break;
case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf: case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_shift_nibble_left(A+reg,adr_b_begin[adr], adr_b_count[adr]); saturn_shift_nibble_left(A+reg,adr_b_begin[adr], adr_b_count[adr]);
break; break;
@ -911,19 +919,19 @@ void saturn_device::saturn_instruction()
{ {
int reg, adr; int reg, adr;
switch(READ_OP()) { switch (READ_OP()) {
case 0: case 0:
switch(READ_OP()) { switch (READ_OP()) {
case 0: saturn_return_xm_set();break; case 0x0: saturn_return_xm_set();break;
case 1: saturn_return(1);break; case 0x1: saturn_return(1);break;
case 2: saturn_return_carry_set();break; case 0x2: saturn_return_carry_set();break;
case 3: saturn_return_carry_clear();break; case 0x3: saturn_return_carry_clear();break;
case 4: saturn_sethex();break; case 0x4: saturn_sethex();break;
case 5: saturn_setdec();break; case 0x5: saturn_setdec();break;
case 6: saturn_push_c();break; case 0x6: saturn_push_c();break;
case 7: saturn_pop_c();break; case 0x7: saturn_pop_c();break;
case 8: saturn_clear_st();break; case 0x8: saturn_clear_st();break;
case 9: saturn_st_to_c();break; case 0x9: saturn_st_to_c();break;
case 0xa: saturn_c_to_st();break; case 0xa: saturn_c_to_st();break;
case 0xb: saturn_exchange_c_st();break; case 0xb: saturn_exchange_c_st();break;
case 0xc: saturn_inc_p();break; case 0xc: saturn_inc_p();break;
@ -992,7 +1000,7 @@ void saturn_device::saturn_instruction()
} }
break; break;
case 0xd: case 0xd:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_clear(A+reg, BEGIN_A, COUNT_A); saturn_clear(A+reg, BEGIN_A, COUNT_A);
break; // a=0 a break; // a=0 a
@ -1006,7 +1014,7 @@ void saturn_device::saturn_instruction()
} }
break; break;
case 0xe: case 0xe:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
case 8: case 9: case 0xa: case 0xb: case 8: case 9: case 0xa: case 0xb:
saturn_sub(sub_left[reg], BEGIN_A, COUNT_A, sub_right[reg]); saturn_sub(sub_left[reg], BEGIN_A, COUNT_A, sub_right[reg]);
@ -1020,7 +1028,7 @@ void saturn_device::saturn_instruction()
} }
break; break;
case 0xf: case 0xf:
switch(reg=READ_OP()) { switch (reg=READ_OP()) {
case 0: case 1: case 2: case 3: case 0: case 1: case 2: case 3:
saturn_shift_nibble_left(A+reg,BEGIN_A, COUNT_A); saturn_shift_nibble_left(A+reg,BEGIN_A, COUNT_A);
break; // asl a break; // asl a

25
src/devices/cpu/saturn/saturn.cpp
View File

@ -15,6 +15,10 @@
#include "debugger.h" #include "debugger.h"
//#define VERBOSE 1
#include "logmacro.h"
#define R0 0 #define R0 0
#define R1 1 #define R1 1
#define R2 2 #define R2 2
@ -27,10 +31,6 @@
#define I 9 // invalid #define I 9 // invalid
//#define VERBOSE 1
#include "logmacro.h"
// Hardware status bits // Hardware status bits
#define XM 1 // external Modules missing #define XM 1 // external Modules missing
#define SB 2 // Sticky bit #define SB 2 // Sticky bit
@ -52,16 +52,19 @@ saturn_device::saturn_device(const machine_config &mconfig, const char *tag, dev
, m_unconfig_func(*this) , m_unconfig_func(*this)
, m_id_func(*this) , m_id_func(*this)
, m_crc_func(*this) , m_crc_func(*this)
, m_rsi_func(*this), m_pc(0), m_oldpc(0), m_p(0), m_out(0), m_carry(0), m_decimal(0), m_st(0), m_hst(0), m_nmi_state(0), m_irq_state(0), m_irq_enable(0), m_in_irq(0), , m_rsi_func(*this)
m_pending_irq(0), m_sleeping(0), m_monitor_id(0), m_monitor_in(0), m_program(nullptr), m_cache(nullptr), m_icount(0), m_debugger_temp(0) , m_pc(0), m_oldpc(0), m_p(0), m_out(0), m_carry(0), m_decimal(0), m_st(0), m_hst(0)
, m_nmi_state(0), m_irq_state(0), m_irq_enable(0), m_in_irq(0), m_pending_irq(0)
, m_sleeping(0), m_monitor_id(0), m_monitor_in(0)
, m_program(nullptr), m_cache(nullptr)
, m_icount(0)
, m_debugger_temp(0)
{ {
} }
device_memory_interface::space_config_vector saturn_device::memory_space_config() const device_memory_interface::space_config_vector saturn_device::memory_space_config() const
{ {
return space_config_vector { return space_config_vector{ std::make_pair(AS_PROGRAM, &m_program_config) };
std::make_pair(AS_PROGRAM, &m_program_config)
};
} }
bool saturn_device::get_nonstandard_mnemonics_mode() const bool saturn_device::get_nonstandard_mnemonics_mode() const
@ -81,8 +84,8 @@ std::unique_ptr<util::disasm_interface> saturn_device::create_disassembler()
* include the opcode macros, functions and tables * include the opcode macros, functions and tables
***************************************************************/ ***************************************************************/
#include "satops.hxx" #include "satops.ipp"
#include "sattable.hxx" #include "sattable.ipp"
/***************************************************************************** /*****************************************************************************
* *

244
src/devices/cpu/saturn/saturn.h
View File

@ -114,8 +114,8 @@ private:
devcb_write32 m_crc_func; devcb_write32 m_crc_func;
devcb_write_line m_rsi_func; devcb_write_line m_rsi_func;
// 64 bit, unpacked (one nibble per byte) // 64 bit, unpacked (one nibble per byte)
typedef uint8_t Saturn64[16]; typedef uint8_t Saturn64[16];
Saturn64 m_reg[9]; //r0,r1,r2,r3,r4,a,b,c,d Saturn64 m_reg[9]; //r0,r1,r2,r3,r4,a,b,c,d
@ -146,126 +146,126 @@ typedef uint8_t Saturn64[16];
void IntReg64(Saturn64 r, int64_t d); void IntReg64(Saturn64 r, int64_t d);
int64_t Reg64Int(Saturn64 r); int64_t Reg64Int(Saturn64 r);
inline int READ_OP(); int READ_OP();
inline int READ_OP_ARG(); int READ_OP_ARG();
inline int READ_OP_ARG8(); int READ_OP_ARG8();
inline int8_t READ_OP_DIS8(); int8_t READ_OP_DIS8();
inline int READ_OP_ARG12(); int READ_OP_ARG12();
inline int READ_OP_DIS12(); int READ_OP_DIS12();
inline int READ_OP_ARG16(); int READ_OP_ARG16();
inline int16_t READ_OP_DIS16(); int16_t READ_OP_DIS16();
inline int READ_OP_ARG20(); int READ_OP_ARG20();
inline int READ_NIBBLE(uint32_t adr); int READ_NIBBLE(uint32_t adr);
inline int READ_8(uint32_t adr); int READ_8(uint32_t adr);
inline int READ_12(uint32_t adr); int READ_12(uint32_t adr);
inline int READ_16(uint32_t adr); int READ_16(uint32_t adr);
inline int READ_20(uint32_t adr); int READ_20(uint32_t adr);
inline void WRITE_NIBBLE(uint32_t adr, uint8_t nib); void WRITE_NIBBLE(uint32_t adr, uint8_t nib);
inline int S64_READ_X(int r); int S64_READ_X(int r);
inline int S64_READ_WORD(int r); int S64_READ_WORD(int r);
inline int S64_READ_A(int r); int S64_READ_A(int r);
inline void S64_WRITE_X(int r, int v); void S64_WRITE_X(int r, int v);
inline void S64_WRITE_WORD(int r, int v); void S64_WRITE_WORD(int r, int v);
inline void S64_WRITE_A(int r, int v); void S64_WRITE_A(int r, int v);
inline uint32_t saturn_pop(); uint32_t saturn_pop();
inline void saturn_push(uint32_t adr); void saturn_push(uint32_t adr);
inline void saturn_interrupt_on(); void saturn_interrupt_on();
inline void saturn_interrupt_off(); void saturn_interrupt_off();
inline void saturn_reset_interrupt(); void saturn_reset_interrupt();
inline void saturn_mem_reset(); void saturn_mem_reset();
inline void saturn_mem_config(); void saturn_mem_config();
inline void saturn_mem_unconfig(); void saturn_mem_unconfig();
inline void saturn_mem_id(); void saturn_mem_id();
inline void saturn_shutdown(); void saturn_shutdown();
inline void saturn_bus_command_b(); void saturn_bus_command_b();
inline void saturn_bus_command_c(); void saturn_bus_command_c();
inline void saturn_bus_command_d(); void saturn_bus_command_d();
inline void saturn_serial_request(); void saturn_serial_request();
inline void saturn_out_c(); void saturn_out_c();
inline void saturn_out_cs(); void saturn_out_cs();
inline void saturn_in(int reg); void saturn_in(int reg);
inline void saturn_sethex() { m_decimal=0; } void saturn_sethex() { m_decimal=0; }
inline void saturn_setdec() { m_decimal=1; } void saturn_setdec() { m_decimal=1; }
inline void saturn_clear_st(); void saturn_clear_st();
inline void saturn_st_to_c(); void saturn_st_to_c();
inline void saturn_c_to_st(); void saturn_c_to_st();
inline void saturn_exchange_c_st(); void saturn_exchange_c_st();
inline void saturn_jump_after_test(); void saturn_jump_after_test();
inline void saturn_st_clear_bit(); void saturn_st_clear_bit();
inline void saturn_st_set_bit(); void saturn_st_set_bit();
inline void saturn_st_jump_bit_clear(); void saturn_st_jump_bit_clear();
inline void saturn_st_jump_bit_set(); void saturn_st_jump_bit_set();
inline void saturn_hst_clear_bits(); void saturn_hst_clear_bits();
inline void saturn_hst_bits_cleared(); void saturn_hst_bits_cleared();
inline void saturn_exchange_p(); void saturn_exchange_p();
inline void saturn_p_to_c(); void saturn_p_to_c();
inline void saturn_c_to_p(); void saturn_c_to_p();
inline void saturn_dec_p(); void saturn_dec_p();
inline void saturn_inc_p(); void saturn_inc_p();
inline void saturn_load_p(); void saturn_load_p();
inline void saturn_p_equals(); void saturn_p_equals();
inline void saturn_p_not_equals(); void saturn_p_not_equals();
inline void saturn_ca_p_1(); void saturn_ca_p_1();
inline void saturn_load_reg(int reg); void saturn_load_reg(int reg);
inline void saturn_jump(int adr, int jump); void saturn_jump(int adr, int jump);
inline void saturn_call(int adr); void saturn_call(int adr);
inline void saturn_return(int yes); void saturn_return(int yes);
inline void saturn_return_carry_set(); void saturn_return_carry_set();
inline void saturn_return_carry_clear(); void saturn_return_carry_clear();
inline void saturn_return_interrupt(); void saturn_return_interrupt();
inline void saturn_return_xm_set(); void saturn_return_xm_set();
inline void saturn_pop_c(); void saturn_pop_c();
inline void saturn_push_c(); void saturn_push_c();
inline void saturn_indirect_jump(int reg); void saturn_indirect_jump(int reg);
inline void saturn_equals_zero(int reg, int begin, int count); void saturn_equals_zero(int reg, int begin, int count);
inline void saturn_equals(int reg, int begin, int count, int right); void saturn_equals(int reg, int begin, int count, int right);
inline void saturn_not_equals_zero(int reg, int begin, int count); void saturn_not_equals_zero(int reg, int begin, int count);
inline void saturn_not_equals(int reg, int begin, int count, int right); void saturn_not_equals(int reg, int begin, int count, int right);
inline void saturn_greater(int reg, int begin, int count, int right); void saturn_greater(int reg, int begin, int count, int right);
inline void saturn_greater_equals(int reg, int begin, int count, int right); void saturn_greater_equals(int reg, int begin, int count, int right);
inline void saturn_smaller_equals(int reg, int begin, int count, int right); void saturn_smaller_equals(int reg, int begin, int count, int right);
inline void saturn_smaller(int reg, int begin, int count, int right); void saturn_smaller(int reg, int begin, int count, int right);
inline void saturn_jump_bit_clear(int reg); void saturn_jump_bit_clear(int reg);
inline void saturn_jump_bit_set(int reg); void saturn_jump_bit_set(int reg);
inline void saturn_load_pc(int reg); void saturn_load_pc(int reg);
inline void saturn_store_pc(int reg); void saturn_store_pc(int reg);
inline void saturn_exchange_pc(int reg); void saturn_exchange_pc(int reg);
inline void saturn_load_adr(int reg, int nibbles); void saturn_load_adr(int reg, int nibbles);
inline void saturn_add_adr(int reg); void saturn_add_adr(int reg);
inline void saturn_sub_adr(int reg); void saturn_sub_adr(int reg);
inline void saturn_adr_to_reg(int adr, int reg); void saturn_adr_to_reg(int adr, int reg);
inline void saturn_reg_to_adr(int reg, int adr); void saturn_reg_to_adr(int reg, int adr);
inline void saturn_adr_to_reg_word(int adr, int reg); void saturn_adr_to_reg_word(int adr, int reg);
inline void saturn_reg_to_adr_word(int reg, int adr); void saturn_reg_to_adr_word(int reg, int adr);
inline void saturn_exchange_adr_reg(int adr, int reg); void saturn_exchange_adr_reg(int adr, int reg);
inline void saturn_exchange_adr_reg_word(int adr, int reg); void saturn_exchange_adr_reg_word(int adr, int reg);
inline void saturn_load_nibbles(int reg, int begin, int count, int adr); void saturn_load_nibbles(int reg, int begin, int count, int adr);
inline void saturn_store_nibbles(int reg, int begin, int count, int adr); void saturn_store_nibbles(int reg, int begin, int count, int adr);
inline void saturn_clear_bit(int reg); void saturn_clear_bit(int reg);
inline void saturn_set_bit(int reg); void saturn_set_bit(int reg);
inline void saturn_clear(int reg, int begin, int count); void saturn_clear(int reg, int begin, int count);
inline void saturn_exchange(int left, int begin, int count, int right); void saturn_exchange(int left, int begin, int count, int right);
inline void saturn_copy(int dest, int begin, int count, int src); void saturn_copy(int dest, int begin, int count, int src);
inline void saturn_add(int reg, int begin, int count, int right); void saturn_add(int reg, int begin, int count, int right);
inline void saturn_add_const(int reg, int begin, int count, uint8_t right); void saturn_add_const(int reg, int begin, int count, uint8_t right);
inline void saturn_sub(int reg, int begin, int count, int right); void saturn_sub(int reg, int begin, int count, int right);
inline void saturn_sub_const(int reg, int begin, int count, int right); void saturn_sub_const(int reg, int begin, int count, int right);
inline void saturn_sub2(int reg, int begin, int count, int right); void saturn_sub2(int reg, int begin, int count, int right);
inline void saturn_increment(int reg, int begin, int count); void saturn_increment(int reg, int begin, int count);
inline void saturn_decrement(int reg, int begin, int count); void saturn_decrement(int reg, int begin, int count);
inline void saturn_invert(int reg, int begin, int count); void saturn_invert(int reg, int begin, int count);
inline void saturn_negate(int reg, int begin, int count); void saturn_negate(int reg, int begin, int count);
inline void saturn_or(int dest, int begin, int count, int src); void saturn_or(int dest, int begin, int count, int src);
inline void saturn_and(int dest, int begin, int count, int src); void saturn_and(int dest, int begin, int count, int src);
inline void saturn_shift_nibble_left(int reg, int begin, int count); void saturn_shift_nibble_left(int reg, int begin, int count);
inline void saturn_shift_nibble_right(int reg, int begin, int count); void saturn_shift_nibble_right(int reg, int begin, int count);
inline void saturn_rotate_nibble_left_w(int reg); void saturn_rotate_nibble_left_w(int reg);
inline void saturn_rotate_nibble_right_w(int reg); void saturn_rotate_nibble_right_w(int reg);
inline void saturn_shift_right(int reg, int begin, int count); void saturn_shift_right(int reg, int begin, int count);
void saturn_invalid3( int op1, int op2, int op3 ); void saturn_invalid3(int op1, int op2, int op3);
void saturn_invalid4( int op1, int op2, int op3, int op4 ); void saturn_invalid4(int op1, int op2, int op3, int op4);
void saturn_invalid5( int op1, int op2, int op3, int op4, int op5 ); void saturn_invalid5(int op1, int op2, int op3, int op4, int op5);
void saturn_invalid6( int op1, int op2, int op3, int op4, int op5, int op6 ); void saturn_invalid6(int op1, int op2, int op3, int op4, int op5, int op6);
void saturn_instruction_0e(); void saturn_instruction_0e();
void saturn_instruction_1(); void saturn_instruction_1();
void saturn_instruction_80(); void saturn_instruction_80();