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https://github.com/holub/mame
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r9751: Add more SMIOC registers
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@ -114,8 +114,10 @@ private:
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uint32_t fdd_dest_address; // 5FF080B0
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uint32_t fdd_cmd_complete;
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uint32_t smioc_out_addr;
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uint32_t smioc_in_addr;
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uint32_t smioc_dma_bank;
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uint32_t smioc_dma_length;
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uint32_t smioc_dma_w_length;
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uint32_t smioc_dma_r_length;
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uint32_t fdd_dma_bank;
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attotime timer_32khz_last;
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uint8_t m_term_data;
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@ -184,7 +186,7 @@ DRIVER_INIT_MEMBER(r9751_state,r9751)
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fdd_dma_bank = 0;
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smioc_out_addr = 0;
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smioc_dma_bank = 0;
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smioc_dma_length = 0;
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smioc_dma_w_length = 0;
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m_mem = &m_maincpu->space(AS_PROGRAM);
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@ -250,7 +252,7 @@ READ32_MEMBER( r9751_state::r9751_mmio_5ff_r )
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if(TRACE_FDC && data != 0) logerror("--- SCSI FDD command completion status - Read: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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return data;
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default:
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if(TRACE_FDC || TRACE_HDC || TRACE_SMIOC) logerror("Instruction: %08x READ MMIO(%08x): %08x & %08x\n", space.machine().firstcpu->pc(), offset << 2 | 0x5FF00000, 0, mem_mask);
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if(TRACE_FDC || TRACE_HDC || TRACE_SMIOC) logerror("Unknown read address: %08X PC: %08X\n", offset << 2 | 0x5FF00000, space.machine().firstcpu->pc());
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return 0;
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}
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}
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@ -281,21 +283,26 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
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case 0xC024: /* HDD SCSI read command */
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if(TRACE_HDC) logerror("@@@ HDD Command: %08X, From: %08X, Register: %08X\n", data, space.machine().firstcpu->pc(), offset << 2 | 0x5FF00000);
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break;
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/* SMIOC region (0x98, device 26) */
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/* SMIOC region (0x98, device 26) - Output */
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case 0x0298:
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m_serial_status = data;
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if(TRACE_SMIOC) logerror("Serial status: %08X PC: %08X\n", data, space.machine().firstcpu->pc());
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break;
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case 0x4098: /* Serial DMA Command */
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m_serial_status = 0x40;
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switch(data)
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{
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case 0x4100: /* Send byte to serial */
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for(int i = 0; i < smioc_dma_length; i++)
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for(int i = 0; i < smioc_dma_w_length; i++)
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{
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if(TRACE_SMIOC) logerror("Serial byte: %02X PC: %08X\n", m_mem->read_dword(smioc_out_addr+i*2), space.machine().firstcpu->pc());
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m_terminal->write(space,0,m_mem->read_dword(smioc_out_addr+i*2));
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}
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break;
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case 0x4200: /* Write XON into serial DMA input register (0x5FF0809C) memory location */
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m_maincpu->space(AS_PROGRAM).write_byte(smioc_in_addr,0x11);
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if(TRACE_SMIOC) logerror("Serial DMA command 0x4200 (XON) PC: %08X\n", space.machine().firstcpu->pc());
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break;
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default:
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if(TRACE_SMIOC) logerror("Unknown serial DMA command: %X\n", data);
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}
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@ -305,11 +312,20 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
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smioc_out_addr = (smioc_dma_bank & 0x7FFFF800) | ((data&0x3FF)<<1);
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if(TRACE_SMIOC) logerror("Serial output address: %08X PC: %08X\n", smioc_out_addr, space.machine().firstcpu->pc());
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break;
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/* SMIOC region (0x9C, device 27) */
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case 0x409C: /* Serial DMA length */
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smioc_dma_length = (~data+1) & 0xFFFF;
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if(TRACE_SMIOC) logerror("Serial DMA length: %08X PC: %08X\n", smioc_dma_length, space.machine().firstcpu->pc());
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if(smioc_dma_length > 0x400) smioc_dma_length = 0x400;
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/* SMIOC region (0x9C, device 27) - Input */
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case 0x409C: /* Serial DMA write length */
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smioc_dma_w_length = (~data+1) & 0xFFFF;
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if(TRACE_SMIOC) logerror("Serial DMA write length: %08X PC: %08X\n", smioc_dma_w_length, space.machine().firstcpu->pc());
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if(smioc_dma_w_length > 0x400) smioc_dma_w_length = 0x400;
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break;
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case 0x809C: /* Serial DMA input address */
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smioc_in_addr = (smioc_dma_bank & 0x7FFFF800) | ((data&0x3FF)<<1);
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if(TRACE_SMIOC) logerror("Serial input address: %08X PC: %08X\n", smioc_out_addr, space.machine().firstcpu->pc());
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break;
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case 0xC09C: /* Serial DMA read length */
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smioc_dma_r_length = (~data+1) & 0xFFFF;
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if(TRACE_SMIOC) logerror("Serial DMA read length: %08X PC: %08X\n", smioc_dma_r_length, space.machine().firstcpu->pc());
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if(smioc_dma_r_length > 0x400) smioc_dma_r_length = 0x400;
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break;
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/* PDC FDD region (0xB0, device 44 */
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case 0x01B0: /* FDD SCSI read command */
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@ -387,7 +403,7 @@ WRITE32_MEMBER( r9751_state::r9751_mmio_5ff_w )
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break;
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default:
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if(TRACE_FDC || TRACE_HDC || TRACE_SMIOC) logerror("Instruction: %08x WRITE MMIO(%08x): %08x & %08x (A6+4): %08X\n", space.machine().firstcpu->pc(), offset << 2 | 0x5FF00000, data, mem_mask, debug_a6());
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if(TRACE_FDC || TRACE_HDC || TRACE_SMIOC) logerror("Unknown write address: %08X Data: %08X PC: %08X\n", offset << 2 | 0x5FF00000, data, space.machine().firstcpu->pc());
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}
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}
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