mirror of
https://github.com/holub/mame
synced 2025-05-23 14:19:01 +03:00
Reverted R9829 as per submitter's request
This commit is contained in:
parent
9d1d653ae7
commit
d887c25371
@ -5,7 +5,7 @@
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Bellfruit scorpion2/3 driver, (under heavy construction !!!)
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Bellfruit scorpion2/3 driver, (under heavy construction !!!)
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*****************************************************************************************
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*****************************************************************************************
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25-07-2010: J Wallace: Hooked EEPROM up to generic I2C handler - removing our workaround
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30-12-2006: J Wallace: Fixed init routines.
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30-12-2006: J Wallace: Fixed init routines.
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07-03-2006: El Condor: Recoded to more accurately represent the hardware setup.
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07-03-2006: El Condor: Recoded to more accurately represent the hardware setup.
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18-01-2006: Cleaned up for MAME inclusion
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18-01-2006: Cleaned up for MAME inclusion
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@ -134,17 +134,20 @@ Adder hardware:
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Known issues:
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Known issues:
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* Need to find the 'missing' game numbers
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* Need to find the 'missing' game numbers
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* Fix RS232 protocol
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* Fix RS232 protocol
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* ACIA needs to be converted to use MAME 6850 code
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***************************************************************************/
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***************************************************************************/
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#include "emu.h"
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#include "emu.h"
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#include "cpu/m6809/m6809.h"
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#include "cpu/m6809/m6809.h"
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#include "machine/i2cmem.h"
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#include "video/bfm_adr2.h"
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#include "video/bfm_adr2.h"
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#include "sound/2413intf.h"
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#include "sound/2413intf.h"
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#include "sound/upd7759.h"
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#include "sound/upd7759.h"
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/* fruit machines only */
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#include "video/awpvid.h"
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#include "machine/steppers.h" // stepper motor
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#include "machine/bfm_bd1.h" // vfd
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#include "machine/bfm_bd1.h" // vfd
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#include "machine/meters.h"
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#include "machine/meters.h"
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@ -158,10 +161,6 @@ Adder hardware:
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#include "sltblgtk.lh"
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#include "sltblgtk.lh"
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#include "slots.lh"
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#include "slots.lh"
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/* fruit machines only */
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#include "video/awpvid.h"
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#include "machine/steppers.h" // stepper motor
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#ifdef MAME_DEBUG
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#ifdef MAME_DEBUG
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#define VERBOSE 1
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#define VERBOSE 1
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#else
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#else
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@ -171,7 +170,6 @@ Adder hardware:
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// log serial communication between mainboard (scorpion2) and videoboard (adder2)
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// log serial communication between mainboard (scorpion2) and videoboard (adder2)
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#define LOG_SERIAL(x) do { if (VERBOSE) logerror x; } while (0)
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#define LOG_SERIAL(x) do { if (VERBOSE) logerror x; } while (0)
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#define UART_LOG(x) do { if (VERBOSE) logerror x; } while (0)
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#define UART_LOG(x) do { if (VERBOSE) logerror x; } while (0)
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#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
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#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
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#define MASTER_CLOCK (XTAL_8MHz)
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#define MASTER_CLOCK (XTAL_8MHz)
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@ -180,14 +178,21 @@ Adder hardware:
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static int get_scorpion2_uart_status(void); // retrieve status of uart on scorpion2 board
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static int get_scorpion2_uart_status(void); // retrieve status of uart on scorpion2 board
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static int read_e2ram(void);
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static void e2ram_reset(void);
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// global vars ////////////////////////////////////////////////////////////
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// global vars ////////////////////////////////////////////////////////////
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static int sc2gui_update_mmtr; // bit pattern which mechanical meter needs updating
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static int sc2gui_update_mmtr; // bit pattern which mechanical meter needs updating
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// local vars /////////////////////////////////////////////////////////////
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// local vars /////////////////////////////////////////////////////////////
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static UINT8 *nvram; // pointer to NVRAM
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static size_t nvram_size; // size of NVRAM
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static UINT8 key[16]; // security device on gamecard (video games only)
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static UINT8 key[16]; // security device on gamecard (video games only)
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static UINT8 e2ram[1024]; // x24C08 e2ram
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static int mmtr_latch; // mechanical meter latch
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static int mmtr_latch; // mechanical meter latch
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static int triac_latch; // payslide triac latch
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static int triac_latch; // payslide triac latch
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static int vfd1_latch; // vfd1 latch
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static int vfd1_latch; // vfd1 latch
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@ -332,6 +337,8 @@ static void on_scorpion2_reset(running_machine *machine)
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BFM_BD1_reset(0); // reset display1
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BFM_BD1_reset(0); // reset display1
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BFM_BD1_reset(1); // reset display2
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BFM_BD1_reset(1); // reset display2
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e2ram_reset();
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devtag_reset(machine, "ymsnd");
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devtag_reset(machine, "ymsnd");
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// reset stepper motors /////////////////////////////////////////////////
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// reset stepper motors /////////////////////////////////////////////////
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@ -431,6 +438,46 @@ int Scorpion2_GetSwitchState(int strobe, int data)
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///////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////
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static NVRAM_HANDLER( bfm_sc2 )
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{
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static const UINT8 init_e2ram[10] = { 1, 4, 10, 20, 0, 1, 1, 4, 10, 20 };
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if ( read_or_write )
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{ // writing
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mame_fwrite(file,nvram,nvram_size);
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mame_fwrite(file,e2ram,sizeof(e2ram));
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}
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else
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{ // reading
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if ( file )
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{
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mame_fread(file,nvram,nvram_size);
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mame_fread(file,e2ram,sizeof(e2ram));
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}
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else
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{
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memset(nvram,0x00,nvram_size);
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memset(e2ram,0x00,sizeof(e2ram));
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memcpy(e2ram,init_e2ram,sizeof(init_e2ram));
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}
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}
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}
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///////////////////////////////////////////////////////////////////////////
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static READ8_HANDLER( ram_r )
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{
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return nvram[offset]; // read from RAM
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}
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///////////////////////////////////////////////////////////////////////////
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static WRITE8_HANDLER( ram_w )
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{
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nvram[offset] = data; // write to RAM
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}
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///////////////////////////////////////////////////////////////////////////
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static WRITE8_HANDLER( watchdog_w )
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static WRITE8_HANDLER( watchdog_w )
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{
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{
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watchdog_kicked = 1;
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watchdog_kicked = 1;
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@ -1047,6 +1094,20 @@ static READ8_HANDLER( vid_uart_ctrl_r )
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return get_scorpion2_uart_status();
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return get_scorpion2_uart_status();
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}
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}
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///////////////////////////////////////////////////////////////////////////
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static READ8_HANDLER( key_r )
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{
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int result = key[ offset ];
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if ( offset == 7 )
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{
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result = (result & 0xFE) | read_e2ram();
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}
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return result;
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}
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///////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////
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/*
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/*
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@ -1055,29 +1116,301 @@ internally organized 1024 x 8. The X24C08 features a
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serial interface and software protocol allowing operation
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serial interface and software protocol allowing operation
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on a simple two wire bus.
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on a simple two wire bus.
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In the Adder 2 setup, it is used alongside the security key, working
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as additional datalogging and protection.
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*/
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*/
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static READ8_DEVICE_HANDLER( key_r )
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{
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int result = key[ offset ];
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if ( offset == 7 )
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static int e2reg;
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static int e2state;
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static int e2cnt;
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static int e2data;
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static int e2address;
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static int e2rw;
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static int e2data_pin;
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static int e2dummywrite;
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static int e2data_to_read;
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#define SCL 0x01 //SCL pin (clock)
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#define SDA 0x02 //SDA pin (data)
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static void e2ram_reset(void)
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{
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e2reg = 0;
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e2state = 0;
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e2address = 0;
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e2rw = 0;
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e2data_pin = 0;
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e2data = (SDA|SCL);
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e2dummywrite = 0;
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e2data_to_read = 0;
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}
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static int recdata(int changed, int data)
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{
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int res = 1;
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if ( e2cnt < 8 )
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{
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{
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result = (result & 0xFE) | i2cmem_sda_read(device);
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res = 0;
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if ( (changed & SCL) && (data & SCL) )
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{ // clocked in new data
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int pattern = 1 << (7-e2cnt);
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if ( data & SDA ) e2data |= pattern;
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else e2data &= ~pattern;
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e2data_pin = e2data_to_read & 0x80 ? 1 : 0;
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e2data_to_read <<= 1;
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LOG(("e2d pin= %d\n", e2data_pin));
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e2cnt++;
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if ( e2cnt >= 8 )
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{
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res++;
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}
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}
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}
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}
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return res;
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}
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static int recAck(int changed, int data)
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{
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int result = 0;
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if ( (changed & SCL) && (data & SCL) )
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{
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if ( data & SDA )
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{
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result = 1;
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}
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else
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{
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result = -1;
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}
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}
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return result;
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return result;
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}
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}
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static WRITE8_DEVICE_HANDLER(i2c_nvram_w)
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//
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{
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static WRITE8_HANDLER( e2ram_w )
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i2cmem_scl_write(device,BIT(data, 0));
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{ // b0 = clock b1 = data
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i2cmem_sda_write(device,BIT(data, 1));
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int changed, ack;
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data ^= (SDA|SCL); // invert signals
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changed = (e2reg^data) & 0x03;
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e2reg = data;
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if ( changed )
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{
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while ( 1 )
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{
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if ( ( (changed & SDA) && !(data & SDA)) && // 1->0 on SDA AND
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( !(changed & SCL) && (data & SCL) ) // SCL=1 and not changed
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)
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{ // X24C08 Start condition (1->0 on SDA while SCL=1)
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e2dummywrite = ( e2state == 5 );
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LOG(("e2ram: c:%d d:%d Start condition dummywrite=%d\n", (data & SCL)?1:0, (data&SDA)?1:0, e2dummywrite ));
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e2state = 1; // ready for commands
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e2cnt = 0;
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e2data = 0;
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break;
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}
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if ( ( (changed & SDA) && (data & SDA)) && // 0->1 on SDA AND
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( !(changed & SCL) && (data & SCL) ) // SCL=1 and not changed
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)
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{ // X24C08 Stop condition (0->1 on SDA while SCL=1)
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LOG(("e2ram: c:%d d:%d Stop condition\n", (data & SCL)?1:0, (data&SDA)?1:0 ));
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e2state = 0;
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e2data = 0;
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break;
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}
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switch ( e2state )
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{
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case 1: // Receiving address + R/W bit
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if ( recdata(changed, data) )
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{
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e2address = (e2address & 0x00FF) | ((e2data>>1) & 0x03) << 8;
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e2cnt = 0;
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e2rw = e2data & 1;
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LOG(("e2ram: Slave address received !! device id=%01X device adr=%01d high order adr %0X RW=%d) %02X\n",
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e2data>>4, (e2data & 0x08)?1:0, (e2data>>1) & 0x03, e2rw , e2data ));
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e2state = 2;
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}
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break;
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case 2: // Receive Acknowledge
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ack = recAck(changed,data);
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if ( ack )
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{
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e2data_pin = 0;
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if ( ack < 0 )
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{
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LOG(("ACK = 0\n"));
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e2state = 0;
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}
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else
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{
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LOG(("ACK = 1\n"));
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if ( e2dummywrite )
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{
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e2dummywrite = 0;
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e2data_to_read = e2ram[e2address];
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if ( e2rw & 1 ) e2state = 7; // read data
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else e2state = 0; //?not sure
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}
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else
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{
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if ( e2rw & 1 ) e2state = 7; // reading
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else e2state = 3; // writing
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}
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switch ( e2state )
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{
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case 7:
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LOG(("read address %04X\n",e2address));
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e2data_to_read = e2ram[e2address];
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break;
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case 3:
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LOG(("write, awaiting address\n"));
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break;
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default:
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LOG(("?unknow action %04X\n",e2address));
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break;
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}
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}
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e2data = 0;
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}
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break;
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case 3: // writing data, receiving address
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if ( recdata(changed, data) )
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{
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e2data_pin = 0;
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e2address = (e2address & 0xFF00) | e2data;
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LOG(("write address = %04X waiting for ACK\n", e2address));
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e2state = 4;
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e2cnt = 0;
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e2data = 0;
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}
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break;
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case 4: // wait ack, for write address
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ack = recAck(changed,data);
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if ( ack )
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{
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e2data_pin = 0; // pin=0, no error !!
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|
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if ( ack < 0 )
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{
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e2state = 0;
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LOG(("ACK = 0, cancel write\n" ));
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|
}
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|
else
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{
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e2state = 5;
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LOG(("ACK = 1, awaiting data to write\n" ));
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|
}
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|
}
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|
break;
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case 5: // receive data to write
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if ( recdata(changed, data) )
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{
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||||||
|
LOG(("write data = %02X received, awaiting ACK\n", e2data));
|
||||||
|
e2cnt = 0;
|
||||||
|
e2state = 6; // wait ack
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 6: // Receive Acknowlede after writing
|
||||||
|
|
||||||
|
ack = recAck(changed,data);
|
||||||
|
if ( ack )
|
||||||
|
{
|
||||||
|
if ( ack < 0 )
|
||||||
|
{
|
||||||
|
e2state = 0;
|
||||||
|
LOG(("ACK=0, write canceled\n"));
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
LOG(("ACK=1, writing %02X to %04X\n", e2data, e2address));
|
||||||
|
|
||||||
|
e2ram[e2address] = e2data;
|
||||||
|
|
||||||
|
e2address = (e2address & ~0x000F) | ((e2address+1)&0x0F);
|
||||||
|
|
||||||
|
e2state = 5; // write next address
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 7: // receive address from read
|
||||||
|
|
||||||
|
if ( recdata(changed, data) )
|
||||||
|
{
|
||||||
|
//e2data_pin = 0;
|
||||||
|
|
||||||
|
LOG(("address read, data = %02X waiting for ACK\n", e2data ));
|
||||||
|
|
||||||
|
e2state = 8;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 8:
|
||||||
|
|
||||||
|
if ( recAck(changed, data) )
|
||||||
|
{
|
||||||
|
e2state = 7;
|
||||||
|
|
||||||
|
e2address = (e2address & ~0x0F) | ((e2address+1)&0x0F); // lower 4 bits wrap around
|
||||||
|
|
||||||
|
e2data_to_read = e2ram[e2address];
|
||||||
|
|
||||||
|
LOG(("ready for next address %04X\n", e2address));
|
||||||
|
|
||||||
|
e2cnt = 0;
|
||||||
|
e2data = 0;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0:
|
||||||
|
|
||||||
|
LOG(("e2ram: ? c:%d d:%d\n", (data & SCL)?1:0, (data&SDA)?1:0 ));
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
static int read_e2ram(void)
|
||||||
|
{
|
||||||
|
LOG(("e2ram: r %d (%02X) \n", e2data_pin, e2data_to_read ));
|
||||||
|
|
||||||
|
return e2data_pin;
|
||||||
|
}
|
||||||
|
|
||||||
static const UINT16 AddressDecode[]=
|
static const UINT16 AddressDecode[]=
|
||||||
{
|
{
|
||||||
@ -1175,7 +1508,7 @@ static VIDEO_UPDATE( addersc2 )
|
|||||||
|
|
||||||
static ADDRESS_MAP_START( memmap_vid, ADDRESS_SPACE_PROGRAM, 8 )
|
static ADDRESS_MAP_START( memmap_vid, ADDRESS_SPACE_PROGRAM, 8 )
|
||||||
|
|
||||||
AM_RANGE(0x0000, 0x1fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) // 8k RAM
|
AM_RANGE(0x0000, 0x1fff) AM_READWRITE(ram_r, ram_w) AM_BASE(&nvram) AM_SIZE(&nvram_size)// 8k RAM
|
||||||
AM_RANGE(0x2000, 0x2000) AM_READ(vfd_status_hop_r) // vfd status register
|
AM_RANGE(0x2000, 0x2000) AM_READ(vfd_status_hop_r) // vfd status register
|
||||||
AM_RANGE(0x2000, 0x20FF) AM_WRITE(reel12_vid_w)
|
AM_RANGE(0x2000, 0x20FF) AM_WRITE(reel12_vid_w)
|
||||||
AM_RANGE(0x2100, 0x21FF) AM_WRITE(reel34_w)
|
AM_RANGE(0x2100, 0x21FF) AM_WRITE(reel34_w)
|
||||||
@ -1215,8 +1548,8 @@ static ADDRESS_MAP_START( memmap_vid, ADDRESS_SPACE_PROGRAM, 8 )
|
|||||||
AM_RANGE(0x2E00, 0x2E00) AM_WRITE(bankswitch_w) // write bank (rom page select for 0x6000 - 0x7fff )
|
AM_RANGE(0x2E00, 0x2E00) AM_WRITE(bankswitch_w) // write bank (rom page select for 0x6000 - 0x7fff )
|
||||||
AM_RANGE(0x2F00, 0x2F00) AM_WRITE(vfd2_data_w) // vfd2 data
|
AM_RANGE(0x2F00, 0x2F00) AM_WRITE(vfd2_data_w) // vfd2 data
|
||||||
|
|
||||||
AM_RANGE(0x3C00, 0x3C07) AM_DEVREAD("i2cmem",key_r )
|
AM_RANGE(0x3C00, 0x3C07) AM_READ( key_r )
|
||||||
AM_RANGE(0x3C80, 0x3C80) AM_DEVWRITE("i2cmem",i2c_nvram_w)
|
AM_RANGE(0x3C80, 0x3C80) AM_WRITE( e2ram_w )
|
||||||
|
|
||||||
AM_RANGE(0x3E00, 0x3E00) AM_READWRITE(vid_uart_ctrl_r, vid_uart_ctrl_w) // video uart control reg
|
AM_RANGE(0x3E00, 0x3E00) AM_READWRITE(vid_uart_ctrl_r, vid_uart_ctrl_w) // video uart control reg
|
||||||
AM_RANGE(0x3E01, 0x3E01) AM_READWRITE(vid_uart_rx_r, vid_uart_tx_w) // video uart data reg
|
AM_RANGE(0x3E01, 0x3E01) AM_READWRITE(vid_uart_rx_r, vid_uart_tx_w) // video uart data reg
|
||||||
@ -1878,10 +2211,6 @@ static INPUT_PORTS_START( pokio )
|
|||||||
PORT_DIPSETTING( 0x18, "3" )
|
PORT_DIPSETTING( 0x18, "3" )
|
||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
|
||||||
static const i2cmem_interface i2cmem_interface =
|
|
||||||
{
|
|
||||||
0x0a, 1024, 8
|
|
||||||
};
|
|
||||||
|
|
||||||
///////////////////////////////////////////////////////////////////////////
|
///////////////////////////////////////////////////////////////////////////
|
||||||
// machine driver for scorpion2 board + adder2 expansion //////////////////
|
// machine driver for scorpion2 board + adder2 expansion //////////////////
|
||||||
@ -1894,8 +2223,7 @@ static MACHINE_DRIVER_START( scorpion2_vid )
|
|||||||
MDRV_CPU_PROGRAM_MAP(memmap_vid) // setup scorpion2 board memorymap
|
MDRV_CPU_PROGRAM_MAP(memmap_vid) // setup scorpion2 board memorymap
|
||||||
MDRV_CPU_PERIODIC_INT(timer_irq, 1000) // generate 1000 IRQ's per second
|
MDRV_CPU_PERIODIC_INT(timer_irq, 1000) // generate 1000 IRQ's per second
|
||||||
|
|
||||||
MDRV_I2CMEM_ADD("i2cmem",i2cmem_interface)
|
MDRV_NVRAM_HANDLER(bfm_sc2)
|
||||||
MDRV_NVRAM_HANDLER(generic_0fill)
|
|
||||||
MDRV_DEFAULT_LAYOUT(layout_bfm_sc2)
|
MDRV_DEFAULT_LAYOUT(layout_bfm_sc2)
|
||||||
|
|
||||||
MDRV_SCREEN_ADD("adder", RASTER)
|
MDRV_SCREEN_ADD("adder", RASTER)
|
||||||
@ -2420,7 +2748,7 @@ static MACHINE_RESET( dm01_init )
|
|||||||
|
|
||||||
|
|
||||||
static ADDRESS_MAP_START( sc2_memmap, ADDRESS_SPACE_PROGRAM, 8 )
|
static ADDRESS_MAP_START( sc2_memmap, ADDRESS_SPACE_PROGRAM, 8 )
|
||||||
AM_RANGE(0x0000, 0x1fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) // 8k RAM
|
AM_RANGE(0x0000, 0x1FFF) AM_READWRITE(ram_r, ram_w) AM_BASE(&nvram) AM_SIZE(&nvram_size)
|
||||||
AM_RANGE(0x2000, 0x2000) AM_READ(vfd_status_r)
|
AM_RANGE(0x2000, 0x2000) AM_READ(vfd_status_r)
|
||||||
AM_RANGE(0x2000, 0x20FF) AM_WRITE(reel12_w)
|
AM_RANGE(0x2000, 0x20FF) AM_WRITE(reel12_w)
|
||||||
AM_RANGE(0x2100, 0x21FF) AM_WRITE(reel34_w)
|
AM_RANGE(0x2100, 0x21FF) AM_WRITE(reel34_w)
|
||||||
@ -2469,7 +2797,7 @@ ADDRESS_MAP_END
|
|||||||
|
|
||||||
/* memory map for scorpion3 board */
|
/* memory map for scorpion3 board */
|
||||||
static ADDRESS_MAP_START( sc3_memmap, ADDRESS_SPACE_PROGRAM, 8 )
|
static ADDRESS_MAP_START( sc3_memmap, ADDRESS_SPACE_PROGRAM, 8 )
|
||||||
AM_RANGE(0x0000, 0x1fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) // 8k RAM
|
AM_RANGE(0x0000, 0x1FFF) AM_READWRITE(ram_r, ram_w) AM_BASE(&nvram) AM_SIZE(&nvram_size)
|
||||||
AM_RANGE(0x2000, 0x2000) AM_READ(vfd_status_r)
|
AM_RANGE(0x2000, 0x2000) AM_READ(vfd_status_r)
|
||||||
AM_RANGE(0x2000, 0x20FF) AM_WRITE(reel12_w)
|
AM_RANGE(0x2000, 0x20FF) AM_WRITE(reel12_w)
|
||||||
AM_RANGE(0x2100, 0x21FF) AM_WRITE(reel34_w)
|
AM_RANGE(0x2100, 0x21FF) AM_WRITE(reel34_w)
|
||||||
@ -2518,7 +2846,7 @@ ADDRESS_MAP_END
|
|||||||
|
|
||||||
/* memory map for scorpion2 board + dm01 dot matrix board */
|
/* memory map for scorpion2 board + dm01 dot matrix board */
|
||||||
static ADDRESS_MAP_START( memmap_sc2_dm01, ADDRESS_SPACE_PROGRAM, 8 )
|
static ADDRESS_MAP_START( memmap_sc2_dm01, ADDRESS_SPACE_PROGRAM, 8 )
|
||||||
AM_RANGE(0x0000, 0x1fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) // 8k RAM
|
AM_RANGE(0x0000, 0x1FFF) AM_READWRITE(ram_r, ram_w) AM_BASE(&nvram) AM_SIZE(&nvram_size)
|
||||||
AM_RANGE(0x2000, 0x2000) AM_READ(vfd_status_dm01_r)
|
AM_RANGE(0x2000, 0x2000) AM_READ(vfd_status_dm01_r)
|
||||||
AM_RANGE(0x2000, 0x20FF) AM_WRITE(reel12_w)
|
AM_RANGE(0x2000, 0x20FF) AM_WRITE(reel12_w)
|
||||||
AM_RANGE(0x2100, 0x21FF) AM_WRITE(reel34_w)
|
AM_RANGE(0x2100, 0x21FF) AM_WRITE(reel34_w)
|
||||||
@ -3652,7 +3980,7 @@ static MACHINE_DRIVER_START( scorpion2 )
|
|||||||
MDRV_SOUND_ADD("ymsnd",YM2413, XTAL_3_579545MHz)
|
MDRV_SOUND_ADD("ymsnd",YM2413, XTAL_3_579545MHz)
|
||||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||||
|
|
||||||
MDRV_NVRAM_HANDLER(generic_0fill)
|
MDRV_NVRAM_HANDLER(bfm_sc2)
|
||||||
|
|
||||||
/* video hardware */
|
/* video hardware */
|
||||||
MDRV_DEFAULT_LAYOUT(layout_awpvid14)
|
MDRV_DEFAULT_LAYOUT(layout_awpvid14)
|
||||||
@ -3682,7 +4010,7 @@ static MACHINE_DRIVER_START( scorpion2_dm01 )
|
|||||||
MDRV_SOUND_ADD("upd",UPD7759, UPD7759_STANDARD_CLOCK)
|
MDRV_SOUND_ADD("upd",UPD7759, UPD7759_STANDARD_CLOCK)
|
||||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
|
||||||
|
|
||||||
MDRV_NVRAM_HANDLER(generic_0fill)
|
MDRV_NVRAM_HANDLER(bfm_sc2)
|
||||||
|
|
||||||
/* video hardware */
|
/* video hardware */
|
||||||
MDRV_DEFAULT_LAYOUT(layout_awpdmd)
|
MDRV_DEFAULT_LAYOUT(layout_awpdmd)
|
||||||
|
Loading…
Reference in New Issue
Block a user