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HFDC: Added dip switch "wait for HD" (later models)
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@ -350,10 +350,11 @@ WRITE8_MEMBER( myarc_hfdc_device::write )
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7 6 5 4 3 2 1 0
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+-----+-----+-----+-----+-----+-----+-----+-----+
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| 0 | 0 | 0 | 0 | 0 | MON | DIP | IRQ |
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| 0 | 0 | 0 | 0 | WAIT| MON*| DIP | IRQ |
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+-----+-----+-----+-----+-----+-----+-----+-----+
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MON = Motor on
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WAIT = Wait for WDS1 to become ready
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MON* = Motor on
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DIP = DMA in progress
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IRQ = Interrupt request
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---
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@ -375,7 +376,8 @@ READ8Z_MEMBER(myarc_hfdc_device::crureadz)
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reply = 0;
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if (m_irq == ASSERT_LINE) reply |= 0x01;
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if (m_dip == ASSERT_LINE) reply |= 0x02;
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if (m_motor_running) reply |= 0x04;
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if (!m_motor_running) reply |= 0x04;
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if (m_wait_for_hd1) reply |= 0x08;
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}
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*value = reply;
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}
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@ -888,6 +890,7 @@ void myarc_hfdc_device::device_reset()
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}
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m_cru_base = ioport("CRUHFDC")->read();
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m_wait_for_hd1 = ioport("WAITHD1")->read();
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// Resetting values
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m_rom_page = 0;
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@ -956,6 +959,11 @@ void myarc_hfdc_device::device_config_complete()
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the drives 1 to 4 are renamed to DSK5-DSK8 (see [1] p. 7).
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*/
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INPUT_PORTS_START( ti99_hfdc )
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PORT_START( "WAITHD1" )
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PORT_DIPNAME( 0x01, 0x00, "HFDC Wait for HD1" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_START( "CRUHFDC" )
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PORT_DIPNAME( 0x1f00, 0x1100, "HFDC CRU base" )
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PORT_DIPSETTING( 0x1000, "1000" )
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@ -142,6 +142,9 @@ private:
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// DMA in progress
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bool m_dma_in_progress;
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// Wait for HD. This was an addition in later cards.
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bool m_wait_for_hd1;
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// Device Service Routine ROM (firmware)
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UINT8* m_dsrrom;
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