Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-25 09:50:04 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

n64 - Add short delay between RDP full sync and DP interrupt

Browse Source 
Since the RDP is not currently scheduled for its own timeslices,
this will allow the RSP interrupt from graphics tasks to arrive
at the main CPU first.  In some instances, the RSP timeslice
would end after the RDP had been sent the full sync command, but
before the RSP could finish its task.  No issues were manifest if
both RSP and RDP interrupts arrive at the same time, but it is
still expected that the RSP interrupt should arrive first.
This commit is contained in:
Happy 2017-03-13 15:10:23 -06:00
parent e855ebcd54
commit d8d803a17f
4 changed files with 19 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/mame/includes/n64.h
View File

@ -105,6 +105,7 @@ public:
DECLARE_WRITE32_MEMBER( pif_ram_w );
TIMER_CALLBACK_MEMBER(reset_timer_callback);
TIMER_CALLBACK_MEMBER(vi_scanline_callback);
TIMER_CALLBACK_MEMBER(dp_delay_callback);
TIMER_CALLBACK_MEMBER(ai_timer_callback);
TIMER_CALLBACK_MEMBER(pi_dma_callback);
TIMER_CALLBACK_MEMBER(si_dma_callback);
@ -116,6 +117,7 @@ public:
void signal_rcp_interrupt(int interrupt);
void check_interrupts();
void dp_full_sync();
void ai_timer_tick();
void pi_dma_tick();
void si_dma_tick();
@ -178,6 +180,7 @@ private:
bool reset_held;
emu_timer *reset_timer;
emu_timer *dp_delay_timer;
uint8_t is64_buffer[0x10000];
@ -399,6 +402,4 @@ const unsigned int ddStartOffset[16] =
{0x0,0x5F15E0,0xB79D00,0x10801A0,0x1523720,0x1963D80,0x1D414C0,0x20BBCE0,
0x23196E0,0x28A1E00,0x2DF5DC0,0x3299340,0x36D99A0,0x3AB70E0,0x3E31900,0x4149200};
extern void dp_full_sync(running_machine &machine);
#endif

18
src/mame/machine/n64.cpp
View File

@ -114,6 +114,7 @@ void n64_periphs::device_start()
pi_dma_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::pi_dma_callback),this));
si_dma_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::si_dma_callback),this));
vi_scanline_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::vi_scanline_callback),this));
dp_delay_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::dp_delay_callback),this));
reset_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(n64_periphs::reset_timer_callback),this));
m_n64 = machine().driver_data<n64_state>();
}
@ -218,6 +219,8 @@ void n64_periphs::device_reset()
dp_clock = 0;
dp_delay_timer->adjust(attotime::never);
cic_status = 0;
reset_held = false;
@ -417,11 +420,6 @@ WRITE32_MEMBER( n64_periphs::mi_reg_w )
}
}
void signal_rcp_interrupt(running_machine &machine, int interrupt)
{
machine.device<n64_periphs>("rcp")->signal_rcp_interrupt(interrupt);
}
void n64_periphs::check_interrupts()
{
if (mi_intr_mask & mi_interrupt)
@ -881,9 +879,15 @@ WRITE32_MEMBER(n64_periphs::sp_reg_w )
// RDP Interface
void dp_full_sync(running_machine &machine)
void n64_periphs::dp_full_sync()
{
signal_rcp_interrupt(machine, DP_INTERRUPT);
dp_delay_timer->adjust(attotime::from_hz(62500000 / 100));
}
TIMER_CALLBACK_MEMBER(n64_periphs::dp_delay_callback)
{
dp_delay_timer->adjust(attotime::never);
signal_rcp_interrupt(DP_INTERRUPT);
}
READ32_MEMBER( n64_periphs::dp_reg_r )

4
src/mame/video/n64.cpp
View File

@ -95,6 +95,7 @@ void n64_state::video_start()
m_rdp->set_machine(machine());
m_rdp->init_internal_state();
m_rdp->set_n64_periphs(machine().device<n64_periphs>("rcp"));
m_rdp->m_blender.set_machine(machine());
m_rdp->m_blender.set_processor(m_rdp);
@ -2356,7 +2357,7 @@ void n64_rdp::cmd_sync_tile(uint64_t w1)
void n64_rdp::cmd_sync_full(uint64_t w1)
{
//wait("SyncFull");
dp_full_sync(*m_machine);
m_n64_periphs->dp_full_sync();
}
void n64_rdp::cmd_set_key_gb(uint64_t w1)
@ -3169,6 +3170,7 @@ n64_rdp::n64_rdp(n64_state &state, uint32_t* rdram, uint32_t* dmem) : poly_manag
m_tmem = nullptr;
m_machine = nullptr;
m_n64_periphs = nullptr;
//memset(m_hidden_bits, 3, 8388608);

2
src/mame/video/n64.h
View File

@ -167,6 +167,7 @@ public:
void disassemble(char* buffer);
void set_machine(running_machine& machine) { m_machine = &machine; }
void set_n64_periphs(n64_periphs* periphs) { m_n64_periphs = periphs; }
// CPU-visible registers
void set_start(uint32_t val) { m_start = val; }
@ -335,6 +336,7 @@ private:
running_machine* m_machine;
uint32_t* m_rdram;
uint32_t* m_dmem;
n64_periphs* m_n64_periphs;
combine_modes_t m_combine;
bool m_pending_mode_block;