mirror of
https://github.com/holub/mame
synced 2025-05-24 23:05:32 +03:00
Removed cpunum_get_active().
Main important change is that IDE controllers with bus mastering (DMA) need to specify the target address space in the IDE device configuration.
This commit is contained in:
parent
e2c9b10241
commit
d8e17c4e86
@ -544,12 +544,12 @@ INLINE void dma_store(void)
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}
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void dsp32c_pio_w(int cpunum, int reg, int data)
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void dsp32c_pio_w(const device_config *device, int reg, int data)
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{
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UINT16 mask;
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UINT8 mode;
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cpu_push_context(Machine->cpu[cpunum]);
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cpu_push_context(device);
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/* look up register and mask */
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mode = ((dsp32.pcr >> 8) & 2) | ((dsp32.pcr >> 1) & 1);
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@ -626,12 +626,12 @@ void dsp32c_pio_w(int cpunum, int reg, int data)
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PARALLEL INTERFACE READS
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***************************************************************************/
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int dsp32c_pio_r(int cpunum, int reg)
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int dsp32c_pio_r(const device_config *device, int reg)
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{
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UINT16 mask, result = 0xffff;
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UINT8 mode, shift = 0;
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cpu_push_context(Machine->cpu[cpunum]);
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cpu_push_context(device);
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/* look up register and mask */
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mode = ((dsp32.pcr >> 8) & 2) | ((dsp32.pcr >> 1) & 1);
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@ -81,7 +81,7 @@ struct _dsp32_config
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extern CPU_GET_INFO( dsp32c );
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extern void dsp32c_pio_w(int cpunum, int reg, int data);
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extern int dsp32c_pio_r(int cpunum, int reg);
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extern void dsp32c_pio_w(const device_config *device, int reg, int data);
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extern int dsp32c_pio_r(const device_config *device, int reg);
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#endif /* __DSP32_H__ */
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@ -1104,17 +1104,6 @@ void cpu_pop_context(void)
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}
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/*-------------------------------------------------
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cpunum_get_active - return the index of the
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active CPU (deprecated soon)
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-------------------------------------------------*/
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int cpunum_get_active(void)
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{
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return (Machine->activecpu == NULL) ? -1 : cpu_get_index(Machine->activecpu);
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}
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/*-------------------------------------------------
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cpu_get_index_slow - find a CPU in the machine
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by searching
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@ -696,9 +696,6 @@ void cpu_push_context(const device_config *cpu);
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/* restore the previously saved context */
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void cpu_pop_context(void);
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/* return the index of the active CPU (deprecated soon) */
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int cpunum_get_active(void);
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/* find a CPU in the machine by searching */
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int cpu_get_index_slow(const device_config *cpu);
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@ -118,7 +118,7 @@ struct _ide_state
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UINT8 verify_only;
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UINT8 dma_active;
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UINT8 dma_cpu;
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const address_space *dma_space;
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UINT8 dma_address_xor;
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UINT8 dma_last_buffer;
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offs_t dma_address;
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@ -655,7 +655,6 @@ static void continue_read(ide_state *ide)
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static void write_buffer_to_dma(ide_state *ide)
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{
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const address_space *target = cpu_get_address_space(ide->device->machine->cpu[ide->dma_cpu], ADDRESS_SPACE_PROGRAM);
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int bytesleft = IDE_DISK_SECTOR_SIZE;
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UINT8 *data = ide->buffer;
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@ -675,17 +674,17 @@ static void write_buffer_to_dma(ide_state *ide)
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}
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/* fetch the address */
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ide->dma_address = memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor);
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ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
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ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
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ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
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ide->dma_address = memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor);
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ide->dma_address |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
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ide->dma_address |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
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ide->dma_address |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
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ide->dma_address &= 0xfffffffe;
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/* fetch the length */
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ide->dma_bytes_left = memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor);
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ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
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ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
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ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
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ide->dma_bytes_left = memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor);
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ide->dma_bytes_left |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
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ide->dma_bytes_left |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
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ide->dma_bytes_left |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
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ide->dma_last_buffer = (ide->dma_bytes_left >> 31) & 1;
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ide->dma_bytes_left &= 0xfffe;
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if (ide->dma_bytes_left == 0)
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@ -695,7 +694,7 @@ static void write_buffer_to_dma(ide_state *ide)
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}
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/* write the next byte */
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memory_write_byte(target, ide->dma_address++, *data++);
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memory_write_byte(ide->dma_space, ide->dma_address++, *data++);
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ide->dma_bytes_left--;
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}
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}
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@ -854,7 +853,6 @@ static void continue_write(ide_state *ide)
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static void read_buffer_from_dma(ide_state *ide)
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{
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const address_space *target = cpu_get_address_space(ide->device->machine->cpu[ide->dma_cpu], ADDRESS_SPACE_PROGRAM);
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int bytesleft = IDE_DISK_SECTOR_SIZE;
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UINT8 *data = ide->buffer;
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@ -874,17 +872,17 @@ static void read_buffer_from_dma(ide_state *ide)
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}
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/* fetch the address */
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ide->dma_address = memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor);
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ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
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ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
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ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
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ide->dma_address = memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor);
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ide->dma_address |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
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ide->dma_address |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
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ide->dma_address |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
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ide->dma_address &= 0xfffffffe;
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/* fetch the length */
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ide->dma_bytes_left = memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor);
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ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
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ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
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ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
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ide->dma_bytes_left = memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor);
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ide->dma_bytes_left |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
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ide->dma_bytes_left |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
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ide->dma_bytes_left |= memory_read_byte(ide->dma_space, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
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ide->dma_last_buffer = (ide->dma_bytes_left >> 31) & 1;
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ide->dma_bytes_left &= 0xfffe;
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if (ide->dma_bytes_left == 0)
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@ -894,7 +892,7 @@ static void read_buffer_from_dma(ide_state *ide)
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}
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/* read the next byte */
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*data++ = memory_read_byte(target, ide->dma_address++);
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*data++ = memory_read_byte(ide->dma_space, ide->dma_address++);
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ide->dma_bytes_left--;
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}
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}
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@ -1490,8 +1488,6 @@ static void ide_bus_master_write(const device_config *device, offs_t offset, int
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ide->dma_bytes_left = 0;
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ide->dma_last_buffer = 0;
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ide->dma_descriptor = ide->bus_master_descriptor;
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ide->dma_cpu = cpunum_get_active();
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ide->dma_address_xor = (cpu_get_endianness(device->machine->activecpu) == ENDIANNESS_LITTLE) ? 0 : 3;
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/* if we're going live, start the pending read/write */
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if (ide->dma_active)
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@ -1679,7 +1675,7 @@ static DEVICE_START( ide_controller )
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assert(device->inline_config != NULL);
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assert(device->machine != NULL);
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assert(device->machine->config != NULL);
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/* store a pointer back to the device */
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ide->device = device;
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@ -1688,6 +1684,14 @@ static DEVICE_START( ide_controller )
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ide->disk = hard_disk_open(get_disk_handle((config->master != NULL) ? config->master : device->tag));
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assert_always(config->slave == NULL, "IDE controller does not yet support slave drives\n");
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/* find the bus master space */
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if (config->bmcpu != NULL)
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{
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ide->dma_space = memory_find_address_space(cputag_get_cpu(device->machine, config->bmcpu), config->bmspace);
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assert_always(ide->dma_space != NULL, "IDE controller bus master space not found!");
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ide->dma_address_xor = (ide->dma_space->endianness == ENDIANNESS_LITTLE) ? 0 : 3;
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}
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/* get and copy the geometry */
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if (ide->disk != NULL)
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{
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@ -1725,8 +1729,6 @@ static DEVICE_START( ide_controller )
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state_save_register_device_item(device, 0, ide->sectors_until_int);
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state_save_register_device_item(device, 0, ide->dma_active);
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state_save_register_device_item(device, 0, ide->dma_cpu);
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state_save_register_device_item(device, 0, ide->dma_address_xor);
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state_save_register_device_item(device, 0, ide->dma_last_buffer);
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state_save_register_device_item(device, 0, ide->dma_address);
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state_save_register_device_item(device, 0, ide->dma_descriptor);
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@ -27,6 +27,8 @@ struct _ide_config
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void (*interrupt)(const device_config *device, int state);
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const char *master; /* name of master region (defaults to device tag) */
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const char *slave; /* name of slave region (defaults to NULL) */
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const char *bmcpu; /* name of bus master CPU */
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UINT32 bmspace; /* address space of bus master transfer */
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};
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@ -43,6 +45,10 @@ struct _ide_config
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MDRV_DEVICE_CONFIG_DATAPTR(ide_config, master, _master) \
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MDRV_DEVICE_CONFIG_DATAPTR(ide_config, master, _slave)
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#define MDRV_IDE_BUS_MASTER_SPACE(_cpu, _space) \
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MDRV_DEVICE_CONFIG_DATAPTR(ide_config, bmcpu, _cpu) \
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MDRV_DEVICE_CONFIG_DATA32(ide_config, bmspace, ADDRESS_SPACE_##_space)
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#define MDRV_IDE_CONTROLLER_REMOVE(_tag) \
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MDRV_DEVICE_REMOVE(_tag, IDE_CONTROLLER)
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@ -321,8 +321,8 @@ struct _dcs_state
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UINT16 progflags;
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void (*output_full_cb)(int);
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void (*input_empty_cb)(int);
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UINT16 (*fifo_data_r)(void);
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UINT16 (*fifo_status_r)(void);
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UINT16 (*fifo_data_r)(const device_config *device);
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UINT16 (*fifo_status_r)(const device_config *device);
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/* timers */
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UINT8 timer_enable;
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@ -1471,7 +1471,7 @@ void dcs_set_io_callbacks(void (*output_full_cb)(int), void (*input_empty_cb)(in
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}
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void dcs_set_fifo_callbacks(UINT16 (*fifo_data_r)(void), UINT16 (*fifo_status_r)(void))
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void dcs_set_fifo_callbacks(UINT16 (*fifo_data_r)(const device_config *device), UINT16 (*fifo_status_r)(const device_config *device))
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{
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dcs.fifo_data_r = fifo_data_r;
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dcs.fifo_status_r = fifo_status_r;
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@ -1513,7 +1513,7 @@ static READ16_HANDLER( latch_status_r )
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if (IS_OUTPUT_EMPTY())
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result |= 0x40;
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if (dcs.fifo_status_r != NULL && (!transfer.hle_enabled || transfer.state == 0))
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result |= (*dcs.fifo_status_r)() & 0x38;
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result |= (*dcs.fifo_status_r)(NULL) & 0x38;
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if (transfer.hle_enabled && transfer.state != 0)
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result |= 0x08;
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return result;
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@ -1523,7 +1523,7 @@ static READ16_HANDLER( latch_status_r )
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static READ16_HANDLER( fifo_input_r )
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{
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if (dcs.fifo_data_r)
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return (*dcs.fifo_data_r)();
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return (*dcs.fifo_data_r)(NULL);
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else
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return 0xffff;
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}
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@ -2068,7 +2068,7 @@ void dcs_fifo_notify(int count, int max)
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if (transfer.state != 5 || transfer.fifo_entries == transfer.writes_left || transfer.fifo_entries >= 256)
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{
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for ( ; transfer.fifo_entries; transfer.fifo_entries--)
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preprocess_write(Machine, (*dcs.fifo_data_r)());
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preprocess_write(Machine, (*dcs.fifo_data_r)(NULL));
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}
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}
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@ -2080,7 +2080,7 @@ static TIMER_CALLBACK( transfer_watchdog_callback )
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if (transfer.fifo_entries && starting_writes_left == transfer.writes_left)
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{
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for ( ; transfer.fifo_entries; transfer.fifo_entries--)
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preprocess_write(machine, (*dcs.fifo_data_r)());
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preprocess_write(machine, (*dcs.fifo_data_r)(NULL));
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}
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timer_adjust_oneshot(transfer.watchdog, ATTOTIME_IN_MSEC(1), transfer.writes_left);
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}
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@ -16,7 +16,7 @@ void dcs_init(running_machine *machine);
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void dcs2_init(running_machine *machine, int dram_in_mb, offs_t polling_offset);
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void dcs_set_auto_ack(int state);
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void dcs_set_fifo_callbacks(UINT16 (*fifo_data_r)(void), UINT16 (*fifo_status_r)(void));
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void dcs_set_fifo_callbacks(UINT16 (*fifo_data_r)(const device_config *device), UINT16 (*fifo_status_r)(const device_config *device));
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void dcs_set_io_callbacks(void (*output_full_cb)(int), void (*input_empty_cb)(int));
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int dcs_data_r(void);
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@ -67,8 +67,8 @@ void hdsnd_init(running_machine *machine)
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static void update_68k_interrupts(running_machine *machine)
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{
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cpu_set_input_line(machine->cpu[hdcpu_sound], 1, mainflag ? ASSERT_LINE : CLEAR_LINE);
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cpu_set_input_line(machine->cpu[hdcpu_sound], 3, irq68k ? ASSERT_LINE : CLEAR_LINE);
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cpu_set_input_line(hdcpu_sound, 1, mainflag ? ASSERT_LINE : CLEAR_LINE);
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cpu_set_input_line(hdcpu_sound, 3, irq68k ? ASSERT_LINE : CLEAR_LINE);
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}
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@ -110,8 +110,8 @@ WRITE16_HANDLER( hd68k_snd_data_w )
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WRITE16_HANDLER( hd68k_snd_reset_w )
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{
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cpu_set_input_line(space->machine->cpu[hdcpu_sound], INPUT_LINE_RESET, ASSERT_LINE);
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cpu_set_input_line(space->machine->cpu[hdcpu_sound], INPUT_LINE_RESET, CLEAR_LINE);
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cpu_set_input_line(hdcpu_sound, INPUT_LINE_RESET, ASSERT_LINE);
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cpu_set_input_line(hdcpu_sound, INPUT_LINE_RESET, CLEAR_LINE);
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mainflag = soundflag = 0;
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update_68k_interrupts(space->machine);
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logerror("%06X:Reset sound\n", cpu_get_previouspc(space->cpu));
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@ -213,8 +213,8 @@ WRITE16_HANDLER( hdsnd68k_latches_w )
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case 4: /* RES320 */
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logerror("%06X:RES320=%d\n", cpu_get_previouspc(space->cpu), data);
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if (hdcpu_sounddsp != -1)
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cpu_set_input_line(space->machine->cpu[hdcpu_sounddsp], INPUT_LINE_HALT, data ? CLEAR_LINE : ASSERT_LINE);
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if (hdcpu_sounddsp != NULL)
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cpu_set_input_line(hdcpu_sounddsp, INPUT_LINE_HALT, data ? CLEAR_LINE : ASSERT_LINE);
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break;
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case 7: /* LED */
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@ -257,7 +257,7 @@ WRITE16_HANDLER( hdsnd68k_320ram_w )
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READ16_HANDLER( hdsnd68k_320ports_r )
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{
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const address_space *iospace = cpu_get_address_space(space->machine->cpu[hdcpu_sounddsp], ADDRESS_SPACE_IO);
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const address_space *iospace = cpu_get_address_space(hdcpu_sounddsp, ADDRESS_SPACE_IO);
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UINT16 result;
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cpu_push_context(iospace->cpu);
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result = memory_read_word(iospace, (offset & 7) << 1);
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@ -268,8 +268,8 @@ READ16_HANDLER( hdsnd68k_320ports_r )
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WRITE16_HANDLER( hdsnd68k_320ports_w )
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{
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const address_space *iospace = cpu_get_address_space(space->machine->cpu[hdcpu_sounddsp], ADDRESS_SPACE_IO);
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cpu_push_context(iospace->machine->cpu[hdcpu_sounddsp]);
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const address_space *iospace = cpu_get_address_space(hdcpu_sounddsp, ADDRESS_SPACE_IO);
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cpu_push_context(hdcpu_sounddsp);
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memory_write_word(iospace, (offset & 7) << 1, data);
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cpu_pop_context();
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}
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@ -3370,14 +3370,14 @@ ROM_END
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/* COMMON INIT: find all the CPUs */
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static void find_cpus(running_machine *machine)
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{
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hdcpu_main = mame_find_cpu_index(machine, "main");
|
||||
hdcpu_gsp = mame_find_cpu_index(machine, "gsp");
|
||||
hdcpu_msp = mame_find_cpu_index(machine, "msp");
|
||||
hdcpu_adsp = mame_find_cpu_index(machine, "adsp");
|
||||
hdcpu_sound = mame_find_cpu_index(machine, "sound");
|
||||
hdcpu_sounddsp = mame_find_cpu_index(machine, "sounddsp");
|
||||
hdcpu_jsa = mame_find_cpu_index(machine, "jsa");
|
||||
hdcpu_dsp32 = mame_find_cpu_index(machine, "dsp32");
|
||||
hdcpu_main = cputag_get_cpu(machine, "main");
|
||||
hdcpu_gsp = cputag_get_cpu(machine, "gsp");
|
||||
hdcpu_msp = cputag_get_cpu(machine, "msp");
|
||||
hdcpu_adsp = cputag_get_cpu(machine, "adsp");
|
||||
hdcpu_sound = cputag_get_cpu(machine, "sound");
|
||||
hdcpu_sounddsp = cputag_get_cpu(machine, "sounddsp");
|
||||
hdcpu_jsa = cputag_get_cpu(machine, "jsa");
|
||||
hdcpu_dsp32 = cputag_get_cpu(machine, "dsp32");
|
||||
}
|
||||
|
||||
|
||||
@ -3414,9 +3414,9 @@ static void init_multisync(running_machine *machine, int compact_inputs)
|
||||
/* install handlers for the compact driving games' inputs */
|
||||
if (compact_inputs)
|
||||
{
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x400000, 0x400001, 0, 0, hdc68k_wheel_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x408000, 0x408001, 0, 0, hdc68k_wheel_edge_reset_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0xa80000, 0xafffff, 0, 0, hdc68k_port1_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x400000, 0x400001, 0, 0, hdc68k_wheel_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x408000, 0x408001, 0, 0, hdc68k_wheel_edge_reset_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0xa80000, 0xafffff, 0, 0, hdc68k_port1_r);
|
||||
}
|
||||
}
|
||||
|
||||
@ -3425,18 +3425,18 @@ static void init_multisync(running_machine *machine, int compact_inputs)
|
||||
static void init_adsp(running_machine *machine)
|
||||
{
|
||||
/* install ADSP program RAM */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x800000, 0x807fff, 0, 0, hd68k_adsp_program_r, hd68k_adsp_program_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x800000, 0x807fff, 0, 0, hd68k_adsp_program_r, hd68k_adsp_program_w);
|
||||
|
||||
/* install ADSP data RAM */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x808000, 0x80bfff, 0, 0, hd68k_adsp_data_r, hd68k_adsp_data_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x808000, 0x80bfff, 0, 0, hd68k_adsp_data_r, hd68k_adsp_data_w);
|
||||
|
||||
/* install ADSP serial buffer RAM */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x810000, 0x813fff, 0, 0, hd68k_adsp_buffer_r, hd68k_adsp_buffer_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x810000, 0x813fff, 0, 0, hd68k_adsp_buffer_r, hd68k_adsp_buffer_w);
|
||||
|
||||
/* install ADSP control locations */
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x818000, 0x81801f, 0, 0, hd68k_adsp_control_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x818060, 0x81807f, 0, 0, hd68k_adsp_irq_clear_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x838000, 0x83ffff, 0, 0, hd68k_adsp_irq_state_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x818000, 0x81801f, 0, 0, hd68k_adsp_control_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x818060, 0x81807f, 0, 0, hd68k_adsp_irq_clear_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x838000, 0x83ffff, 0, 0, hd68k_adsp_irq_state_r);
|
||||
}
|
||||
|
||||
|
||||
@ -3444,33 +3444,28 @@ static void init_adsp(running_machine *machine)
|
||||
static void init_ds3(running_machine *machine)
|
||||
{
|
||||
/* install ADSP program RAM */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x800000, 0x807fff, 0, 0, hd68k_ds3_program_r, hd68k_ds3_program_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x800000, 0x807fff, 0, 0, hd68k_ds3_program_r, hd68k_ds3_program_w);
|
||||
|
||||
/* install ADSP data RAM */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x808000, 0x80bfff, 0, 0, hd68k_adsp_data_r, hd68k_adsp_data_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x80c000, 0x80dfff, 0, 0, hdds3_special_r, hdds3_special_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x808000, 0x80bfff, 0, 0, hd68k_adsp_data_r, hd68k_adsp_data_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x80c000, 0x80dfff, 0, 0, hdds3_special_r, hdds3_special_w);
|
||||
|
||||
/* install ADSP control locations */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x820000, 0x8207ff, 0, 0, hd68k_ds3_gdata_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x820800, 0x820fff, 0, 0, hd68k_ds3_girq_state_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x820000, 0x8207ff, 0, 0, hd68k_ds3_gdata_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x821000, 0x8217ff, 0, 0, hd68k_adsp_irq_clear_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x822000, 0x8227ff, 0, 0, hd68k_ds3_sdata_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x822800, 0x822fff, 0, 0, hd68k_ds3_sirq_state_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x822000, 0x8227ff, 0, 0, hd68k_ds3_sdata_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x823800, 0x823fff, 0, 0, hd68k_ds3_control_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x820000, 0x8207ff, 0, 0, hd68k_ds3_gdata_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x820800, 0x820fff, 0, 0, hd68k_ds3_girq_state_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x820000, 0x8207ff, 0, 0, hd68k_ds3_gdata_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x821000, 0x8217ff, 0, 0, hd68k_adsp_irq_clear_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x822000, 0x8227ff, 0, 0, hd68k_ds3_sdata_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x822800, 0x822fff, 0, 0, hd68k_ds3_sirq_state_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x822000, 0x8227ff, 0, 0, hd68k_ds3_sdata_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x823800, 0x823fff, 0, 0, hd68k_ds3_control_w);
|
||||
|
||||
/* if we have a sound DSP, boot it */
|
||||
if (hdcpu_sound != -1 && machine->config->cpu[hdcpu_sound].type == CPU_ADSP2105)
|
||||
{
|
||||
UINT8 *snd = memory_region(machine, "main" + hdcpu_sound);
|
||||
adsp2105_load_boot_data((UINT8 *)(snd + 0x10000), (UINT32 *)(snd));
|
||||
}
|
||||
if (hdcpu_sounddsp != -1 && machine->config->cpu[hdcpu_sounddsp].type == CPU_ADSP2105)
|
||||
{
|
||||
UINT8 *dsp = memory_region(machine, "main" + hdcpu_sounddsp);
|
||||
adsp2105_load_boot_data((UINT8 *)(dsp + 0x10000), (UINT32 *)(dsp));
|
||||
}
|
||||
if (hdcpu_sound != NULL && ((const cpu_class_header *)hdcpu_sound->classtoken)->cputype == CPU_ADSP2105)
|
||||
adsp2105_load_boot_data((UINT8 *)(hdcpu_sound->region + 0x10000), (UINT32 *)hdcpu_sound->region);
|
||||
|
||||
if (hdcpu_sounddsp != NULL && ((const cpu_class_header *)hdcpu_sounddsp->classtoken)->cputype == CPU_ADSP2105)
|
||||
adsp2105_load_boot_data((UINT8 *)(hdcpu_sounddsp->region + 0x10000), (UINT32 *)hdcpu_sounddsp->region);
|
||||
|
||||
/*
|
||||
|
||||
@ -3547,26 +3542,26 @@ static void init_dsk(running_machine *machine)
|
||||
UINT8 *usr3 = memory_region(machine, "user3");
|
||||
|
||||
/* install ASIC61 */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x85c000, 0x85c7ff, 0, 0, hd68k_dsk_dsp32_r, hd68k_dsk_dsp32_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x85c000, 0x85c7ff, 0, 0, hd68k_dsk_dsp32_r, hd68k_dsk_dsp32_w);
|
||||
|
||||
/* install control registers */
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x85c800, 0x85c81f, 0, 0, hd68k_dsk_control_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x85c800, 0x85c81f, 0, 0, hd68k_dsk_control_w);
|
||||
|
||||
/* install extra RAM */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x900000, 0x90ffff, 0, 0, hd68k_dsk_ram_r, hd68k_dsk_ram_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x900000, 0x90ffff, 0, 0, hd68k_dsk_ram_r, hd68k_dsk_ram_w);
|
||||
hddsk_ram = (UINT16 *)(usr3 + 0x40000);
|
||||
|
||||
/* install extra ZRAM */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x910000, 0x910fff, 0, 0, hd68k_dsk_zram_r, hd68k_dsk_zram_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x910000, 0x910fff, 0, 0, hd68k_dsk_zram_r, hd68k_dsk_zram_w);
|
||||
hddsk_zram = (UINT16 *)(usr3 + 0x50000);
|
||||
|
||||
/* install ASIC65 */
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x914000, 0x917fff, 0, 0, asic65_data_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x914000, 0x917fff, 0, 0, asic65_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x918000, 0x91bfff, 0, 0, asic65_io_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x914000, 0x917fff, 0, 0, asic65_data_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x914000, 0x917fff, 0, 0, asic65_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x918000, 0x91bfff, 0, 0, asic65_io_r);
|
||||
|
||||
/* install extra ROM */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x940000, 0x9fffff, 0, 0, hd68k_dsk_small_rom_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x940000, 0x9fffff, 0, 0, hd68k_dsk_small_rom_r);
|
||||
hddsk_rom = (UINT16 *)(usr3 + 0x00000);
|
||||
|
||||
/* set up the ASIC65 */
|
||||
@ -3580,22 +3575,22 @@ static void init_dsk2(running_machine *machine)
|
||||
UINT8 *usr3 = memory_region(machine, "user3");
|
||||
|
||||
/* install ASIC65 */
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x824000, 0x824003, 0, 0, asic65_data_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x824000, 0x824003, 0, 0, asic65_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x825000, 0x825001, 0, 0, asic65_io_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x824000, 0x824003, 0, 0, asic65_data_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x824000, 0x824003, 0, 0, asic65_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x825000, 0x825001, 0, 0, asic65_io_r);
|
||||
|
||||
/* install ASIC61 */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x827000, 0x8277ff, 0, 0, hd68k_dsk_dsp32_r, hd68k_dsk_dsp32_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x827000, 0x8277ff, 0, 0, hd68k_dsk_dsp32_r, hd68k_dsk_dsp32_w);
|
||||
|
||||
/* install control registers */
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x827800, 0x82781f, 0, 0, hd68k_dsk_control_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x827800, 0x82781f, 0, 0, hd68k_dsk_control_w);
|
||||
|
||||
/* install extra RAM */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x880000, 0x8bffff, 0, 0, hd68k_dsk_ram_r, hd68k_dsk_ram_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x880000, 0x8bffff, 0, 0, hd68k_dsk_ram_r, hd68k_dsk_ram_w);
|
||||
hddsk_ram = (UINT16 *)(usr3 + 0x100000);
|
||||
|
||||
/* install extra ROM */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x900000, 0x9fffff, 0, 0, hd68k_dsk_rom_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x900000, 0x9fffff, 0, 0, hd68k_dsk_rom_r);
|
||||
hddsk_rom = (UINT16 *)(usr3 + 0x000000);
|
||||
|
||||
/* set up the ASIC65 */
|
||||
@ -3607,15 +3602,15 @@ static void init_dsk2(running_machine *machine)
|
||||
static void init_dspcom(running_machine *machine)
|
||||
{
|
||||
/* install ASIC65 */
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x900000, 0x900003, 0, 0, asic65_data_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x900000, 0x900003, 0, 0, asic65_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x901000, 0x910001, 0, 0, asic65_io_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x900000, 0x900003, 0, 0, asic65_data_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x900000, 0x900003, 0, 0, asic65_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x901000, 0x910001, 0, 0, asic65_io_r);
|
||||
|
||||
/* set up the ASIC65 */
|
||||
asic65_config(machine, ASIC65_STEELTAL);
|
||||
|
||||
/* install DSPCOM control */
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x904000, 0x90401f, 0, 0, hddspcom_control_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x904000, 0x90401f, 0, 0, hddspcom_control_w);
|
||||
}
|
||||
|
||||
|
||||
@ -3625,9 +3620,9 @@ static void init_driver_sound(running_machine *machine)
|
||||
hdsnd_init(machine);
|
||||
|
||||
/* install sound handlers */
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x840000, 0x840001, 0, 0, hd68k_snd_data_r, hd68k_snd_data_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x844000, 0x844001, 0, 0, hd68k_snd_status_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x84c000, 0x84c001, 0, 0, hd68k_snd_reset_w);
|
||||
memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x840000, 0x840001, 0, 0, hd68k_snd_data_r, hd68k_snd_data_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x844000, 0x844001, 0, 0, hd68k_snd_status_r);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x84c000, 0x84c001, 0, 0, hd68k_snd_reset_w);
|
||||
}
|
||||
|
||||
|
||||
@ -3647,18 +3642,18 @@ static DRIVER_INIT( harddriv )
|
||||
init_driver_sound(machine);
|
||||
|
||||
/* set up gsp speedup handler */
|
||||
hdgsp_speedup_addr[0] = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup1_w);
|
||||
hdgsp_speedup_addr[1] = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfffcfc00, 0xfffcfc0f, 0, 0, hdgsp_speedup2_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup_r);
|
||||
hdgsp_speedup_addr[0] = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup1_w);
|
||||
hdgsp_speedup_addr[1] = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfffcfc00, 0xfffcfc0f, 0, 0, hdgsp_speedup2_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup_r);
|
||||
hdgsp_speedup_pc = 0xffc00f10;
|
||||
|
||||
/* set up msp speedup handler */
|
||||
hdmsp_speedup_addr = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_msp], ADDRESS_SPACE_PROGRAM), 0x00751b00, 0x00751b0f, 0, 0, hdmsp_speedup_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_msp], ADDRESS_SPACE_PROGRAM), 0x00751b00, 0x00751b0f, 0, 0, hdmsp_speedup_r);
|
||||
hdmsp_speedup_addr = memory_install_write16_handler(cpu_get_address_space(hdcpu_msp, ADDRESS_SPACE_PROGRAM), 0x00751b00, 0x00751b0f, 0, 0, hdmsp_speedup_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_msp, ADDRESS_SPACE_PROGRAM), 0x00751b00, 0x00751b0f, 0, 0, hdmsp_speedup_r);
|
||||
hdmsp_speedup_pc = 0x00723b00;
|
||||
|
||||
/* set up adsp speedup handlers */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
}
|
||||
|
||||
|
||||
@ -3670,18 +3665,18 @@ static DRIVER_INIT( harddrvc )
|
||||
init_driver_sound(machine);
|
||||
|
||||
/* set up gsp speedup handler */
|
||||
hdgsp_speedup_addr[0] = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup1_w);
|
||||
hdgsp_speedup_addr[1] = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfffcfc00, 0xfffcfc0f, 0, 0, hdgsp_speedup2_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup_r);
|
||||
hdgsp_speedup_addr[0] = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup1_w);
|
||||
hdgsp_speedup_addr[1] = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfffcfc00, 0xfffcfc0f, 0, 0, hdgsp_speedup2_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup_r);
|
||||
hdgsp_speedup_pc = 0xfff40ff0;
|
||||
|
||||
/* set up msp speedup handler */
|
||||
hdmsp_speedup_addr = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_msp], ADDRESS_SPACE_PROGRAM), 0x00751b00, 0x00751b0f, 0, 0, hdmsp_speedup_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_msp], ADDRESS_SPACE_PROGRAM), 0x00751b00, 0x00751b0f, 0, 0, hdmsp_speedup_r);
|
||||
hdmsp_speedup_addr = memory_install_write16_handler(cpu_get_address_space(hdcpu_msp, ADDRESS_SPACE_PROGRAM), 0x00751b00, 0x00751b0f, 0, 0, hdmsp_speedup_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_msp, ADDRESS_SPACE_PROGRAM), 0x00751b00, 0x00751b0f, 0, 0, hdmsp_speedup_r);
|
||||
hdmsp_speedup_pc = 0x00723b00;
|
||||
|
||||
/* set up adsp speedup handlers */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
}
|
||||
|
||||
|
||||
@ -3693,13 +3688,13 @@ static DRIVER_INIT( stunrun )
|
||||
atarijsa_init(machine, "IN0", 0x0020);
|
||||
|
||||
/* set up gsp speedup handler */
|
||||
hdgsp_speedup_addr[0] = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup1_w);
|
||||
hdgsp_speedup_addr[1] = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfffcfc00, 0xfffcfc0f, 0, 0, hdgsp_speedup2_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup_r);
|
||||
hdgsp_speedup_addr[0] = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup1_w);
|
||||
hdgsp_speedup_addr[1] = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfffcfc00, 0xfffcfc0f, 0, 0, hdgsp_speedup2_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff9fc00, 0xfff9fc0f, 0, 0, hdgsp_speedup_r);
|
||||
hdgsp_speedup_pc = 0xfff41070;
|
||||
|
||||
/* set up adsp speedup handlers */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
}
|
||||
|
||||
|
||||
@ -3733,17 +3728,17 @@ static DRIVER_INIT( racedriv )
|
||||
|
||||
/* set up the slapstic */
|
||||
slapstic_init(machine, 117);
|
||||
hd68k_slapstic_base = memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0xe0000, 0xfffff, 0, 0, rd68k_slapstic_r, rd68k_slapstic_w);
|
||||
hd68k_slapstic_base = memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0xe0000, 0xfffff, 0, 0, rd68k_slapstic_r, rd68k_slapstic_w);
|
||||
|
||||
/* synchronization */
|
||||
rddsp32_sync[0] = memory_install_write32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x613c00, 0x613c03, 0, 0, rddsp32_sync0_w);
|
||||
rddsp32_sync[1] = memory_install_write32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x613e00, 0x613e03, 0, 0, rddsp32_sync1_w);
|
||||
rddsp32_sync[0] = memory_install_write32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x613c00, 0x613c03, 0, 0, rddsp32_sync0_w);
|
||||
rddsp32_sync[1] = memory_install_write32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x613e00, 0x613e03, 0, 0, rddsp32_sync1_w);
|
||||
|
||||
/* set up adsp speedup handlers */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
|
||||
/* set up dsp32 speedup handlers */
|
||||
rddsp32_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x613e04, 0x613e07, 0, 0, rddsp32_speedup_r);
|
||||
rddsp32_speedup = memory_install_read32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x613e04, 0x613e07, 0, 0, rddsp32_speedup_r);
|
||||
rddsp32_speedup_pc = 0x6054b0;
|
||||
}
|
||||
|
||||
@ -3758,25 +3753,25 @@ static void racedrvc_init_common(running_machine *machine, offs_t gsp_protection
|
||||
|
||||
/* set up the slapstic */
|
||||
slapstic_init(machine, 117);
|
||||
hd68k_slapstic_base = memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0xe0000, 0xfffff, 0, 0, rd68k_slapstic_r, rd68k_slapstic_w);
|
||||
hd68k_slapstic_base = memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0xe0000, 0xfffff, 0, 0, rd68k_slapstic_r, rd68k_slapstic_w);
|
||||
|
||||
/* synchronization */
|
||||
rddsp32_sync[0] = memory_install_write32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x613c00, 0x613c03, 0, 0, rddsp32_sync0_w);
|
||||
rddsp32_sync[1] = memory_install_write32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x613e00, 0x613e03, 0, 0, rddsp32_sync1_w);
|
||||
rddsp32_sync[0] = memory_install_write32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x613c00, 0x613c03, 0, 0, rddsp32_sync0_w);
|
||||
rddsp32_sync[1] = memory_install_write32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x613e00, 0x613e03, 0, 0, rddsp32_sync1_w);
|
||||
|
||||
/* set up protection hacks */
|
||||
hdgsp_protection = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), gsp_protection, gsp_protection + 0x0f, 0, 0, hdgsp_protection_w);
|
||||
hdgsp_protection = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), gsp_protection, gsp_protection + 0x0f, 0, 0, hdgsp_protection_w);
|
||||
|
||||
/* set up gsp speedup handler */
|
||||
hdgsp_speedup_addr[0] = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff76f60, 0xfff76f6f, 0, 0, rdgsp_speedup1_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff76f60, 0xfff76f6f, 0, 0, rdgsp_speedup1_r);
|
||||
hdgsp_speedup_addr[0] = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff76f60, 0xfff76f6f, 0, 0, rdgsp_speedup1_w);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff76f60, 0xfff76f6f, 0, 0, rdgsp_speedup1_r);
|
||||
hdgsp_speedup_pc = 0xfff43a00;
|
||||
|
||||
/* set up adsp speedup handlers */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
|
||||
/* set up dsp32 speedup handlers */
|
||||
rddsp32_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x613e04, 0x613e07, 0, 0, rddsp32_speedup_r);
|
||||
rddsp32_speedup = memory_install_read32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x613e04, 0x613e07, 0, 0, rddsp32_speedup_r);
|
||||
rddsp32_speedup_pc = 0x6054b0;
|
||||
}
|
||||
|
||||
@ -3799,34 +3794,34 @@ static void steeltal_init_common(running_machine *machine, offs_t ds3_transfer_p
|
||||
init_dspcom(machine);
|
||||
atarijsa_init(machine, "IN0", 0x0020);
|
||||
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x908000, 0x908001, 0, 0, steeltal_dummy_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x908000, 0x908001, 0, 0, steeltal_dummy_r);
|
||||
|
||||
/* set up the SLOOP */
|
||||
if (!proto_sloop)
|
||||
{
|
||||
hd68k_slapstic_base = memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0xe0000, 0xfffff, 0, 0, st68k_sloop_r, st68k_sloop_w);
|
||||
st68k_sloop_alt_base = memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0x4e000, 0x4ffff, 0, 0, st68k_sloop_alt_r);
|
||||
hd68k_slapstic_base = memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0xe0000, 0xfffff, 0, 0, st68k_sloop_r, st68k_sloop_w);
|
||||
st68k_sloop_alt_base = memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0x4e000, 0x4ffff, 0, 0, st68k_sloop_alt_r);
|
||||
}
|
||||
else
|
||||
hd68k_slapstic_base = memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0xe0000, 0xfffff, 0, 0, st68k_protosloop_r, st68k_protosloop_w);
|
||||
hd68k_slapstic_base = memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0xe0000, 0xfffff, 0, 0, st68k_protosloop_r, st68k_protosloop_w);
|
||||
|
||||
/* synchronization */
|
||||
stmsp_sync[0] = &hdmsp_ram[TOWORD(0x80010)];
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_msp], ADDRESS_SPACE_PROGRAM), 0x80010, 0x8007f, 0, 0, stmsp_sync0_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_msp, ADDRESS_SPACE_PROGRAM), 0x80010, 0x8007f, 0, 0, stmsp_sync0_w);
|
||||
stmsp_sync[1] = &hdmsp_ram[TOWORD(0x99680)];
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_msp], ADDRESS_SPACE_PROGRAM), 0x99680, 0x9968f, 0, 0, stmsp_sync1_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_msp, ADDRESS_SPACE_PROGRAM), 0x99680, 0x9968f, 0, 0, stmsp_sync1_w);
|
||||
stmsp_sync[2] = &hdmsp_ram[TOWORD(0x99d30)];
|
||||
memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_msp], ADDRESS_SPACE_PROGRAM), 0x99d30, 0x99d4f, 0, 0, stmsp_sync2_w);
|
||||
memory_install_write16_handler(cpu_get_address_space(hdcpu_msp, ADDRESS_SPACE_PROGRAM), 0x99d30, 0x99d4f, 0, 0, stmsp_sync2_w);
|
||||
|
||||
/* set up protection hacks */
|
||||
hdgsp_protection = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff965d0, 0xfff965df, 0, 0, hdgsp_protection_w);
|
||||
hdgsp_protection = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff965d0, 0xfff965df, 0, 0, hdgsp_protection_w);
|
||||
|
||||
/* set up msp speedup handlers */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_msp], ADDRESS_SPACE_PROGRAM), 0x80020, 0x8002f, 0, 0, stmsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_msp, ADDRESS_SPACE_PROGRAM), 0x80020, 0x8002f, 0, 0, stmsp_speedup_r);
|
||||
|
||||
/* set up adsp speedup handlers */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1f99, 0x1f99, 0, 0, hdds3_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1f99, 0x1f99, 0, 0, hdds3_speedup_r);
|
||||
hdds3_speedup_addr = &hdadsp_data_memory[0x1f99];
|
||||
hdds3_speedup_pc = 0xff;
|
||||
hdds3_transfer_pc = ds3_transfer_pc;
|
||||
@ -3847,20 +3842,20 @@ static DRIVER_INIT( strtdriv )
|
||||
|
||||
/* set up the slapstic */
|
||||
slapstic_init(machine, 117);
|
||||
hd68k_slapstic_base = memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0xe0000, 0xfffff, 0, 0, rd68k_slapstic_r, rd68k_slapstic_w);
|
||||
hd68k_slapstic_base = memory_install_readwrite16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0xe0000, 0xfffff, 0, 0, rd68k_slapstic_r, rd68k_slapstic_w);
|
||||
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0xa80000, 0xafffff, 0, 0, hda68k_port1_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0xa80000, 0xafffff, 0, 0, hda68k_port1_r);
|
||||
|
||||
/* synchronization */
|
||||
rddsp32_sync[0] = memory_install_write32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x613c00, 0x613c03, 0, 0, rddsp32_sync0_w);
|
||||
rddsp32_sync[1] = memory_install_write32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x613e00, 0x613e03, 0, 0, rddsp32_sync1_w);
|
||||
rddsp32_sync[0] = memory_install_write32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x613c00, 0x613c03, 0, 0, rddsp32_sync0_w);
|
||||
rddsp32_sync[1] = memory_install_write32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x613e00, 0x613e03, 0, 0, rddsp32_sync1_w);
|
||||
|
||||
/* set up protection hacks */
|
||||
hdgsp_protection = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff960a0, 0xfff960af, 0, 0, hdgsp_protection_w);
|
||||
hdgsp_protection = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff960a0, 0xfff960af, 0, 0, hdgsp_protection_w);
|
||||
|
||||
/* set up adsp speedup handlers */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1f99, 0x1f99, 0, 0, hdds3_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1f99, 0x1f99, 0, 0, hdds3_speedup_r);
|
||||
hdds3_speedup_addr = &hdadsp_data_memory[0x1f99];
|
||||
hdds3_speedup_pc = 0xff;
|
||||
hdds3_transfer_pc = 0x43672;
|
||||
@ -3874,18 +3869,18 @@ static DRIVER_INIT( hdrivair )
|
||||
init_ds3(machine);
|
||||
init_dsk2(machine);
|
||||
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0xa80000, 0xafffff, 0, 0, hda68k_port1_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0xa80000, 0xafffff, 0, 0, hda68k_port1_r);
|
||||
|
||||
/* synchronization */
|
||||
rddsp32_sync[0] = memory_install_write32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x21fe00, 0x21fe03, 0, 0, rddsp32_sync0_w);
|
||||
rddsp32_sync[1] = memory_install_write32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x21ff00, 0x21ff03, 0, 0, rddsp32_sync1_w);
|
||||
rddsp32_sync[0] = memory_install_write32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x21fe00, 0x21fe03, 0, 0, rddsp32_sync0_w);
|
||||
rddsp32_sync[1] = memory_install_write32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x21ff00, 0x21ff03, 0, 0, rddsp32_sync1_w);
|
||||
|
||||
/* set up protection hacks */
|
||||
hdgsp_protection = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff943f0, 0xfff943ff, 0, 0, hdgsp_protection_w);
|
||||
hdgsp_protection = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff943f0, 0xfff943ff, 0, 0, hdgsp_protection_w);
|
||||
|
||||
/* set up adsp speedup handlers */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1f99, 0x1f99, 0, 0, hdds3_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1f99, 0x1f99, 0, 0, hdds3_speedup_r);
|
||||
hdds3_speedup_addr = &hdadsp_data_memory[0x1f99];
|
||||
hdds3_speedup_pc = 0x2da;
|
||||
hdds3_transfer_pc = 0x407b8;
|
||||
@ -3899,18 +3894,18 @@ static DRIVER_INIT( hdrivaip )
|
||||
init_ds3(machine);
|
||||
init_dsk2(machine);
|
||||
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_main], ADDRESS_SPACE_PROGRAM), 0xa80000, 0xafffff, 0, 0, hda68k_port1_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_main, ADDRESS_SPACE_PROGRAM), 0xa80000, 0xafffff, 0, 0, hda68k_port1_r);
|
||||
|
||||
/* synchronization */
|
||||
rddsp32_sync[0] = memory_install_write32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x21fe00, 0x21fe03, 0, 0, rddsp32_sync0_w);
|
||||
rddsp32_sync[1] = memory_install_write32_handler(cpu_get_address_space(machine->cpu[hdcpu_dsp32], ADDRESS_SPACE_PROGRAM), 0x21ff00, 0x21ff03, 0, 0, rddsp32_sync1_w);
|
||||
rddsp32_sync[0] = memory_install_write32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x21fe00, 0x21fe03, 0, 0, rddsp32_sync0_w);
|
||||
rddsp32_sync[1] = memory_install_write32_handler(cpu_get_address_space(hdcpu_dsp32, ADDRESS_SPACE_PROGRAM), 0x21ff00, 0x21ff03, 0, 0, rddsp32_sync1_w);
|
||||
|
||||
/* set up protection hacks */
|
||||
hdgsp_protection = memory_install_write16_handler(cpu_get_address_space(machine->cpu[hdcpu_gsp], ADDRESS_SPACE_PROGRAM), 0xfff916c0, 0xfff916cf, 0, 0, hdgsp_protection_w);
|
||||
hdgsp_protection = memory_install_write16_handler(cpu_get_address_space(hdcpu_gsp, ADDRESS_SPACE_PROGRAM), 0xfff916c0, 0xfff916cf, 0, 0, hdgsp_protection_w);
|
||||
|
||||
/* set up adsp speedup handlers */
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(machine->cpu[hdcpu_adsp], ADDRESS_SPACE_DATA), 0x1f9a, 0x1f9a, 0, 0, hdds3_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1fff, 0x1fff, 0, 0, hdadsp_speedup_r);
|
||||
memory_install_read16_handler(cpu_get_address_space(hdcpu_adsp, ADDRESS_SPACE_DATA), 0x1f9a, 0x1f9a, 0, 0, hdds3_speedup_r);
|
||||
hdds3_speedup_addr = &hdadsp_data_memory[0x1f9a];
|
||||
hdds3_speedup_pc = 0x2d9;
|
||||
hdds3_transfer_pc = 0X407da;
|
||||
|
@ -2473,6 +2473,7 @@ static MACHINE_DRIVER_START( seattle_common )
|
||||
MDRV_NVRAM_HANDLER(generic_1fill)
|
||||
|
||||
MDRV_IDE_CONTROLLER_ADD("ide", ide_interrupt)
|
||||
MDRV_IDE_BUS_MASTER_SPACE("main", PROGRAM)
|
||||
|
||||
MDRV_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, 2, "main")
|
||||
MDRV_3DFX_VOODOO_TMU_MEMORY(0, 4)
|
||||
|
@ -707,11 +707,11 @@ static void reset_reset(running_machine *machine)
|
||||
prev_resetcontrol = resetcontrol;
|
||||
}
|
||||
|
||||
static void resetcontrol_w(UINT8 data)
|
||||
static void resetcontrol_w(const address_space *space, UINT8 data)
|
||||
{
|
||||
resetcontrol = data;
|
||||
logerror("Reset control %02x (%d:%x)\n", resetcontrol, cpunum_get_active(), cpu_get_pc(Machine->activecpu));
|
||||
reset_reset(Machine);
|
||||
logerror("Reset control %02x ('%s':%x)\n", resetcontrol, space->cpu, cpu_get_pc(space->cpu));
|
||||
reset_reset(space->machine);
|
||||
}
|
||||
|
||||
|
||||
|
@ -487,11 +487,11 @@ static UINT8 stv_SMPC_r8 (running_machine *machine, int offset)
|
||||
return return_data;
|
||||
}
|
||||
|
||||
static void stv_SMPC_w8 (running_machine *machine, int offset, UINT8 data)
|
||||
static void stv_SMPC_w8 (const address_space *space, int offset, UINT8 data)
|
||||
{
|
||||
mame_system_time systime;
|
||||
|
||||
mame_get_base_datetime(machine, &systime);
|
||||
mame_get_base_datetime(space->machine, &systime);
|
||||
|
||||
// if(LOG_SMPC) logerror ("8-bit SMPC Write to Offset %02x with Data %02x\n", offset, data);
|
||||
smpc_ram[offset] = data;
|
||||
@ -523,13 +523,13 @@ static void stv_SMPC_w8 (running_machine *machine, int offset, UINT8 data)
|
||||
if(!(smpc_ram[0x77] & 0x10))
|
||||
{
|
||||
if(LOG_SMPC) logerror("SMPC: M68k on\n");
|
||||
cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, CLEAR_LINE);
|
||||
cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, CLEAR_LINE);
|
||||
en_68k = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
if(LOG_SMPC) logerror("SMPC: M68k off\n");
|
||||
cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
|
||||
cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
|
||||
en_68k = 0;
|
||||
}
|
||||
//if(LOG_SMPC) logerror("SMPC: ram [0x77] = %02x\n",smpc_ram[0x77]);
|
||||
@ -558,7 +558,7 @@ static void stv_SMPC_w8 (running_machine *machine, int offset, UINT8 data)
|
||||
if(EXLE1 || EXLE2)
|
||||
{
|
||||
//if(LOG_SMPC) logerror ("Interrupt: PAD irq at scanline %04x, Vector 0x48 Level 0x08\n",scanline);
|
||||
cpu_set_input_line_and_vector(machine->cpu[0], 8, (stv_irq.pad) ? HOLD_LINE : CLEAR_LINE, 0x48);
|
||||
cpu_set_input_line_and_vector(space->machine->cpu[0], 8, (stv_irq.pad) ? HOLD_LINE : CLEAR_LINE, 0x48);
|
||||
}
|
||||
}
|
||||
|
||||
@ -576,21 +576,21 @@ static void stv_SMPC_w8 (running_machine *machine, int offset, UINT8 data)
|
||||
smpc_ram[0x5f]=0x02;
|
||||
#if USE_SLAVE
|
||||
stv_enable_slave_sh2 = 1;
|
||||
cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
|
||||
cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
|
||||
#endif
|
||||
break;
|
||||
case 0x03:
|
||||
if(LOG_SMPC) logerror ("SMPC: Slave OFF\n");
|
||||
smpc_ram[0x5f]=0x03;
|
||||
stv_enable_slave_sh2 = 0;
|
||||
cpuexec_trigger(machine, 1000);
|
||||
cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
|
||||
cpuexec_trigger(space->machine, 1000);
|
||||
cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
|
||||
break;
|
||||
case 0x06:
|
||||
if(LOG_SMPC) logerror ("SMPC: Sound ON\n");
|
||||
/* wrong? */
|
||||
smpc_ram[0x5f]=0x06;
|
||||
cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, CLEAR_LINE);
|
||||
cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, CLEAR_LINE);
|
||||
break;
|
||||
case 0x07:
|
||||
if(LOG_SMPC) logerror ("SMPC: Sound OFF\n");
|
||||
@ -602,24 +602,24 @@ static void stv_SMPC_w8 (running_machine *machine, int offset, UINT8 data)
|
||||
case 0x0d:
|
||||
if(LOG_SMPC) logerror ("SMPC: System Reset\n");
|
||||
smpc_ram[0x5f]=0x0d;
|
||||
cpu_set_input_line(machine->cpu[0], INPUT_LINE_RESET, PULSE_LINE);
|
||||
cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_RESET, PULSE_LINE);
|
||||
system_reset();
|
||||
break;
|
||||
case 0x0e:
|
||||
if(LOG_SMPC) logerror ("SMPC: Change Clock to 352\n");
|
||||
smpc_ram[0x5f]=0x0e;
|
||||
cpu_set_clock(machine->cpu[0], MASTER_CLOCK_352/2);
|
||||
cpu_set_clock(machine->cpu[1], MASTER_CLOCK_352/2);
|
||||
cpu_set_clock(machine->cpu[2], MASTER_CLOCK_352/5);
|
||||
cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE); // ff said this causes nmi, should we set a timer then nmi?
|
||||
cpu_set_clock(space->machine->cpu[0], MASTER_CLOCK_352/2);
|
||||
cpu_set_clock(space->machine->cpu[1], MASTER_CLOCK_352/2);
|
||||
cpu_set_clock(space->machine->cpu[2], MASTER_CLOCK_352/5);
|
||||
cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE); // ff said this causes nmi, should we set a timer then nmi?
|
||||
break;
|
||||
case 0x0f:
|
||||
if(LOG_SMPC) logerror ("SMPC: Change Clock to 320\n");
|
||||
smpc_ram[0x5f]=0x0f;
|
||||
cpu_set_clock(machine->cpu[0], MASTER_CLOCK_320/2);
|
||||
cpu_set_clock(machine->cpu[1], MASTER_CLOCK_320/2);
|
||||
cpu_set_clock(machine->cpu[2], MASTER_CLOCK_320/5);
|
||||
cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE); // ff said this causes nmi, should we set a timer then nmi?
|
||||
cpu_set_clock(space->machine->cpu[0], MASTER_CLOCK_320/2);
|
||||
cpu_set_clock(space->machine->cpu[1], MASTER_CLOCK_320/2);
|
||||
cpu_set_clock(space->machine->cpu[2], MASTER_CLOCK_320/5);
|
||||
cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE); // ff said this causes nmi, should we set a timer then nmi?
|
||||
break;
|
||||
/*"Interrupt Back"*/
|
||||
case 0x10:
|
||||
@ -636,7 +636,7 @@ static void stv_SMPC_w8 (running_machine *machine, int offset, UINT8 data)
|
||||
|
||||
smpc_ram[0x31]=0x00; //?
|
||||
|
||||
//smpc_ram[0x33]=input_port_read(machine, "FAKE");
|
||||
//smpc_ram[0x33]=input_port_read(space->machine, "FAKE");
|
||||
|
||||
smpc_ram[0x35]=0x00;
|
||||
smpc_ram[0x37]=0x00;
|
||||
@ -665,7 +665,7 @@ static void stv_SMPC_w8 (running_machine *machine, int offset, UINT8 data)
|
||||
/*System Manager(SMPC) irq*/
|
||||
{
|
||||
//if(LOG_SMPC) logerror ("Interrupt: System Manager (SMPC) at scanline %04x, Vector 0x47 Level 0x08\n",scanline);
|
||||
cpu_set_input_line_and_vector(machine->cpu[0], 8, (stv_irq.smpc) ? HOLD_LINE : CLEAR_LINE, 0x47);
|
||||
cpu_set_input_line_and_vector(space->machine->cpu[0], 8, (stv_irq.smpc) ? HOLD_LINE : CLEAR_LINE, 0x47);
|
||||
}
|
||||
break;
|
||||
/* RTC write*/
|
||||
@ -689,7 +689,7 @@ static void stv_SMPC_w8 (running_machine *machine, int offset, UINT8 data)
|
||||
if(LOG_SMPC) logerror ("SMPC: NMI request\n");
|
||||
smpc_ram[0x5f]=0x18;
|
||||
/*NMI is unconditionally requested?*/
|
||||
cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
|
||||
cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
|
||||
break;
|
||||
case 0x19:
|
||||
if(LOG_SMPC) logerror ("SMPC: NMI Enable\n");
|
||||
@ -704,7 +704,7 @@ static void stv_SMPC_w8 (running_machine *machine, int offset, UINT8 data)
|
||||
smpc_ram[0x21] = (0x80) | ((NMI_reset & 1) << 6);
|
||||
break;
|
||||
default:
|
||||
if(LOG_SMPC) logerror ("cpu #%d (PC=%08X) SMPC: undocumented Command %02x\n", cpunum_get_active(), cpu_get_pc(machine->activecpu), data);
|
||||
if(LOG_SMPC) logerror ("cpu '%s' (PC=%08X) SMPC: undocumented Command %02x\n", space->cpu->tag, cpu_get_pc(space->cpu), data);
|
||||
}
|
||||
|
||||
// we've processed the command, clear status flag
|
||||
@ -746,7 +746,7 @@ static WRITE32_HANDLER ( stv_SMPC_w32 )
|
||||
|
||||
offset += byte;
|
||||
|
||||
stv_SMPC_w8(space->machine, offset,writedata);
|
||||
stv_SMPC_w8(space, offset,writedata);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -25,7 +25,6 @@
|
||||
|
||||
|
||||
static UINT16 *shared_ram;
|
||||
static UINT16 *rom_base[2];
|
||||
|
||||
|
||||
/*************************************
|
||||
@ -48,9 +47,6 @@ static MACHINE_RESET( thunderj )
|
||||
atarigen_interrupt_reset(update_interrupts);
|
||||
atarivc_reset(machine->primary_screen, atarivc_eof_data, 2);
|
||||
atarijsa_reset();
|
||||
|
||||
rom_base[0] = (UINT16 *)memory_region(machine, "main");
|
||||
rom_base[1] = (UINT16 *)memory_region(machine, "extra");
|
||||
memory_set_bankptr(machine, 1, shared_ram);
|
||||
}
|
||||
|
||||
@ -120,14 +116,14 @@ static READ16_HANDLER( shared_ram_r )
|
||||
offs_t ppc = cpu_get_previouspc(space->cpu);
|
||||
if (ppc < 0xa0000)
|
||||
{
|
||||
int cpunum = cpunum_get_active();
|
||||
UINT16 opcode = rom_base[cpunum][ppc / 2];
|
||||
UINT16 *rom_base = (UINT16 *)space->cpu->region;
|
||||
UINT16 opcode = rom_base[ppc / 2];
|
||||
|
||||
/* look for TAS or BTST #$7; both CPUs spin waiting for these in order to */
|
||||
/* coordinate communications. Some spins have timeouts that reset the machine */
|
||||
/* if they fail, so we must make sure they are released in time */
|
||||
if ((opcode & 0xffc0) == 0x4ac0 ||
|
||||
((opcode & 0xffc0) == 0x0080 && rom_base[cpunum][ppc / 2 + 1] == 7))
|
||||
((opcode & 0xffc0) == 0x0080 && rom_base[ppc / 2 + 1] == 7))
|
||||
{
|
||||
timer_call_after_resynch(space->machine, NULL, 4, shared_sync_callback);
|
||||
}
|
||||
|
@ -2230,6 +2230,7 @@ static MACHINE_DRIVER_START( vegascore )
|
||||
MDRV_NVRAM_HANDLER(timekeeper_save)
|
||||
|
||||
MDRV_IDE_CONTROLLER_ADD("ide", ide_interrupt)
|
||||
MDRV_IDE_BUS_MASTER_SPACE("main", PROGRAM)
|
||||
|
||||
MDRV_SMC91C94_ADD("ethernet", ethernet_interrupt)
|
||||
|
||||
|
@ -35,7 +35,7 @@ INLINE void ATTR_PRINTF(2,3) verboselog( int n_level, const char *s_fmt, ... )
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
if( cpunum_get_active() != -1 )
|
||||
if( Machine->activecpu != NULL )
|
||||
{
|
||||
logerror( "%08x: %s", cpu_get_pc(Machine->activecpu), buf );
|
||||
}
|
||||
|
@ -8,14 +8,14 @@
|
||||
|
||||
/*----------- defined in machine/harddriv.c -----------*/
|
||||
|
||||
extern INT8 hdcpu_main;
|
||||
extern INT8 hdcpu_gsp;
|
||||
extern INT8 hdcpu_msp;
|
||||
extern INT8 hdcpu_adsp;
|
||||
extern INT8 hdcpu_sound;
|
||||
extern INT8 hdcpu_sounddsp;
|
||||
extern INT8 hdcpu_jsa;
|
||||
extern INT8 hdcpu_dsp32;
|
||||
extern const device_config *hdcpu_main;
|
||||
extern const device_config *hdcpu_gsp;
|
||||
extern const device_config *hdcpu_msp;
|
||||
extern const device_config *hdcpu_adsp;
|
||||
extern const device_config *hdcpu_sound;
|
||||
extern const device_config *hdcpu_sounddsp;
|
||||
extern const device_config *hdcpu_jsa;
|
||||
extern const device_config *hdcpu_dsp32;
|
||||
|
||||
extern UINT8 hd34010_host_access;
|
||||
extern UINT8 hddsk_pio_access;
|
||||
|
@ -13,7 +13,7 @@ WRITE16_HANDLER( system24temp_sys16_shared_ram_w );
|
||||
|
||||
void system24temp_sys16_io_set_callbacks(UINT8 (*io_r)(running_machine *machine, int port),
|
||||
void (*io_w)(running_machine *machine, int port, UINT8 data),
|
||||
void (*cnt_w)(UINT8 data),
|
||||
void (*cnt_w)(const address_space *space, UINT8 data),
|
||||
READ16_HANDLER ((*iod_r)),
|
||||
WRITE16_HANDLER((*iod_w)));
|
||||
READ16_HANDLER ( system24temp_sys16_io_r );
|
||||
|
@ -38,14 +38,14 @@
|
||||
*************************************/
|
||||
|
||||
/* externally accessible */
|
||||
INT8 hdcpu_main;
|
||||
INT8 hdcpu_gsp;
|
||||
INT8 hdcpu_msp;
|
||||
INT8 hdcpu_adsp;
|
||||
INT8 hdcpu_sound;
|
||||
INT8 hdcpu_sounddsp;
|
||||
INT8 hdcpu_jsa;
|
||||
INT8 hdcpu_dsp32;
|
||||
const device_config *hdcpu_main;
|
||||
const device_config *hdcpu_gsp;
|
||||
const device_config *hdcpu_msp;
|
||||
const device_config *hdcpu_adsp;
|
||||
const device_config *hdcpu_sound;
|
||||
const device_config *hdcpu_sounddsp;
|
||||
const device_config *hdcpu_jsa;
|
||||
const device_config *hdcpu_dsp32;
|
||||
|
||||
UINT8 hd34010_host_access;
|
||||
UINT8 hddsk_pio_access;
|
||||
@ -172,12 +172,12 @@ MACHINE_RESET( harddriv )
|
||||
atarigen_interrupt_reset(hd68k_update_interrupts);
|
||||
|
||||
/* halt several of the DSPs to start */
|
||||
if (hdcpu_adsp != -1) cpu_set_input_line(machine->cpu[hdcpu_adsp], INPUT_LINE_HALT, ASSERT_LINE);
|
||||
if (hdcpu_dsp32 != -1) cpu_set_input_line(machine->cpu[hdcpu_dsp32], INPUT_LINE_HALT, ASSERT_LINE);
|
||||
if (hdcpu_sounddsp != -1) cpu_set_input_line(machine->cpu[hdcpu_sounddsp], INPUT_LINE_HALT, ASSERT_LINE);
|
||||
if (hdcpu_adsp != NULL) cpu_set_input_line(hdcpu_adsp, INPUT_LINE_HALT, ASSERT_LINE);
|
||||
if (hdcpu_dsp32 != NULL) cpu_set_input_line(hdcpu_dsp32, INPUT_LINE_HALT, ASSERT_LINE);
|
||||
if (hdcpu_sounddsp != NULL) cpu_set_input_line(hdcpu_sounddsp, INPUT_LINE_HALT, ASSERT_LINE);
|
||||
|
||||
/* if we found a 6502, reset the JSA board */
|
||||
if (hdcpu_jsa != -1)
|
||||
if (hdcpu_jsa != NULL)
|
||||
atarijsa_reset();
|
||||
|
||||
last_gsp_shiftreg = 0;
|
||||
@ -209,12 +209,12 @@ MACHINE_RESET( harddriv )
|
||||
|
||||
static void hd68k_update_interrupts(running_machine *machine)
|
||||
{
|
||||
cpu_set_input_line(machine->cpu[hdcpu_main], 1, msp_irq_state ? ASSERT_LINE : CLEAR_LINE);
|
||||
cpu_set_input_line(machine->cpu[hdcpu_main], 2, adsp_irq_state ? ASSERT_LINE : CLEAR_LINE);
|
||||
cpu_set_input_line(machine->cpu[hdcpu_main], 3, gsp_irq_state ? ASSERT_LINE : CLEAR_LINE);
|
||||
cpu_set_input_line(machine->cpu[hdcpu_main], 4, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE); /* /LINKIRQ on STUN Runner */
|
||||
cpu_set_input_line(machine->cpu[hdcpu_main], 5, irq_state ? ASSERT_LINE : CLEAR_LINE);
|
||||
cpu_set_input_line(machine->cpu[hdcpu_main], 6, duart_irq_state ? ASSERT_LINE : CLEAR_LINE);
|
||||
cpu_set_input_line(hdcpu_main, 1, msp_irq_state ? ASSERT_LINE : CLEAR_LINE);
|
||||
cpu_set_input_line(hdcpu_main, 2, adsp_irq_state ? ASSERT_LINE : CLEAR_LINE);
|
||||
cpu_set_input_line(hdcpu_main, 3, gsp_irq_state ? ASSERT_LINE : CLEAR_LINE);
|
||||
cpu_set_input_line(hdcpu_main, 4, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE); /* /LINKIRQ on STUN Runner */
|
||||
cpu_set_input_line(hdcpu_main, 5, irq_state ? ASSERT_LINE : CLEAR_LINE);
|
||||
cpu_set_input_line(hdcpu_main, 6, duart_irq_state ? ASSERT_LINE : CLEAR_LINE);
|
||||
}
|
||||
|
||||
|
||||
@ -258,7 +258,7 @@ READ16_HANDLER( hd68k_gsp_io_r )
|
||||
UINT16 result;
|
||||
offset = (offset / 2) ^ 1;
|
||||
hd34010_host_access = 1;
|
||||
result = tms34010_host_r(space->machine->cpu[hdcpu_gsp], offset);
|
||||
result = tms34010_host_r(hdcpu_gsp, offset);
|
||||
hd34010_host_access = 0;
|
||||
return result;
|
||||
}
|
||||
@ -268,7 +268,7 @@ WRITE16_HANDLER( hd68k_gsp_io_w )
|
||||
{
|
||||
offset = (offset / 2) ^ 1;
|
||||
hd34010_host_access = 1;
|
||||
tms34010_host_w(space->machine->cpu[hdcpu_gsp], offset, data);
|
||||
tms34010_host_w(hdcpu_gsp, offset, data);
|
||||
hd34010_host_access = 0;
|
||||
}
|
||||
|
||||
@ -285,7 +285,7 @@ READ16_HANDLER( hd68k_msp_io_r )
|
||||
UINT16 result;
|
||||
offset = (offset / 2) ^ 1;
|
||||
hd34010_host_access = 1;
|
||||
result = (hdcpu_msp != -1) ? tms34010_host_r(space->machine->cpu[hdcpu_msp], offset) : 0xffff;
|
||||
result = (hdcpu_msp != NULL) ? tms34010_host_r(hdcpu_msp, offset) : 0xffff;
|
||||
hd34010_host_access = 0;
|
||||
return result;
|
||||
}
|
||||
@ -294,10 +294,10 @@ READ16_HANDLER( hd68k_msp_io_r )
|
||||
WRITE16_HANDLER( hd68k_msp_io_w )
|
||||
{
|
||||
offset = (offset / 2) ^ 1;
|
||||
if (hdcpu_msp != -1)
|
||||
if (hdcpu_msp != NULL)
|
||||
{
|
||||
hd34010_host_access = 1;
|
||||
tms34010_host_w(space->machine->cpu[hdcpu_msp], offset, data);
|
||||
tms34010_host_w(hdcpu_msp, offset, data);
|
||||
hd34010_host_access = 0;
|
||||
}
|
||||
}
|
||||
@ -407,7 +407,7 @@ READ16_HANDLER( hd68k_adc12_r )
|
||||
|
||||
READ16_HANDLER( hd68k_sound_reset_r )
|
||||
{
|
||||
if (hdcpu_jsa != -1)
|
||||
if (hdcpu_jsa != NULL)
|
||||
atarijsa_reset();
|
||||
return ~0;
|
||||
}
|
||||
@ -512,13 +512,13 @@ WRITE16_HANDLER( hd68k_nwr_w )
|
||||
break;
|
||||
case 6: /* /GSPRES */
|
||||
logerror("Write to /GSPRES(%d)\n", data);
|
||||
if (hdcpu_gsp != -1)
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_gsp], INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
|
||||
if (hdcpu_gsp != NULL)
|
||||
cpu_set_input_line(hdcpu_gsp, INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
|
||||
break;
|
||||
case 7: /* /MSPRES */
|
||||
logerror("Write to /MSPRES(%d)\n", data);
|
||||
if (hdcpu_msp != -1)
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_msp], INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
|
||||
if (hdcpu_msp != NULL)
|
||||
cpu_set_input_line(hdcpu_msp, INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -753,7 +753,7 @@ static TIMER_CALLBACK( stmsp_sync_update )
|
||||
offs_t offset = (param >> 16) & 0xfff;
|
||||
UINT16 data = param;
|
||||
stmsp_sync[which][offset] = data;
|
||||
cpu_triggerint(machine->cpu[hdcpu_msp]);
|
||||
cpu_triggerint(hdcpu_msp);
|
||||
}
|
||||
|
||||
|
||||
@ -853,7 +853,7 @@ WRITE16_HANDLER( hd68k_adsp_data_w )
|
||||
{
|
||||
logerror("%06X:ADSP sync address written (%04X)\n", cpu_get_previouspc(space->cpu), data);
|
||||
timer_call_after_resynch(space->machine, NULL, 0, 0);
|
||||
cpu_triggerint(space->machine->cpu[hdcpu_adsp]);
|
||||
cpu_triggerint(hdcpu_adsp);
|
||||
}
|
||||
else
|
||||
logerror("%06X:ADSP W@%04X (%04X)\n", cpu_get_previouspc(space->cpu), offset, data);
|
||||
@ -963,10 +963,10 @@ WRITE16_HANDLER( hd68k_adsp_control_w )
|
||||
adsp_br = !val;
|
||||
logerror("ADSP /BR = %d\n", !adsp_br);
|
||||
if (adsp_br || adsp_halt)
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_adsp], INPUT_LINE_HALT, ASSERT_LINE);
|
||||
cpu_set_input_line(hdcpu_adsp, INPUT_LINE_HALT, ASSERT_LINE);
|
||||
else
|
||||
{
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_adsp], INPUT_LINE_HALT, CLEAR_LINE);
|
||||
cpu_set_input_line(hdcpu_adsp, INPUT_LINE_HALT, CLEAR_LINE);
|
||||
/* a yield in this case is not enough */
|
||||
/* we would need to increase the interleaving otherwise */
|
||||
/* note that this only affects the test mode */
|
||||
@ -980,10 +980,10 @@ WRITE16_HANDLER( hd68k_adsp_control_w )
|
||||
adsp_halt = !val;
|
||||
logerror("ADSP /HALT = %d\n", !adsp_halt);
|
||||
if (adsp_br || adsp_halt)
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_adsp], INPUT_LINE_HALT, ASSERT_LINE);
|
||||
cpu_set_input_line(hdcpu_adsp, INPUT_LINE_HALT, ASSERT_LINE);
|
||||
else
|
||||
{
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_adsp], INPUT_LINE_HALT, CLEAR_LINE);
|
||||
cpu_set_input_line(hdcpu_adsp, INPUT_LINE_HALT, CLEAR_LINE);
|
||||
/* a yield in this case is not enough */
|
||||
/* we would need to increase the interleaving otherwise */
|
||||
/* note that this only affects the test mode */
|
||||
@ -993,7 +993,7 @@ WRITE16_HANDLER( hd68k_adsp_control_w )
|
||||
|
||||
case 7:
|
||||
logerror("ADSP reset = %d\n", val);
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_adsp], INPUT_LINE_RESET, val ? CLEAR_LINE : ASSERT_LINE);
|
||||
cpu_set_input_line(hdcpu_adsp, INPUT_LINE_RESET, val ? CLEAR_LINE : ASSERT_LINE);
|
||||
cpu_yield(space->cpu);
|
||||
break;
|
||||
|
||||
@ -1109,9 +1109,9 @@ static void update_ds3_irq(void)
|
||||
{
|
||||
/* update the IRQ2 signal to the ADSP2101 */
|
||||
if (!(!ds3_g68flag && ds3_g68irqs) && !(ds3_gflag && ds3_gfirqs))
|
||||
cpu_set_input_line(Machine->cpu[hdcpu_adsp], ADSP2100_IRQ2, ASSERT_LINE);
|
||||
cpu_set_input_line(hdcpu_adsp, ADSP2100_IRQ2, ASSERT_LINE);
|
||||
else
|
||||
cpu_set_input_line(Machine->cpu[hdcpu_adsp], ADSP2100_IRQ2, CLEAR_LINE);
|
||||
cpu_set_input_line(hdcpu_adsp, ADSP2100_IRQ2, CLEAR_LINE);
|
||||
}
|
||||
|
||||
|
||||
@ -1134,10 +1134,10 @@ WRITE16_HANDLER( hd68k_ds3_control_w )
|
||||
/* the ADSP at the next instruction boundary */
|
||||
adsp_br = !val;
|
||||
if (adsp_br)
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_adsp], INPUT_LINE_HALT, ASSERT_LINE);
|
||||
cpu_set_input_line(hdcpu_adsp, INPUT_LINE_HALT, ASSERT_LINE);
|
||||
else
|
||||
{
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_adsp], INPUT_LINE_HALT, CLEAR_LINE);
|
||||
cpu_set_input_line(hdcpu_adsp, INPUT_LINE_HALT, CLEAR_LINE);
|
||||
/* a yield in this case is not enough */
|
||||
/* we would need to increase the interleaving otherwise */
|
||||
/* note that this only affects the test mode */
|
||||
@ -1146,7 +1146,7 @@ WRITE16_HANDLER( hd68k_ds3_control_w )
|
||||
break;
|
||||
|
||||
case 3:
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_adsp], INPUT_LINE_RESET, val ? CLEAR_LINE : ASSERT_LINE);
|
||||
cpu_set_input_line(hdcpu_adsp, INPUT_LINE_RESET, val ? CLEAR_LINE : ASSERT_LINE);
|
||||
if (val && !ds3_reset)
|
||||
{
|
||||
ds3_gflag = 0;
|
||||
@ -1205,10 +1205,10 @@ READ16_HANDLER( hd68k_ds3_gdata_r )
|
||||
{
|
||||
UINT32 destaddr = cpu_get_reg(space->cpu, M68K_A1);
|
||||
UINT16 count68k = cpu_get_reg(space->cpu, M68K_D1);
|
||||
UINT16 mstat = cpu_get_reg(space->machine->cpu[hdcpu_adsp], ADSP2100_MSTAT);
|
||||
UINT16 i6 = cpu_get_reg(space->machine->cpu[hdcpu_adsp], (mstat & 1) ? ADSP2100_MR0 : ADSP2100_MR0_SEC);
|
||||
UINT16 l6 = cpu_get_reg(space->machine->cpu[hdcpu_adsp], ADSP2100_L6) - 1;
|
||||
UINT16 m7 = cpu_get_reg(space->machine->cpu[hdcpu_adsp], ADSP2100_M7);
|
||||
UINT16 mstat = cpu_get_reg(hdcpu_adsp, ADSP2100_MSTAT);
|
||||
UINT16 i6 = cpu_get_reg(hdcpu_adsp, (mstat & 1) ? ADSP2100_MR0 : ADSP2100_MR0_SEC);
|
||||
UINT16 l6 = cpu_get_reg(hdcpu_adsp, ADSP2100_L6) - 1;
|
||||
UINT16 m7 = cpu_get_reg(hdcpu_adsp, ADSP2100_M7);
|
||||
|
||||
logerror("%06X:optimizing 68k transfer, %d words\n", cpu_get_previouspc(space->cpu), count68k);
|
||||
|
||||
@ -1223,7 +1223,7 @@ READ16_HANDLER( hd68k_ds3_gdata_r )
|
||||
count68k--;
|
||||
}
|
||||
cpu_set_reg(space->cpu, M68K_D1, count68k);
|
||||
cpu_set_reg(space->machine->cpu[hdcpu_adsp], (mstat & 1) ? ADSP2100_MR0 : ADSP2100_MR0_SEC, i6);
|
||||
cpu_set_reg(hdcpu_adsp, (mstat & 1) ? ADSP2100_MR0 : ADSP2100_MR0_SEC, i6);
|
||||
adsp_speedup_count[1]++;
|
||||
}
|
||||
|
||||
@ -1244,7 +1244,7 @@ WRITE16_HANDLER( hd68k_ds3_gdata_w )
|
||||
COMBINE_DATA(&ds3_g68data);
|
||||
ds3_g68flag = 1;
|
||||
ds3_gcmd = offset & 1;
|
||||
cpu_triggerint(space->machine->cpu[hdcpu_adsp]);
|
||||
cpu_triggerint(hdcpu_adsp);
|
||||
update_ds3_irq();
|
||||
}
|
||||
|
||||
@ -1435,11 +1435,11 @@ WRITE16_HANDLER( hd68k_dsk_control_w )
|
||||
switch (offset & 7)
|
||||
{
|
||||
case 0: /* DSPRESTN */
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_dsp32], INPUT_LINE_RESET, val ? CLEAR_LINE : ASSERT_LINE);
|
||||
cpu_set_input_line(hdcpu_dsp32, INPUT_LINE_RESET, val ? CLEAR_LINE : ASSERT_LINE);
|
||||
break;
|
||||
|
||||
case 1: /* DSPZN */
|
||||
cpu_set_input_line(space->machine->cpu[hdcpu_dsp32], INPUT_LINE_HALT, val ? CLEAR_LINE : ASSERT_LINE);
|
||||
cpu_set_input_line(hdcpu_dsp32, INPUT_LINE_HALT, val ? CLEAR_LINE : ASSERT_LINE);
|
||||
break;
|
||||
|
||||
case 2: /* ZW1 */
|
||||
@ -1761,7 +1761,7 @@ READ16_HANDLER( hdgsp_speedup_r )
|
||||
/* if both this address and the other important address are not $ffff */
|
||||
/* then we can spin until something gets written */
|
||||
if (result != 0xffff && hdgsp_speedup_addr[1][0] != 0xffff &&
|
||||
cpunum_get_active() == hdcpu_gsp && cpu_get_pc(space->cpu) == hdgsp_speedup_pc)
|
||||
space->cpu == hdcpu_gsp && cpu_get_pc(space->cpu) == hdgsp_speedup_pc)
|
||||
{
|
||||
gsp_speedup_count[0]++;
|
||||
cpu_spinuntil_int(space->cpu);
|
||||
@ -1777,7 +1777,7 @@ WRITE16_HANDLER( hdgsp_speedup1_w )
|
||||
|
||||
/* if $ffff is written, send an "interrupt" trigger to break us out of the spin loop */
|
||||
if (hdgsp_speedup_addr[0][offset] == 0xffff)
|
||||
cpu_triggerint(space->machine->cpu[hdcpu_gsp]);
|
||||
cpu_triggerint(hdcpu_gsp);
|
||||
}
|
||||
|
||||
|
||||
@ -1787,7 +1787,7 @@ WRITE16_HANDLER( hdgsp_speedup2_w )
|
||||
|
||||
/* if $ffff is written, send an "interrupt" trigger to break us out of the spin loop */
|
||||
if (hdgsp_speedup_addr[1][offset] == 0xffff)
|
||||
cpu_triggerint(space->machine->cpu[hdcpu_gsp]);
|
||||
cpu_triggerint(hdcpu_gsp);
|
||||
}
|
||||
|
||||
|
||||
@ -1805,7 +1805,7 @@ READ16_HANDLER( rdgsp_speedup1_r )
|
||||
int result = hdgsp_speedup_addr[0][offset];
|
||||
|
||||
/* if this address is equal to $f000, spin until something gets written */
|
||||
if (cpunum_get_active() == hdcpu_gsp && cpu_get_pc(space->cpu) == hdgsp_speedup_pc &&
|
||||
if (space->cpu == hdcpu_gsp && cpu_get_pc(space->cpu) == hdgsp_speedup_pc &&
|
||||
(result & 0xff) < cpu_get_reg(space->cpu, TMS34010_A1))
|
||||
{
|
||||
gsp_speedup_count[0]++;
|
||||
@ -1819,8 +1819,8 @@ READ16_HANDLER( rdgsp_speedup1_r )
|
||||
WRITE16_HANDLER( rdgsp_speedup1_w )
|
||||
{
|
||||
COMBINE_DATA(&hdgsp_speedup_addr[0][offset]);
|
||||
if (cpunum_get_active() != hdcpu_gsp)
|
||||
cpu_triggerint(space->machine->cpu[hdcpu_gsp]);
|
||||
if (space->cpu != hdcpu_gsp)
|
||||
cpu_triggerint(hdcpu_gsp);
|
||||
}
|
||||
|
||||
|
||||
@ -1840,7 +1840,7 @@ READ16_HANDLER( hdmsp_speedup_r )
|
||||
{
|
||||
int data = hdmsp_speedup_addr[offset];
|
||||
|
||||
if (data == 0 && cpu_get_pc(space->cpu) == hdmsp_speedup_pc && cpunum_get_active() == hdcpu_msp)
|
||||
if (data == 0 && space->cpu == hdcpu_msp && cpu_get_pc(space->cpu) == hdmsp_speedup_pc)
|
||||
{
|
||||
msp_speedup_count[0]++;
|
||||
cpu_spinuntil_int(space->cpu);
|
||||
@ -1854,7 +1854,7 @@ WRITE16_HANDLER( hdmsp_speedup_w )
|
||||
{
|
||||
COMBINE_DATA(&hdmsp_speedup_addr[offset]);
|
||||
if (offset == 0 && hdmsp_speedup_addr[offset] != 0)
|
||||
cpu_triggerint(space->machine->cpu[hdcpu_msp]);
|
||||
cpu_triggerint(hdcpu_msp);
|
||||
}
|
||||
|
||||
|
||||
@ -1897,7 +1897,7 @@ READ16_HANDLER( hdadsp_speedup_r )
|
||||
{
|
||||
int data = hdadsp_data_memory[0x1fff];
|
||||
|
||||
if (data == 0xffff && cpu_get_pc(space->cpu) <= 0x3b && cpunum_get_active() == hdcpu_adsp)
|
||||
if (data == 0xffff && space->cpu == hdcpu_adsp && cpu_get_pc(space->cpu) <= 0x3b)
|
||||
{
|
||||
adsp_speedup_count[0]++;
|
||||
cpu_spinuntil_int(space->cpu);
|
||||
@ -1911,7 +1911,7 @@ READ16_HANDLER( hdds3_speedup_r )
|
||||
{
|
||||
int data = *hdds3_speedup_addr;
|
||||
|
||||
if (data != 0 && cpu_get_pc(space->cpu) == hdds3_speedup_pc && cpunum_get_active() == hdcpu_adsp)
|
||||
if (data != 0 && space->cpu == hdcpu_adsp && cpu_get_pc(space->cpu) == hdds3_speedup_pc)
|
||||
{
|
||||
adsp_speedup_count[2]++;
|
||||
cpu_spinuntil_int(space->cpu);
|
||||
|
@ -70,7 +70,7 @@ struct ioasic_state
|
||||
UINT32 reg[16];
|
||||
UINT8 has_dcs;
|
||||
UINT8 has_cage;
|
||||
UINT8 dcs_cpu;
|
||||
const device_config *dcs_cpu;
|
||||
UINT8 shuffle_type;
|
||||
UINT8 shuffle_active;
|
||||
const UINT8 * shuffle_map;
|
||||
@ -558,8 +558,8 @@ enum
|
||||
IOASIC_INTCTL /* f: interrupt control */
|
||||
};
|
||||
|
||||
static UINT16 ioasic_fifo_r(void);
|
||||
static UINT16 ioasic_fifo_status_r(void);
|
||||
static UINT16 ioasic_fifo_r(const device_config *device);
|
||||
static UINT16 ioasic_fifo_status_r(const device_config *device);
|
||||
static void ioasic_input_empty(int state);
|
||||
static void ioasic_output_full(int state);
|
||||
static void update_ioasic_irq(running_machine *machine);
|
||||
@ -600,13 +600,13 @@ void midway_ioasic_init(running_machine *machine, int shuffle, int upper, int ye
|
||||
ioasic_register_state(machine);
|
||||
|
||||
/* do we have a DCS2 sound chip connected? (most likely) */
|
||||
ioasic.has_dcs = (mame_find_cpu_index(machine, "dcs2") != -1 || mame_find_cpu_index(machine, "dsio") != -1 || mame_find_cpu_index(machine, "denver") != -1);
|
||||
ioasic.has_cage = (mame_find_cpu_index(machine, "cage") != -1);
|
||||
ioasic.dcs_cpu = mame_find_cpu_index(machine, "dcs2");
|
||||
if (ioasic.dcs_cpu == (UINT8)-1)
|
||||
ioasic.dcs_cpu = mame_find_cpu_index(machine, "dsio");
|
||||
if (ioasic.dcs_cpu == (UINT8)-1)
|
||||
ioasic.dcs_cpu = mame_find_cpu_index(machine, "denver");
|
||||
ioasic.has_dcs = (cputag_get_cpu(machine, "dcs2") != NULL || cputag_get_cpu(machine, "dsio") != NULL || cputag_get_cpu(machine, "denver") != NULL);
|
||||
ioasic.has_cage = (cputag_get_cpu(machine, "cage") != NULL);
|
||||
ioasic.dcs_cpu = cputag_get_cpu(machine, "dcs2");
|
||||
if (ioasic.dcs_cpu == NULL)
|
||||
ioasic.dcs_cpu = cputag_get_cpu(machine, "dsio");
|
||||
if (ioasic.dcs_cpu == NULL)
|
||||
ioasic.dcs_cpu = cputag_get_cpu(machine, "denver");
|
||||
ioasic.shuffle_type = shuffle;
|
||||
ioasic.shuffle_map = &shuffle_maps[shuffle][0];
|
||||
ioasic.auto_ack = 0;
|
||||
@ -659,7 +659,7 @@ void midway_ioasic_reset(running_machine *machine)
|
||||
|
||||
static void update_ioasic_irq(running_machine *machine)
|
||||
{
|
||||
UINT16 fifo_state = ioasic_fifo_status_r();
|
||||
UINT16 fifo_state = ioasic_fifo_status_r(NULL);
|
||||
UINT16 irqbits = 0x2000;
|
||||
UINT8 new_state;
|
||||
|
||||
@ -724,7 +724,7 @@ static void ioasic_output_full(int state)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static UINT16 ioasic_fifo_r(void)
|
||||
static UINT16 ioasic_fifo_r(const device_config *device)
|
||||
{
|
||||
UINT16 result = 0;
|
||||
|
||||
@ -759,7 +759,7 @@ static UINT16 ioasic_fifo_r(void)
|
||||
}
|
||||
|
||||
|
||||
static UINT16 ioasic_fifo_status_r(void)
|
||||
static UINT16 ioasic_fifo_status_r(const device_config *device)
|
||||
{
|
||||
UINT16 result = 0;
|
||||
|
||||
@ -773,9 +773,9 @@ static UINT16 ioasic_fifo_status_r(void)
|
||||
/* kludge alert: if we're reading this from the DCS CPU itself, and we recently cleared */
|
||||
/* the FIFO, and we're within 16 instructions of the read that cleared the FIFO, make */
|
||||
/* sure the FIFO clear bit is set */
|
||||
if (ioasic.fifo_force_buffer_empty_pc && cpunum_get_active() == ioasic.dcs_cpu)
|
||||
if (ioasic.fifo_force_buffer_empty_pc && device == ioasic.dcs_cpu)
|
||||
{
|
||||
offs_t currpc = safe_cpu_get_pc(Machine->activecpu);
|
||||
offs_t currpc = safe_cpu_get_pc(device);
|
||||
if (currpc >= ioasic.fifo_force_buffer_empty_pc && currpc < ioasic.fifo_force_buffer_empty_pc + 0x10)
|
||||
{
|
||||
ioasic.fifo_force_buffer_empty_pc = 0;
|
||||
@ -896,7 +896,7 @@ READ32_HANDLER( midway_ioasic_r )
|
||||
if (ioasic.has_dcs)
|
||||
{
|
||||
result |= ((dcs_control_r() >> 4) ^ 0x40) & 0x00c0;
|
||||
result |= ioasic_fifo_status_r() & 0x0038;
|
||||
result |= ioasic_fifo_status_r(space->cpu) & 0x0038;
|
||||
result |= dcs_data2_r() & 0xff00;
|
||||
}
|
||||
else if (ioasic.has_cage)
|
||||
|
@ -125,7 +125,6 @@ static void sp_dma(int direction)
|
||||
{
|
||||
UINT8 *src, *dst;
|
||||
int i, c;
|
||||
//int cpu = cpunum_get_active();
|
||||
|
||||
if (sp_dma_length == 0)
|
||||
{
|
||||
|
@ -610,7 +610,7 @@ WRITE8_HANDLER( namcos1_cpu_control_w )
|
||||
|
||||
WRITE8_HANDLER( namcos1_watchdog_w )
|
||||
{
|
||||
wdog |= 1 << (cpunum_get_active());
|
||||
wdog |= 1 << cpu_get_index(space->cpu);
|
||||
if (wdog == 7 || !namcos1_reset)
|
||||
{
|
||||
wdog = 0;
|
||||
@ -748,7 +748,7 @@ WRITE8_HANDLER( namcos1_bankswitch_w )
|
||||
{
|
||||
// logerror("cpu %s: namcos1_bankswitch_w offset %04x data %02x\n", space->cpu->tag, offset, data);
|
||||
|
||||
namcos1_bankswitch(space->machine, cpunum_get_active(), offset, data);
|
||||
namcos1_bankswitch(space->machine, (space->cpu == space->machine->cpu[0]) ? 0 : 1, offset, data);
|
||||
}
|
||||
|
||||
/* Sub cpu set start bank port */
|
||||
|
@ -22,7 +22,7 @@ INLINE void ATTR_PRINTF(2,3) verboselog( int n_level, const char *s_fmt, ... )
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
if( cpunum_get_active() != -1 )
|
||||
if( Machine->activecpu == NULL )
|
||||
{
|
||||
logerror( "%08x: %s", cpu_get_pc(Machine->activecpu), buf );
|
||||
}
|
||||
|
@ -26,14 +26,14 @@ WRITE16_HANDLER( system24temp_sys16_shared_ram_w )
|
||||
|
||||
static UINT8 (*system24temp_sys16_io_io_r)(running_machine *machine, int port);
|
||||
static void (*system24temp_sys16_io_io_w)(running_machine *machine, int port, UINT8 data);
|
||||
static void (*system24temp_sys16_io_cnt_w)(UINT8 data);
|
||||
static void (*system24temp_sys16_io_cnt_w)(const address_space *space, UINT8 data);
|
||||
static READ16_HANDLER ((*system24temp_sys16_io_iod_r));
|
||||
static WRITE16_HANDLER((*system24temp_sys16_io_iod_w));
|
||||
static UINT8 system24temp_sys16_io_cnt, system24temp_sys16_io_dir;
|
||||
|
||||
void system24temp_sys16_io_set_callbacks(UINT8 (*io_r)(running_machine *machine, int port),
|
||||
void (*io_w)(running_machine *machine, int port, UINT8 data),
|
||||
void (*cnt_w)(UINT8 data),
|
||||
void (*cnt_w)(const address_space *space, UINT8 data),
|
||||
READ16_HANDLER ((*iod_r)),
|
||||
WRITE16_HANDLER((*iod_w)))
|
||||
{
|
||||
@ -94,7 +94,7 @@ WRITE16_HANDLER( system24temp_sys16_io_w )
|
||||
case 0xe:
|
||||
system24temp_sys16_io_cnt = data;
|
||||
if(system24temp_sys16_io_cnt_w)
|
||||
system24temp_sys16_io_cnt_w(data & 7);
|
||||
system24temp_sys16_io_cnt_w(space, data & 7);
|
||||
break;
|
||||
case 0xf:
|
||||
system24temp_sys16_io_dir = data;
|
||||
|
@ -1266,16 +1266,16 @@ DRIVER_INIT( mightybj )
|
||||
|
||||
static WRITE8_HANDLER( vstennis_vrom_banking )
|
||||
{
|
||||
int other_cpu = cpunum_get_active() ^ 1;
|
||||
const device_config *other_cpu = (space->cpu == space->machine->cpu[0]) ? space->machine->cpu[1] : space->machine->cpu[0];
|
||||
|
||||
/* switch vrom */
|
||||
ppu2c0x_set_videorom_bank( cpunum_get_active(), 0, 8, ( data & 4 ) ? 1 : 0, 512 );
|
||||
ppu2c0x_set_videorom_bank( (space->cpu == space->machine->cpu[0]) ? 0 : 1, 0, 8, ( data & 4 ) ? 1 : 0, 512 );
|
||||
|
||||
/* bit 1 ( data & 2 ) triggers irq on the other cpu */
|
||||
cpu_set_input_line(space->machine->cpu[other_cpu], 0, ( data & 2 ) ? CLEAR_LINE : ASSERT_LINE );
|
||||
cpu_set_input_line(other_cpu, 0, ( data & 2 ) ? CLEAR_LINE : ASSERT_LINE );
|
||||
|
||||
/* move along */
|
||||
if ( cpunum_get_active() == 0 )
|
||||
if (space->cpu == space->machine->cpu[0])
|
||||
vsnes_in0_w( space, offset, data );
|
||||
else
|
||||
vsnes_in0_1_w( space, offset, data );
|
||||
|
@ -22,7 +22,7 @@ INLINE void ATTR_PRINTF(2,3) verboselog( int n_level, const char *s_fmt, ... )
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
if( cpunum_get_active() != -1 )
|
||||
if( Machine->activecpu != NULL )
|
||||
{
|
||||
logerror( "%08x: %s", cpu_get_pc(Machine->activecpu), buf );
|
||||
}
|
||||
|
@ -34,7 +34,7 @@ INLINE void ATTR_PRINTF(2,3) verboselog( int n_level, const char *s_fmt, ... )
|
||||
va_start( v, s_fmt );
|
||||
vsprintf( buf, s_fmt, v );
|
||||
va_end( v );
|
||||
if( cpunum_get_active() != -1 )
|
||||
if( Machine->activecpu != NULL )
|
||||
{
|
||||
logerror( "%08x: %s", cpu_get_pc(Machine->activecpu), buf );
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user