tmp in RLA is unneeded + rm leftover code
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c03e5ee6e1
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@ -859,35 +859,6 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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} \
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} \
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CLK(CLK_OP + CLK_RELATIVE_8); \
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CLK(CLK_OP + CLK_RELATIVE_8); \
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/* M37710 Set flags according to bits */
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#undef OP_BIT
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#if FLAG_SET_M
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#define OP_BIT(MODE) \
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CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
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FLAG_N = OPER_8_##MODE(cpustate); \
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FLAG_Z = FLAG_N & REG_A; \
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FLAG_V = FLAG_N << 1
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#else
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#define OP_BIT(MODE) \
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CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
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FLAG_N = OPER_16_##MODE(cpustate); \
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FLAG_Z = FLAG_N & REG_A; \
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FLAG_N = NFLAG_16(FLAG_N); \
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FLAG_V = FLAG_N << 1
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#endif
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/* M37710 Set flags according to bits (immediate addressing mode) */
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#undef OP_BITI
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#if FLAG_SET_M
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#define OP_BITI() \
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CLK(CLK_OP + CLK_R8 + CLK_IMM); \
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FLAG_Z = REG_A & OPER_8_IMM(cpustate)
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#else
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#define OP_BITI() \
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CLK(CLK_OP + CLK_R16 + CLK_IMM); \
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FLAG_Z = REG_A & OPER_16_IMM(cpustate)
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#endif
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/* M37710 Cause a Break interrupt */
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/* M37710 Cause a Break interrupt */
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#undef OP_BRK
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#undef OP_BRK
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#define OP_BRK() \
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#define OP_BRK() \
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@ -913,12 +884,6 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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CLK(CLK_OP + CLK_IMPLIED); \
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CLK(CLK_OP + CLK_IMPLIED); \
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FLAG_C = CFLAG_CLEAR
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FLAG_C = CFLAG_CLEAR
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/* M37710 Clear Decimal flag */
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#undef OP_CLD
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#define OP_CLD() \
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CLK(CLK_OP + CLK_IMPLIED); \
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FLAG_D = DFLAG_CLEAR
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/* M37710 Clear Interrupt Mask flag */
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/* M37710 Clear Interrupt Mask flag */
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#undef OP_CLI
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#undef OP_CLI
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#define OP_CLI() \
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#define OP_CLI() \
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@ -1712,10 +1677,10 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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#undef OP_RLA
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#undef OP_RLA
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#if FLAG_SET_M
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#if FLAG_SET_M
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#define OP_RLA(MODE) \
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#define OP_RLA(MODE) \
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{ int cnt = OPER_8_##MODE(cpustate); int tmp; while (cnt > 0) { CLK(6); tmp = REG_A; REG_A=(REG_A<<1)&0xff; REG_A |= (tmp>>7); cnt--; } }
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{ int cnt = OPER_8_##MODE(cpustate); while (cnt > 0) { CLK(6); REG_A=((REG_A<<1)|(REG_A>>7&1))&0xff; cnt--; } }
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#else
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#else
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#define OP_RLA(MODE) \
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#define OP_RLA(MODE) \
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{ int cnt = OPER_16_##MODE(cpustate); int tmp; while (cnt > 0) { CLK(6); tmp = REG_A; REG_A=(REG_A<<1)&0xffff; REG_A |= (tmp>>15); cnt--; } }
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{ int cnt = OPER_16_##MODE(cpustate); while (cnt > 0) { CLK(6); REG_A=((REG_A<<1)|(REG_A>>15&1))&0xffff; cnt--; } }
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#endif
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#endif
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/* M37710 Rotate Left an operand */
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/* M37710 Rotate Left an operand */
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@ -1941,12 +1906,6 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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CLK(CLK_OP + CLK_IMPLIED); \
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CLK(CLK_OP + CLK_IMPLIED); \
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FLAG_C = CFLAG_SET
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FLAG_C = CFLAG_SET
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/* M37710 Set Decimal flag */
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#undef OP_SED
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#define OP_SED() \
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CLK(CLK_OP + CLK_IMPLIED); \
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FLAG_D = DFLAG_SET
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/* M37710 Set Interrupt Mask flag */
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/* M37710 Set Interrupt Mask flag */
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#undef OP_SEI
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#undef OP_SEI
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#define OP_SEI() \
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#define OP_SEI() \
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@ -2001,18 +1960,6 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
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write_16_##MODE(EA_##MODE(cpustate), REG)
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write_16_##MODE(EA_##MODE(cpustate), REG)
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#endif
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#endif
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/* M37710 Store zero to memory */
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#undef OP_STZ
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#if FLAG_SET_M
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#define OP_STZ(MODE) \
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CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
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write_8_##MODE(EA_##MODE(cpustate), 0)
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#else
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#define OP_STZ(MODE) \
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CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
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write_16_##MODE(EA_##MODE(cpustate), 0)
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#endif
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/* M37710 Stop the clock */
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/* M37710 Stop the clock */
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#undef OP_STP
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#undef OP_STP
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#define OP_STP() \
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#define OP_STP() \
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