Add very preliminary MC68HC705J1A device for potgoldu580 (nw)

This commit is contained in:
AJR 2019-08-01 21:09:12 -04:00
parent b20408fa32
commit d94f06e6e2
3 changed files with 111 additions and 15 deletions

View File

@ -63,6 +63,14 @@ std::pair<u16, char const *> const m68hc705c8a_syms[] = {
{ 0x001c, "PROG" },
{ 0x001d, "COPRST" }, { 0x001e, "COPCR" } };
std::pair<u16, char const *> const m68hc705j1a_syms[] = {
{ 0x0000, "PORTA" }, { 0x0001, "PORTB" },
{ 0x0004, "DDRA" }, { 0x0005, "DDRB" },
{ 0x0008, "TSCR" }, { 0x0009, "TCR" }, { 0x000a, "ISCR" },
{ 0x0010, "PDRA" }, { 0x0011, "PDRB" },
{ 0x0018, "EPROG" },
{ 0x07f0, "COPR" }, { 0x07f1, "MOR" } };
ROM_START( m68hc705c8a )
ROM_REGION(0x00f0, "bootstrap", 0)
@ -93,6 +101,7 @@ constexpr u16 M68HC05_INT_MASK = M68HC05_INT_IRQ | M68HC05_INT_TIMER;
DEFINE_DEVICE_TYPE(M68HC05C4, m68hc05c4_device, "m68hc05c4", "Motorola MC68HC05C4")
DEFINE_DEVICE_TYPE(M68HC05C8, m68hc05c8_device, "m68hc05c8", "Motorola MC68HC05C8")
DEFINE_DEVICE_TYPE(M68HC705C8A, m68hc705c8a_device, "m68hc705c8a", "Motorola MC68HC705C8A")
DEFINE_DEVICE_TYPE(M68HC705J1A, m68hc705j1a_device, "m68hc705j1a", "Motorola MC68HC705J1A")
DEFINE_DEVICE_TYPE(M68HC05L9, m68hc05l9_device, "m68hc05l9", "Motorola MC68HC05L9")
DEFINE_DEVICE_TYPE(M68HC05L11, m68hc05l11_device, "m68hc05l11", "Motorola MC68HC05L11")
@ -942,6 +951,72 @@ std::unique_ptr<util::disasm_interface> m68hc705c8a_device::create_disassembler(
/****************************************************************************
* MC68HC05J1A device
****************************************************************************/
void m68hc705j1a_device::j1a_map(address_map &map)
{
map.global_mask(0x07ff);
map.unmap_value_high();
map(0x0000, 0x0001).rw(FUNC(m68hc705j1a_device::port_read), FUNC(m68hc705j1a_device::port_latch_w));
map(0x0004, 0x0005).rw(FUNC(m68hc705j1a_device::port_ddr_r), FUNC(m68hc705j1a_device::port_ddr_w));
// 0x0008 TSCR (bits 7 and 6 are read-only; bits 3 and 2 are write-only)
// 0x0009 TCR (read-only)
// 0x000a ISCR (bits 7 and 3 are readable; bits 7, 4 and 1 are writeable)
// 0x0010 PDRA (write-only)
// 0x0011 PDRB (write-only)
// 0x0014 EPROG
// 0x001f reserved
map(0x00c0, 0x00ff).ram();
map(0x0300, 0x07cf).rom(); // EPROM
map(0x07ee, 0x07ef).rom(); // test ROM
map(0x07f0, 0x07f0).w(FUNC(m68hc705j1a_device::copr_w));
map(0x07f1, 0x07f1).rom(); // MOR
// 0x07f2-0x07f7 reserved
map(0x07f8, 0x07ff).rom(); // user vectors
}
m68hc705j1a_device::m68hc705j1a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
: m68hc705_device(
mconfig,
tag,
owner,
clock,
M68HC705J1A,
11,
address_map_constructor(FUNC(m68hc705j1a_device::j1a_map), this))
{
set_port_bits(std::array<u8, PORT_COUNT>{{ 0xff, 0x3f, 0x00, 0x00 }});
}
void m68hc705j1a_device::device_start()
{
m68hc705_device::device_start();
add_port_state(std::array<bool, PORT_COUNT>{{ true, true, false, false }});
add_timer_state();
add_ncop_state();
}
void m68hc705j1a_device::device_reset()
{
m68hc705_device::device_reset();
// TODO: latch MOR registers on reset
}
std::unique_ptr<util::disasm_interface> m68hc705j1a_device::create_disassembler()
{
return std::make_unique<m68hc05_disassembler>(m68hc705j1a_syms);
}
/****************************************************************************
* MC68HC05L9 device
****************************************************************************/

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@ -17,6 +17,7 @@
DECLARE_DEVICE_TYPE(M68HC05C4, m68hc05c4_device)
DECLARE_DEVICE_TYPE(M68HC05C8, m68hc05c8_device)
DECLARE_DEVICE_TYPE(M68HC705C8A, m68hc705c8a_device)
DECLARE_DEVICE_TYPE(M68HC705J1A, m68hc705j1a_device)
DECLARE_DEVICE_TYPE(M68HC05L9, m68hc05l9_device)
DECLARE_DEVICE_TYPE(M68HC05L11, m68hc05l11_device)
@ -237,6 +238,23 @@ protected:
};
// ======================> m68hc705j1a_device
class m68hc705j1a_device : public m68hc705_device
{
public:
m68hc705j1a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
void j1a_map(address_map &map);
virtual void device_start() override;
virtual void device_reset() override;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
// ======================> m68hc05l9_device
class m68hc05l9_device : public m68hc05_device

View File

@ -21,6 +21,7 @@
#include "emu.h"
#include "cpu/tms34010/tms34010.h"
#include "cpu/m6805/m68hc05.h"
#include "screen.h"
@ -33,6 +34,7 @@ public:
{ }
void potgold(machine_config &config);
void potgold580(machine_config &config);
private:
virtual void machine_reset() override;
@ -46,14 +48,6 @@ private:
};
#define CPU_CLOCK XTAL(40'000'000)
#define VIDEO_CLOCK (22118400) // ?
#define SOUND_CLOCK (3579645)
void potgold_state::video_start()
{
}
@ -81,19 +75,28 @@ INPUT_PORTS_END
void potgold_state::potgold(machine_config &config)
{
/* basic machine hardware */
TMS34010(config, m_maincpu, XTAL(40'000'000));
TMS34010(config, m_maincpu, 40_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &potgold_state::potgold_map);
m_maincpu->set_halt_on_reset(false);
m_maincpu->set_pixel_clock(VIDEO_CLOCK/2);
m_maincpu->set_pixel_clock(22.1184_MHz_XTAL / 22);
m_maincpu->set_pixels_per_clock(1);
m_maincpu->set_scanline_rgb32_callback(FUNC(potgold_state::scanline_update));
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_raw(VIDEO_CLOCK/2, 444, 0, 320, 233, 0, 200);
screen.set_raw(22.1184_MHz_XTAL / 2, 444, 0, 320, 233, 0, 200);
screen.set_screen_update("maincpu", FUNC(tms34010_device::tms340x0_rgb32));
/* sound hardware */
/* YM2413 */
//YM2413(config, "ymsnd", 3.579545_MHz_XTAL);
}
void potgold_state::potgold580(machine_config &config)
{
potgold(config);
//YMF721S(config.replace(), "ymsnd", 33.8688_MHz_XTAL);
M68HC705J1A(config, "mcu", 4_MHz_XTAL);
}
ROM_START( potgoldu )
@ -111,7 +114,7 @@ ROM_START( potgoldu )
ROM_LOAD16_BYTE( "400x.u3", 0x1c0000, 0x20000, BAD_DUMP CRC(c0894db0) SHA1(d68321949250bfe0f14bd5ef8d115ba4b3786b8b) )
ROM_LOAD16_BYTE( "400x.u7", 0x1c0001, 0x20000, BAD_DUMP CRC(0953ecf7) SHA1(91cbe5d9aff171902dc3eb43a308a7a833c8fb71) )
// presumably missing an MCU dump, although nothing was documented for this set
// no MCU for this hardware revision
ROM_END
ROM_START( potgoldu580 ) // TMS34010FNL-40 + MC68H705 + YMF704C + ADV476KP35 RAMDAC + SC28L198A1A UART + EPM7192SQC160-10 CPLD
@ -128,5 +131,5 @@ ROM_START( potgoldu580 ) // TMS34010FNL-40 + MC68H705 + YMF704C + ADV476KP35 RAM
ROM_LOAD( "potgoldu_mc68hc705j1acp.bin", 0x000, 0x800, CRC(4130e596) SHA1(cd7e80a371abd4208a64c537fc84f1525be9203c) ) // 'Ver 1.00a' (assumed to be for this set)
ROM_END
GAME( 200?, potgoldu, 0, potgold, potgold, potgold_state, empty_init, ROT0, "U.S. Games Inc.", "Pot O' Gold (U.S. Games, v400x?)", MACHINE_IS_SKELETON )
GAME( 200?, potgoldu580, potgoldu, potgold, potgold, potgold_state, empty_init, ROT0, "U.S. Games Inc.", "Pot O' Gold (U.S. Games, v580F)", MACHINE_IS_SKELETON )
GAME( 200?, potgoldu, 0, potgold, potgold, potgold_state, empty_init, ROT0, "U.S. Games Inc.", "Pot O' Gold (U.S. Games, v400x?)", MACHINE_IS_SKELETON )
GAME( 200?, potgoldu580, potgoldu, potgold580, potgold, potgold_state, empty_init, ROT0, "U.S. Games Inc.", "Pot O' Gold (U.S. Games, v580F)", MACHINE_IS_SKELETON )