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codata: Add uPD7201 + Am9513 and hook up their interrupts (nw)
am9513: A few more notes (nw)
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@ -6,8 +6,12 @@
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The Am9513 is a five-channel counter/timer circuit introduced by
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AMD around 1980. (It was also sold as the AmZ8073, apparently due
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to a licensing deal with Zilog.) Clock source, edge selection,
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gating and retriggering are programmable for each channel.
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to a licensing deal with Zilog to develop Z8000 peripherals. No
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company is known to have second-sourced the device, however.)
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Clock source, edge selection, gating and retriggering are
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programmable for each channel. There is also a frequency divider
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which can take any of the 15 normal counter inputs and divide it
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by any number between 1 and 16.
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All internal counters are 16 bits wide (except the internal 4-bit
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counter for the FOUT divider, which is not externally accessible).
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@ -13,9 +13,9 @@
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#include "emu.h"
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#include "cpu/m68000/m68000.h"
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#include "machine/terminal.h"
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#define TERMINAL_TAG "terminal"
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#include "bus/rs232/rs232.h"
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#include "machine/am9513.h"
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#include "machine/z80sio.h"
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class codata_state : public driver_device
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{
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@ -23,32 +23,24 @@ public:
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codata_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_p_base(*this, "rambase"),
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m_terminal(*this, TERMINAL_TAG),
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m_maincpu(*this, "maincpu")
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{
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}
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DECLARE_READ16_MEMBER(keyin_r);
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DECLARE_READ16_MEMBER(status_r);
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void kbd_put(u8 data);
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private:
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uint8_t m_term_data;
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virtual void machine_reset() override;
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required_shared_ptr<uint16_t> m_p_base;
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required_device<generic_terminal_device> m_terminal;
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required_device<cpu_device> m_maincpu;
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};
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static ADDRESS_MAP_START(codata_mem, AS_PROGRAM, 16, codata_state)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x000000, 0x0fffff) AM_RAM AM_SHARE("rambase")
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AM_RANGE(0x000000, 0x1fffff) AM_RAM AM_SHARE("rambase")
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AM_RANGE(0x200000, 0x203fff) AM_ROM AM_REGION("user1", 0);
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AM_RANGE(0x400000, 0x403fff) AM_ROM AM_REGION("user1", 0x4000);
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AM_RANGE(0x600000, 0x600001) AM_READ(keyin_r) AM_DEVWRITE8(TERMINAL_TAG, generic_terminal_device, write, 0xff00)
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AM_RANGE(0x600002, 0x600003) AM_READ(status_r)
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//AM_RANGE(0x600000, 0x600003) uPD7201 SIO
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//AM_RANGE(0x800000, 0x800003) AM9513 5 channel timer
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AM_RANGE(0x600000, 0x600007) AM_MIRROR(0x1ffff8) AM_DEVREADWRITE8("uart", upd7201_new_device, ba_cd_r, ba_cd_w, 0xff00)
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AM_RANGE(0x800000, 0x800003) AM_MIRROR(0x1ffffc) AM_DEVREADWRITE("timer", am9513_device, read16, write16)
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AM_RANGE(0xe00000, 0xe00001) AM_MIRROR(0x1ffffe) AM_READ_PORT("INPUT")
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//AM_RANGE(0xa00000, 0xbfffff) page map (rw)
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//AM_RANGE(0xc00000, 0xdfffff) segment map (rw), context register (r)
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//AM_RANGE(0xe00000, 0xffffff) context register (w), 16-bit parallel input port (r)
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@ -56,31 +48,15 @@ ADDRESS_MAP_END
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/* Input ports */
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static INPUT_PORTS_START( codata )
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PORT_START("INPUT")
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PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
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INPUT_PORTS_END
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READ16_MEMBER( codata_state::keyin_r )
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{
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uint16_t ret = m_term_data;
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m_term_data = 0;
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return ret << 8;
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}
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READ16_MEMBER( codata_state::status_r )
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{
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return (m_term_data) ? 0x500 : 0x400;
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}
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void codata_state::kbd_put(u8 data)
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{
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m_term_data = data;
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}
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void codata_state::machine_reset()
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{
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uint8_t* RAM = memregion("user1")->base();
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memcpy(m_p_base, RAM, 16);
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m_term_data = 0;
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m_maincpu->reset();
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}
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@ -89,9 +65,29 @@ static MACHINE_CONFIG_START( codata )
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MCFG_CPU_ADD("maincpu",M68000, XTAL_16MHz / 2)
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MCFG_CPU_PROGRAM_MAP(codata_mem)
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/* video hardware */
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MCFG_DEVICE_ADD(TERMINAL_TAG, GENERIC_TERMINAL, 0)
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MCFG_GENERIC_TERMINAL_KEYBOARD_CB(PUT(codata_state, kbd_put))
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MCFG_DEVICE_ADD("uart", UPD7201_NEW, XTAL_16MHz / 4)
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MCFG_Z80SIO_OUT_TXDA_CB(DEVWRITELINE("rs423a", rs232_port_device, write_txd))
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MCFG_Z80SIO_OUT_DTRA_CB(DEVWRITELINE("rs423a", rs232_port_device, write_dtr))
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MCFG_Z80SIO_OUT_RTSA_CB(DEVWRITELINE("rs423a", rs232_port_device, write_rts))
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MCFG_Z80SIO_OUT_TXDB_CB(DEVWRITELINE("rs423b", rs232_port_device, write_txd))
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MCFG_Z80SIO_OUT_INT_CB(INPUTLINE("maincpu", M68K_IRQ_5))
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MCFG_DEVICE_ADD("timer", AM9513A, 3993600) // actually XTAL_16MHz / 4, which produces 9615 baud when divided
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MCFG_AM9513_OUT1_CALLBACK(NOOP) // Timer 1 = "Abort/Reset" (watchdog)
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MCFG_AM9513_OUT2_CALLBACK(INPUTLINE("maincpu", M68K_IRQ_6)) // Timer 2
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MCFG_AM9513_OUT3_CALLBACK(INPUTLINE("maincpu", M68K_IRQ_7)) // Refresh
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MCFG_AM9513_OUT4_CALLBACK(DEVWRITELINE("uart", upd7201_new_device, rxca_w))
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MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("uart", upd7201_new_device, txca_w))
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MCFG_AM9513_OUT5_CALLBACK(DEVWRITELINE("uart", upd7201_new_device, rxcb_w))
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MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("uart", upd7201_new_device, txcb_w))
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MCFG_RS232_PORT_ADD("rs423a", default_rs232_devices, "terminal")
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MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart", upd7201_new_device, rxa_w))
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MCFG_RS232_DSR_HANDLER(DEVWRITELINE("uart", upd7201_new_device, dcda_w))
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MCFG_RS232_CTS_HANDLER(DEVWRITELINE("uart", upd7201_new_device, ctsa_w))
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MCFG_RS232_PORT_ADD("rs423b", default_rs232_devices, nullptr)
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MCFG_RS232_RXD_HANDLER(DEVWRITELINE("uart", upd7201_new_device, rxb_w))
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MACHINE_CONFIG_END
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/* ROM definition */
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