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cpu/e132xs: Removed workarounds for recompiler backends not clearing upper half of I0-I3 on 32-bit load.

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This commit is contained in:
Vas Crabb 2024-12-30 01:51:48 +11:00
parent cfb1d575c3
commit d9a1cc5dc9
1 changed files with 6 additions and 71 deletions
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77
src/devices/cpu/e132xs/e132xsdrc_ops.hxx
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@ -631,10 +631,6 @@ void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &comp
UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
}
#ifndef PTR64
UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
#endif
if (DST_GLOBAL)
{
UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
@ -650,10 +646,6 @@ void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &comp
UML_LOAD(block, I2, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
}
#ifndef PTR64
UML_DAND(block, I2, I2, 0x00000000ffffffffULL);
#endif
UML_DSHL(block, I1, I1, 32);
UML_DOR(block, I1, I1, I2);
@ -879,7 +871,6 @@ void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compil
#ifndef PTR64
UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
UML_DAND(block, I2, I2, 0x00000000ffffffffULL);
#endif
UML_DADD(block, I5, I1, I2);
@ -974,7 +965,6 @@ void hyperstone_device::generate_cmp(drcuml_block &block, compiler_state &compil
#ifndef PTR64
UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
#endif
UML_DSUB(block, I2, I1, I0); // tmp
@ -1115,7 +1105,7 @@ void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compil
if (SRC_GLOBAL)
{
if (src_code == SR_REGISTER)
UML_AND(block, I0, DRC_SR, 1);
UML_AND(block, I0, DRC_SR, C_MASK);
else
UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
}
@ -1253,9 +1243,6 @@ void hyperstone_device::generate_subc(drcuml_block &block, compiler_state &compi
if (src_code != SR_REGISTER)
{
UML_LOAD(block, I2, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
#ifndef PTR64
UML_DAND(block, I2, I2, 0x00000000ffffffffULL);
#endif
UML_DADD(block, I0, I2, I0);
}
}
@ -1264,9 +1251,6 @@ void hyperstone_device::generate_subc(drcuml_block &block, compiler_state &compi
UML_ADD(block, I2, I3, src_code);
UML_AND(block, I2, I2, 0x3f);
UML_LOAD(block, I2, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
#ifndef PTR64
UML_DAND(block, I2, I2, 0x00000000ffffffffULL);
#endif
UML_DADD(block, I0, I2, I0);
}
@ -1281,10 +1265,6 @@ void hyperstone_device::generate_subc(drcuml_block &block, compiler_state &compi
UML_LOAD(block, I1, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
}
#ifndef PTR64
UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
#endif
UML_AND(block, I6, DRC_SR, Z_MASK);
UML_AND(block, I5, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK));
@ -1344,7 +1324,7 @@ void hyperstone_device::generate_sub(drcuml_block &block, compiler_state &compil
if (SRC_GLOBAL)
{
if (src_code == SR_REGISTER)
UML_AND(block, I0, DRC_SR, 1);
UML_AND(block, I0, DRC_SR, C_MASK);
else
UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
}
@ -1368,7 +1348,6 @@ void hyperstone_device::generate_sub(drcuml_block &block, compiler_state &compil
#ifndef PTR64
UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
#endif
UML_DSUB(block, I2, I1, I0);
@ -1436,7 +1415,7 @@ void hyperstone_device::generate_subs(drcuml_block &block, compiler_state &compi
if (SRC_GLOBAL)
{
if (src_code == SR_REGISTER)
UML_AND(block, I0, DRC_SR, 1);
UML_AND(block, I0, DRC_SR, C_MASK);
else
UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
}
@ -1526,14 +1505,13 @@ void hyperstone_device::generate_addc(drcuml_block &block, compiler_state &compi
{
if (src_code == SR_REGISTER)
{
UML_AND(block, I0, DRC_SR, 1);
UML_AND(block, I0, DRC_SR, C_MASK);
}
else
{
UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
UML_AND(block, I1, DRC_SR, 1);
UML_AND(block, I1, DRC_SR, C_MASK);
#ifndef PTR64
UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
#endif
UML_DADD(block, I0, I0, I1);
@ -1544,9 +1522,8 @@ void hyperstone_device::generate_addc(drcuml_block &block, compiler_state &compi
UML_ADD(block, I1, I3, src_code);
UML_AND(block, I1, I1, 0x3f);
UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
UML_AND(block, I1, DRC_SR, 1);
UML_AND(block, I1, DRC_SR, C_MASK);
#ifndef PTR64
UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
#endif
UML_DADD(block, I0, I0, I1);
@ -1563,10 +1540,6 @@ void hyperstone_device::generate_addc(drcuml_block &block, compiler_state &compi
UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
}
#ifndef PTR64
UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
#endif
UML_DADD(block, I2, I0, I1);
UML_XOR(block, I4, I0, I2);
@ -1633,10 +1606,6 @@ void hyperstone_device::generate_neg(drcuml_block &block, compiler_state &compil
UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
}
#ifndef PTR64
UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
#endif
UML_DSUB(block, I4, 0, I0);
UML_SUB(block, I2, 0, I0);
@ -2020,11 +1989,6 @@ void hyperstone_device::generate_cmpi(drcuml_block &block, compiler_state &compi
UML_AND(block, DRC_SR, DRC_SR, ~(V_MASK | Z_MASK | N_MASK | C_MASK));
#ifndef PTR64
UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
UML_DAND(block, I2, I2, 0x00000000ffffffffULL);
#endif
UML_DSUB(block, I0, I2, I1);
int no_v;
@ -2163,11 +2127,6 @@ void hyperstone_device::generate_addi(drcuml_block &block, compiler_state &compi
UML_AND(block, I1, DRC_SR, I3);
}
#ifndef PTR64
UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
#endif
UML_DADD(block, I3, I0, I1);
UML_DROLAND(block, I6, I3, 32, C_MASK);
@ -2508,10 +2467,6 @@ void hyperstone_device::generate_shrdi(drcuml_block &block, compiler_state &comp
UML_AND(block, I6, I2, 0x3f);
UML_LOAD(block, I2, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4); // I1 = sregf
#ifndef PTR64
UML_DAND(block, I2, I2, 0x00000000ffffffff);
#endif
UML_DSHL(block, I0, I0, 32);
UML_DOR(block, I2, I2, I0);
@ -2568,10 +2523,6 @@ void hyperstone_device::generate_shrd(drcuml_block &block, compiler_state &compi
UML_AND(block, I5, I2, 0x3f);
UML_LOAD(block, I1, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
#ifndef PTR64
UML_DAND(block, I1, I1, 0x00000000ffffffff);
#endif
UML_DSHL(block, I2, I0, 32);
UML_DOR(block, I0, I1, I2);
@ -2728,10 +2679,6 @@ void hyperstone_device::generate_sardi(drcuml_block &block, compiler_state &comp
UML_AND(block, I5, I2, 0x3f);
UML_LOAD(block, I1, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
#ifndef PTR64
UML_DAND(block, I1, I1, 0x00000000ffffffff);
#endif
UML_DSHL(block, I2, I0, 32);
UML_DOR(block, I0, I1, I2);
@ -2788,10 +2735,6 @@ void hyperstone_device::generate_sard(drcuml_block &block, compiler_state &compi
UML_AND(block, I5, I2, 0x3f);
UML_LOAD(block, I1, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
#ifndef PTR64
UML_DAND(block, I1, I1, 0x00000000ffffffff);
#endif
UML_DSHL(block, I2, I0, 32);
UML_DOR(block, I0, I1, I2);
@ -2946,10 +2889,6 @@ void hyperstone_device::generate_shldi(drcuml_block &block, compiler_state &comp
UML_AND(block, I3, I3, 0x3f); // I3: dstf_code
UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4); // I1: low_order
#ifndef PTR64
UML_DAND(block, I1, I1, 0x00000000ffffffff);
#endif
UML_DSHL(block, I0, I6, 32);
UML_DOR(block, I0, I0, I1); // I0: val, I1 free after this point
@ -3020,10 +2959,6 @@ void hyperstone_device::generate_shld(drcuml_block &block, compiler_state &compi
UML_AND(block, I3, I3, 0x3f); // I3: dstf_code
UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4); // I1: low_order
#ifndef PTR64
UML_DAND(block, I1, I1, 0x00000000ffffffff);
#endif
UML_DSHL(block, I0, I6, 32);
UML_DOR(block, I0, I0, I1); // I0: val, I1 free after this point