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https://github.com/holub/mame
synced 2025-07-02 00:29:37 +03:00
Refactored FIFO:s using new template based fifo class
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@ -37,15 +37,17 @@
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// MACROS / CONSTANTS
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// MACROS / CONSTANTS
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//**************************************************************************
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//**************************************************************************
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#define VERBOSE 0
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#define VERBOSE 2
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#define LOGPRINT(x) do { if (VERBOSE) logerror x; } while (0)
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#define LOG(x) {} LOGPRINT(x)
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#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
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#if VERBOSE == 2
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#define logerror printf
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#endif
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#define CHANA_TAG "cha"
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#define CHANA_TAG "cha"
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#define CHANB_TAG "chb"
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#define CHANB_TAG "chb"
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//**************************************************************************
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//**************************************************************************
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// DEVICE DEFINITIONS
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// DEVICE DEFINITIONS
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//**************************************************************************
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//**************************************************************************
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@ -503,7 +505,7 @@ z80dart_channel::z80dart_channel(const machine_config &mconfig, const char *tag,
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: device_t(mconfig, Z80DART_CHANNEL, "Z80 DART channel", tag, owner, clock, "z80dart_channel", __FILE__),
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: device_t(mconfig, Z80DART_CHANNEL, "Z80 DART channel", tag, owner, clock, "z80dart_channel", __FILE__),
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device_serial_interface(mconfig, *this),
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device_serial_interface(mconfig, *this),
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m_rx_error(0),
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m_rx_error(0),
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m_rx_fifo(-1),
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// m_rx_fifo(-1),
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m_rx_clock(0),
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m_rx_clock(0),
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m_rx_first(0),
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m_rx_first(0),
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m_rx_break(0),
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m_rx_break(0),
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@ -523,12 +525,13 @@ z80dart_channel::z80dart_channel(const machine_config &mconfig, const char *tag,
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for (auto & elem : m_wr)
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for (auto & elem : m_wr)
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elem = 0;
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elem = 0;
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#if 0
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for (int i = 0; i < 3; i++)
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for (int i = 0; i < 3; i++)
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{
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{
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m_rx_data_fifo[i] = 0;
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m_rx_data_fifo[i] = 0;
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m_rx_error_fifo[i] = 0;
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m_rx_error_fifo[i] = 0;
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}
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}
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#endif
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}
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}
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@ -544,10 +547,15 @@ void z80dart_channel::device_start()
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// state saving
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// state saving
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save_item(NAME(m_rr));
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save_item(NAME(m_rr));
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save_item(NAME(m_wr));
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save_item(NAME(m_wr));
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#if 0
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save_item(NAME(m_rx_data_fifo));
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save_item(NAME(m_rx_data_fifo));
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save_item(NAME(m_rx_error_fifo));
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save_item(NAME(m_rx_error_fifo));
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save_item(NAME(m_rx_error));
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save_item(NAME(m_rx_fifo));
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save_item(NAME(m_rx_fifo));
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save_item(NAME(m_rx_error));
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#else
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// save_item(NAME(m_rx_data_fifot));
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// save_item(NAME(m_rx_error_fifot));
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#endif
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save_item(NAME(m_rx_clock));
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save_item(NAME(m_rx_clock));
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save_item(NAME(m_rx_first));
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save_item(NAME(m_rx_first));
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save_item(NAME(m_rx_break));
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save_item(NAME(m_rx_break));
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@ -1001,18 +1009,22 @@ uint8_t z80dart_channel::data_read()
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{
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{
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uint8_t data = 0;
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uint8_t data = 0;
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if (m_rx_fifo >= 0)
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// if (m_rx_fifo >= 0)
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if (!m_rx_data_fifot.empty())
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{
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{
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// load data from the FIFO
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// load data from the FIFO
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data = m_rx_data_fifo[m_rx_fifo];
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// data = m_rx_data_fifo[m_rx_fifo];
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data = m_rx_data_fifot.dequeue();
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// load error status from the FIFO
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// load error status from the FIFO
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m_rr[1] = (m_rr[1] & ~(RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR)) | m_rx_error_fifo[m_rx_fifo];
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// m_rr[1] = (m_rr[1] & ~(RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR)) | m_rx_error_fifo[m_rx_fifo];
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m_rr[1] = (m_rr[1] & ~(RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR)) | m_rx_error_fifot.dequeue();
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// decrease FIFO pointer
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// decrease FIFO pointer
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m_rx_fifo--;
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// m_rx_fifo--;
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if (m_rx_fifo < 0)
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// if (m_rx_fifo < 0)
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if (m_rx_data_fifot.empty())
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{
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{
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// no more characters available in the FIFO
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// no more characters available in the FIFO
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m_rr[0] &= ~ RR0_RX_CHAR_AVAILABLE;
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m_rr[0] &= ~ RR0_RX_CHAR_AVAILABLE;
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@ -1064,7 +1076,8 @@ void z80dart_channel::receive_data(uint8_t data)
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{
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{
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LOG(("Z80DART \"%s\" Channel %c : Receive Data Byte '%02x'\n", m_owner->tag(), 'A' + m_index, data));
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LOG(("Z80DART \"%s\" Channel %c : Receive Data Byte '%02x'\n", m_owner->tag(), 'A' + m_index, data));
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if (m_rx_fifo == 2)
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// if (m_rx_fifo == 2)
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if (m_rx_data_fifot.full())
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{
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{
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// receive overrun error detected
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// receive overrun error detected
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m_rx_error |= RR1_RX_OVERRUN_ERROR;
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m_rx_error |= RR1_RX_OVERRUN_ERROR;
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@ -1083,15 +1096,19 @@ void z80dart_channel::receive_data(uint8_t data)
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m_uart->trigger_interrupt(m_index, INT_SPECIAL);
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m_uart->trigger_interrupt(m_index, INT_SPECIAL);
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break;
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break;
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}
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}
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m_rx_data_fifot.poke(data);
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m_rx_error_fifot.poke(m_rx_error);
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}
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}
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else
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else
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{
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{
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m_rx_fifo++;
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// m_rx_fifo++;
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m_rx_data_fifot.enqueue(data);
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m_rx_error_fifot.enqueue(m_rx_error);
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}
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}
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// store received character and error status into FIFO
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// store received character and error status into FIFO
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m_rx_data_fifo[m_rx_fifo] = data;
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// m_rx_data_fifo[m_rx_fifo] = data;
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m_rx_error_fifo[m_rx_fifo] = m_rx_error;
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// m_rx_error_fifo[m_rx_fifo] = m_rx_error;
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m_rr[0] |= RR0_RX_CHAR_AVAILABLE;
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m_rr[0] |= RR0_RX_CHAR_AVAILABLE;
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@ -241,6 +241,61 @@
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// ======================> z80dart_channel
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// ======================> z80dart_channel
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template <typename T, int N>
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class fifo
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{
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T m_arr[N];
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int m_wp;
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int m_rp;
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bool m_empty;
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public:
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fifo()
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: m_arr()
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, m_wp(0)
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, m_rp(0)
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, m_empty(true)
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{
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static_assert(0U < N, "FIFO must have at least one element");
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}
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bool full() const { return !m_empty && (m_wp == m_rp); }
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bool empty() const { return m_empty; }
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void enqueue(T v)
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{
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if (m_empty || (m_wp != m_rp))
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{
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m_arr[m_wp] = v;
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if (++m_wp == N)
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m_wp = 0;
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m_empty = false;
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}
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}
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T dequeue()
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{
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T result = -1;
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if (!m_empty)
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{
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result = m_arr[m_rp];
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if (++m_rp == N)
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m_rp = 0;
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m_empty = (m_rp == m_wp);
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}
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return result;
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}
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T const peek() const
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{
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return m_arr[m_rp];
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}
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void poke(T v)
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{
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m_arr[m_wp] = v;
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}
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};
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class z80dart_device;
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class z80dart_device;
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class z80dart_channel : public device_t,
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class z80dart_channel : public device_t,
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@ -428,11 +483,15 @@ protected:
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int get_tx_word_length();
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int get_tx_word_length();
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// receiver state
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// receiver state
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//#if 0
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uint8_t m_rx_data_fifo[3]; // receive data FIFO
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uint8_t m_rx_data_fifo[3]; // receive data FIFO
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uint8_t m_rx_error_fifo[3]; // receive error FIFO
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uint8_t m_rx_error_fifo[3]; // receive error FIFO
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uint8_t m_rx_error; // current receive error
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int m_rx_fifo; // receive FIFO pointer
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int m_rx_fifo; // receive FIFO pointer
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//#else
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fifo<uint8_t, 3> m_rx_data_fifot;
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fifo<uint8_t, 3> m_rx_error_fifot;
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//#endif
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uint8_t m_rx_error; // current receive error
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int m_rx_clock; // receive clock pulse count
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int m_rx_clock; // receive clock pulse count
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int m_rx_first; // first character received
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int m_rx_first; // first character received
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int m_rx_break; // receive break condition
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int m_rx_break; // receive break condition
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