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Fixed breakpoints in the TMS9900 CPU core [Olivier Galibert]
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@ -1495,35 +1495,7 @@ static CPU_EXECUTE( tms99xx )
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}
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}
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if ((device->machine->debug_flags & DEBUG_FLAG_CALL_HOOK) != 0)
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{
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#if 0 /* Trace */
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logerror("> PC %4.4x :%4.4x %4.4x : R=%4.4x %4.4x %4.4x %4.4x %4.4x %4.4x %4.4x %4.4x %4.4x %4.4x%4.4x %4.4x %4.4x %4.4x %4.4x %4.4x :T=%d\n",cpustate->PC,cpustate->STATUS,cpustate->WP,cpustate->FR[0],cpustate->FR[1],cpustate->FR[2],cpustate->FR[3],cpustate->FR[4],cpustate->FR[5],cpustate->FR[6],cpustate->FR[7],cpustate->FR[8],cpustate->FR[9],cpustate->FR[10],cpustate->FR[11],cpustate->FR[12],cpustate->FR[13],cpustate->FR[14],cpustate->FR[15],cpustate->icount);
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#if 0 /* useful with TI99/4a driver */
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#ifdef MESS
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if (cpustate->PC == 0x0078)
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{
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extern struct
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{
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/* pointer to GROM data */
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UINT8 *data_ptr;
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/* current address pointer for the active GROM in port (16 bits) */
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unsigned int addr;
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/* GROM data buffer */
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UINT8 buf;
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/* internal flip-flops that are set after the first access to the GROM
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address so that next access is mapped to the LSB, and cleared after each
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data access */
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char raddr_LSB, waddr_LSB;
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} console_GROMs;
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logerror("> GPL pointer %4.4X\n", console_GROMs.addr);
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}
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#endif
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#endif
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#endif
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debugger_instruction_hook(device, cpustate->IR);
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}
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debugger_instruction_hook(device, cpustate->PC);
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if (cpustate->IDLE)
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{ /* IDLE instruction has halted execution */
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