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New 74LS259/9334/CD4099 devices

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These humble 16-pin logic devices were commonly used in 8-bit arcade games to control coin counters/lockouts, IRQ flipflops, graphics banking, slave CPU reset lines, discrete audio triggers, screen flipping, serial EEPROMs and much else. Over 100 drivers and a few bus devices have been updated to use the new implementation, and a great deal of research has gone into documenting the physical location of these devices on actual PCBs in the source. Write handlers have been provided for both orthodox and somewhat less conventional memory mappings.

Incidental to this update, coin counters and/or lockouts have been added to Atari System 1 games, Basketball, Gauntlet, Gyruss, Hana Yayoi, Hole Land, Jr. Pac-Man, Mahjong Sisters, Pooyan, Roc'n Rope, Squash, Thunder Hoop, Time Limit, Time Pilot '84 and many others. This also cleans up coin counter behavior in Sauro and Rally Bike.

(nw) The purpose of committing this change, which has been several months in the making, early in the 0.189GIT cycle will be to allow time for fixing potential regressions; I've fixed a number of drivers that lost sound from this for various reasons (hnayayoi.cpp having missing or garbage ADPCM was particularly painful, since the three games in that driver all work slightly differently), but I can't test all affected drivers exhaustively. @Tafoid, don't bother running automated screen capture comparison tests on this, as many drivers are now expected to have the screen flipped for the first few seconds after reset.
This commit is contained in:
AJR 2017-03-03 20:25:46 -05:00 committed by Vas Crabb
parent 9488a7703a
commit dab683e78f
294 changed files with 6343 additions and 5401 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
scripts/src/machine.lua
View File

@ -427,6 +427,18 @@ if (MACHINES["TTL74181"]~=null) then
}
end
---------------------------------------------------
--
--@src/devices/machine/74259.h,MACHINES["TTL74259"] = true
---------------------------------------------------
if (MACHINES["TTL74259"]~=null) then
files {
MAME_DIR .. "src/devices/machine/74259.cpp",
MAME_DIR .. "src/devices/machine/74259.h",
}
end
---------------------------------------------------
--
--@src/devices/machine/7474.h,MACHINES["TTL7474"] = true
@ -766,20 +778,6 @@ if (MACHINES["CXD1095"]~=null) then
}
end
---------------------------------------------------
--
--@src/devices/machine/dm9334.h,MACHINES["DM9334"] = true
---------------------------------------------------
if (MACHINES["DM9334"]~=null) then
files {
MAME_DIR .. "src/devices/machine/dm9334.cpp",
MAME_DIR .. "src/devices/machine/dm9334.h",
}
end
---------------------------------------------------
--
--@src/devices/machine/ds1204.h,MACHINES["DS1204"] = true
---------------------------------------------------

2
scripts/target/mame/arcade.lua
View File

@ -375,6 +375,7 @@ MACHINES["TTL74157"] = true
MACHINES["TTL74166"] = true
--MACHINES["TTL74175"] = true
MACHINES["TTL74181"] = true
MACHINES["TTL74259"] = true
MACHINES["TTL7474"] = true
MACHINES["KBDC8042"] = true
MACHINES["I8257"] = true
@ -406,7 +407,6 @@ MACHINES["CR589"] = true
--MACHINES["CS4031"] = true
--MACHINES["CS8221"] = true
MACHINES["CXD1095"] = true
--MACHINES["DM9334"] = true
MACHINES["DP8390"] = true
MACHINES["DS1204"] = true
MACHINES["DS1205"] = true

2
scripts/target/mame/mess.lua
View File

@ -397,7 +397,6 @@ MACHINES["CR589"] = true
MACHINES["CS4031"] = true
MACHINES["CS8221"] = true
MACHINES["CXD1095"] = true
MACHINES["DM9334"] = true
MACHINES["DP8390"] = true
--MACHINES["DS1204"] = true
MACHINES["DS1302"] = true
@ -561,6 +560,7 @@ MACHINES["TTL74161"] = true
MACHINES["TTL74164"] = true
MACHINES["TTL74175"] = true
MACHINES["TTL74181"] = true
MACHINES["TTL74259"] = true
MACHINES["TTL7474"] = true
MACHINES["UPD1990A"] = true
--MACHINES["UPD4992"] = true

1
scripts/target/mame/tiny.lua
View File

@ -57,6 +57,7 @@ MACHINES["6821PIA"] = true
MACHINES["TTL74148"] = true
MACHINES["TTL74153"] = true
MACHINES["TTL7474"] = true
MACHINES["TTL74259"] = true
MACHINES["RIOT6532"] = true
MACHINES["PIT8253"] = true
MACHINES["Z80CTC"] = true

25
src/devices/bus/ti99/peb/pcode.cpp
View File

@ -103,6 +103,7 @@ ti_pcode_card_device::ti_pcode_card_device(const machine_config &mconfig, const
device_t(mconfig, TI99_P_CODE, tag, owner, clock),
device_ti99_peribox_card_interface(mconfig, *this),
m_rom(nullptr),
m_crulatch(*this, "crulatch"),
m_bank_select(0),
m_active(false),
m_clock_count(0),
@ -254,18 +255,18 @@ READ8Z_MEMBER(ti_pcode_card_device::crureadz)
WRITE8_MEMBER(ti_pcode_card_device::cruwrite)
{
if ((offset & 0xff00)==CRU_BASE)
{
int addr = offset & 0x00ff;
m_crulatch->write_bit((offset & 0x80) >> 5 | (offset & 0x06) >> 1, data);
}
if (addr==0)
m_selected = (data != 0);
WRITE_LINE_MEMBER(ti_pcode_card_device::pcpage_w)
{
m_selected = state;
}
if (addr==0x80) // Bit 4 is on address line 8
{
m_bank_select = (data+1); // we're calling this bank 1 and bank 2
if (TRACE_CRU) logerror("Select rom bank %d\n", m_bank_select);
}
}
WRITE_LINE_MEMBER(ti_pcode_card_device::ekrpg_w)
{
m_bank_select = state ? 2 : 1; // we're calling this bank 1 and bank 2
if (TRACE_CRU) logerror("Select rom bank %d\n", m_bank_select);
}
void ti_pcode_card_device::device_start()
@ -361,6 +362,10 @@ MACHINE_CONFIG_MEMBER( ti_pcode_card_device::device_add_mconfig )
MCFG_GROM_ADD( PGROM5_TAG, 5, PCODE_GROM_TAG, 0xa000, WRITELINE(ti_pcode_card_device, ready_line))
MCFG_GROM_ADD( PGROM6_TAG, 6, PCODE_GROM_TAG, 0xc000, WRITELINE(ti_pcode_card_device, ready_line))
MCFG_GROM_ADD( PGROM7_TAG, 7, PCODE_GROM_TAG, 0xe000, WRITELINE(ti_pcode_card_device, ready_line))
MCFG_DEVICE_ADD("crulatch", LS259, 0) // U12
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(ti_pcode_card_device, pcpage_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(ti_pcode_card_device, ekrpg_w))
MACHINE_CONFIG_END
const tiny_rom_entry *ti_pcode_card_device::device_rom_region() const

7
src/devices/bus/ti99/peb/pcode.h
View File

@ -18,6 +18,7 @@
#pragma once
#include "peribox.h"
#include "machine/74259.h"
#include "machine/tmc0430.h"
namespace bus { namespace ti99 { namespace peb {
@ -45,11 +46,15 @@ protected:
virtual ioport_constructor device_input_ports() const override;
private:
DECLARE_WRITE_LINE_MEMBER( ready_line );
DECLARE_WRITE_LINE_MEMBER(ready_line);
DECLARE_WRITE_LINE_MEMBER(pcpage_w);
DECLARE_WRITE_LINE_MEMBER(ekrpg_w);
void debugger_read(address_space& space, uint16_t addr, uint8_t& value);
tmc0430_device* m_grom[8];
uint8_t* m_rom;
required_device<ls259_device> m_crulatch;
int m_bank_select;
bool m_active;
int m_clock_count;

116
src/devices/bus/ti99/peb/ti_fdc.cpp
View File

@ -57,7 +57,7 @@ ti_fdc_device::ti_fdc_device(const machine_config &mconfig, const char *tag, dev
m_address(0),
m_DRQ(0),
m_IRQ(0),
m_lastval(0),
m_crulatch(*this, "crulatch"),
m_DVENA(0),
m_inDsrArea(false),
m_WAITena(false),
@ -246,67 +246,57 @@ READ8Z_MEMBER(ti_fdc_device::crureadz)
WRITE8_MEMBER(ti_fdc_device::cruwrite)
{
if ((offset & 0xff00)==m_cru_base)
{
int bit = (offset >> 1) & 0x07;
switch (bit)
{
case 0:
// (De)select the card. Indicated by a LED on the board.
m_selected = (data!=0);
if (TRACE_CRU) logerror("tifdc: Map DSR (bit 0) = %d\n", m_selected);
break;
m_crulatch->write_bit((offset >> 1) & 0x07, BIT(data, 0));
}
case 1:
// Activate motor
if (data==1 && m_lastval==0)
{ // On rising edge, set motor_running for 4.23s
if (TRACE_CRU) logerror("tifdc: trigger motor (bit 1)\n");
set_floppy_motors_running(true);
}
m_lastval = data;
break;
WRITE_LINE_MEMBER(ti_fdc_device::dskpgena_w)
{
// (De)select the card. Indicated by a LED on the board.
m_selected = state;
if (TRACE_CRU) logerror("tifdc: Map DSR (bit 0) = %d\n", m_selected);
}
case 2:
// Set disk ready/hold (bit 2)
// 0: ignore IRQ and DRQ
// 1: TMS9900 is stopped until IRQ or DRQ are set
// OR the motor stops rotating - rotates for 4.23s after write
// to CRU bit 1
m_WAITena = (data != 0);
if (TRACE_CRU) logerror("tifdc: arm wait state logic (bit 2) = %d\n", data);
break;
case 3:
// Load disk heads (HLT pin) (bit 3). Not implemented.
if (TRACE_CRU) logerror("tifdc: set head load (bit 3) = %d\n", data);
break;
case 4:
m_DSEL = (data != 0)? (m_DSEL | 0x01) : (m_DSEL & 0xfe);
set_drive();
break;
case 5:
m_DSEL = (data != 0)? (m_DSEL | 0x02) : (m_DSEL & 0xfd);
set_drive();
break;
case 6:
m_DSEL = (data != 0)? (m_DSEL | 0x04) : (m_DSEL & 0xfb);
set_drive();
break;
case 7:
// Select side of disk (bit 7)
m_SIDSEL = (data==1)? ASSERT_LINE : CLEAR_LINE;
if (TRACE_CRU) logerror("tifdc: set side (bit 7) = %d\n", data);
if (m_current != NONE) m_floppy[m_current]->ss_w(data);
break;
default:
break;
}
WRITE_LINE_MEMBER(ti_fdc_device::kaclk_w)
{
// Activate motor
if (state)
{ // On rising edge, set motor_running for 4.23s
if (TRACE_CRU) logerror("tifdc: trigger motor (bit 1)\n");
set_floppy_motors_running(true);
}
}
WRITE_LINE_MEMBER(ti_fdc_device::waiten_w)
{
// Set disk ready/hold (bit 2)
// 0: ignore IRQ and DRQ
// 1: TMS9900 is stopped until IRQ or DRQ are set
// OR the motor stops rotating - rotates for 4.23s after write
// to CRU bit 1
m_WAITena = state;
if (TRACE_CRU) logerror("tifdc: arm wait state logic (bit 2) = %d\n", state);
}
WRITE_LINE_MEMBER(ti_fdc_device::hlt_w)
{
// Load disk heads (HLT pin) (bit 3). Not implemented.
if (TRACE_CRU) logerror("tifdc: set head load (bit 3) = %d\n", state);
}
WRITE_LINE_MEMBER(ti_fdc_device::dsel_w)
{
m_DSEL = m_crulatch->q4_r() | (m_crulatch->q5_r() << 1) | (m_crulatch->q6_r() << 2);
set_drive();
}
WRITE_LINE_MEMBER(ti_fdc_device::sidsel_w)
{
// Select side of disk (bit 7)
m_SIDSEL = state ? ASSERT_LINE : CLEAR_LINE;
if (TRACE_CRU) logerror("tifdc: set side (bit 7) = %d\n", state);
if (m_current != NONE) m_floppy[m_current]->ss_w(state);
}
void ti_fdc_device::set_drive()
{
switch (m_DSEL)
@ -390,7 +380,6 @@ void ti_fdc_device::device_start()
save_item(NAME(m_address));
save_item(NAME(m_DRQ));
save_item(NAME(m_IRQ));
save_item(NAME(m_lastval));
save_item(NAME(m_DVENA));
save_item(NAME(m_inDsrArea));
save_item(NAME(m_WAITena));
@ -403,7 +392,6 @@ void ti_fdc_device::device_start()
void ti_fdc_device::device_reset()
{
logerror("tifdc: TI FDC reset\n");
m_lastval = 0;
if (m_genmod)
{
m_select_mask = 0x1fe000;
@ -471,6 +459,16 @@ MACHINE_CONFIG_MEMBER( ti_fdc_device::device_add_mconfig )
MCFG_FLOPPY_DRIVE_SOUND(true)
MCFG_FLOPPY_DRIVE_ADD("2", tifdc_floppies, nullptr, ti_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_SOUND(true)
MCFG_DEVICE_ADD("crulatch", LS259, 0) // U23
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(ti_fdc_device, dskpgena_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(ti_fdc_device, kaclk_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(ti_fdc_device, waiten_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(ti_fdc_device, hlt_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(ti_fdc_device, dsel_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(ti_fdc_device, dsel_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(ti_fdc_device, dsel_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(ti_fdc_device, sidsel_w))
MACHINE_CONFIG_END
const tiny_rom_entry *ti_fdc_device::device_rom_region() const

16
src/devices/bus/ti99/peb/ti_fdc.h
View File

@ -17,6 +17,7 @@
#pragma once
#include "peribox.h"
#include "machine/74259.h"
#include "machine/wd_fdc.h"
#include "imagedev/floppy.h"
@ -48,8 +49,15 @@ protected:
private:
DECLARE_FLOPPY_FORMATS( floppy_formats );
DECLARE_WRITE_LINE_MEMBER( fdc_irq_w );
DECLARE_WRITE_LINE_MEMBER( fdc_drq_w );
DECLARE_WRITE_LINE_MEMBER(fdc_irq_w);
DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
DECLARE_WRITE_LINE_MEMBER(dskpgena_w);
DECLARE_WRITE_LINE_MEMBER(kaclk_w);
DECLARE_WRITE_LINE_MEMBER(waiten_w);
DECLARE_WRITE_LINE_MEMBER(hlt_w);
DECLARE_WRITE_LINE_MEMBER(dsel_w);
DECLARE_WRITE_LINE_MEMBER(sidsel_w);
// For debugger access
void debug_read(offs_t offset, uint8_t* value);
@ -69,8 +77,8 @@ private:
// Holds the status of the DRQ and IRQ lines.
int m_DRQ, m_IRQ;
// Needed for triggering the motor monoflop
uint8_t m_lastval;
// Latched CRU outputs
required_device<ls259_device> m_crulatch;
// Signal DVENA. When true, makes some drive turning.
int m_DVENA;

170
src/devices/bus/ti99/peb/ti_rs232.cpp
View File

@ -131,6 +131,7 @@ namespace bus { namespace ti99 { namespace peb {
ti_rs232_pio_device::ti_rs232_pio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, TI99_RS232, tag, owner, clock),
device_ti99_peribox_card_interface(mconfig, *this),
m_crulatch(*this, "crulatch"),
m_piodev(nullptr),
m_dsrrom(nullptr),
m_pio_direction_in(false),
@ -327,88 +328,91 @@ WRITE8_MEMBER(ti_rs232_pio_device::cruwrite)
return;
}
device_image_interface *image = dynamic_cast<device_image_interface *>(m_piodev);
int bit = (offset & 0x00ff)>>1;
switch (bit)
{
case 0:
m_selected = (data!=0);
break;
case 1:
m_pio_direction_in = (data!=0);
break;
case 2:
if ((data!=0) != m_pio_handshakeout)
{
m_pio_handshakeout = (data!=0);
if (m_pio_write && m_pio_writable && (!m_pio_direction_in))
{ /* PIO in output mode */
if (!m_pio_handshakeout)
{ /* write data strobe */
/* write data and acknowledge */
uint8_t buf = m_pio_out_buffer;
int ret = image->fwrite(&buf, 1);
if (ret)
m_pio_handshakein = 1;
}
else
{
/* end strobe */
/* we can write some data: set receiver ready */
m_pio_handshakein = 0;
}
}
if ((!m_pio_write) && m_pio_readable /*&& pio_direction_in*/)
{ /* PIO in input mode */
if (!m_pio_handshakeout)
{ /* receiver ready */
/* send data and strobe */
uint8_t buf;
if (image->fread(&buf, 1))
m_pio_in_buffer = buf;
m_pio_handshakein = 0;
}
else
{
/* data acknowledge */
/* we can send some data: set transmitter ready */
m_pio_handshakein = 1;
}
}
}
break;
case 3:
m_pio_spareout = (data!=0);
break;
case 4:
m_flag0 = (data!=0);
break;
case 5:
// Set the CTS line for RS232/1
if (TRACE_LINES) logerror("(1/3) Setting CTS* via CRU to %d\n", data);
output_line_state(0, tms9902_device::CTS, (data==0)? tms9902_device::CTS : 0);
break;
case 6:
// Set the CTS line for RS232/2
if (TRACE_LINES) logerror("(2/4) Setting CTS* via CRU to %d\n", data);
output_line_state(1, tms9902_device::CTS, (data==0)? tms9902_device::CTS : 0);
break;
case 7:
m_led = (data!=0);
break;
}
return;
m_crulatch->write_bit(bit, data);
}
}
WRITE_LINE_MEMBER(ti_rs232_pio_device::selected_w)
{
m_selected = state;
}
WRITE_LINE_MEMBER(ti_rs232_pio_device::pio_direction_in_w)
{
m_pio_direction_in = state;
}
WRITE_LINE_MEMBER(ti_rs232_pio_device::pio_handshake_out_w)
{
device_image_interface *image = dynamic_cast<device_image_interface *>(m_piodev);
m_pio_handshakeout = state;
if (m_pio_write && m_pio_writable && (!m_pio_direction_in))
{ /* PIO in output mode */
if (!m_pio_handshakeout)
{ /* write data strobe */
/* write data and acknowledge */
uint8_t buf = m_pio_out_buffer;
int ret = image->fwrite(&buf, 1);
if (ret)
m_pio_handshakein = 1;
}
else
{
/* end strobe */
/* we can write some data: set receiver ready */
m_pio_handshakein = 0;
}
}
if ((!m_pio_write) && m_pio_readable /*&& pio_direction_in*/)
{ /* PIO in input mode */
if (!m_pio_handshakeout)
{ /* receiver ready */
/* send data and strobe */
uint8_t buf;
if (image->fread(&buf, 1))
m_pio_in_buffer = buf;
m_pio_handshakein = 0;
}
else
{
/* data acknowledge */
/* we can send some data: set transmitter ready */
m_pio_handshakein = 1;
}
}
}
WRITE_LINE_MEMBER(ti_rs232_pio_device::pio_spareout_w)
{
m_pio_spareout = state;
}
WRITE_LINE_MEMBER(ti_rs232_pio_device::flag0_w)
{
m_flag0 = state;
}
WRITE_LINE_MEMBER(ti_rs232_pio_device::cts0_w)
{
// Set the CTS line for RS232/1
if (TRACE_LINES) logerror("(1/3) Setting CTS* via CRU to %d\n", state);
output_line_state(0, tms9902_device::CTS, state ? 0 : tms9902_device::CTS);
}
WRITE_LINE_MEMBER(ti_rs232_pio_device::cts1_w)
{
// Set the CTS line for RS232/2
if (TRACE_LINES) logerror("(2/4) Setting CTS* via CRU to %d\n", state);
output_line_state(1, tms9902_device::CTS, state ? 0 : tms9902_device::CTS);
}
WRITE_LINE_MEMBER(ti_rs232_pio_device::led_w)
{
m_led = state;
}
/*
Memory read
*/
@ -1150,6 +1154,16 @@ MACHINE_CONFIG_MEMBER( ti_rs232_pio_device::device_add_mconfig )
MCFG_DEVICE_ADD("serdev0", TI99_RS232_DEV, 0)
MCFG_DEVICE_ADD("serdev1", TI99_RS232_DEV, 0)
MCFG_DEVICE_ADD("piodev", TI99_PIO_DEV, 0)
MCFG_DEVICE_ADD("crulatch", LS259, 0) // U12
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(ti_rs232_pio_device, selected_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(ti_rs232_pio_device, pio_direction_in_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(ti_rs232_pio_device, pio_handshake_out_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(ti_rs232_pio_device, pio_spareout_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(ti_rs232_pio_device, flag0_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(ti_rs232_pio_device, cts0_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(ti_rs232_pio_device, cts1_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(ti_rs232_pio_device, led_w))
MACHINE_CONFIG_END
const tiny_rom_entry *ti_rs232_pio_device::device_rom_region() const

28
src/devices/bus/ti99/peb/ti_rs232.h
View File

@ -16,6 +16,7 @@
#pragma once
#include "peribox.h"
#include "machine/74259.h"
#include "machine/tms9902.h"
namespace bus { namespace ti99 { namespace peb {
@ -45,14 +46,23 @@ protected:
virtual ioport_constructor device_input_ports() const override;
private:
DECLARE_WRITE_LINE_MEMBER( int0_callback );
DECLARE_WRITE_LINE_MEMBER( int1_callback );
DECLARE_WRITE_LINE_MEMBER( rcv0_callback );
DECLARE_WRITE_LINE_MEMBER( rcv1_callback );
DECLARE_WRITE8_MEMBER( xmit0_callback );
DECLARE_WRITE8_MEMBER( xmit1_callback );
DECLARE_WRITE8_MEMBER( ctrl0_callback );
DECLARE_WRITE8_MEMBER( ctrl1_callback );
DECLARE_WRITE_LINE_MEMBER(int0_callback);
DECLARE_WRITE_LINE_MEMBER(int1_callback);
DECLARE_WRITE_LINE_MEMBER(rcv0_callback);
DECLARE_WRITE_LINE_MEMBER(rcv1_callback);
DECLARE_WRITE8_MEMBER(xmit0_callback);
DECLARE_WRITE8_MEMBER(xmit1_callback);
DECLARE_WRITE8_MEMBER(ctrl0_callback);
DECLARE_WRITE8_MEMBER(ctrl1_callback);
DECLARE_WRITE_LINE_MEMBER(selected_w);
DECLARE_WRITE_LINE_MEMBER(pio_direction_in_w);
DECLARE_WRITE_LINE_MEMBER(pio_handshake_out_w);
DECLARE_WRITE_LINE_MEMBER(pio_spareout_w);
DECLARE_WRITE_LINE_MEMBER(flag0_w);
DECLARE_WRITE_LINE_MEMBER(cts0_w);
DECLARE_WRITE_LINE_MEMBER(cts1_w);
DECLARE_WRITE_LINE_MEMBER(led_w);
void incoming_dtr(int uartind, line_state value);
void transmit_data(int uartind, uint8_t value);
@ -66,6 +76,8 @@ private:
void output_exception(int uartind, int param, uint8_t value);
void ctrl_callback(int uartind, int type, uint8_t data);
required_device<ls259_device> m_crulatch;
// UART chips
tms9902_device* m_uart[2];
// Connected images (file or socket connection) that represent the

391
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// license:BSD-3-Clause
// copyright-holders:AJR
/**********************************************************************
74259/9334 8-Bit Addressable Latch
The normal latch mode of this device provides a simple write-only
interface to up to 8 output lines. Its 3-bit address, 1-bit data
and active-low write enable inputs were commonly connected to the
bus lines of popular 8-bit microprocessors in the 1970s and 1980s.
The device may alternately serve as an active-high 1-of-8
demultiplexer when the asynchronous parallel clear input is held
low. The practical applications of this mode are more limited, and
the clear input is usually asserted only during master reset.
The A0-A2 (or A,B,C) and D inputs may be sourced in various
permutations, but it seems reasonable to assume, as the emulation
here requires, that these four inputs should always be written
simultaneously, since modifying them independently of each other
while the latch is enabled for writing would cause additional and
probably undesired changes to outputs.
The original TTL version of this device was introduced by Fairchild
in the early 1970s as 9334 in their 9300 MSI series, and second-
sourced by National Semiconductor as DM8334/DM9334 (the higher
number being used for the military-rated version). TI copied and
definitively renumbered many Fairchild MSI devices into their
standard 5400/7400 series. While Schottky and later versions almost
always use the 259 numbering (TI assigned SN74LS259 the alternative
name of TIM9906 when promoting it as a CRU output interface for the
TMS9900 family), older schematics sometimes suggest 9334 or DM8334
as pin-compatible substitutes for 74LS259.
Other addressable latch devices include:
- CD4099B: Part of RCA's standard CMOS logic series, this device
offers the same functions as 74259/9334, though its pins are
arranged rather differently. Like many CMOS devices in the 4000B
series and the CMOS addressable latches listed below, its reset
input is active high rather than active low, as is normal for
TTL devices.
- SN74256: A dual 4-bit latch with common control inputs and a
pinout similar to 74259, this device subtracts one of its
address lines and replaces it with a second data input which is
loaded in parallel.
- F4723B/4724B: These dual 4-bit (4723B) and 8-bit (4724B) latches
likely became part of the 4000B series when Fairchild introduced
their isoplanar CMOS line around 1974. They are pin-compatible
with 74256 and 74259 except for having active high clear inputs.
4723B (originally 34723) might actually have preceded 74256,
since Fairchild's 1975 MOS CCD Data Book denies the existence of
a TTL counterpart.
- MC14599B: Motorola's moderately successful expansion of the
4000B CMOS series includes this enhanced version of the CD4099B,
which has a bidirectional data pin and additional read/write and
chip select (active high) control inputs, allowing output bits
to be read back.
- NE590/591 Addressable Peripheral Drivers: Part of Signetics'
linear catalogue, these combine addressable latches with high
current drivers. NE590 has open collector Darlington outputs
(inverting logic) and is pin-compatible with 74LS259. NE591 uses
an extra chip select and sources outputs from a common collector
line independent of Vcc; it lacks the demultiplex mode.
***********************************************************************
74259 Function Table Latch Selection Table
Inputs | Outputs Inputs | Output
/C /E | Qa Qn A2 A1 A0 | Addressed
---------+---------- -----------+-------------
H L | D Qn L L L | Q0
H H | Qa Qn L L H | Q1
L L | Qa L L H L | Q2
L H | L L L H H | Q3
H L L | Q4
Qa = output addressed H L H | Q5
Qn = all other outputs H H L | Q6
H H H | Q7
**********************************************************************/
#include "emu.h"
#include "74259.h"
#define LOG_ALL_WRITES (0)
#define LOG_UNDEFINED_WRITES (0)
#define LOG_MYSTERY_BITS (0)
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
// device type definitions
DEFINE_DEVICE_TYPE(LS259, ls259_device, "ls259", "74LS259 Addressable Latch")
DEFINE_DEVICE_TYPE(HC259, hc259_device, "hc259", "74HC259 Addressable Latch")
DEFINE_DEVICE_TYPE(HCT259, hct259_device, "hct259", "74HCT259 Addressable Latch")
DEFINE_DEVICE_TYPE(F9334, f9334_device, "f9334", "Fairchild 9334 Addressable Latch")
DEFINE_DEVICE_TYPE(CD4099, cd4099_device, "cd4099", "CD4099B Addressable Latch")
//**************************************************************************
// ADDRESSABLE LATCH DEVICE
//**************************************************************************
addressable_latch_device::addressable_latch_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, type, tag, owner, clock),
m_q_out_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}},
m_parallel_out_cb(*this)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void addressable_latch_device::device_start()
{
// resolve callbacks
for (devcb_write_line &cb : m_q_out_cb)
cb.resolve();
m_parallel_out_cb.resolve();
// initial input state
m_address = 0;
m_data = false;
m_enable = false;
m_clear = false;
// arbitrary initial output state
m_q = 0xff;
save_item(NAME(m_address));
save_item(NAME(m_data));
save_item(NAME(m_enable));
save_item(NAME(m_q));
save_item(NAME(m_clear));
}
//-------------------------------------------------
// device_reset - reset the device
//-------------------------------------------------
void addressable_latch_device::device_reset()
{
// assume clear upon reset
clear_outputs(m_enable ? u8(m_data) << m_address : 0);
}
//-------------------------------------------------
// write_bit - synchronously update one of the
// eight output lines with a new data bit
//-------------------------------------------------
void addressable_latch_device::write_bit(offs_t offset, bool d)
{
write_abcd(offset, d);
enable_w(0);
enable_w(1);
}
//-------------------------------------------------
// write_abcd - update address select and data
// inputs without changing enable state
//-------------------------------------------------
void addressable_latch_device::write_abcd(u8 a, bool d)
{
m_address = a & 7;
m_data = d;
if (m_enable)
{
if (m_clear)
clear_outputs(u8(m_data) << m_address);
else
update_bit();
}
}
//-------------------------------------------------
// enable_w - handle enable input (active low)
//-------------------------------------------------
WRITE_LINE_MEMBER(addressable_latch_device::enable_w)
{
m_enable = !state;
if (m_enable)
update_bit();
else if (m_clear)
clear_outputs(0);
}
//-------------------------------------------------
// update_bit - update one of the eight output
// lines with a new data bit
//-------------------------------------------------
void addressable_latch_device::update_bit()
{
// first verify that the selected bit is actually changing
if (BIT(m_q, m_address) == m_data)
return;
if (!m_clear)
{
// update selected bit with new data
m_q = (m_q & ~(1 << m_address)) | (u8(m_data) << m_address);
}
else
{
// clear any other bit that was formerly set
clear_outputs(0);
m_q = u8(m_data) << m_address;
}
// update output line via callback
if (!m_q_out_cb[m_address].isnull())
m_q_out_cb[m_address](m_data);
// update parallel output
if (!m_parallel_out_cb.isnull())
m_parallel_out_cb(0, m_q, 1 << m_address);
// do some logging
if (LOG_ALL_WRITES || (LOG_UNDEFINED_WRITES && m_q_out_cb[m_address].isnull() && m_parallel_out_cb.isnull()))
logerror("Q%d %s at %s\n", m_address, m_data ? "set" : "cleared", machine().describe_context());
}
//-------------------------------------------------
// write_d0 - bus-triggered write handler using
// LSB of data (or CRUOUT on TMS99xx)
//-------------------------------------------------
WRITE8_MEMBER(addressable_latch_device::write_d0)
{
if (LOG_MYSTERY_BITS && data != 0x00 && data != 0x01 && data != 0xff)
logerror("Mystery bits written to Q%d:%s%s%s%s%s%s%s\n",
offset,
BIT(data, 7) ? " D7" : "",
BIT(data, 6) ? " D6" : "",
BIT(data, 5) ? " D5" : "",
BIT(data, 4) ? " D4" : "",
BIT(data, 3) ? " D3" : "",
BIT(data, 2) ? " D2" : "",
BIT(data, 1) ? " D1" : "");
write_bit(offset, BIT(data, 0));
}
//-------------------------------------------------
// write_d7 - bus-triggered write handler using
// MSB of (8-bit) data
//-------------------------------------------------
WRITE8_MEMBER(addressable_latch_device::write_d7)
{
if (LOG_MYSTERY_BITS && data != 0x00 && data != 0x80 && data != 0xff)
logerror("Mystery bits written to Q%d:%s%s%s%s%s%s%s\n",
offset,
BIT(data, 6) ? " D6" : "",
BIT(data, 5) ? " D5" : "",
BIT(data, 4) ? " D4" : "",
BIT(data, 3) ? " D3" : "",
BIT(data, 2) ? " D2" : "",
BIT(data, 1) ? " D1" : "",
BIT(data, 0) ? " D0" : "");
write_bit(offset, BIT(data, 7));
}
//-------------------------------------------------
// write_a0 - write handler that uses lowest bit
// of address bus as data input (data on bus is
// ignored)
//-------------------------------------------------
WRITE8_MEMBER(addressable_latch_device::write_a0)
{
write_bit(offset >> 1, offset & 1);
}
//-------------------------------------------------
// write_nibble - write handler using LSB of
// data as input and next three bits as address
// (offset is ignored)
//-------------------------------------------------
WRITE8_MEMBER(addressable_latch_device::write_nibble)
{
write_bit((data & 0x0e) >> 1, data & 0x01);
}
//-------------------------------------------------
// clear - pulse clear line from bus write
//-------------------------------------------------
WRITE8_MEMBER(addressable_latch_device::clear)
{
clear_outputs(m_enable ? u8(m_data) << m_address : 0);
}
//-------------------------------------------------
// q[0-7]_r - read individual output lines
//-------------------------------------------------
READ_LINE_MEMBER(addressable_latch_device::q0_r) { return BIT(m_q, 0); }
READ_LINE_MEMBER(addressable_latch_device::q1_r) { return BIT(m_q, 1); }
READ_LINE_MEMBER(addressable_latch_device::q2_r) { return BIT(m_q, 2); }
READ_LINE_MEMBER(addressable_latch_device::q3_r) { return BIT(m_q, 3); }
READ_LINE_MEMBER(addressable_latch_device::q4_r) { return BIT(m_q, 4); }
READ_LINE_MEMBER(addressable_latch_device::q5_r) { return BIT(m_q, 5); }
READ_LINE_MEMBER(addressable_latch_device::q6_r) { return BIT(m_q, 6); }
READ_LINE_MEMBER(addressable_latch_device::q7_r) { return BIT(m_q, 7); }
//-------------------------------------------------
// clear_w - handle clear/reset input
//-------------------------------------------------
WRITE_LINE_MEMBER(addressable_latch_device::clear_w)
{
m_clear = is_cmos() ? bool(state) : !state;
if (m_clear)
clear_outputs(m_enable ? u8(m_data) << m_address : 0);
}
//-------------------------------------------------
// clear_outputs - clear all output lines
//-------------------------------------------------
void addressable_latch_device::clear_outputs(u8 new_q)
{
const u8 bits_changed = m_q ^ new_q;
if (bits_changed == 0)
return;
m_q = new_q;
// return any previously set output lines to clear state
for (int bit = 0; bit < 8; bit++)
if (BIT(bits_changed, bit) && !m_q_out_cb[bit].isnull())
m_q_out_cb[bit](BIT(new_q, bit));
// update parallel output
if (!m_parallel_out_cb.isnull())
m_parallel_out_cb(0, new_q, bits_changed);
}
//**************************************************************************
// LS259 DEVICE
//**************************************************************************
ls259_device::ls259_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: addressable_latch_device(mconfig, LS259, tag, owner, clock)
{
}
//**************************************************************************
// HC259 DEVICE
//**************************************************************************
hc259_device::hc259_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: addressable_latch_device(mconfig, HC259, tag, owner, clock)
{
}
//**************************************************************************
// HCT259 DEVICE
//**************************************************************************
hct259_device::hct259_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: addressable_latch_device(mconfig, HCT259, tag, owner, clock)
{
}
//**************************************************************************
// F9334 DEVICE
//**************************************************************************
f9334_device::f9334_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: addressable_latch_device(mconfig, F9334, tag, owner, clock)
{
}
//**************************************************************************
// CD4099 DEVICE
//**************************************************************************
cd4099_device::cd4099_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: addressable_latch_device(mconfig, CD4099, tag, owner, clock)
{
}

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// license:BSD-3-Clause
// copyright-holders:AJR
/**********************************************************************
74259/9334 8-Bit Addressable Latch
***********************************************************************
____ ____
A0 1 |* \_/ | 16 Vcc
A1 2 | | 15 /C
A2 3 | | 14 /E
Q0 4 | SN74259 | 13 D
Q1 5 | F 9334 | 12 Q7
Q2 6 | | 11 Q6
Q3 7 | | 10 Q5
GND 8 |___________| 9 Q4
____ ____
Q7 1 |* \_/ | 16 Vdd
RESET 2 | | 15 Q6
DATA 3 | | 14 Q5
WRITE DISABLE 4 | | 13 Q4
A0 5 | CD4099B | 12 Q3
A1 6 | | 11 Q2
A2 7 | | 10 Q1
Vss 8 |___________| 9 Q0
**********************************************************************/
#pragma once
#ifndef DEVICES_MACHINE_74259_H
#define DEVICES_MACHINE_74259_H
//**************************************************************************
// CONFIGURATION MACROS
//**************************************************************************
#define MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(_devcb) \
devcb = &addressable_latch_device::set_q_out_cb(*device, 0, DEVCB_##_devcb);
#define MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(_devcb) \
devcb = &addressable_latch_device::set_q_out_cb(*device, 1, DEVCB_##_devcb);
#define MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(_devcb) \
devcb = &addressable_latch_device::set_q_out_cb(*device, 2, DEVCB_##_devcb);
#define MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(_devcb) \
devcb = &addressable_latch_device::set_q_out_cb(*device, 3, DEVCB_##_devcb);
#define MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(_devcb) \
devcb = &addressable_latch_device::set_q_out_cb(*device, 4, DEVCB_##_devcb);
#define MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(_devcb) \
devcb = &addressable_latch_device::set_q_out_cb(*device, 5, DEVCB_##_devcb);
#define MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(_devcb) \
devcb = &addressable_latch_device::set_q_out_cb(*device, 6, DEVCB_##_devcb);
#define MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(_devcb) \
devcb = &addressable_latch_device::set_q_out_cb(*device, 7, DEVCB_##_devcb);
#define MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(_devcb) \
devcb = &addressable_latch_device::set_parallel_out_cb(*device, DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> addressable_latch_device
class addressable_latch_device : public device_t
{
public:
// construction/destruction
addressable_latch_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// static configuration
template<class Object> static devcb_base &set_q_out_cb(device_t &device, int bit, Object object) { return downcast<addressable_latch_device &>(device).m_q_out_cb[bit].set_callback(object); }
template<class Object> static devcb_base &set_parallel_out_cb(device_t &device, Object object) { return downcast<addressable_latch_device &>(device).m_parallel_out_cb.set_callback(object); }
// data write handlers
void write_bit(offs_t offset, bool d);
void write_abcd(u8 a, bool d);
DECLARE_WRITE8_MEMBER(write_d0);
DECLARE_WRITE8_MEMBER(write_d7);
DECLARE_WRITE8_MEMBER(write_a0);
DECLARE_WRITE8_MEMBER(write_nibble);
DECLARE_WRITE8_MEMBER(clear);
// read handlers
DECLARE_READ_LINE_MEMBER(q0_r);
DECLARE_READ_LINE_MEMBER(q1_r);
DECLARE_READ_LINE_MEMBER(q2_r);
DECLARE_READ_LINE_MEMBER(q3_r);
DECLARE_READ_LINE_MEMBER(q4_r);
DECLARE_READ_LINE_MEMBER(q5_r);
DECLARE_READ_LINE_MEMBER(q6_r);
DECLARE_READ_LINE_MEMBER(q7_r);
u8 output_state() const { return m_q; }
// control inputs
DECLARE_WRITE_LINE_MEMBER(enable_w);
DECLARE_WRITE_LINE_MEMBER(clear_w);
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual bool is_cmos() const { return false; }
private:
// internal helpers
void update_bit();
void clear_outputs(u8 new_q);
// device callbacks
devcb_write_line m_q_out_cb[8]; // output line callback array
devcb_write8 m_parallel_out_cb; // parallel output option
// internal state
u8 m_address; // address input
bool m_data; // data bit input
u8 m_q; // latched output state
bool m_enable; // enable/load active state
bool m_clear; // clear/reset active state
};
// ======================> ls259_device
class ls259_device : public addressable_latch_device
{
public:
ls259_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
// ======================> hc259_device
class hc259_device : public addressable_latch_device
{
public:
hc259_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
// ======================> hct259_device
class hct259_device : public addressable_latch_device
{
public:
hct259_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
// ======================> f9334_device
class f9334_device : public addressable_latch_device
{
public:
f9334_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
// ======================> cd4099_device
class cd4099_device : public addressable_latch_device
{
public:
cd4099_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
virtual bool is_cmos() const override { return true; }
};
// device type definition
DECLARE_DEVICE_TYPE(LS259, ls259_device)
DECLARE_DEVICE_TYPE(HC259, hc259_device)
DECLARE_DEVICE_TYPE(HCT259, hct259_device)
DECLARE_DEVICE_TYPE(F9334, f9334_device)
DECLARE_DEVICE_TYPE(CD4099, cd4099_device)
#endif

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// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
/*****************************************************************************
(DM)9334 8-Bit Addressable Latch
*****************************************************************************/
#include "emu.h"
#include "dm9334.h"
DEFINE_DEVICE_TYPE(DM9334, dm9334_device, "dm9934", "NS [DM]9934 8-bit Addressable Latch")
dm9334_device::dm9334_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, DM9334, tag, owner, clock)
, m_out_func(*this)
, m_q0_func(*this)
, m_q1_func(*this)
, m_q2_func(*this)
, m_q3_func(*this)
, m_q4_func(*this)
, m_q5_func(*this)
, m_q6_func(*this)
, m_q7_func(*this)
, m_e(0)
, m_c(0)
, m_d(0)
, m_a(0)
, m_out(0)
{
}
void dm9334_device::device_start()
{
init();
save_item(NAME(m_e));
save_item(NAME(m_c));
save_item(NAME(m_d));
save_item(NAME(m_a));
save_item(NAME(m_out));
m_out_func.resolve_safe();
m_q0_func.resolve_safe();
m_q1_func.resolve_safe();
m_q2_func.resolve_safe();
m_q3_func.resolve_safe();
m_q4_func.resolve_safe();
m_q5_func.resolve_safe();
m_q6_func.resolve_safe();
m_q7_func.resolve_safe();
}
void dm9334_device::device_reset()
{
init();
}
void dm9334_device::init()
{
m_e = 0;
m_c = 0;
m_d = 0;
m_a = 0;
m_out = 0;
}
void dm9334_device::tick()
{
uint8_t last_out = m_out;
mode_t mode = static_cast<mode_t>((m_e << 1) | m_c);
switch(mode)
{
case mode_t::CLEAR:
m_out = 0;
break;
case mode_t::DEMUX:
m_out = (m_d << m_a);
break;
case mode_t::MEMORY:
// Preserve previous state
break;
case mode_t::LATCH:
m_out &= ~(1 << m_a);
m_out |= (m_d << m_a);
break;
}
if (m_out != last_out)
{
m_out_func(m_out);
for (int bit = 0; bit < 8; bit++)
{
if (BIT(m_out, bit) == BIT(last_out, bit))
continue;
switch(bit)
{
case 0: m_q0_func(BIT(m_out, bit)); break;
case 1: m_q1_func(BIT(m_out, bit)); break;
case 2: m_q2_func(BIT(m_out, bit)); break;
case 3: m_q3_func(BIT(m_out, bit)); break;
case 4: m_q4_func(BIT(m_out, bit)); break;
case 5: m_q5_func(BIT(m_out, bit)); break;
case 6: m_q6_func(BIT(m_out, bit)); break;
case 7: m_q7_func(BIT(m_out, bit)); break;
}
}
}
}
WRITE_LINE_MEMBER( dm9334_device::e_w )
{
uint8_t last_e = m_e;
m_e = state & 1;
if (last_e != m_e)
tick();
}
WRITE_LINE_MEMBER( dm9334_device::c_w )
{
uint8_t last_c = m_c;
m_c = state & 1;
if (last_c != m_c)
tick();
}
WRITE_LINE_MEMBER( dm9334_device::d_w )
{
uint8_t last_d = m_d;
m_d = state & 1;
if (last_d != m_d)
tick();
}
WRITE_LINE_MEMBER( dm9334_device::a0_w )
{
uint8_t last_a = m_a;
m_a &= ~(1 << 0);
m_a |= (state & 1) << 0;
if (last_a != m_a)
tick();
}
WRITE_LINE_MEMBER( dm9334_device::a1_w )
{
uint8_t last_a = m_a;
m_a &= ~(1 << 1);
m_a |= (state & 1) << 1;
if (last_a != m_a)
tick();
}
WRITE_LINE_MEMBER( dm9334_device::a2_w )
{
uint8_t last_a = m_a;
m_a &= ~(1 << 2);
m_a |= (state & 1) << 2;
if (last_a != m_a)
tick();
}
WRITE8_MEMBER( dm9334_device::a_w )
{
uint8_t last_a = m_a;
m_a = data & 0x7;
if (last_a != m_a)
tick();
}
READ8_MEMBER( dm9334_device::output_r )
{
return m_out;
}
READ_LINE_MEMBER( dm9334_device::q0_r ) { return BIT(m_out, 0); }
READ_LINE_MEMBER( dm9334_device::q1_r ) { return BIT(m_out, 1); }
READ_LINE_MEMBER( dm9334_device::q2_r ) { return BIT(m_out, 2); }
READ_LINE_MEMBER( dm9334_device::q3_r ) { return BIT(m_out, 3); }
READ_LINE_MEMBER( dm9334_device::q4_r ) { return BIT(m_out, 4); }
READ_LINE_MEMBER( dm9334_device::q5_r ) { return BIT(m_out, 5); }
READ_LINE_MEMBER( dm9334_device::q6_r ) { return BIT(m_out, 6); }
READ_LINE_MEMBER( dm9334_device::q7_r ) { return BIT(m_out, 7); }

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// license:BSD-3-Clause
// copyright-holders:Ryan Holtz
/*****************************************************************************
(DM)9334 8-Bit Addressable Latch
******************************************************************************
Connection Diagram:
___ ___
A0 1 |* u | 16 Vcc
A1 2 | | 15 /C
A2 3 | | 14 /E
Q0 4 | | 13 D
Q1 5 | | 12 Q7
Q2 6 | | 11 Q6
Q3 7 | | 10 Q5
GND 8 |_______| 9 Q4
***********************************************************************
Function Tables:
/E /C Mode
L H Addressable Latch
H H Memory
L L Active High Eight
Channel Demultiplexer
H L Clear
___________________________________________________________________________________________
| Inputs | Present Output States | |
|---------------------------|-------------------------------------------------| Mode |
| /C /E | D | A0 A1 A2 | Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 | |
|---------|---|-------------|-------------------------------------------------|-------------|
| L H | X | X X X | L L L L L L L L | Clear |
|---------|---|-------------|-------------------------------------------------|-------------|
| L L | L | L L L | L L L L L L L L | |
| L L | H | L L L | H L L L L L L L | |
| L L | L | H L L | L L L L L L L L | |
| L L | H | H L L | L H L L L L L L | |
| * * | * | * | * | Demultiplex |
| * * | * | * | * | |
| * * | * | * | * | |
| * * | * | * | * | |
| L L | H | H H H | L L L L L L L H | |
|---------|---|-------------|-------------------------------------------------|-------------|
| H H | X | X X X | Qn-1 | Memory |
|---------|---|-------------|-------------------------------------------------|-------------|
| H L | L | L L L | L Qn-1 Qn-1 Qn-1 | |
| H L | H | L L L | H Qn-1 Qn-1 | |
| H L | L | H L L | Qn-1 L Qn-1 | |
| H L | H | H L L | Qn-1 H Qn-1 | |
| * * | * | * | * | |
| * * | * | * | * | |
| * * | * | * | * | |
| H L | L | H H H | Qn-1 Qn-1 L | |
| H L | H | H H H | Qn-1 Qn-1 H | |
|---------|---|-------------|-------------------------------------------------|-------------|
X = Don't Care Condition
L = Low Voltage Level
H = High Voltage Level
Qn-1 = Previous Output State
**********************************************************************/
#ifndef MAME_MACHINE_DM9334_H
#define MAME_MACHINE_DM9334_H
#pragma once
#define MCFG_DM9334_OUTPUT_CB(_devcb) \
devcb = &dm9334_device::set_out_cb(*device, DEVCB_##_devcb);
#define MCFG_DM9334_Q0_CB(_devcb) \
devcb = &dm9334_device::set_q0_cb(*device, DEVCB_##_devcb);
#define MCFG_DM9334_Q1_CB(_devcb) \
devcb = &dm9334_device::set_q1_cb(*device, DEVCB_##_devcb);
#define MCFG_DM9334_Q2_CB(_devcb) \
devcb = &dm9334_device::set_q2_cb(*device, DEVCB_##_devcb);
#define MCFG_DM9334_Q3_CB(_devcb) \
devcb = &dm9334_device::set_q3_cb(*device, DEVCB_##_devcb);
#define MCFG_DM9334_Q4_CB(_devcb) \
devcb = &dm9334_device::set_q4_cb(*device, DEVCB_##_devcb);
#define MCFG_DM9334_Q5_CB(_devcb) \
devcb = &dm9334_device::set_q5_cb(*device, DEVCB_##_devcb);
#define MCFG_DM9334_Q6_CB(_devcb) \
devcb = &dm9334_device::set_q6_cb(*device, DEVCB_##_devcb);
#define MCFG_DM9334_Q7_CB(_devcb) \
devcb = &dm9334_device::set_q7_cb(*device, DEVCB_##_devcb);
#define MCFG_DM9334_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, DM9334, 0)
class dm9334_device : public device_t
{
public:
// construction/destruction
dm9334_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template <class Object> static devcb_base &set_out_cb(device_t &device, Object &&cb) { return downcast<dm9334_device &>(device).m_out_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_q0_cb(device_t &device, Object &&cb) { return downcast<dm9334_device &>(device).m_q0_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_q1_cb(device_t &device, Object &&cb) { return downcast<dm9334_device &>(device).m_q1_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_q2_cb(device_t &device, Object &&cb) { return downcast<dm9334_device &>(device).m_q2_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_q3_cb(device_t &device, Object &&cb) { return downcast<dm9334_device &>(device).m_q3_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_q4_cb(device_t &device, Object &&cb) { return downcast<dm9334_device &>(device).m_q4_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_q5_cb(device_t &device, Object &&cb) { return downcast<dm9334_device &>(device).m_q5_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_q6_cb(device_t &device, Object &&cb) { return downcast<dm9334_device &>(device).m_q6_func.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_q7_cb(device_t &device, Object &&cb) { return downcast<dm9334_device &>(device).m_q7_func.set_callback(std::forward<Object>(cb)); }
DECLARE_WRITE_LINE_MEMBER( e_w );
DECLARE_WRITE_LINE_MEMBER( c_w );
DECLARE_WRITE_LINE_MEMBER( d_w );
DECLARE_WRITE_LINE_MEMBER( a0_w );
DECLARE_WRITE_LINE_MEMBER( a1_w );
DECLARE_WRITE_LINE_MEMBER( a2_w );
DECLARE_WRITE8_MEMBER( a_w );
DECLARE_READ8_MEMBER( output_r );
DECLARE_READ_LINE_MEMBER( q0_r );
DECLARE_READ_LINE_MEMBER( q1_r );
DECLARE_READ_LINE_MEMBER( q2_r );
DECLARE_READ_LINE_MEMBER( q3_r );
DECLARE_READ_LINE_MEMBER( q4_r );
DECLARE_READ_LINE_MEMBER( q5_r );
DECLARE_READ_LINE_MEMBER( q6_r );
DECLARE_READ_LINE_MEMBER( q7_r );
uint8_t get_output() const { return m_out; }
protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
private:
enum class mode_t
{
DEMUX = 0x00,
LATCH = 0x01,
CLEAR = 0x02,
MEMORY = 0x03
};
void init();
void tick();
// callbacks
devcb_write_line m_out_func;
devcb_write_line m_q0_func;
devcb_write_line m_q1_func;
devcb_write_line m_q2_func;
devcb_write_line m_q3_func;
devcb_write_line m_q4_func;
devcb_write_line m_q5_func;
devcb_write_line m_q6_func;
devcb_write_line m_q7_func;
// inputs
uint8_t m_e; // pin 14
uint8_t m_c; // pin 15
uint8_t m_d; // pin 13
uint8_t m_a; // pins 1-3 from LSB to MSB
// outputs
uint8_t m_out; // pins 4-7 and 9-12 from LSB to MSB
};
// device type definition
DECLARE_DEVICE_TYPE(DM9334, dm9334_device)
#endif // MAME_MACHINE_DM9334_H

27
src/devices/machine/wozfdc.cpp
View File

@ -41,12 +41,22 @@ const tiny_rom_entry *wozfdc_device::device_rom_region() const
return ROM_NAME( diskiing );
}
//-------------------------------------------------
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_MEMBER( wozfdc_device::device_add_mconfig )
MCFG_DEVICE_ADD("phaselatch", F9334, 0) // 9334 on circuit diagram but 74LS259 in parts list; actual chip may vary
MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(WRITE8(wozfdc_device, set_phase))
MACHINE_CONFIG_END
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
wozfdc_device::wozfdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, type, tag, owner, clock)
device_t(mconfig, type, tag, owner, clock),
m_phaselatch(*this, "phaselatch")
{
}
@ -75,7 +85,6 @@ void wozfdc_device::device_start()
save_item(NAME(mode_write));
save_item(NAME(mode_load));
save_item(NAME(active));
save_item(NAME(phases));
save_item(NAME(external_io_select));
save_item(NAME(cycles));
save_item(NAME(data_reg));
@ -91,7 +100,6 @@ void wozfdc_device::device_reset()
{
floppy = nullptr;
active = MODE_IDLE;
phases = 0x00;
mode_write = false;
mode_load = false;
last_6502_write = 0x00;
@ -208,21 +216,16 @@ WRITE8_MEMBER(wozfdc_device::write)
last_6502_write = data;
}
void wozfdc_device::phase(int ph, bool on)
WRITE8_MEMBER(wozfdc_device::set_phase)
{
if(on)
phases |= 1 << ph;
else
phases &= ~(1 << ph);
if(floppy && active)
floppy->seek_phase_w(phases);
if (floppy && active)
floppy->seek_phase_w(data);
}
void wozfdc_device::control(int offset)
{
if(offset < 8)
phase(offset >> 1, offset & 1);
m_phaselatch->write_bit(offset >> 1, offset & 1);
else
switch(offset) {

7
src/devices/machine/wozfdc.h
View File

@ -15,6 +15,7 @@
#include "imagedev/floppy.h"
#include "formats/flopimg.h"
#include "machine/74259.h"
//**************************************************************************
// TYPE DEFINITIONS
@ -27,6 +28,7 @@ class wozfdc_device:
public:
// optional information overrides
virtual const tiny_rom_entry *device_rom_region() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE8_MEMBER(write);
@ -40,7 +42,7 @@ protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
void control(int offset);
void phase(int ph, bool on);
DECLARE_WRITE8_MEMBER(set_phase);
uint64_t time_to_cycles(const attotime &tm);
attotime cycles_to_time(uint64_t cycles);
void a3_update_drive_sel();
@ -55,6 +57,8 @@ protected:
floppy_connector *floppy0, *floppy1, *floppy2, *floppy3;
floppy_image_device *floppy;
required_device<addressable_latch_device> m_phaselatch;
uint64_t cycles;
uint8_t data_reg, address;
attotime write_start_time;
@ -66,7 +70,6 @@ protected:
uint8_t last_6502_write;
bool mode_write, mode_load;
int active;
uint8_t phases;
emu_timer *timer, *delay_timer;
bool external_drive_select;
bool external_io_select;

8
src/devices/sound/namco.cpp
View File

@ -263,9 +263,9 @@ uint32_t namco_audio_device::namco_update_one(stream_sample_t *buffer, int lengt
0x1f: ch 2 volume
*/
WRITE8_MEMBER( namco_device::pacman_sound_enable_w )
WRITE_LINE_MEMBER(namco_device::pacman_sound_enable_w)
{
m_sound_enable = data;
m_sound_enable = state;
}
WRITE8_MEMBER( namco_device::pacman_sound_w )
@ -491,9 +491,9 @@ WRITE8_MEMBER( namco_device::polepos_sound_w )
0x3e ch 7 waveform select & frequency
*/
void namco_15xx_device::mappy_sound_enable(int enable)
WRITE_LINE_MEMBER(namco_15xx_device::mappy_sound_enable)
{
m_sound_enable = enable;
m_sound_enable = state;
}
WRITE8_MEMBER(namco_15xx_device::namco_15xx_w)

10
src/devices/sound/namco.h
View File

@ -82,13 +82,13 @@ class namco_device : public namco_audio_device
public:
namco_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE8_MEMBER( pacman_sound_enable_w );
DECLARE_WRITE8_MEMBER( pacman_sound_w );
DECLARE_WRITE_LINE_MEMBER(pacman_sound_enable_w);
DECLARE_WRITE8_MEMBER(pacman_sound_w);
void polepos_sound_enable(int enable);
DECLARE_READ8_MEMBER( polepos_sound_r );
DECLARE_WRITE8_MEMBER( polepos_sound_w );
DECLARE_READ8_MEMBER(polepos_sound_r);
DECLARE_WRITE8_MEMBER(polepos_sound_w);
protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;
@ -104,7 +104,7 @@ public:
DECLARE_READ8_MEMBER( sharedram_r );
DECLARE_WRITE8_MEMBER( sharedram_w );
void mappy_sound_enable(int enable);
DECLARE_WRITE_LINE_MEMBER(mappy_sound_enable);
protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples) override;

33
src/mame/audio/asteroid.cpp
View File

@ -48,28 +48,6 @@ static const discrete_555_cc_desc asteroid_thump_555cc =
0.8 // VBE 2N3906 (Si)
};
#define ASTEROID_SAUCER_SND_EN NODE_01
#define ASTEROID_SAUCER_FIRE_EN NODE_02
#define ASTEROID_SAUCER_SEL NODE_03
#define ASTEROID_THRUST_EN NODE_04
#define ASTEROID_SHIP_FIRE_EN NODE_05
#define ASTEROID_LIFE_EN NODE_06
#define ASTEROID_NOISE_RESET NODE_07
#define ASTEROID_THUMP_EN NODE_08
#define ASTEROID_THUMP_DATA NODE_09
#define ASTEROID_EXPLODE_DATA NODE_10
#define ASTEROID_EXPLODE_PITCH NODE_11
#define ASTEROID_NOISE NODE_20
#define ASTEROID_THUMP_SND NODE_21
#define ASTEROID_SAUCER_SND NODE_22
#define ASTEROID_LIFE_SND NODE_23
#define ASTEROID_SAUCER_FIRE_SND NODE_24
#define ASTEROID_SHIP_FIRE_SND NODE_25
#define ASTEROID_EXPLODE_SND NODE_26
#define ASTEROID_THRUST_SND NODE_27
DISCRETE_SOUND_START(asteroid)
/************************************************/
/* Asteroid Effects Relataive Gain Table */
@ -308,17 +286,6 @@ WRITE8_MEMBER(asteroid_state::asteroid_thump_w)
m_discrete->write(space, ASTEROID_THUMP_DATA, data & 0x0f);
}
WRITE8_MEMBER(asteroid_state::asteroid_sounds_w)
{
m_discrete->write(space, NODE_RELATIVE(ASTEROID_SAUCER_SND_EN, offset), data & 0x80);
}
WRITE8_MEMBER(asteroid_state::astdelux_sounds_w)
{
/* Only ever activates the thrusters in Astdelux */
m_discrete->write(space, ASTEROID_THRUST_EN, data & 0x80);
}
WRITE8_MEMBER(asteroid_state::asteroid_noise_reset_w)
{
m_discrete->write(space, ASTEROID_NOISE_RESET, 0);

45
src/mame/audio/avalnche.cpp
View File

@ -7,15 +7,6 @@
*************************************************************************/
#include "emu.h"
#include "includes/avalnche.h"
#include "sound/discrete.h"
/* Avalanche Discrete Sound Input Nodes */
#define AVALNCHE_AUD0_EN NODE_01
#define AVALNCHE_AUD1_EN NODE_02
#define AVALNCHE_AUD2_EN NODE_03
#define AVALNCHE_SOUNDLVL_DATA NODE_04
#define AVALNCHE_ATTRACT_EN NODE_05
/***************************************************************************
@ -27,32 +18,6 @@ WRITE8_MEMBER(avalnche_state::avalnche_noise_amplitude_w)
m_discrete->write(space, AVALNCHE_SOUNDLVL_DATA, data & 0x3f);
}
WRITE8_MEMBER(avalnche_state::avalnche_attract_enable_w)
{
m_discrete->write(space, AVALNCHE_ATTRACT_EN, data & 0x01);
}
WRITE8_MEMBER(avalnche_state::avalnche_audio_w)
{
int bit = data & 0x01;
switch (offset & 0x07)
{
case 0x00: /* AUD0 */
m_discrete->write(space, AVALNCHE_AUD0_EN, bit);
break;
case 0x01: /* AUD1 */
m_discrete->write(space, AVALNCHE_AUD1_EN, bit);
break;
case 0x02: /* AUD2 */
default:
m_discrete->write(space, AVALNCHE_AUD2_EN, bit);
break;
}
}
/***************************************************************************
Avalanche sound system analog emulation
@ -130,8 +95,16 @@ DISCRETE_SOUND_END
Catch memory audio output handlers
***************************************************************************/
WRITE8_MEMBER(avalnche_state::catch_audio_w)
WRITE_LINE_MEMBER(avalnche_state::catch_aud0_w)
{
/* Different from avalnche, it plays a sound (offset 0/1/2) on data bit 0 rising edge.
There's no indication that the game silences sound, it's probably done automatically. */
}
WRITE_LINE_MEMBER(avalnche_state::catch_aud1_w)
{
}
WRITE_LINE_MEMBER(avalnche_state::catch_aud2_w)
{
}

5
src/mame/audio/bsktball.cpp
View File

@ -23,11 +23,6 @@ WRITE8_MEMBER(bsktball_state::bsktball_note_w)
m_discrete->write(space, BSKTBALL_NOTE_DATA, data); // Note
}
WRITE8_MEMBER(bsktball_state::bsktball_noise_reset_w)
{
m_discrete->write(space, BSKTBALL_NOISE_EN, offset & 0x01);
}
/************************************************************************/
/* bsktball Sound System Analog emulation */

12
src/mame/audio/canyon.cpp
View File

@ -28,18 +28,6 @@ WRITE8_MEMBER(canyon_state::canyon_explode_w)
}
WRITE8_MEMBER(canyon_state::canyon_attract_w)
{
m_discrete->write(space, NODE_RELATIVE(CANYON_ATTRACT1_EN, (offset & 0x01)), offset & 0x02);
}
WRITE8_MEMBER(canyon_state::canyon_whistle_w)
{
m_discrete->write(space, NODE_RELATIVE(CANYON_WHISTLE1_EN, (offset & 0x01)), offset & 0x02);
}
/************************************************************************/
/* canyon Sound System Analog emulation */
/************************************************************************/

15
src/mame/audio/cclimber.cpp
View File

@ -69,30 +69,35 @@ MACHINE_CONFIG_MEMBER( cclimber_audio_device::device_add_mconfig )
MACHINE_CONFIG_END
WRITE8_MEMBER( cclimber_audio_device::sample_select_w )
WRITE8_MEMBER(cclimber_audio_device::sample_select_w)
{
m_sample_num = data;
}
WRITE8_MEMBER( cclimber_audio_device::sample_rate_w )
WRITE8_MEMBER(cclimber_audio_device::sample_rate_w)
{
/* calculate the sampling frequency */
m_sample_freq = SND_CLOCK / 4 / (256 - data);
}
WRITE8_MEMBER( cclimber_audio_device::sample_volume_w )
WRITE8_MEMBER(cclimber_audio_device::sample_volume_w)
{
m_sample_volume = data & 0x1f; /* range 0-31 */
}
WRITE8_MEMBER( cclimber_audio_device::sample_trigger_w )
WRITE_LINE_MEMBER(cclimber_audio_device::sample_trigger_w)
{
if (data == 0)
if (state == 0)
return;
play_sample(32 * m_sample_num,m_sample_freq,m_sample_volume);
}
WRITE8_MEMBER(cclimber_audio_device::sample_trigger_w)
{
sample_trigger_w(data != 0);
}
void cclimber_audio_device::play_sample(int start,int freq,int volume)
{

7
src/mame/audio/cclimber.h
View File

@ -36,9 +36,10 @@ public:
// construction/destruction
cclimber_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE8_MEMBER( sample_trigger_w );
DECLARE_WRITE8_MEMBER( sample_rate_w );
DECLARE_WRITE8_MEMBER( sample_volume_w );
DECLARE_WRITE_LINE_MEMBER(sample_trigger_w);
DECLARE_WRITE8_MEMBER(sample_trigger_w);
DECLARE_WRITE8_MEMBER(sample_rate_w);
DECLARE_WRITE8_MEMBER(sample_volume_w);
protected:
// device level overrides

538
src/mame/audio/cinemat.cpp
View File

@ -36,9 +36,6 @@
#define RISING_EDGE(bit, changed, val) (((changed) & (bit)) && ((val) & (bit)))
#define FALLING_EDGE(bit, changed, val) (((changed) & (bit)) && !((val) & (bit)))
#define SOUNDVAL_RISING_EDGE(bit) RISING_EDGE(bit, bits_changed, sound_val)
#define SOUNDVAL_FALLING_EDGE(bit) FALLING_EDGE(bit, bits_changed, sound_val)
#define SHIFTREG_RISING_EDGE(bit) RISING_EDGE(bit, (m_last_shift ^ m_current_shift), m_current_shift)
#define SHIFTREG_FALLING_EDGE(bit) FALLING_EDGE(bit, (m_last_shift ^ m_current_shift), m_current_shift)
@ -46,26 +43,6 @@
#define SHIFTREG2_FALLING_EDGE(bit) FALLING_EDGE(bit, (m_last_shift2 ^ m_current_shift), m_current_shift)
/*************************************
*
* Generic sound write
*
*************************************/
WRITE8_MEMBER(cinemat_state::cinemat_sound_control_w)
{
uint8_t oldval = m_sound_control;
/* form an 8-bit value with the new bit */
m_sound_control = (m_sound_control & ~(1 << offset)) | ((data & 1) << offset);
/* if something changed, call the sound subroutine */
if ((m_sound_control != oldval) && m_sound_handler)
(this->*m_sound_handler)(m_sound_control, m_sound_control ^ oldval);
}
/*************************************
*
* Generic sound init
@ -75,7 +52,6 @@ WRITE8_MEMBER(cinemat_state::cinemat_sound_control_w)
void cinemat_state::sound_start()
{
/* register for save states */
save_item(NAME(m_sound_control));
save_item(NAME(m_current_shift));
save_item(NAME(m_last_shift));
save_item(NAME(m_last_shift2));
@ -88,14 +64,8 @@ void cinemat_state::sound_start()
}
void cinemat_state::generic_init(sound_func sound_handler)
void cinemat_state::sound_reset()
{
/* set the sound handler */
m_sound_handler = sound_handler;
/* reset sound control */
m_sound_control = 0x9f;
/* reset shift register values */
m_current_shift = 0xffff;
m_last_shift = 0xffff;
@ -130,32 +100,44 @@ static const char *const spacewar_sample_names[] =
nullptr
};
void cinemat_state::spacewar_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::spacewar_sound0_w)
{
/* Explosion - rising edge */
if (SOUNDVAL_RISING_EDGE(0x01))
if (state)
m_samples->start(0, (machine().rand() & 1) ? 0 : 6);
}
WRITE_LINE_MEMBER(cinemat_state::spacewar_sound1_w)
{
/* Fire sound - rising edge */
if (SOUNDVAL_RISING_EDGE(0x02))
if (state)
m_samples->start(1, (machine().rand() & 1) ? 1 : 7);
}
WRITE_LINE_MEMBER(cinemat_state::spacewar_sound2_w)
{
/* Player 1 thrust - 0=on, 1=off */
if (SOUNDVAL_FALLING_EDGE(0x04))
if (!state)
m_samples->start(3, 3, true);
if (SOUNDVAL_RISING_EDGE(0x04))
if (state)
m_samples->stop(3);
}
WRITE_LINE_MEMBER(cinemat_state::spacewar_sound3_w)
{
/* Player 2 thrust - 0=on, 1-off */
if (SOUNDVAL_FALLING_EDGE(0x08))
if (!state)
m_samples->start(4, 4, true);
if (SOUNDVAL_RISING_EDGE(0x08))
if (state)
m_samples->stop(4);
}
WRITE_LINE_MEMBER(cinemat_state::spacewar_sound4_w)
{
/* Mute - 0=off, 1=on */
if (SOUNDVAL_FALLING_EDGE(0x10))
if (!state)
m_samples->start(2, 2, true); /* play idle sound */
if (SOUNDVAL_RISING_EDGE(0x10))
if (state)
{
int i;
@ -169,13 +151,13 @@ void cinemat_state::spacewar_sound_w(uint8_t sound_val, uint8_t bits_changed)
}
}
SOUND_RESET_MEMBER( cinemat_state, spacewar )
{
generic_init(&cinemat_state::spacewar_sound_w);
}
MACHINE_CONFIG_START( spacewar_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, spacewar)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, spacewar_sound0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, spacewar_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cinemat_state, spacewar_sound2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cinemat_state, spacewar_sound3_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, spacewar_sound4_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -202,28 +184,32 @@ static const char *const barrier_sample_names[] =
nullptr
};
void cinemat_state::barrier_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::barrier_sound0_w)
{
/* Player die - rising edge */
if (SOUNDVAL_RISING_EDGE(0x01))
if (state)
m_samples->start(0, 0);
}
WRITE_LINE_MEMBER(cinemat_state::barrier_sound1_w)
{
/* Player move - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x02))
if (!state)
m_samples->start(1, 1);
}
WRITE_LINE_MEMBER(cinemat_state::barrier_sound2_w)
{
/* Enemy move - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x04))
if (!state)
m_samples->start(2, 2);
}
SOUND_RESET_MEMBER( cinemat_state, barrier )
{
generic_init(&cinemat_state::barrier_sound_w);
}
MACHINE_CONFIG_START( barrier_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, barrier)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, barrier_sound0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, barrier_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cinemat_state, barrier_sound2_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -248,35 +234,39 @@ static const char *const speedfrk_sample_names[] =
nullptr
};
void cinemat_state::speedfrk_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::speedfrk_sound3_w)
{
/* on the falling edge of bit 0x08, clock the inverse of bit 0x04 into the top of the shiftreg */
if (SOUNDVAL_FALLING_EDGE(0x08))
if (!state)
{
m_current_shift = ((m_current_shift >> 1) & 0x7fff) | ((~sound_val << 13) & 1);
m_current_shift = ((m_current_shift >> 1) & 0x7fff) | ((~m_outlatch->q2_r() << 13) & 1);
/* high 12 bits control the frequency - counts from value to $FFF, carry triggers */
/* another counter */
/* low 4 bits control the volume of the noise output (explosion?) */
}
/* off-road - 1=on, 0=off */
if (SOUNDVAL_RISING_EDGE(0x10))
m_samples->start(0, 0, true);
if (SOUNDVAL_FALLING_EDGE(0x10))
m_samples->stop(0);
/* start LED is controlled by bit 0x02 */
output().set_led_value(0, ~sound_val & 0x02);
}
SOUND_RESET_MEMBER( cinemat_state, speedfrk )
WRITE_LINE_MEMBER(cinemat_state::speedfrk_sound4_w)
{
generic_init(&cinemat_state::speedfrk_sound_w);
/* off-road - 1=on, 0=off */
if (state)
m_samples->start(0, 0, true);
if (!state)
m_samples->stop(0);
}
WRITE_LINE_MEMBER(cinemat_state::speedfrk_start_led_w)
{
/* start LED is controlled by bit 0x02 */
output().set_led_value(0, !state);
}
MACHINE_CONFIG_START( speedfrk_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, speedfrk)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, speedfrk_start_led_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cinemat_state, speedfrk_sound3_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, speedfrk_sound4_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -306,46 +296,62 @@ static const char *const starhawk_sample_names[] =
nullptr
};
void cinemat_state::starhawk_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::starhawk_sound0_w)
{
/* explosion - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x01))
if (!state)
m_samples->start(0, 0);
}
WRITE_LINE_MEMBER(cinemat_state::starhawk_sound1_w)
{
/* right laser - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x02))
if (!state)
m_samples->start(1, 1);
}
WRITE_LINE_MEMBER(cinemat_state::starhawk_sound2_w)
{
/* left laser - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x04))
if (!state)
m_samples->start(2, 2);
}
WRITE_LINE_MEMBER(cinemat_state::starhawk_sound3_w)
{
/* K - 0=on, 1=off */
if (SOUNDVAL_FALLING_EDGE(0x08))
if (!state)
m_samples->start(3, 3, true);
if (SOUNDVAL_RISING_EDGE(0x08))
m_samples->stop(3);
/* master - 0=on, 1=off */
if (SOUNDVAL_FALLING_EDGE(0x10))
m_samples->start(4, 4, true);
if (SOUNDVAL_RISING_EDGE(0x10))
m_samples->stop(4);
/* K exit - 1=on, 0=off */
if (SOUNDVAL_RISING_EDGE(0x80))
m_samples->start(3, 5, true);
if (SOUNDVAL_FALLING_EDGE(0x80))
if (state)
m_samples->stop(3);
}
SOUND_RESET_MEMBER( cinemat_state, starhawk )
WRITE_LINE_MEMBER(cinemat_state::starhawk_sound4_w)
{
generic_init(&cinemat_state::starhawk_sound_w);
/* master - 0=on, 1=off */
if (!state)
m_samples->start(4, 4, true);
if (state)
m_samples->stop(4);
}
WRITE_LINE_MEMBER(cinemat_state::starhawk_sound7_w)
{
/* K exit - 1=on, 0=off */
if (state)
m_samples->start(3, 5, true);
if (!state)
m_samples->stop(3);
}
MACHINE_CONFIG_START( starhawk_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, starhawk)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, starhawk_sound0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, starhawk_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cinemat_state, starhawk_sound2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cinemat_state, starhawk_sound3_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, starhawk_sound4_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(cinemat_state, starhawk_sound7_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -375,40 +381,56 @@ static const char *const sundance_sample_names[] =
nullptr
};
void cinemat_state::sundance_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::sundance_sound0_w)
{
/* bong - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x01))
if (!state)
m_samples->start(0, 0);
}
WRITE_LINE_MEMBER(cinemat_state::sundance_sound1_w)
{
/* whoosh - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x02))
if (!state)
m_samples->start(1, 1);
}
WRITE_LINE_MEMBER(cinemat_state::sundance_sound2_w)
{
/* explosion - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x04))
if (!state)
m_samples->start(2, 2);
}
WRITE_LINE_MEMBER(cinemat_state::sundance_sound3_w)
{
/* ping - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x08))
if (!state)
m_samples->start(3, 3);
}
WRITE_LINE_MEMBER(cinemat_state::sundance_sound4_w)
{
/* ping - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x10))
if (!state)
m_samples->start(4, 4);
}
WRITE_LINE_MEMBER(cinemat_state::sundance_sound7_w)
{
/* hatch - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x80))
if (!state)
m_samples->start(5, 5);
}
SOUND_RESET_MEMBER( cinemat_state, sundance )
{
generic_init(&cinemat_state::sundance_sound_w);
}
MACHINE_CONFIG_START( sundance_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, sundance)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, sundance_sound0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, sundance_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cinemat_state, sundance_sound2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cinemat_state, sundance_sound3_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, sundance_sound4_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(cinemat_state, sundance_sound7_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -438,13 +460,13 @@ static const char *const tailg_sample_names[] =
nullptr
};
void cinemat_state::tailg_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::tailg_sound_w)
{
/* the falling edge of bit 0x10 clocks bit 0x08 into the mux selected by bits 0x07 */
if (SOUNDVAL_FALLING_EDGE(0x10))
if (!state)
{
/* update the shift register (actually just a simple mux) */
m_current_shift = (m_current_shift & ~(1 << (sound_val & 7))) | (((sound_val >> 3) & 1) << (sound_val & 7));
m_current_shift = (m_current_shift & ~(1 << (m_outlatch->output_state() & 7))) | (m_outlatch->q3_r() << (m_outlatch->output_state() & 7));
/* explosion - falling edge */
if (SHIFTREG_FALLING_EDGE(0x01))
@ -484,13 +506,9 @@ void cinemat_state::tailg_sound_w(uint8_t sound_val, uint8_t bits_changed)
}
}
SOUND_RESET_MEMBER( cinemat_state, tailg )
{
generic_init(&cinemat_state::tailg_sound_w);
}
MACHINE_CONFIG_START( tailg_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, tailg)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, tailg_sound_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -519,40 +537,52 @@ static const char *const warrior_sample_names[] =
nullptr
};
void cinemat_state::warrior_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::warrior_sound0_w)
{
/* normal level - 0=on, 1=off */
if (SOUNDVAL_FALLING_EDGE(0x01))
if (!state)
m_samples->start(0, 0, true);
if (SOUNDVAL_RISING_EDGE(0x01))
if (state)
m_samples->stop(0);
}
WRITE_LINE_MEMBER(cinemat_state::warrior_sound1_w)
{
/* hi level - 0=on, 1=off */
if (SOUNDVAL_FALLING_EDGE(0x02))
if (!state)
m_samples->start(1, 1, true);
if (SOUNDVAL_RISING_EDGE(0x02))
if (state)
m_samples->stop(1);
}
WRITE_LINE_MEMBER(cinemat_state::warrior_sound2_w)
{
/* explosion - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x04))
if (!state)
m_samples->start(2, 2);
}
WRITE_LINE_MEMBER(cinemat_state::warrior_sound3_w)
{
/* fall - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x08))
if (!state)
m_samples->start(3, 3);
}
WRITE_LINE_MEMBER(cinemat_state::warrior_sound4_w)
{
/* appear - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x10))
if (!state)
m_samples->start(4, 4);
}
SOUND_RESET_MEMBER( cinemat_state, warrior )
{
generic_init(&cinemat_state::warrior_sound_w);
}
MACHINE_CONFIG_START( warrior_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, warrior)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, warrior_sound0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, warrior_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cinemat_state, warrior_sound2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cinemat_state, warrior_sound3_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, warrior_sound4_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -583,14 +613,17 @@ static const char *const armora_sample_names[] =
nullptr
};
void cinemat_state::armora_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::armora_sound4_w)
{
/* on the rising edge of bit 0x10, clock bit 0x80 into the shift register */
if (SOUNDVAL_RISING_EDGE(0x10))
m_current_shift = ((m_current_shift >> 1) & 0x7f) | (sound_val & 0x80);
if (state)
m_current_shift = ((m_current_shift >> 1) & 0x7f) | (m_outlatch->q7_r() << 7);
}
WRITE_LINE_MEMBER(cinemat_state::armora_sound0_w)
{
/* execute on the rising edge of bit 0x01 */
if (SOUNDVAL_RISING_EDGE(0x01))
if (state)
{
/* bits 0-4 control the tank sound speed */
@ -613,34 +646,43 @@ void cinemat_state::armora_sound_w(uint8_t sound_val, uint8_t bits_changed)
/* remember the previous value */
m_last_shift = m_current_shift;
}
}
WRITE_LINE_MEMBER(cinemat_state::armora_sound1_w)
{
/* tank sound - 0=on, 1=off */
/* still not totally correct - should be multiple speeds based on remaining bits in shift reg */
if (SOUNDVAL_FALLING_EDGE(0x02))
if (!state)
m_samples->start(4, 4, true);
if (SOUNDVAL_RISING_EDGE(0x02))
if (state)
m_samples->stop(4);
}
WRITE_LINE_MEMBER(cinemat_state::armora_sound2_w)
{
/* beep sound - 0=on, 1=off */
if (SOUNDVAL_FALLING_EDGE(0x04))
if (!state)
m_samples->start(5, 5, true);
if (SOUNDVAL_RISING_EDGE(0x04))
if (state)
m_samples->stop(5);
}
WRITE_LINE_MEMBER(cinemat_state::armora_sound3_w)
{
/* chopper sound - 0=on, 1=off */
if (SOUNDVAL_FALLING_EDGE(0x08))
if (!state)
m_samples->start(6, 6, true);
if (SOUNDVAL_RISING_EDGE(0x08))
if (state)
m_samples->stop(6);
}
SOUND_RESET_MEMBER( cinemat_state, armora )
{
generic_init(&cinemat_state::armora_sound_w);
}
MACHINE_CONFIG_START( armora_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, armora)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, armora_sound0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, armora_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cinemat_state, armora_sound2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cinemat_state, armora_sound3_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, armora_sound4_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -677,14 +719,17 @@ static const char *const ripoff_sample_names[] =
nullptr
};
void cinemat_state::ripoff_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::ripoff_sound1_w)
{
/* on the rising edge of bit 0x02, clock bit 0x01 into the shift register */
if (SOUNDVAL_RISING_EDGE(0x02))
m_current_shift = ((m_current_shift >> 1) & 0x7f) | ((sound_val << 7) & 0x80);
if (state)
m_current_shift = ((m_current_shift >> 1) & 0x7f) | (m_outlatch->q0_r() << 7);
}
WRITE_LINE_MEMBER(cinemat_state::ripoff_sound2_w)
{
/* execute on the rising edge of bit 0x04 */
if (SOUNDVAL_RISING_EDGE(0x04))
if (state)
{
/* background - 0=on, 1=off, selected by bits 0x38 */
if ((((m_current_shift ^ m_last_shift) & 0x38) && !(m_current_shift & 0x04)) || SHIFTREG_FALLING_EDGE(0x04))
@ -705,27 +750,36 @@ void cinemat_state::ripoff_sound_w(uint8_t sound_val, uint8_t bits_changed)
/* remember the previous value */
m_last_shift = m_current_shift;
}
}
WRITE_LINE_MEMBER(cinemat_state::ripoff_sound3_w)
{
/* torpedo - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x08))
if (!state)
m_samples->start(2, 2);
}
WRITE_LINE_MEMBER(cinemat_state::ripoff_sound4_w)
{
/* laser - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x10))
if (!state)
m_samples->start(3, 3);
}
WRITE_LINE_MEMBER(cinemat_state::ripoff_sound7_w)
{
/* explosion - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x80))
if (!state)
m_samples->start(4, 4);
}
SOUND_RESET_MEMBER( cinemat_state, ripoff )
{
generic_init(&cinemat_state::ripoff_sound_w);
}
MACHINE_CONFIG_START( ripoff_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, ripoff)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, ripoff_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cinemat_state, ripoff_sound2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cinemat_state, ripoff_sound3_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, ripoff_sound4_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(cinemat_state, ripoff_sound7_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -757,16 +811,17 @@ static const char *const starcas_sample_names[] =
nullptr
};
void cinemat_state::starcas_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::starcas_sound4_w)
{
uint32_t target_pitch;
/* on the rising edge of bit 0x10, clock bit 0x80 into the shift register */
if (SOUNDVAL_RISING_EDGE(0x10))
m_current_shift = ((m_current_shift >> 1) & 0x7f) | (sound_val & 0x80);
if (state)
m_current_shift = ((m_current_shift >> 1) & 0x7f) | (m_outlatch->q7_r() << 7);
}
WRITE_LINE_MEMBER(cinemat_state::starcas_sound0_w)
{
/* execute on the rising edge of bit 0x01 */
if (SOUNDVAL_RISING_EDGE(0x01))
if (state)
{
/* fireball - falling edge */
if (SHIFTREG_FALLING_EDGE(0x80))
@ -795,7 +850,7 @@ void cinemat_state::starcas_sound_w(uint8_t sound_val, uint8_t bits_changed)
m_samples->stop(4);
/* latch the drone pitch */
target_pitch = (m_current_shift & 7) + ((m_current_shift & 2) << 2);
u32 target_pitch = (m_current_shift & 7) + ((m_current_shift & 2) << 2);
target_pitch = 0x5800 + (target_pitch << 12);
/* once per frame slide the pitch toward the target */
@ -812,27 +867,36 @@ void cinemat_state::starcas_sound_w(uint8_t sound_val, uint8_t bits_changed)
/* remember the previous value */
m_last_shift = m_current_shift;
}
}
WRITE_LINE_MEMBER(cinemat_state::starcas_sound1_w)
{
/* loud explosion - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x02))
if (!state)
m_samples->start(5, 5);
}
WRITE_LINE_MEMBER(cinemat_state::starcas_sound2_w)
{
/* soft explosion - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x04))
if (!state)
m_samples->start(6, 6);
}
WRITE_LINE_MEMBER(cinemat_state::starcas_sound3_w)
{
/* player fire - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x08))
if (!state)
m_samples->start(7, 7);
}
SOUND_RESET_MEMBER( cinemat_state, starcas )
{
generic_init(&cinemat_state::starcas_sound_w);
}
MACHINE_CONFIG_START( starcas_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, starcas)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, starcas_sound0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, starcas_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cinemat_state, starcas_sound2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cinemat_state, starcas_sound3_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, starcas_sound4_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -864,14 +928,17 @@ static const char *const solarq_sample_names[] =
nullptr
};
void cinemat_state::solarq_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::solarq_sound4_w)
{
/* on the rising edge of bit 0x10, clock bit 0x80 into the shift register */
if (SOUNDVAL_RISING_EDGE(0x10))
m_current_shift = ((m_current_shift >> 1) & 0x7fff) | ((sound_val << 8) & 0x8000);
if (state)
m_current_shift = ((m_current_shift >> 1) & 0x7fff) | (m_outlatch->q7_r() << 15);
}
WRITE_LINE_MEMBER(cinemat_state::solarq_sound1_w)
{
/* execute on the rising edge of bit 0x02 */
if (SOUNDVAL_RISING_EDGE(0x02))
if (state)
{
/* only the upper 8 bits matter */
m_current_shift >>= 8;
@ -929,9 +996,12 @@ void cinemat_state::solarq_sound_w(uint8_t sound_val, uint8_t bits_changed)
/* remember the previous value */
m_last_shift = m_current_shift;
}
}
WRITE_LINE_MEMBER(cinemat_state::solarq_sound0_w)
{
/* clock music data on the rising edge of bit 0x01 */
if (SOUNDVAL_RISING_EDGE(0x01))
if (state)
{
int freq, vol;
@ -954,13 +1024,11 @@ void cinemat_state::solarq_sound_w(uint8_t sound_val, uint8_t bits_changed)
}
}
SOUND_RESET_MEMBER( cinemat_state, solarq )
{
generic_init(&cinemat_state::solarq_sound_w);
}
MACHINE_CONFIG_START( solarq_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, solarq)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, solarq_sound0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, solarq_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, solarq_sound4_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -996,14 +1064,17 @@ static const char *const boxingb_sample_names[] =
nullptr
};
void cinemat_state::boxingb_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::boxingb_sound4_w)
{
/* on the rising edge of bit 0x10, clock bit 0x80 into the shift register */
if (SOUNDVAL_RISING_EDGE(0x10))
m_current_shift = ((m_current_shift >> 1) & 0x7fff) | ((sound_val << 8) & 0x8000);
if (state)
m_current_shift = ((m_current_shift >> 1) & 0x7fff) | (m_outlatch->q7_r() << 15);
}
WRITE_LINE_MEMBER(cinemat_state::boxingb_sound1_w)
{
/* execute on the rising edge of bit 0x02 */
if (SOUNDVAL_RISING_EDGE(0x02))
if (state)
{
/* only the upper 8 bits matter */
m_current_shift >>= 8;
@ -1045,9 +1116,12 @@ void cinemat_state::boxingb_sound_w(uint8_t sound_val, uint8_t bits_changed)
/* remember the previous value */
m_last_shift = m_current_shift;
}
}
WRITE_LINE_MEMBER(cinemat_state::boxingb_sound0_w)
{
/* clock music data on the rising edge of bit 0x01 */
if (SOUNDVAL_RISING_EDGE(0x01))
if (state)
{
int freq, vol;
@ -1072,23 +1146,29 @@ void cinemat_state::boxingb_sound_w(uint8_t sound_val, uint8_t bits_changed)
/* remember the previous value */
m_last_shift2 = m_current_shift;
}
}
WRITE_LINE_MEMBER(cinemat_state::boxingb_sound2_w)
{
/* bounce - rising edge */
if (SOUNDVAL_RISING_EDGE(0x04))
if (state)
m_samples->start(10, 10);
}
WRITE_LINE_MEMBER(cinemat_state::boxingb_sound3_w)
{
/* bell - falling edge */
if (SOUNDVAL_RISING_EDGE(0x08))
if (state)
m_samples->start(11, 11);
}
SOUND_RESET_MEMBER( cinemat_state, boxingb )
{
generic_init(&cinemat_state::boxingb_sound_w);
}
MACHINE_CONFIG_START( boxingb_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, boxingb)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, boxingb_sound0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, boxingb_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cinemat_state, boxingb_sound2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cinemat_state, boxingb_sound3_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, boxingb_sound4_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -1120,16 +1200,17 @@ static const char *const wotw_sample_names[] =
nullptr
};
void cinemat_state::wotw_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::wotw_sound4_w)
{
uint32_t target_pitch;
/* on the rising edge of bit 0x10, clock bit 0x80 into the shift register */
if (SOUNDVAL_RISING_EDGE(0x10))
m_current_shift = ((m_current_shift >> 1) & 0x7f) | (sound_val & 0x80);
if (state)
m_current_shift = ((m_current_shift >> 1) & 0x7f) | (m_outlatch->q7_r() << 7);
}
WRITE_LINE_MEMBER(cinemat_state::wotw_sound0_w)
{
/* execute on the rising edge of bit 0x01 */
if (SOUNDVAL_RISING_EDGE(0x01))
if (state)
{
/* fireball - falling edge */
if (SHIFTREG_FALLING_EDGE(0x80))
@ -1158,7 +1239,7 @@ void cinemat_state::wotw_sound_w(uint8_t sound_val, uint8_t bits_changed)
m_samples->stop(4);
/* latch the drone pitch */
target_pitch = (m_current_shift & 7) + ((m_current_shift & 2) << 2);
u32 target_pitch = (m_current_shift & 7) + ((m_current_shift & 2) << 2);
target_pitch = 0x10000 + (target_pitch << 12);
/* once per frame slide the pitch toward the target */
@ -1175,27 +1256,36 @@ void cinemat_state::wotw_sound_w(uint8_t sound_val, uint8_t bits_changed)
/* remember the previous value */
m_last_shift = m_current_shift;
}
}
WRITE_LINE_MEMBER(cinemat_state::wotw_sound1_w)
{
/* loud explosion - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x02))
if (!state)
m_samples->start(5, 5);
}
WRITE_LINE_MEMBER(cinemat_state::wotw_sound2_w)
{
/* soft explosion - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x04))
if (!state)
m_samples->start(6, 6);
}
WRITE_LINE_MEMBER(cinemat_state::wotw_sound3_w)
{
/* player fire - falling edge */
if (SOUNDVAL_FALLING_EDGE(0x08))
if (!state)
m_samples->start(7, 7);
}
SOUND_RESET_MEMBER( cinemat_state, wotw )
{
generic_init(&cinemat_state::wotw_sound_w);
}
MACHINE_CONFIG_START( wotw_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, wotw)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, wotw_sound0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cinemat_state, wotw_sound1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cinemat_state, wotw_sound2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cinemat_state, wotw_sound3_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, wotw_sound4_w))
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -1220,14 +1310,11 @@ TIMER_CALLBACK_MEMBER( cinemat_state::synced_sound_w )
}
void cinemat_state::demon_sound_w(uint8_t sound_val, uint8_t bits_changed)
WRITE_LINE_MEMBER(cinemat_state::demon_sound4_w)
{
/* all inputs are inverted */
sound_val = ~sound_val;
/* watch for a 0->1 edge on bit 4 ("shift in") to clock in the new data */
if ((bits_changed & 0x10) && (sound_val & 0x10))
machine().scheduler().synchronize(timer_expired_delegate(FUNC(cinemat_state::synced_sound_w), this), sound_val & 0x0f);
if (state)
machine().scheduler().synchronize(timer_expired_delegate(FUNC(cinemat_state::synced_sound_w), this), ~m_outlatch->output_state() & 0x0f);
}
@ -1270,7 +1357,7 @@ WRITE8_MEMBER(cinemat_state::sound_output_w)
SOUND_RESET_MEMBER( cinemat_state, demon )
{
/* generic init */
generic_init(&cinemat_state::demon_sound_w);
sound_reset();
/* reset the FIFO */
m_sound_fifo_in = m_sound_fifo_out = 0;
@ -1321,6 +1408,9 @@ MACHINE_CONFIG_START( demon_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, demon)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, demon_sound4_w))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -1348,17 +1438,16 @@ MACHINE_CONFIG_END
*
*************************************/
WRITE8_MEMBER(cinemat_state::qb3_sound_w)
WRITE_LINE_MEMBER(cinemat_state::qb3_sound4_w)
{
uint16_t rega = m_maincpu->state_int(ccpu_cpu_device::CCPU_A);
demon_sound_w(0x00 | (~rega & 0x0f), 0x10);
machine().scheduler().synchronize(timer_expired_delegate(FUNC(cinemat_state::synced_sound_w), this), ~rega & 0x0f);
}
SOUND_RESET_MEMBER( cinemat_state, qb3 )
{
SOUND_RESET_CALL_MEMBER(demon);
m_maincpu->space(AS_IO).install_write_handler(0x04, 0x04, write8_delegate(FUNC(cinemat_state::qb3_sound_w),this));
/* this patch prevents the sound ROM from eating itself when command $0A is sent */
/* on a cube rotate */
@ -1368,4 +1457,7 @@ SOUND_RESET_MEMBER( cinemat_state, qb3 )
MACHINE_CONFIG_DERIVED( qb3_sound, demon_sound )
MCFG_SOUND_RESET_OVERRIDE(cinemat_state, qb3)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cinemat_state, qb3_sound4_w))
MACHINE_CONFIG_END

79
src/mame/audio/copsnrob.cpp
View File

@ -5,6 +5,7 @@
* Nov 2010, Derrick Renaud
************************************************************************/
#include "emu.h"
#include "speaker.h"
#include "includes/copsnrob.h"
#include "sound/discrete.h"
@ -589,7 +590,7 @@ DISCRETE_RESET(copsnrob_zings_555_astable)
************************************************/
DISCRETE_SOUND_START(copsnrob)
static DISCRETE_SOUND_START(copsnrob)
/************************************************
* Input register mapping
@ -687,57 +688,29 @@ DISCRETE_SOUND_START(copsnrob)
DISCRETE_SOUND_END
WRITE8_MEMBER(copsnrob_state::copsnrob_misc_w)
WRITE_LINE_MEMBER(copsnrob_state::one_start_w)
{
uint8_t latched_data = m_ic_h3_data;
uint8_t special_data = data & 0x01;
/* ignore if no change */
if (((latched_data >> offset) & 0x01) == special_data)
return;
if (special_data)
latched_data |= 1 << offset;
else
latched_data &= ~(1 << offset);
switch (offset)
{
case 0x00:
m_discrete->write(space, COPSNROB_MOTOR3_INV, special_data);
break;
case 0x01:
m_discrete->write(space, COPSNROB_MOTOR2_INV, special_data);
break;
case 0x02:
m_discrete->write(space, COPSNROB_MOTOR1_INV, special_data);
break;
case 0x03:
m_discrete->write(space, COPSNROB_MOTOR0_INV, special_data);
break;
case 0x04:
m_discrete->write(space, COPSNROB_SCREECH_INV, special_data);
break;
case 0x05:
m_discrete->write(space, COPSNROB_CRASH_INV, special_data);
break;
case 0x06:
/* One Start */
output().set_led_value(0, !special_data);
break;
case 0x07:
m_discrete->write(space, COPSNROB_AUDIO_ENABLE, special_data);
//machine().sound().system_mute(special_data);
break;
}
m_ic_h3_data = latched_data;
/* One Start */
output().set_led_value(0, !state);
}
MACHINE_CONFIG_START( copsnrob_audio )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("discrete", DISCRETE, 0)
MCFG_DISCRETE_INTF(copsnrob)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
MCFG_DEVICE_ADD("latch", F9334, 0) // H3 on audio board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<COPSNROB_MOTOR3_INV>))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<COPSNROB_MOTOR2_INV>))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<COPSNROB_MOTOR1_INV>))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<COPSNROB_MOTOR0_INV>))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<COPSNROB_SCREECH_INV>))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<COPSNROB_CRASH_INV>))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(copsnrob_state, one_start_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<COPSNROB_AUDIO_ENABLE>))
MACHINE_CONFIG_END

4
src/mame/audio/jedi.cpp
View File

@ -70,9 +70,9 @@ WRITE8_MEMBER(jedi_state::irq_ack_w)
*
*************************************/
WRITE8_MEMBER(jedi_state::jedi_audio_reset_w)
WRITE_LINE_MEMBER(jedi_state::audio_reset_w)
{
m_audiocpu->set_input_line(INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
m_audiocpu->set_input_line(INPUT_LINE_RESET, state ? CLEAR_LINE : ASSERT_LINE);
}

52
src/mame/audio/sprint8.cpp
View File

@ -8,6 +8,8 @@
#include "emu.h"
#include "includes/sprint8.h"
#include "speaker.h"
/* Discrete Sound Input Nodes */
#define SPRINT8_CRASH_EN NODE_01
@ -294,23 +296,39 @@ DISCRETE_SOUND_START( sprint8 )
DISCRETE_TASK_END()
DISCRETE_SOUND_END
MACHINE_CONFIG_START( sprint8_audio )
/* sound hardware */
/* the proper way is to hook up 4 speakers, but they are not really
* F/R/L/R speakers. Though you can pretend the 1-2 mix is the front. */
MCFG_SPEAKER_ADD("speaker_1_2", 0.0, 0.0, 1.0) /* front */
MCFG_SPEAKER_ADD("speaker_3_7", -0.2, 0.0, 1.0) /* left */
MCFG_SPEAKER_ADD("speaker_5_6", 0.0, 0.0, -0.5) /* back */
MCFG_SPEAKER_ADD("speaker_4_8", 0.2, 0.0, 1.0) /* right */
WRITE8_MEMBER(sprint8_state::crash_w)
{
m_discrete->write(space, SPRINT8_CRASH_EN, data & 0x01);
}
MCFG_SOUND_ADD("discrete", DISCRETE, 0)
MCFG_DISCRETE_INTF(sprint8)
MCFG_SOUND_ROUTE(0, "speaker_1_2", 1.0)
/* volumes on other channels defaulted to off, */
/* user can turn them up if needed. */
/* The game does not sound good with all channels mixed to stereo. */
MCFG_SOUND_ROUTE(1, "speaker_3_7", 0.0)
MCFG_SOUND_ROUTE(2, "speaker_5_6", 0.0)
MCFG_SOUND_ROUTE(3, "speaker_4_8", 0.0)
WRITE8_MEMBER(sprint8_state::screech_w)
{
m_discrete->write(space, SPRINT8_SCREECH_EN, data & 0x01);
}
MCFG_DEVICE_ADD("latch", F9334, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(sprint8_state, int_reset_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_CRASH_EN>))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_SCREECH_EN>))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(sprint8_state, team_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_ATTRACT_EN>))
WRITE8_MEMBER(sprint8_state::attract_w)
{
m_discrete->write(space, SPRINT8_ATTRACT_EN, data & 0x01);
}
WRITE8_MEMBER(sprint8_state::motor_w)
{
m_discrete->write(space, NODE_RELATIVE(SPRINT8_MOTOR1_EN, offset & 0x07), data & 0x01);
}
MCFG_DEVICE_ADD("motor", F9334, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_MOTOR1_EN>))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_MOTOR2_EN>))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_MOTOR3_EN>))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_MOTOR4_EN>))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_MOTOR5_EN>))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_MOTOR6_EN>))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_MOTOR7_EN>))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<SPRINT8_MOTOR8_EN>))
MACHINE_CONFIG_END

20
src/mame/audio/subs.cpp
View File

@ -14,26 +14,6 @@
sub sound functions
***************************************************************************/
WRITE8_MEMBER(subs_state::sonar1_w)
{
m_discrete->write(space, SUBS_SONAR1_EN, offset & 0x01);
}
WRITE8_MEMBER(subs_state::sonar2_w)
{
m_discrete->write(space, SUBS_SONAR2_EN, offset & 0x01);
}
WRITE8_MEMBER(subs_state::crash_w)
{
m_discrete->write(space, SUBS_CRASH_EN, offset & 0x01);
}
WRITE8_MEMBER(subs_state::explode_w)
{
m_discrete->write(space, SUBS_EXPLODE_EN, offset & 0x01);
}
WRITE8_MEMBER(subs_state::noise_reset_w)
{
/* Pulse noise reset */

13
src/mame/audio/timeplt.cpp
View File

@ -122,15 +122,22 @@ WRITE8_MEMBER( timeplt_audio_device::filter_w )
*
*************************************/
WRITE8_MEMBER( timeplt_audio_device::sh_irqtrigger_w )
WRITE_LINE_MEMBER(timeplt_audio_device::sh_irqtrigger_w)
{
if (m_last_irq_state == 0 && data)
if (m_last_irq_state == 0 && state)
{
/* setting bit 0 low then high triggers IRQ on the sound CPU */
m_soundcpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
}
m_last_irq_state = data;
m_last_irq_state = state;
}
WRITE_LINE_MEMBER(timeplt_audio_device::mute_w)
{
// controls pin 6 (DC audio mute) of LA4460 amplifier
machine().sound().system_mute(state);
}

7
src/mame/audio/timeplt.h
View File

@ -14,9 +14,10 @@ class timeplt_audio_device : public device_t, public device_sound_interface
public:
timeplt_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE8_MEMBER( sh_irqtrigger_w );
DECLARE_WRITE8_MEMBER( filter_w );
DECLARE_READ8_MEMBER( portB_r );
DECLARE_WRITE_LINE_MEMBER(sh_irqtrigger_w);
DECLARE_WRITE_LINE_MEMBER(mute_w);
DECLARE_WRITE8_MEMBER(filter_w);
DECLARE_READ8_MEMBER(portB_r);
protected:
// device-level overrides

65
src/mame/drivers/ambush.cpp
View File

@ -45,6 +45,7 @@
#include "emu.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/watchdog.h"
#include "sound/ay8910.h"
#include "screen.h"
@ -61,6 +62,7 @@ public:
ambush_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_gfxdecode(*this, "gfxdecode"),
m_outlatch(*this, "outlatch%u", 1),
m_video_ram(*this, "video_ram"),
m_sprite_ram(*this, "sprite_ram"),
m_attribute_ram(*this, "attribute_ram"),
@ -80,21 +82,24 @@ public:
TILE_GET_INFO_MEMBER(mariobl_char_tile_info);
TILE_GET_INFO_MEMBER(dkong3abl_char_tile_info);
DECLARE_WRITE8_MEMBER(flip_screen_w);
DECLARE_WRITE_LINE_MEMBER(flip_screen_w);
DECLARE_WRITE8_MEMBER(scroll_ram_w);
DECLARE_WRITE8_MEMBER(color_bank_w);
DECLARE_WRITE_LINE_MEMBER(color_bank_1_w);
DECLARE_WRITE_LINE_MEMBER(color_bank_2_w);
DECLARE_MACHINE_START(ambush);
DECLARE_MACHINE_START(mariobl);
DECLARE_MACHINE_START(dkong3abl);
DECLARE_WRITE8_MEMBER(coin_counter_w);
DECLARE_WRITE8_MEMBER(unk_w);
DECLARE_WRITE_LINE_MEMBER(coin_counter_1_w);
DECLARE_WRITE_LINE_MEMBER(coin_counter_2_w);
DECLARE_WRITE8_MEMBER(output_latches_w);
private:
void register_save_states();
required_device<gfxdecode_device> m_gfxdecode;
optional_device_array<ls259_device, 2> m_outlatch;
required_shared_ptr<uint8_t> m_video_ram;
required_shared_ptr<uint8_t> m_sprite_ram;
required_shared_ptr<uint8_t> m_attribute_ram;
@ -120,10 +125,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, ambush_state )
AM_RANGE(0xc200, 0xc3ff) AM_RAM AM_SHARE("sprite_ram")
AM_RANGE(0xc400, 0xc7ff) AM_RAM AM_SHARE("video_ram")
AM_RANGE(0xc800, 0xc800) AM_READ_PORT("sw1")
AM_RANGE(0xcc00, 0xcc03) AM_WRITE(unk_w)
AM_RANGE(0xcc04, 0xcc04) AM_WRITE(flip_screen_w)
AM_RANGE(0xcc05, 0xcc05) AM_WRITE(color_bank_w)
AM_RANGE(0xcc07, 0xcc07) AM_WRITE(coin_counter_w)
AM_RANGE(0xcc00, 0xcc07) AM_WRITE(output_latches_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( main_portmap, AS_IO, 8, ambush_state )
@ -145,8 +147,7 @@ static ADDRESS_MAP_START( bootleg_map, AS_PROGRAM, 8, ambush_state )
AM_RANGE(0x8000, 0x9fff) AM_ROM
AM_RANGE(0xa000, 0xa000) AM_DEVREAD("watchdog", watchdog_timer_device, reset_r)
AM_RANGE(0xa100, 0xa100) AM_READ_PORT("sw1")
AM_RANGE(0xa204, 0xa204) AM_WRITE(coin_counter_w)
AM_RANGE(0xa206, 0xa206) AM_WRITE(color_bank_w)
AM_RANGE(0xa200, 0xa207) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0xb000, 0xbfff) AM_ROM
AM_RANGE(0xe000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -508,9 +509,9 @@ uint32_t ambush_state::screen_update_bootleg(screen_device &screen, bitmap_ind16
return 0;
}
WRITE8_MEMBER( ambush_state::flip_screen_w )
WRITE_LINE_MEMBER(ambush_state::flip_screen_w)
{
flip_screen_set(data);
flip_screen_set(state);
}
WRITE8_MEMBER( ambush_state::scroll_ram_w )
@ -519,9 +520,14 @@ WRITE8_MEMBER( ambush_state::scroll_ram_w )
m_char_tilemap->set_scrolly(offset, data + 1);
}
WRITE8_MEMBER( ambush_state::color_bank_w )
WRITE_LINE_MEMBER(ambush_state::color_bank_1_w)
{
m_color_bank = data & 0x03;
m_color_bank = (m_color_bank & 0x02) | (state ? 0x01 : 0x00);
}
WRITE_LINE_MEMBER(ambush_state::color_bank_2_w)
{
m_color_bank = (m_color_bank & 0x01) | (state ? 0x02 : 0x00);
}
@ -651,15 +657,20 @@ MACHINE_START_MEMBER( ambush_state, dkong3abl )
m_char_tilemap->set_transparent_pen(0);
}
WRITE8_MEMBER( ambush_state::coin_counter_w )
WRITE_LINE_MEMBER(ambush_state::coin_counter_1_w)
{
machine().bookkeeping().coin_counter_w(0, data & 0x01);
machine().bookkeeping().coin_counter_w(1, data & 0x02);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE8_MEMBER( ambush_state::unk_w )
WRITE_LINE_MEMBER(ambush_state::coin_counter_2_w)
{
logerror("unk_w: %02x = %02x\n", offset, data);
machine().bookkeeping().coin_counter_w(1, state);
}
WRITE8_MEMBER(ambush_state::output_latches_w)
{
m_outlatch[0]->write_bit(offset, BIT(data, 0));
m_outlatch[1]->write_bit(offset, BIT(data, 1));
}
@ -673,6 +684,15 @@ static MACHINE_CONFIG_START( ambush )
MCFG_CPU_IO_MAP(main_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", ambush_state, irq0_line_hold)
// addressable latches at 8B and 8C
MCFG_DEVICE_ADD("outlatch1", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(ambush_state, flip_screen_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(ambush_state, color_bank_1_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(ambush_state, coin_counter_1_w))
MCFG_DEVICE_ADD("outlatch2", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(ambush_state, color_bank_2_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(ambush_state, coin_counter_2_w))
MCFG_WATCHDOG_ADD("watchdog")
MCFG_MACHINE_START_OVERRIDE(ambush_state, ambush)
@ -703,6 +723,13 @@ static MACHINE_CONFIG_DERIVED( mariobl, ambush )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(bootleg_map)
// To be verified: do these bootlegs only have one LS259?
MCFG_DEVICE_REMOVE("outlatch1")
MCFG_DEVICE_REMOVE("outlatch2")
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(ambush_state, coin_counter_1_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(ambush_state, color_bank_1_w))
MCFG_MACHINE_START_OVERRIDE(ambush_state, mariobl)
MCFG_SCREEN_MODIFY("screen")

139
src/mame/drivers/apple2.cpp
View File

@ -42,6 +42,7 @@ II Plus: RAM options reduced to 16/32/48 KB.
#include "includes/apple2.h"
#include "video/apple2.h"
#include "machine/74259.h"
#include "machine/bankdev.h"
#include "imagedev/flopdrv.h"
@ -112,7 +113,8 @@ public:
m_sysconfig(*this, "a2_config"),
m_speaker(*this, A2_SPEAKER_TAG),
m_cassette(*this, A2_CASSETTE_TAG),
m_upperbank(*this, A2_UPPERBANK_TAG)
m_upperbank(*this, A2_UPPERBANK_TAG),
m_softlatch(*this, "softlatch")
{ }
required_device<cpu_device> m_maincpu;
@ -128,6 +130,7 @@ public:
required_device<speaker_sound_device> m_speaker;
required_device<cassette_image_device> m_cassette;
required_device<address_map_bank_device> m_upperbank;
required_device<addressable_latch_device> m_softlatch;
TIMER_DEVICE_CALLBACK_MEMBER(apple2_interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(ay3600_repeat);
@ -143,6 +146,14 @@ public:
DECLARE_WRITE8_MEMBER(ram_w);
DECLARE_READ8_MEMBER(c000_r);
DECLARE_WRITE8_MEMBER(c000_w);
DECLARE_WRITE_LINE_MEMBER(txt_w);
DECLARE_WRITE_LINE_MEMBER(mix_w);
DECLARE_WRITE_LINE_MEMBER(scr_w);
DECLARE_WRITE_LINE_MEMBER(res_w);
DECLARE_WRITE_LINE_MEMBER(an0_w);
DECLARE_WRITE_LINE_MEMBER(an1_w);
DECLARE_WRITE_LINE_MEMBER(an2_w);
DECLARE_WRITE_LINE_MEMBER(an3_w);
DECLARE_READ8_MEMBER(c080_r);
DECLARE_WRITE8_MEMBER(c080_w);
DECLARE_READ8_MEMBER(c100_r);
@ -489,70 +500,11 @@ void napple2_state::do_io(address_space &space, int offset)
m_speaker->level_w(m_speaker_state);
break;
case 0x50: // graphics mode
machine().first_screen()->update_now();
m_video->m_graphics = true; break;
case 0x51: // text mode
machine().first_screen()->update_now();
m_video->m_graphics = false; break;
case 0x52: // no mix
machine().first_screen()->update_now();
m_video->m_mix = false; break;
case 0x53: // mixed mode
machine().first_screen()->update_now();
m_video->m_mix = true; break;
case 0x54: // set page 1
machine().first_screen()->update_now();
m_page2 = false;
m_video->m_page2 = false;
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
m_softlatch->write_bit((offset & 0x0e) >> 1, offset & 0x01);
break;
case 0x55: // set page 2
machine().first_screen()->update_now();
m_page2 = true;
m_video->m_page2 = true;
break;
case 0x56: // select lo-res
machine().first_screen()->update_now();
m_video->m_hires = false; break;
case 0x57: // select hi-res
machine().first_screen()->update_now();
m_video->m_hires = true; break;
case 0x58: // AN0 off
m_an0 = false; break;
case 0x59: // AN0 on
m_an0 = true; break;
case 0x5a: // AN1 off
m_an1 = false; break;
case 0x5b: // AN1 on
m_an1 = true; break;
case 0x5c: // AN2 off
m_an2 = false;
m_video->m_an2 = false;
break;
case 0x5d: // AN2 on
m_an2 = true;
m_video->m_an2 = true;
break;
case 0x5e: // AN3 off
m_an3 = false; break;
case 0x5f: // AN3 on
m_an3 = true; break;
case 0x68: // IIgs STATE register, which ProDOS touches
break;
@ -566,6 +518,56 @@ void napple2_state::do_io(address_space &space, int offset)
}
}
WRITE_LINE_MEMBER(napple2_state::txt_w)
{
// select graphics or text mode
machine().first_screen()->update_now();
m_video->m_graphics = !state;
}
WRITE_LINE_MEMBER(napple2_state::mix_w)
{
// select mixed mode or nomix
machine().first_screen()->update_now();
m_video->m_mix = state;
}
WRITE_LINE_MEMBER(napple2_state::scr_w)
{
// select primary or secondary page
machine().first_screen()->update_now();
m_page2 = state;
m_video->m_page2 = state;
}
WRITE_LINE_MEMBER(napple2_state::res_w)
{
// select lo-res or hi-res
machine().first_screen()->update_now();
m_video->m_hires = state;
}
WRITE_LINE_MEMBER(napple2_state::an0_w)
{
m_an0 = state;
}
WRITE_LINE_MEMBER(napple2_state::an1_w)
{
m_an1 = state;
}
WRITE_LINE_MEMBER(napple2_state::an2_w)
{
m_an2 = state;
m_video->m_an2 = state;
}
WRITE_LINE_MEMBER(napple2_state::an3_w)
{
m_an3 = state;
}
READ8_MEMBER(napple2_state::c000_r)
{
switch (offset)
@ -1345,6 +1347,17 @@ static MACHINE_CONFIG_START( apple2_common )
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x3000)
/* soft switches */
MCFG_DEVICE_ADD("softlatch", F9334, 0) // F14 (labeled 74LS259 on some boards and in the Apple ][ Reference Manual)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(napple2_state, txt_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(napple2_state, mix_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(napple2_state, scr_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(napple2_state, res_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(napple2_state, an0_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(napple2_state, an1_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(napple2_state, an2_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(napple2_state, an3_w))
/* keyboard controller */
MCFG_DEVICE_ADD(A2_KBDC_TAG, AY3600, 0)
MCFG_AY3600_MATRIX_X0(IOPORT("X0"))

43
src/mame/drivers/asteroid.cpp
View File

@ -189,6 +189,7 @@ There is not a rev 03 known or dumped. An Asteroids rev 03 is not mentioned in a
#include "includes/asteroid.h"
#include "audio/llander.h"
#include "cpu/m6502/m6502.h"
#include "machine/74259.h"
#include "machine/atari_vg.h"
#include "machine/watchdog.h"
#include "sound/discrete.h"
@ -209,9 +210,19 @@ There is not a rev 03 known or dumped. An Asteroids rev 03 is not mentioned in a
*
*************************************/
WRITE8_MEMBER(asteroid_state::astdelux_coin_counter_w)
WRITE_LINE_MEMBER(asteroid_state::coin_counter_left_w)
{
machine().bookkeeping().coin_counter_w(offset,data);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(asteroid_state::coin_counter_center_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
WRITE_LINE_MEMBER(asteroid_state::coin_counter_right_w)
{
machine().bookkeeping().coin_counter_w(2, state);
}
@ -253,7 +264,7 @@ static ADDRESS_MAP_START( asteroid_map, AS_PROGRAM, 8, asteroid_state )
AM_RANGE(0x3400, 0x3400) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x3600, 0x3600) AM_WRITE(asteroid_explode_w)
AM_RANGE(0x3a00, 0x3a00) AM_WRITE(asteroid_thump_w)
AM_RANGE(0x3c00, 0x3c05) AM_WRITE(asteroid_sounds_w)
AM_RANGE(0x3c00, 0x3c07) AM_DEVWRITE("audiolatch", ls259_device, write_d7)
AM_RANGE(0x3e00, 0x3e00) AM_WRITE(asteroid_noise_reset_w)
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_SHARE("vectorram") AM_REGION("maincpu", 0x4000)
AM_RANGE(0x5000, 0x57ff) AM_ROM /* vector rom */
@ -276,10 +287,7 @@ static ADDRESS_MAP_START( astdelux_map, AS_PROGRAM, 8, asteroid_state )
AM_RANGE(0x3400, 0x3400) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x3600, 0x3600) AM_WRITE(asteroid_explode_w)
AM_RANGE(0x3a00, 0x3a00) AM_DEVWRITE("earom", atari_vg_earom_device, ctrl_w)
AM_RANGE(0x3c00, 0x3c01) AM_WRITE(astdelux_led_w)
AM_RANGE(0x3c03, 0x3c03) AM_WRITE(astdelux_sounds_w)
AM_RANGE(0x3c04, 0x3c04) AM_WRITE(astdelux_bank_switch_w)
AM_RANGE(0x3c05, 0x3c07) AM_WRITE(astdelux_coin_counter_w)
AM_RANGE(0x3c00, 0x3c07) AM_DEVWRITE("audiolatch", ls259_device, write_d7)
AM_RANGE(0x3e00, 0x3e00) AM_WRITE(asteroid_noise_reset_w)
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_SHARE("vectorram") AM_REGION("maincpu", 0x4000)
AM_RANGE(0x4800, 0x57ff) AM_ROM /* vector rom */
@ -651,6 +659,14 @@ static MACHINE_CONFIG_START( asteroid )
MCFG_CPU_PROGRAM_MAP(asteroid_map)
MCFG_CPU_PERIODIC_INT_DRIVER(asteroid_state, asteroid_interrupt, CLOCK_3KHZ/12)
MCFG_DEVICE_ADD("audiolatch", LS259, 0) // M10
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<ASTEROID_SAUCER_SND_EN>))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<ASTEROID_SAUCER_FIRE_EN>))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<ASTEROID_SAUCER_SEL>))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<ASTEROID_THRUST_EN>))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<ASTEROID_SHIP_FIRE_EN>))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<ASTEROID_LIFE_EN>))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
@ -686,6 +702,17 @@ static MACHINE_CONFIG_DERIVED( astdelux, asteroid )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(astdelux_map)
MCFG_DEVICE_MODIFY("audiolatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(asteroid_state, start1_led_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(asteroid_state, start2_led_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(NOOP)
// Q3 still activates the thrusters
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(MEMBANK("ram1"))
MCFG_DEVCB_CHAIN_OUTPUT(MEMBANK("ram2"))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(asteroid_state, coin_counter_left_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(asteroid_state, coin_counter_center_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(asteroid_state, coin_counter_right_w))
MCFG_ATARIVGEAROM_ADD("earom")
/* sound hardware */
@ -707,6 +734,8 @@ static MACHINE_CONFIG_DERIVED( llander, asteroid )
MCFG_CPU_PROGRAM_MAP(llander_map)
MCFG_CPU_PERIODIC_INT_DRIVER(asteroid_state, llander_interrupt, (double)MASTER_CLOCK/4096/12)
MCFG_DEVICE_REMOVE("audiolatch")
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_REFRESH_RATE(CLOCK_3KHZ/12/6)
MCFG_SCREEN_VISIBLE_AREA(522, 1566, 270, 1070)

41
src/mame/drivers/atarisy1.cpp
View File

@ -197,7 +197,6 @@ RoadBlasters (aka Future Vette):005*
#include "machine/atarigen.h"
#include "machine/6522via.h"
#include "machine/watchdog.h"
#include "sound/ym2151.h"
#include "sound/pokey.h"
#include "video/atarimo.h"
#include "speaker.h"
@ -240,6 +239,13 @@ MACHINE_RESET_MEMBER(atarisy1_state,atarisy1)
}
WRITE_LINE_MEMBER(atarisy1_state::music_reset_w)
{
// reset the YM2151 and YM3012
if (!state)
m_ymsnd->reset();
}
/*************************************
*
@ -411,13 +417,31 @@ READ8_MEMBER(atarisy1_state::via_pb_r)
/*************************************
*
* Sound LED handlers
* LED and coin counter handlers
*
*************************************/
WRITE8_MEMBER(atarisy1_state::led_w)
WRITE_LINE_MEMBER(atarisy1_state::led_1_w)
{
output().set_led_value(offset, ~data & 1);
machine().output().set_led_value(0, !state);
}
WRITE_LINE_MEMBER(atarisy1_state::led_2_w)
{
machine().output().set_led_value(1, !state);
}
WRITE_LINE_MEMBER(atarisy1_state::coin_counter_right_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(atarisy1_state::coin_counter_left_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
@ -468,7 +492,7 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, atarisy1_state )
AM_RANGE(0x1800, 0x1801) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
AM_RANGE(0x1810, 0x1810) AM_DEVREADWRITE("soundcomm", atari_sound_comm_device, sound_command_r, sound_response_w)
AM_RANGE(0x1820, 0x1820) AM_READ(switch_6502_r)
AM_RANGE(0x1824, 0x1825) AM_WRITE(led_w)
AM_RANGE(0x1820, 0x1827) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0x1870, 0x187f) AM_DEVREADWRITE("pokey", pokey_device, read, write)
AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -723,6 +747,13 @@ static MACHINE_CONFIG_START( atarisy1 )
MCFG_ATARI_EEPROM_2804_ADD("eeprom")
MCFG_DEVICE_ADD("outlatch", LS259, 0) // 15H (TTL) or 14F (LSI)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(atarisy1_state, music_reset_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(atarisy1_state, led_1_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(atarisy1_state, led_2_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(atarisy1_state, coin_counter_right_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(atarisy1_state, coin_counter_left_w))
MCFG_WATCHDOG_ADD("watchdog")
MCFG_TIMER_DRIVER_ADD("joystick_timer", atarisy1_state, delayed_joystick_int)

47
src/mame/drivers/avalnche.cpp
View File

@ -33,6 +33,7 @@
#include "emu.h"
#include "includes/avalnche.h"
#include "cpu/m6502/m6502.h"
#include "machine/74259.h"
#include "machine/watchdog.h"
#include "sound/discrete.h"
#include "screen.h"
@ -87,9 +88,9 @@ uint32_t avalnche_state::screen_update_avalnche(screen_device &screen, bitmap_rg
*
*************************************/
WRITE8_MEMBER(avalnche_state::avalance_video_invert_w)
WRITE_LINE_MEMBER(avalnche_state::video_invert_w)
{
m_avalance_video_inverted = data & 0x01;
m_avalance_video_inverted = state;
}
WRITE8_MEMBER(avalnche_state::catch_coin_counter_w)
@ -98,19 +99,19 @@ WRITE8_MEMBER(avalnche_state::catch_coin_counter_w)
machine().bookkeeping().coin_counter_w(1, data & 2);
}
WRITE8_MEMBER(avalnche_state::avalance_credit_1_lamp_w)
WRITE_LINE_MEMBER(avalnche_state::credit_1_lamp_w)
{
output().set_led_value(0, data & 1);
output().set_led_value(0, state);
}
WRITE8_MEMBER(avalnche_state::avalance_credit_2_lamp_w)
WRITE_LINE_MEMBER(avalnche_state::credit_2_lamp_w)
{
output().set_led_value(1, data & 1);
output().set_led_value(1, state);
}
WRITE8_MEMBER(avalnche_state::avalance_start_lamp_w)
WRITE_LINE_MEMBER(avalnche_state::start_lamp_w)
{
output().set_led_value(2, data & 1);
output().set_led_value(2, state);
}
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, avalnche_state )
@ -121,12 +122,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, avalnche_state )
AM_RANGE(0x2002, 0x2002) AM_MIRROR(0x0ffc) AM_READ_PORT("PADDLE")
AM_RANGE(0x2003, 0x2003) AM_MIRROR(0x0ffc) AM_READNOP
AM_RANGE(0x3000, 0x3000) AM_MIRROR(0x0fff) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x4000, 0x4000) AM_MIRROR(0x0ff8) AM_WRITE(avalance_credit_1_lamp_w)
AM_RANGE(0x4001, 0x4001) AM_MIRROR(0x0ff8) AM_WRITE(avalnche_attract_enable_w)
AM_RANGE(0x4002, 0x4002) AM_MIRROR(0x0ff8) AM_WRITE(avalance_video_invert_w)
AM_RANGE(0x4003, 0x4003) AM_MIRROR(0x0ff8) AM_WRITE(avalance_credit_2_lamp_w)
AM_RANGE(0x4004, 0x4006) AM_MIRROR(0x0ff8) AM_WRITE(avalnche_audio_w)
AM_RANGE(0x4007, 0x4007) AM_MIRROR(0x0ff8) AM_WRITE(avalance_start_lamp_w)
AM_RANGE(0x4000, 0x4007) AM_MIRROR(0x0ff8) AM_DEVWRITE("latch", f9334_device, write_d0)
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0x0fff) AM_WRITE(avalnche_noise_amplitude_w)
AM_RANGE(0x6000, 0x7fff) AM_ROM
ADDRESS_MAP_END
@ -139,12 +135,7 @@ static ADDRESS_MAP_START( catch_map, AS_PROGRAM, 8, avalnche_state )
AM_RANGE(0x2002, 0x2002) AM_MIRROR(0x0ffc) AM_READ_PORT("PADDLE")
AM_RANGE(0x2003, 0x2003) AM_MIRROR(0x0ffc) AM_READNOP
AM_RANGE(0x3000, 0x3000) AM_MIRROR(0x0fff) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x4000, 0x4000) AM_MIRROR(0x0ff8) AM_WRITE(avalance_credit_1_lamp_w)
// AM_RANGE(0x4001, 0x4001) AM_MIRROR(0x0ff8) AM_WRITE(avalnche_attract_enable_w) /* It is attract_enable just like avalnche, but not hooked up yet. */
AM_RANGE(0x4002, 0x4002) AM_MIRROR(0x0ff8) AM_WRITE(avalance_video_invert_w)
AM_RANGE(0x4003, 0x4003) AM_MIRROR(0x0ff8) AM_WRITE(avalance_credit_2_lamp_w)
AM_RANGE(0x4004, 0x4006) AM_MIRROR(0x0ff8) AM_WRITE(catch_audio_w)
AM_RANGE(0x4007, 0x4007) AM_MIRROR(0x0ff8) AM_WRITE(avalance_start_lamp_w)
AM_RANGE(0x4000, 0x4007) AM_MIRROR(0x0ff8) AM_DEVWRITE("latch", f9334_device, write_d0)
AM_RANGE(0x6000, 0x6000) AM_MIRROR(0x0fff) AM_WRITE(catch_coin_counter_w)
AM_RANGE(0x7000, 0x7fff) AM_ROM
ADDRESS_MAP_END
@ -243,7 +234,6 @@ void avalnche_state::machine_start()
void avalnche_state::machine_reset()
{
m_avalance_video_inverted = 0;
}
static MACHINE_CONFIG_START( avalnche )
@ -269,6 +259,16 @@ static MACHINE_CONFIG_START( avalnche )
MCFG_SOUND_ADD("discrete", DISCRETE, 0)
MCFG_DISCRETE_INTF(avalnche)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MCFG_DEVICE_ADD("latch", F9334, 0) // F8
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(avalnche_state, credit_1_lamp_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<AVALNCHE_ATTRACT_EN>))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(avalnche_state, video_invert_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(avalnche_state, credit_2_lamp_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<AVALNCHE_AUD0_EN>))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<AVALNCHE_AUD1_EN>))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<AVALNCHE_AUD2_EN>))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(avalnche_state, start_lamp_w))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( catch, avalnche )
@ -281,6 +281,11 @@ static MACHINE_CONFIG_DERIVED( catch, avalnche )
MCFG_DEVICE_REMOVE("discrete")
MCFG_DEVICE_REMOVE("mono")
MCFG_DEVICE_MODIFY("latch")
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP) // It is attract_enable just like avalnche, but not hooked up yet.
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(avalnche_state, catch_aud0_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(avalnche_state, catch_aud1_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(avalnche_state, catch_aud2_w))
MACHINE_CONFIG_END

149
src/mame/drivers/bagman.cpp
View File

@ -73,14 +73,11 @@ DIP locations verified for:
void bagman_state::machine_start()
{
m_video_enable = true;
save_item(NAME(m_irq_mask));
save_item(NAME(m_columnvalue));
}
MACHINE_START_MEMBER(bagman_state, bagman)
{
bagman_state::machine_start();
save_item(NAME(m_ls259_buf));
save_item(NAME(m_video_enable));
}
MACHINE_START_MEMBER(bagman_state, squaitsa)
@ -96,39 +93,34 @@ MACHINE_START_MEMBER(bagman_state, squaitsa)
WRITE8_MEMBER(bagman_state::ls259_w)
{
pal16r6_w(space, offset,data); /*this is just a simulation*/
if (m_ls259_buf[offset] != (data&1) )
{
m_ls259_buf[offset] = data&1;
switch (offset)
{
case 0:
case 1:
case 2:
m_tmsprom->bit_w(space, 0, 7 - ((m_ls259_buf[0]<<2) | (m_ls259_buf[1]<<1) | (m_ls259_buf[2]<<0)));
break;
case 3:
m_tmsprom->enable_w(m_ls259_buf[offset]);
break;
case 4:
m_tmsprom->rom_csq_w(space, 0, m_ls259_buf[offset]);
break;
case 5:
m_tmsprom->rom_csq_w(space, 1, m_ls259_buf[offset]);
break;
}
}
m_tmslatch->write_bit(offset, data & 1);
}
WRITE8_MEMBER(bagman_state::coincounter_w)
WRITE_LINE_MEMBER(bagman_state::tmsprom_bit_w)
{
machine().bookkeeping().coin_counter_w(offset,data);
m_tmsprom->bit_w(machine().dummy_space(), 0, 7 - ((m_tmslatch->q0_r()<<2) | (m_tmslatch->q1_r()<<1) | (m_tmslatch->q2_r()<<0)));
}
WRITE8_MEMBER(bagman_state::irq_mask_w)
WRITE_LINE_MEMBER(bagman_state::tmsprom_csq0_w)
{
m_irq_mask = data & 1;
m_tmsprom->rom_csq_w(machine().dummy_space(), 0, state);
}
WRITE_LINE_MEMBER(bagman_state::tmsprom_csq1_w)
{
m_tmsprom->rom_csq_w(machine().dummy_space(), 1, state);
}
WRITE_LINE_MEMBER(bagman_state::coin_counter_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(bagman_state::irq_mask_w)
{
m_irq_mask = state;
if (!state)
m_maincpu->set_input_line(0, CLEAR_LINE);
}
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, bagman_state )
@ -138,21 +130,16 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, bagman_state )
AM_RANGE(0x9800, 0x9bff) AM_RAM_WRITE(colorram_w) AM_SHARE("colorram")
AM_RANGE(0x9c00, 0x9fff) AM_WRITENOP /* written to, but unused */
AM_RANGE(0xa000, 0xa000) AM_READ(pal16r6_r)
//AM_RANGE(0xa800, 0xa805) AM_READ(bagman_ls259_r) /*just for debugging purposes*/
AM_RANGE(0xa000, 0xa000) AM_WRITE(irq_mask_w)
AM_RANGE(0xa001, 0xa002) AM_WRITE(flipscreen_w)
AM_RANGE(0xa003, 0xa003) AM_WRITEONLY AM_SHARE("video_enable")
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xc000, 0xffff) AM_ROM /* Super Bagman only */
AM_RANGE(0x9800, 0x981f) AM_WRITEONLY AM_SHARE("spriteram") /* hidden portion of color RAM */
/* here only to initialize the pointer, */
/* writes are handled by colorram_w */
AM_RANGE(0xa800, 0xa805) AM_WRITE(ls259_w) /* TMS5110 driving state machine */
AM_RANGE(0xa004, 0xa004) AM_WRITE(coincounter_w)
AM_RANGE(0xa800, 0xa807) AM_WRITE(ls259_w) /* TMS5110 driving state machine */
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
AM_RANGE(0xb800, 0xb800) AM_READNOP /* looks like watchdog from schematics */
#if 0
AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* ???? */
AM_RANGE(0xb000, 0xb000) AM_WRITENOP /* ???? */
AM_RANGE(0xb800, 0xb800) AM_WRITENOP /* ???? */
#endif
@ -169,17 +156,9 @@ static ADDRESS_MAP_START( pickin_map, AS_PROGRAM, 8, bagman_state )
/* here only to initialize the pointer, */
/* writes are handled by colorram_w */
AM_RANGE(0x9c00, 0x9fff) AM_WRITENOP /* written to, but unused */
AM_RANGE(0xa000, 0xa000) AM_WRITE(irq_mask_w)
AM_RANGE(0xa001, 0xa002) AM_WRITE(flipscreen_w)
AM_RANGE(0xa003, 0xa003) AM_WRITEONLY AM_SHARE("video_enable")
AM_RANGE(0xa004, 0xa004) AM_WRITE(coincounter_w)
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("DSW")
AM_RANGE(0xa005, 0xa005) AM_WRITENOP /* ???? */
AM_RANGE(0xa006, 0xa006) AM_WRITENOP /* ???? */
AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* ???? */
/* guess */
AM_RANGE(0xb000, 0xb000) AM_DEVWRITE("ay2", ay8910_device, address_w)
AM_RANGE(0xb800, 0xb800) AM_DEVREADWRITE("ay2", ay8910_device, data_r, data_w)
@ -457,8 +436,8 @@ READ8_MEMBER(bagman_state::dial_input_p2_r)
INTERRUPT_GEN_MEMBER(bagman_state::vblank_irq)
{
if(m_irq_mask)
device.execute().set_input_line(0, HOLD_LINE);
if (m_irq_mask)
device.execute().set_input_line(0, ASSERT_LINE);
}
@ -470,7 +449,14 @@ static MACHINE_CONFIG_START( bagman )
MCFG_CPU_IO_MAP(main_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bagman_state, vblank_irq)
MCFG_MACHINE_START_OVERRIDE(bagman_state, bagman)
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 8H
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(bagman_state, irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(bagman_state, flipscreen_x_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(bagman_state, flipscreen_y_w))
// video enable register not available on earlier hardware revision(s)
// Bagman is supposed to have glitches during screen transitions
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(bagman_state, coin_counter_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) // ????
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -509,6 +495,19 @@ static MACHINE_CONFIG_START( bagman )
MCFG_TMS5110_M0_CB(DEVWRITELINE("tmsprom", tmsprom_device, m0_w))
MCFG_TMS5110_DATA_CB(DEVREADLINE("tmsprom", tmsprom_device, data_r))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MCFG_DEVICE_ADD("tmslatch", LS259, 0) // 7H
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(bagman_state, tmsprom_bit_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(bagman_state, tmsprom_bit_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(bagman_state, tmsprom_bit_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("tmsprom", tmsprom_device, enable_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(bagman_state, tmsprom_csq0_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(bagman_state, tmsprom_csq1_w))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( sbagman, bagman )
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(bagman_state, video_enable_w))
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( pickin )
@ -519,6 +518,16 @@ static MACHINE_CONFIG_START( pickin )
MCFG_CPU_IO_MAP(main_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bagman_state, vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(bagman_state, irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(bagman_state, flipscreen_x_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(bagman_state, flipscreen_y_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(bagman_state, video_enable_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(bagman_state, coin_counter_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // ????
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(NOOP) // ????
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) // ????
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(BAGMAN_HCLK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART)
@ -569,6 +578,16 @@ static MACHINE_CONFIG_START( botanic )
MCFG_CPU_IO_MAP(main_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bagman_state, vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(bagman_state, irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(bagman_state, flipscreen_x_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(bagman_state, flipscreen_y_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(bagman_state, video_enable_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(bagman_state, coin_counter_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // ????
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(NOOP) // ????
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) // ????
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(BAGMAN_HCLK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART)
@ -1014,25 +1033,17 @@ ROM_START( squaitsa )
ROM_LOAD( "mmi6331.3r", 0x0020, 0x0020,CRC(86c1e7db) SHA1(5c974b51d770a555ddab5c23f03a666c6f286cbf) )
ROM_END
DRIVER_INIT_MEMBER(bagman_state,bagman)
{
/* Unmap video enable register, not available on earlier hardware revision(s)
Bagman is supposed to have glitches during screen transitions */
m_maincpu->space(AS_PROGRAM).unmap_write(0xa003, 0xa003);
*m_video_enable = 1;
}
GAME( 1982, bagman, 0, bagman, bagman, bagman_state, 0, ROT270, "Valadon Automation", "Bagman", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagnard, bagman, bagman, bagman, bagman_state, 0, ROT270, "Valadon Automation", "Le Bagnard (set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagnarda, bagman, bagman, bagman, bagman_state, 0, ROT270, "Valadon Automation", "Le Bagnard (set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagnardi, bagman, bagman, bagman, bagman_state, 0, ROT90, "Valadon Automation (Itisa license)", "Le Bagnard (Itisa, Spain)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagmans, bagman, bagman, bagmans, bagman_state, 0, ROT270, "Valadon Automation (Stern Electronics license)", "Bagman (Stern Electronics, set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagmans2, bagman, bagman, bagman, bagman_state, 0, ROT270, "Valadon Automation (Stern Electronics license)", "Bagman (Stern Electronics, set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagmanj, bagman, bagman, bagman, bagman_state, 0, ROT270, "Valadon Automation (Taito license)", "Bagman (Taito)", MACHINE_SUPPORTS_SAVE ) // title screen actually doesn't mention Valadon, only Stern and Taito
GAME( 1982, bagman, 0, bagman, bagman, bagman_state, bagman, ROT270, "Valadon Automation", "Bagman", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagnard, bagman, bagman, bagman, bagman_state, bagman, ROT270, "Valadon Automation", "Le Bagnard (set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagnarda, bagman, bagman, bagman, bagman_state, bagman, ROT270, "Valadon Automation", "Le Bagnard (set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagnardi, bagman, bagman, bagman, bagman_state, bagman, ROT90, "Valadon Automation (Itisa license)", "Le Bagnard (Itisa, Spain)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagmans, bagman, bagman, bagmans, bagman_state, bagman, ROT270, "Valadon Automation (Stern Electronics license)", "Bagman (Stern Electronics, set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagmans2, bagman, bagman, bagman, bagman_state, bagman, ROT270, "Valadon Automation (Stern Electronics license)", "Bagman (Stern Electronics, set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, bagmanj, bagman, bagman, bagman, bagman_state, bagman, ROT270, "Valadon Automation (Taito license)", "Bagman (Taito)", MACHINE_SUPPORTS_SAVE ) // title screen actually doesn't mention Valadon, only Stern and Taito
GAME( 1984, sbagman, 0, bagman, sbagman, bagman_state, 0, ROT270, "Valadon Automation", "Super Bagman", MACHINE_SUPPORTS_SAVE )
GAME( 1984, sbagmans, sbagman, bagman, sbagman, bagman_state, 0, ROT270, "Valadon Automation (Stern Electronics license)", "Super Bagman (Stern Electronics)", MACHINE_SUPPORTS_SAVE )
GAME( 1984, sbagman, 0, sbagman, sbagman, bagman_state, 0, ROT270, "Valadon Automation", "Super Bagman", MACHINE_SUPPORTS_SAVE )
GAME( 1984, sbagmans, sbagman, sbagman, sbagman, bagman_state, 0, ROT270, "Valadon Automation (Stern Electronics license)", "Super Bagman (Stern Electronics)", MACHINE_SUPPORTS_SAVE )
GAME( 1983, pickin, 0, pickin, pickin, bagman_state, 0, ROT270, "Valadon Automation", "Pickin'", MACHINE_SUPPORTS_SAVE )

18
src/mame/drivers/bsktball.cpp
View File

@ -28,6 +28,7 @@
#include "emu.h"
#include "cpu/m6502/m6502.h"
#include "includes/bsktball.h"
#include "machine/74259.h"
#include "sound/discrete.h"
#include "screen.h"
#include "speaker.h"
@ -83,13 +84,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, bsktball_state )
AM_RANGE(0x0803, 0x0803) AM_READ_PORT("DSW")
AM_RANGE(0x1000, 0x1000) AM_WRITENOP /* Timer Reset */
AM_RANGE(0x1010, 0x1010) AM_WRITE(bsktball_bounce_w) /* Crowd Amp / Bounce */
AM_RANGE(0x1022, 0x1023) AM_WRITENOP /* Coin Counter */
AM_RANGE(0x1024, 0x1025) AM_WRITE(bsktball_led1_w) /* LED 1 */
AM_RANGE(0x1026, 0x1027) AM_WRITE(bsktball_led2_w) /* LED 2 */
AM_RANGE(0x1028, 0x1029) AM_WRITE(bsktball_ld1_w) /* LD 1 */
AM_RANGE(0x102a, 0x102b) AM_WRITE(bsktball_ld2_w) /* LD 2 */
AM_RANGE(0x102c, 0x102d) AM_WRITE(bsktball_noise_reset_w) /* Noise Reset */
AM_RANGE(0x102e, 0x102f) AM_WRITE(bsktball_nmion_w) /* NMI On */
AM_RANGE(0x1020, 0x102f) AM_DEVWRITE("outlatch", f9334_device, write_a0)
AM_RANGE(0x1030, 0x1030) AM_WRITE(bsktball_note_w) /* Music Ckt Note Dvsr */
AM_RANGE(0x1800, 0x1bbf) AM_RAM_WRITE(bsktball_videoram_w) AM_SHARE("videoram") /* DISPLAY */
AM_RANGE(0x1bc0, 0x1bff) AM_RAM AM_SHARE("motion")
@ -229,7 +224,6 @@ void bsktball_state::machine_start()
void bsktball_state::machine_reset()
{
m_nmi_on = 0;
// m_i256v = 0;
m_ld1 = 0;
m_ld2 = 0;
@ -251,6 +245,14 @@ static MACHINE_CONFIG_START( bsktball )
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", bsktball_state, bsktball_scanline, "screen", 0, 1)
MCFG_DEVICE_ADD("outlatch", F9334, 0) // M6
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP) // Coin Counter
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(bsktball_state, led1_w)) // LED 1
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(bsktball_state, led2_w)) // LED 2
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(bsktball_state, ld1_w)) // LD 1
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(bsktball_state, ld2_w)) // LD 2
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<BSKTBALL_NOISE_EN>)) // Noise Reset
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(bsktball_state, nmion_w)) // NMI On
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

27
src/mame/drivers/canyon.cpp
View File

@ -95,9 +95,20 @@ READ8_MEMBER(canyon_state::canyon_options_r)
*
*************************************/
WRITE8_MEMBER(canyon_state::canyon_led_w)
WRITE8_MEMBER(canyon_state::output_latch_w)
{
output().set_led_value(offset & 0x01, offset & 0x02);
// ADR1 = D, ADR8 = A2, ADR7 = A1, ADR0 = A0
m_outlatch->write_bit((offset & 0x180) >> 6 | BIT(offset, 0), BIT(offset, 1));
}
WRITE_LINE_MEMBER(canyon_state::led1_w)
{
output().set_led_value(0, state);
}
WRITE_LINE_MEMBER(canyon_state::led2_w)
{
output().set_led_value(1, state);
}
@ -115,9 +126,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, canyon_state )
AM_RANGE(0x0400, 0x0401) AM_WRITE(canyon_motor_w)
AM_RANGE(0x0500, 0x0500) AM_WRITE(canyon_explode_w)
AM_RANGE(0x0501, 0x0501) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w) /* watchdog, disabled in service mode */
AM_RANGE(0x0600, 0x0603) AM_WRITE(canyon_whistle_w)
AM_RANGE(0x0680, 0x0683) AM_WRITE(canyon_led_w)
AM_RANGE(0x0700, 0x0703) AM_WRITE(canyon_attract_w)
AM_RANGE(0x0600, 0x0603) AM_SELECT(0x0180) AM_WRITE(output_latch_w)
AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(canyon_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x1000, 0x17ff) AM_READ(canyon_switches_r) AM_WRITENOP /* sloppy code writes here */
AM_RANGE(0x1800, 0x1fff) AM_READ(canyon_options_r)
@ -245,6 +254,14 @@ static MACHINE_CONFIG_START( canyon )
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", canyon_state, nmi_line_pulse)
MCFG_DEVICE_ADD("outlatch", F9334, 0) // C7
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<CANYON_WHISTLE1_EN>))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<CANYON_WHISTLE2_EN>))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(canyon_state, led1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(canyon_state, led2_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<CANYON_ATTRACT1_EN>))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<CANYON_ATTRACT2_EN>))
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_VBLANK_INIT("screen", 8)

73
src/mame/drivers/cclimber.cpp
View File

@ -285,10 +285,9 @@ READ8_MEMBER(cclimber_state::yamato_p1_r)
}
WRITE8_MEMBER(cclimber_state::toprollr_rombank_w)
WRITE_LINE_MEMBER(cclimber_state::toprollr_rombank_w)
{
m_toprollr_rombank &= ~(1 << offset);
m_toprollr_rombank |= (data & 1) << offset;
m_toprollr_rombank = m_mainlatch->q5_r() | (m_mainlatch->q6_r() << 1);
if (m_toprollr_rombank < 3) {
membank("bank1")->set_entry(m_toprollr_rombank);
@ -296,6 +295,7 @@ WRITE8_MEMBER(cclimber_state::toprollr_rombank_w)
}
}
#ifdef UNUSED_FUNCTION
MACHINE_RESET_MEMBER(cclimber_state,cclimber)
{
/* Disable interrupts, River Patrol / Silver Land needs this otherwise returns bad RAM on POST */
@ -303,11 +303,11 @@ MACHINE_RESET_MEMBER(cclimber_state,cclimber)
m_toprollr_rombank = 0;
}
#endif
WRITE8_MEMBER(cclimber_state::nmi_mask_w)
WRITE_LINE_MEMBER(cclimber_state::nmi_mask_w)
{
m_nmi_mask = data & 1;
m_nmi_mask = state;
}
@ -335,10 +335,8 @@ static ADDRESS_MAP_START( cclimber_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0x98dc, 0x98df) AM_RAM AM_SHARE("bigspritectrl")
AM_RANGE(0x9800, 0x9bff) AM_RAM /* not used, but initialized */
AM_RANGE(0x9c00, 0x9fff) AM_RAM_WRITE(cclimber_colorram_w) AM_SHARE("colorram")
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1") AM_WRITE(nmi_mask_w)
AM_RANGE(0xa001, 0xa002) AM_WRITEONLY AM_SHARE("flip_screen")
AM_RANGE(0xa003, 0xa003) AM_WRITE(nmi_mask_w) //used by Crazy Kong Bootleg with alt levels and speed up
AM_RANGE(0xa004, 0xa004) AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_trigger_w)
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1")
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P2") AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_rate_w)
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW") AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_volume_w)
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("SYSTEM")
@ -363,9 +361,8 @@ static ADDRESS_MAP_START( cannonb_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0x98dc, 0x98df) AM_RAM AM_SHARE("bigspritectrl")
AM_RANGE(0x9800, 0x9bff) AM_RAM /* not used, but initialized */
AM_RANGE(0x9c00, 0x9fff) AM_RAM_WRITE(cclimber_colorram_w) AM_SHARE("colorram")
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1") AM_WRITE(nmi_mask_w)
AM_RANGE(0xa001, 0xa002) AM_WRITE(cannonb_flip_screen_w) AM_SHARE("flip_screen")
AM_RANGE(0xa004, 0xa004) AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_trigger_w)
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1")
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P2") AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_rate_w)
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW") AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_volume_w)
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("SYSTEM")
@ -380,10 +377,8 @@ static ADDRESS_MAP_START( swimmer_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0x9880, 0x989f) AM_WRITEONLY AM_SHARE("spriteram")
AM_RANGE(0x98fc, 0x98ff) AM_WRITEONLY AM_SHARE("bigspritectrl")
AM_RANGE(0x9c00, 0x9fff) AM_RAM_WRITE(cclimber_colorram_w) AM_SHARE("colorram")
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P2") AM_WRITE(nmi_mask_w)
AM_RANGE(0xa001, 0xa002) AM_WRITEONLY AM_SHARE("flip_screen")
AM_RANGE(0xa003, 0xa003) AM_WRITEONLY AM_SHARE("sidebg_enable")
AM_RANGE(0xa004, 0xa004) AM_WRITEONLY AM_SHARE("palettebank")
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P2")
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P1") AM_WRITE(swimmer_sh_soundlatch_w)
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW1")
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("DSW2") AM_WRITEONLY AM_SHARE("bgcolor")
@ -410,8 +405,8 @@ static ADDRESS_MAP_START( yamato_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0x98dc, 0x98df) AM_RAM AM_SHARE("bigspritectrl")
AM_RANGE(0x9800, 0x9bff) AM_RAM /* not used, but initialized */
AM_RANGE(0x9c00, 0x9fff) AM_RAM_WRITE(cclimber_colorram_w) AM_SHARE("colorram")
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1") AM_WRITE(nmi_mask_w)
AM_RANGE(0xa001, 0xa002) AM_WRITEONLY AM_SHARE("flip_screen")
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1")
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P2")
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("COIN")
@ -433,10 +428,8 @@ static ADDRESS_MAP_START( toprollr_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0x9880, 0x995f) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x99dc, 0x99df) AM_RAM AM_SHARE("bigspritectrl")
AM_RANGE(0x9c00, 0x9fff) AM_RAM AM_SHARE("colorram")
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1") AM_WRITE(nmi_mask_w)
AM_RANGE(0xa001, 0xa002) AM_WRITEONLY AM_SHARE("flip_screen")
AM_RANGE(0xa004, 0xa004) AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_trigger_w)
AM_RANGE(0xa005, 0xa006) AM_WRITE(toprollr_rombank_w)
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1")
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P2") AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_rate_w)
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW") AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_volume_w)
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("SYSTEM")
@ -457,9 +450,8 @@ static ADDRESS_MAP_START( bagmanf_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0x98dc, 0x98df) AM_RAM AM_SHARE("bigspritectrl") // wrong
AM_RANGE(0x9800, 0x9bff) AM_RAM AM_SHARE("colorram")
AM_RANGE(0x9c00, 0x9fff) AM_RAM /* not used, but initialized */
AM_RANGE(0xa000, 0xa000) AM_READ(bagmanf_a000_r) AM_WRITE(nmi_mask_w)
AM_RANGE(0xa001, 0xa002) AM_WRITEONLY AM_SHARE("flip_screen")
AM_RANGE(0xa004, 0xa004) AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_trigger_w)
AM_RANGE(0xa000, 0xa000) AM_READ(bagmanf_a000_r)
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xa800, 0xa800) AM_READNOP AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_rate_w)
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW") AM_DEVWRITE("cclimber_audio", cclimber_audio_device, sample_volume_w)
AM_RANGE(0xb800, 0xb800) AM_READNOP
@ -1109,7 +1101,10 @@ static MACHINE_CONFIG_START( root )
MCFG_CPU_IO_MAP(cclimber_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cclimber_state, vblank_irq)
MCFG_MACHINE_RESET_OVERRIDE(cclimber_state,cclimber)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cclimber_state, nmi_mask_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cclimber_state, flip_screen_x_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cclimber_state, flip_screen_y_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -1129,6 +1124,8 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( cclimber, root )
MCFG_DEVICE_MODIFY("mainlatch") // 7J on CCG-1
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("cclimber_audio", cclimber_audio_device, sample_trigger_w))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("speaker")
@ -1141,6 +1138,11 @@ static MACHINE_CONFIG_DERIVED( cclimberx, cclimber )
MCFG_CPU_DECRYPTED_OPCODES_MAP(decrypted_opcodes_map)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( ckongb, cclimber )
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cclimber_state, nmi_mask_w)) //used by Crazy Kong Bootleg with alt levels and speed up
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( cannonb, cclimber )
@ -1148,6 +1150,11 @@ static MACHINE_CONFIG_DERIVED( cannonb, cclimber )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(cannonb_map)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cclimber_state, flip_screen_x_w))
MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE(cclimber_state, flip_screen_y_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(NOOP) // not used
/* video hardware */
MCFG_GFXDECODE_MODIFY("gfxdecode", cannonb)
MACHINE_CONFIG_END
@ -1204,6 +1211,9 @@ static MACHINE_CONFIG_DERIVED( toprollr, cclimber )
MCFG_SEGACRPT_SET_NUMBANKS(3)
MCFG_SEGACRPT_SET_BANKSIZE(0x6000)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(cclimber_state, toprollr_rombank_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(cclimber_state, toprollr_rombank_w))
/* video hardware */
MCFG_GFXDECODE_MODIFY("gfxdecode", toprollr)
@ -1224,6 +1234,13 @@ static MACHINE_CONFIG_START( swimmer )
MCFG_CPU_PROGRAM_MAP(swimmer_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cclimber_state, vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cclimber_state, nmi_mask_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cclimber_state, flip_screen_x_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cclimber_state, flip_screen_y_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cclimber_state, sidebg_enable_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cclimber_state, palette_bank_w))
MCFG_CPU_ADD("audiocpu", Z80,XTAL_4MHz/2) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(swimmer_audio_map)
MCFG_CPU_IO_MAP(swimmer_audio_portmap)
@ -2657,7 +2674,7 @@ GAME( 1981, ckongpt2, 0, cclimber, ckong, cclimber_state, 0,
GAME( 1981, ckongpt2a, ckongpt2, cclimber, ckong, cclimber_state, 0, ROT270, "Falcon", "Crazy Kong Part II (set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, ckongpt2j, ckongpt2, cclimber, ckong, cclimber_state, 0, ROT270, "Falcon", "Crazy Kong Part II (Japan)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, ckongpt2jeu, ckongpt2, cclimber, ckong, cclimber_state, 0, ROT270, "bootleg (Jeutel)", "Crazy Kong Part II (Jeutel bootleg)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, ckongpt2b, ckongpt2, cclimber, ckongb, cclimber_state, ckongb, ROT270, "bootleg", "Crazy Kong Part II (alternative levels)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, ckongpt2b, ckongpt2, ckongb, ckongb, cclimber_state, ckongb, ROT270, "bootleg", "Crazy Kong Part II (alternative levels)", MACHINE_SUPPORTS_SAVE )
// see bagman.cpp for parent
GAME( 1982, bagmanf, bagman, bagmanf, bagmanf, cclimber_state, 0, ROT270, "bootleg", "Le Bagnard (bootleg on Crazy Kong hardware)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )

134
src/mame/drivers/centiped.cpp
View File

@ -419,6 +419,7 @@ each direction to assign the boundries.
#include "cpu/m6502/m6502.h"
#include "cpu/s2650/s2650.h"
#include "machine/74259.h"
#include "machine/watchdog.h"
#include "machine/atari_vg.h"
#include "sound/sn76496.h"
@ -568,15 +569,15 @@ READ8_MEMBER(centiped_state::milliped_IN2_r)
return data;
}
WRITE8_MEMBER(centiped_state::input_select_w)
WRITE_LINE_MEMBER(centiped_state::input_select_w)
{
m_dsw_select = (~data >> 7) & 1;
m_dsw_select = !state;
}
/* used P2 controls if 1, P1 controls if 0 */
WRITE8_MEMBER(centiped_state::control_select_w)
WRITE_LINE_MEMBER(centiped_state::control_select_w)
{
m_control_select = (data >> 7) & 1;
m_control_select = state;
}
@ -616,9 +617,27 @@ READ8_MEMBER(centiped_state::bullsdrt_data_port_r)
*
*************************************/
WRITE8_MEMBER(centiped_state::led_w)
WRITE_LINE_MEMBER(centiped_state::led_1_w)
{
output().set_led_value(offset, ~data & 0x80);
output().set_led_value(0, !state);
}
WRITE_LINE_MEMBER(centiped_state::led_2_w)
{
output().set_led_value(1, !state);
}
WRITE_LINE_MEMBER(centiped_state::led_3_w)
{
output().set_led_value(2, !state);
}
WRITE_LINE_MEMBER(centiped_state::led_4_w)
{
output().set_led_value(3, !state);
}
@ -628,15 +647,27 @@ READ8_MEMBER(centiped_state::caterplr_unknown_r)
}
WRITE8_MEMBER(centiped_state::coin_count_w)
WRITE_LINE_MEMBER(centiped_state::coin_counter_left_w)
{
machine().bookkeeping().coin_counter_w(offset, data);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE8_MEMBER(centiped_state::bullsdrt_coin_count_w)
WRITE_LINE_MEMBER(centiped_state::coin_counter_center_w)
{
machine().bookkeeping().coin_counter_w(0, data);
machine().bookkeeping().coin_counter_w(1, state);
}
WRITE_LINE_MEMBER(centiped_state::coin_counter_right_w)
{
machine().bookkeeping().coin_counter_w(2, state);
}
WRITE_LINE_MEMBER(centiped_state::bullsdrt_coin_count_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
@ -663,9 +694,7 @@ static ADDRESS_MAP_START( centiped_base_map, AS_PROGRAM, 8, centiped_state )
AM_RANGE(0x1680, 0x1680) AM_DEVWRITE("earom", atari_vg_earom_device, ctrl_w)
AM_RANGE(0x1700, 0x173f) AM_DEVREAD("earom", atari_vg_earom_device, read)
AM_RANGE(0x1800, 0x1800) AM_WRITE(irq_ack_w)
AM_RANGE(0x1c00, 0x1c02) AM_WRITE(coin_count_w)
AM_RANGE(0x1c03, 0x1c04) AM_WRITE(led_w)
AM_RANGE(0x1c07, 0x1c07) AM_WRITE(centiped_flip_screen_w)
AM_RANGE(0x1c00, 0x1c07) AM_DEVWRITE("outlatch", ls259_device, write_d7)
AM_RANGE(0x2000, 0x2000) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x2000, 0x3fff) AM_ROM
ADDRESS_MAP_END
@ -697,9 +726,7 @@ static ADDRESS_MAP_START( centipdb_map, AS_PROGRAM, 8, centiped_state )
AM_RANGE(0x1680, 0x1680) AM_MIRROR(0x4000) AM_DEVWRITE("earom", atari_vg_earom_device, ctrl_w)
AM_RANGE(0x1700, 0x173f) AM_MIRROR(0x4000) AM_DEVREAD("earom", atari_vg_earom_device, read)
AM_RANGE(0x1800, 0x1800) AM_MIRROR(0x4000) AM_WRITE(irq_ack_w)
AM_RANGE(0x1c00, 0x1c02) AM_MIRROR(0x4000) AM_WRITE(coin_count_w)
AM_RANGE(0x1c03, 0x1c04) AM_MIRROR(0x4000) AM_WRITE(led_w)
AM_RANGE(0x1c07, 0x1c07) AM_MIRROR(0x4000) AM_WRITE(centiped_flip_screen_w)
AM_RANGE(0x1c00, 0x1c07) AM_MIRROR(0x4000) AM_DEVWRITE("outlatch", ls259_device, write_d7)
AM_RANGE(0x2000, 0x27ff) AM_ROM
AM_RANGE(0x2800, 0x3fff) AM_MIRROR(0x4000) AM_ROM
AM_RANGE(0x6000, 0x67ff) AM_ROM
@ -752,11 +779,7 @@ static ADDRESS_MAP_START( milliped_map, AS_PROGRAM, 8, centiped_state )
AM_RANGE(0x2011, 0x2011) AM_READ_PORT("IN3")
AM_RANGE(0x2030, 0x2030) AM_DEVREAD("earom", atari_vg_earom_device, read)
AM_RANGE(0x2480, 0x249f) AM_WRITE(milliped_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0x2500, 0x2502) AM_WRITE(coin_count_w)
AM_RANGE(0x2503, 0x2504) AM_WRITE(led_w)
AM_RANGE(0x2505, 0x2505) AM_WRITE(input_select_w) /* TBEN */
AM_RANGE(0x2506, 0x2506) AM_WRITE(centiped_flip_screen_w)
AM_RANGE(0x2507, 0x2507) AM_WRITE(control_select_w) /* CNTRLSEL */
AM_RANGE(0x2500, 0x2507) AM_DEVWRITE("outlatch", ls259_device, write_d7)
AM_RANGE(0x2600, 0x2600) AM_WRITE(irq_ack_w)
AM_RANGE(0x2680, 0x2680) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x2700, 0x2700) AM_DEVWRITE("earom", atari_vg_earom_device, ctrl_w)
@ -800,11 +823,7 @@ static ADDRESS_MAP_START( multiped_map, AS_PROGRAM, 8, centiped_state )
AM_RANGE(0x2011, 0x2011) AM_READ_PORT("IN3")
AM_RANGE(0x2030, 0x2030) AM_READNOP
AM_RANGE(0x2480, 0x249f) AM_WRITE(milliped_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0x2500, 0x2502) AM_WRITE(coin_count_w)
AM_RANGE(0x2503, 0x2504) AM_WRITE(led_w)
AM_RANGE(0x2505, 0x2505) AM_WRITE(input_select_w)
AM_RANGE(0x2506, 0x2506) AM_WRITE(centiped_flip_screen_w)
AM_RANGE(0x2507, 0x2507) AM_WRITE(control_select_w)
AM_RANGE(0x2500, 0x2507) AM_DEVWRITE("outlatch", ls259_device, write_d7)
AM_RANGE(0x2600, 0x2600) AM_WRITE(irq_ack_w)
AM_RANGE(0x2680, 0x2680) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x2700, 0x2700) AM_WRITENOP
@ -875,8 +894,7 @@ static ADDRESS_MAP_START( warlords_map, AS_PROGRAM, 8, centiped_state )
AM_RANGE(0x0c01, 0x0c01) AM_READ_PORT("IN1")
AM_RANGE(0x1000, 0x100f) AM_DEVREADWRITE("pokey", pokey_device, read, write)
AM_RANGE(0x1800, 0x1800) AM_WRITE(irq_ack_w)
AM_RANGE(0x1c00, 0x1c02) AM_WRITE(coin_count_w)
AM_RANGE(0x1c03, 0x1c06) AM_WRITE(led_w)
AM_RANGE(0x1c00, 0x1c07) AM_DEVWRITE("outlatch", ls259_device, write_d7)
AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x5000, 0x7fff) AM_ROM
ADDRESS_MAP_END
@ -903,10 +921,7 @@ static ADDRESS_MAP_START( mazeinv_map, AS_PROGRAM, 8, centiped_state )
AM_RANGE(0x2020, 0x2020) AM_READ(mazeinv_input_r)
AM_RANGE(0x2030, 0x2030) AM_DEVREAD("earom", atari_vg_earom_device, read)
AM_RANGE(0x2480, 0x249f) AM_WRITE(mazeinv_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0x2500, 0x2502) AM_WRITE(coin_count_w)
AM_RANGE(0x2503, 0x2504) AM_WRITE(led_w)
AM_RANGE(0x2505, 0x2505) AM_WRITE(input_select_w)
AM_RANGE(0x2506, 0x2506) AM_WRITE(centiped_flip_screen_w)
AM_RANGE(0x2500, 0x2507) AM_DEVWRITE("outlatch", ls259_device, write_d7)
AM_RANGE(0x2580, 0x2583) AM_WRITE(mazeinv_input_select_w)
AM_RANGE(0x2600, 0x2600) AM_WRITE(irq_ack_w)
AM_RANGE(0x2680, 0x2680) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
@ -933,9 +948,7 @@ static ADDRESS_MAP_START( bullsdrt_map, AS_PROGRAM, 8, centiped_state )
AM_RANGE(0x1280, 0x1280) AM_MIRROR(0x6000) AM_DEVWRITE("earom", atari_vg_earom_device, ctrl_w)
AM_RANGE(0x1300, 0x1300) AM_MIRROR(0x6000) AM_READ_PORT("DSW2")
AM_RANGE(0x1400, 0x140f) AM_MIRROR(0x6000) AM_WRITE(centiped_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0x1481, 0x1481) AM_MIRROR(0x6000) AM_WRITE(bullsdrt_coin_count_w)
AM_RANGE(0x1483, 0x1484) AM_MIRROR(0x6000) AM_WRITE(led_w)
AM_RANGE(0x1487, 0x1487) AM_MIRROR(0x6000) AM_WRITE(centiped_flip_screen_w)
AM_RANGE(0x1480, 0x1487) AM_MIRROR(0x6000) AM_DEVWRITE("outlatch", ls259_device, write_d7)
AM_RANGE(0x1500, 0x1500) AM_MIRROR(0x6000) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x1580, 0x1580) AM_MIRROR(0x6000) AM_NOP
AM_RANGE(0x1800, 0x1bbf) AM_MIRROR(0x6000) AM_WRITE(centiped_videoram_w) AM_SHARE("videoram")
@ -1692,6 +1705,13 @@ static MACHINE_CONFIG_START( centiped_base )
MCFG_ATARIVGEAROM_ADD("earom")
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(centiped_state, coin_counter_left_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(centiped_state, coin_counter_center_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(centiped_state, coin_counter_right_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(centiped_state, led_1_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(centiped_state, led_2_w))
MCFG_WATCHDOG_ADD("watchdog")
/* timer */
@ -1716,6 +1736,9 @@ static MACHINE_CONFIG_DERIVED( centiped, centiped_base )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(centiped_map)
MCFG_DEVICE_MODIFY("outlatch") // M10
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(centiped_state, flip_screen_w))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -1732,6 +1755,9 @@ static MACHINE_CONFIG_DERIVED( caterplr, centiped_base )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(caterplr_map)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(centiped_state, flip_screen_w))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -1747,6 +1773,9 @@ static MACHINE_CONFIG_DERIVED( centipdb, centiped_base )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(centipdb_map)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(centiped_state, flip_screen_w))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -1763,6 +1792,9 @@ static MACHINE_CONFIG_DERIVED( magworm, centiped_base )
MCFG_CPU_PROGRAM_MAP(magworm_map)
MCFG_MACHINE_RESET_OVERRIDE(centiped_state,magworm)
MCFG_DEVICE_MODIFY("outlatch") // 12A
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(centiped_state, flip_screen_w))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
@ -1772,12 +1804,17 @@ static MACHINE_CONFIG_DERIVED( magworm, centiped_base )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( milliped, centiped )
static MACHINE_CONFIG_DERIVED( milliped, centiped_base )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(milliped_map)
MCFG_DEVICE_MODIFY("outlatch") // 12E
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(centiped_state, input_select_w)) // TBEN
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(centiped_state, flip_screen_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(centiped_state, control_select_w)) // CNTRLSEL
/* video hardware */
MCFG_GFXDECODE_MODIFY("gfxdecode", milliped)
MCFG_PALETTE_MODIFY("palette")
@ -1788,7 +1825,9 @@ static MACHINE_CONFIG_DERIVED( milliped, centiped )
MCFG_SCREEN_UPDATE_DRIVER(centiped_state, screen_update_milliped)
/* sound hardware */
MCFG_SOUND_REPLACE("pokey", POKEY, 12096000/8)
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_DEVICE_ADD("pokey", POKEY, 12096000/8)
MCFG_POKEY_ALLPOT_R_CB(IOPORT("DSW1"))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
@ -1809,12 +1848,17 @@ static MACHINE_CONFIG_DERIVED( multiped, milliped )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( warlords, centiped )
static MACHINE_CONFIG_DERIVED( warlords, centiped_base )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(warlords_map)
// these extra LEDs also appear on Centipede schematics
MCFG_DEVICE_MODIFY("outlatch") // P9
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(centiped_state, led_3_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(centiped_state, led_4_w))
/* video hardware */
MCFG_GFXDECODE_MODIFY("gfxdecode", warlords)
MCFG_PALETTE_MODIFY("palette")
@ -1826,7 +1870,9 @@ static MACHINE_CONFIG_DERIVED( warlords, centiped )
MCFG_SCREEN_UPDATE_DRIVER(centiped_state, screen_update_warlords)
/* sound hardware */
MCFG_SOUND_REPLACE("pokey", POKEY, 12096000/8)
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_DEVICE_ADD("pokey", POKEY, 12096000/8)
MCFG_POKEY_POT0_R_CB(IOPORT("PADDLE0"))
MCFG_POKEY_POT1_R_CB(IOPORT("PADDLE1"))
MCFG_POKEY_POT2_R_CB(IOPORT("PADDLE2"))
@ -1840,6 +1886,10 @@ static MACHINE_CONFIG_DERIVED( mazeinv, milliped )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(mazeinv_map)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP)
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_UPDATE_DRIVER(centiped_state, screen_update_centiped)
MACHINE_CONFIG_END
@ -1855,6 +1905,12 @@ static MACHINE_CONFIG_START( bullsdrt )
MCFG_ATARIVGEAROM_ADD("earom")
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(centiped_state, bullsdrt_coin_count_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(centiped_state, led_1_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(centiped_state, led_2_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(centiped_state, flip_screen_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

79
src/mame/drivers/champbas.cpp
View File

@ -81,6 +81,7 @@ TODO:
#include "emu.h"
#include "includes/champbas.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "machine/watchdog.h"
#include "sound/ay8910.h"
@ -102,9 +103,9 @@ CUSTOM_INPUT_MEMBER(champbas_state::watchdog_bit2)
return (0x10 - m_watchdog->get_vblank_counter()) >> 2 & 1;
}
WRITE8_MEMBER(champbas_state::irq_enable_w)
WRITE_LINE_MEMBER(champbas_state::irq_enable_w)
{
m_irq_mask = data & 1;
m_irq_mask = state;
if (!m_irq_mask)
m_maincpu->set_input_line(0, CLEAR_LINE);
@ -123,15 +124,15 @@ TIMER_DEVICE_CALLBACK_MEMBER(champbas_state::exctsccr_sound_irq)
*
*************************************/
WRITE8_MEMBER(champbas_state::mcu_switch_w)
WRITE_LINE_MEMBER(champbas_state::mcu_switch_w)
{
// switch shared RAM between CPU and MCU bus
m_alpha_8201->bus_dir_w(data & 1);
m_alpha_8201->bus_dir_w(state);
}
WRITE8_MEMBER(champbas_state::mcu_start_w)
WRITE_LINE_MEMBER(champbas_state::mcu_start_w)
{
m_alpha_8201->mcu_start_w(data & 1);
m_alpha_8201->mcu_start_w(state);
}
/* champbja another protection */
@ -190,14 +191,7 @@ static ADDRESS_MAP_START( champbas_map, AS_PROGRAM, 8, champbas_state )
AM_RANGE(0xa080, 0xa080) AM_MIRROR(0x0020) AM_READ_PORT("DSW")
AM_RANGE(0xa0c0, 0xa0c0) AM_READ_PORT("SYSTEM")
AM_RANGE(0xa000, 0xa000) AM_WRITE(irq_enable_w)
AM_RANGE(0xa001, 0xa001) AM_WRITENOP // !WORK board output (no use?)
AM_RANGE(0xa002, 0xa002) AM_WRITE(gfxbank_w)
AM_RANGE(0xa003, 0xa003) AM_WRITE(flipscreen_w)
AM_RANGE(0xa004, 0xa004) AM_WRITE(palette_bank_w)
AM_RANGE(0xa005, 0xa005) AM_WRITENOP // n.c.
AM_RANGE(0xa006, 0xa006) AM_WRITENOP // no MCU
AM_RANGE(0xa007, 0xa007) AM_WRITENOP // no MCU
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xa060, 0xa06f) AM_WRITEONLY AM_SHARE("spriteram")
AM_RANGE(0xa080, 0xa080) AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
@ -207,8 +201,6 @@ ADDRESS_MAP_END
// base map + ALPHA-8x0x protection
static ADDRESS_MAP_START( champbasj_map, AS_PROGRAM, 8, champbas_state )
AM_RANGE(0x6000, 0x63ff) AM_DEVREADWRITE("alpha_8201", alpha_8201_device, ext_ram_r, ext_ram_w)
AM_RANGE(0xa006, 0xa006) AM_WRITE(mcu_start_w)
AM_RANGE(0xa007, 0xa007) AM_WRITE(mcu_switch_w)
AM_IMPORT_FROM( champbas_map )
ADDRESS_MAP_END
@ -231,25 +223,16 @@ static ADDRESS_MAP_START( champbb2_map, AS_PROGRAM, 8, champbas_state )
AM_IMPORT_FROM( champbasj_map )
ADDRESS_MAP_END
// talbot
static ADDRESS_MAP_START( talbot_map, AS_PROGRAM, 8, champbas_state )
AM_RANGE(0xa002, 0xa002) AM_WRITENOP // no gfxbank
AM_RANGE(0xa004, 0xa004) AM_WRITENOP // no palettebank
AM_IMPORT_FROM( champbasj_map )
ADDRESS_MAP_END
// more sprites in exctsccr
static ADDRESS_MAP_START( exctsccr_map, AS_PROGRAM, 8, champbas_state )
AM_RANGE(0x7000, 0x7001) AM_UNMAP // aysnd is controlled by audiocpu
AM_RANGE(0x7c00, 0x7fff) AM_RAM
AM_RANGE(0xa004, 0xa004) AM_WRITENOP // no palettebank
AM_RANGE(0xa040, 0xa04f) AM_WRITEONLY AM_SHARE("spriteram2")
AM_IMPORT_FROM( champbasj_map )
ADDRESS_MAP_END
// exctsccrb
static ADDRESS_MAP_START( exctsccrb_map, AS_PROGRAM, 8, champbas_state )
AM_RANGE(0xa004, 0xa004) AM_WRITENOP // no palettebank
AM_RANGE(0xa040, 0xa04f) AM_WRITEONLY AM_SHARE("spriteram2")
AM_IMPORT_FROM( champbasj_map )
ADDRESS_MAP_END
@ -524,9 +507,19 @@ static MACHINE_CONFIG_START( talbot )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", Z80, XTAL_18_432MHz/6)
MCFG_CPU_PROGRAM_MAP(talbot_map)
MCFG_CPU_PROGRAM_MAP(champbasj_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", champbas_state, vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(champbas_state, irq_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP) // !WORK board output (no use?)
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(NOOP) // no gfxbank
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(champbas_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(NOOP) // no palettebank
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // n.c.
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(champbas_state, mcu_start_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(champbas_state, mcu_switch_w))
MCFG_DEVICE_ADD("alpha_8201", ALPHA_8201, XTAL_18_432MHz/6/8)
MCFG_QUANTUM_PERFECT_CPU("alpha_8201:mcu")
@ -564,6 +557,16 @@ static MACHINE_CONFIG_START( champbas )
MCFG_CPU_PROGRAM_MAP(champbas_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", champbas_state, vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 9D; 8G on Champion Baseball II Double Board Configuration
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(champbas_state, irq_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP) // !WORK board output (no use?)
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(champbas_state, gfxbank_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(champbas_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(champbas_state, palette_bank_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // n.c.
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(NOOP) // no MCU
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) // no MCU
MCFG_CPU_ADD("audiocpu", Z80, XTAL_18_432MHz/6)
MCFG_CPU_PROGRAM_MAP(champbas_sound_map)
@ -603,6 +606,10 @@ static MACHINE_CONFIG_DERIVED( champbasj, champbas )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(champbasj_map)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(champbas_state, mcu_start_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(champbas_state, mcu_switch_w))
MCFG_DEVICE_ADD("alpha_8201", ALPHA_8201, XTAL_18_432MHz/6/8) // note: 8302 rom on champbb2 (same device!)
MCFG_QUANTUM_PERFECT_CPU("alpha_8201:mcu")
MACHINE_CONFIG_END
@ -636,6 +643,16 @@ static MACHINE_CONFIG_START( exctsccr )
MCFG_CPU_PROGRAM_MAP(exctsccr_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", champbas_state, vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(champbas_state, irq_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP) // !WORK board output (no use?)
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(champbas_state, gfxbank_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(champbas_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(NOOP) // no palettebank
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // n.c.
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(champbas_state, mcu_start_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(champbas_state, mcu_switch_w))
MCFG_CPU_ADD("audiocpu", Z80, XTAL_14_31818MHz/4 )
MCFG_CPU_PROGRAM_MAP(exctsccr_sound_map)
MCFG_CPU_IO_MAP(exctsccr_sound_io_map)
@ -697,6 +714,16 @@ static MACHINE_CONFIG_START( exctsccrb )
MCFG_CPU_PROGRAM_MAP(exctsccrb_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", champbas_state, vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(champbas_state, irq_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP) // !WORK board output (no use?)
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(champbas_state, gfxbank_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(champbas_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(NOOP) // no palettebank
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // n.c.
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(champbas_state, mcu_start_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(champbas_state, mcu_switch_w))
MCFG_CPU_ADD("audiocpu", Z80, XTAL_18_432MHz/6)
MCFG_CPU_PROGRAM_MAP(champbas_sound_map)

38
src/mame/drivers/changela.cpp
View File

@ -14,6 +14,7 @@ Tomasz Slanina
#include "includes/changela.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/watchdog.h"
#include "sound/ay8910.h"
#include "speaker.h"
@ -132,24 +133,29 @@ READ8_MEMBER(changela_state::changela_2d_r)
return (ioport("IN1")->read() & 0x20) | gas | (v8 << 4);
}
WRITE8_MEMBER(changela_state::mcu_pc_0_w)
WRITE_LINE_MEMBER(changela_state::mcu_pc_0_w)
{
m_mcu->pc_w(space, 0, 0xfe | (data & 0x01));
m_mcu->pc_w(machine().dummy_space(), 0, 0xfe | state);
}
WRITE8_MEMBER(changela_state::changela_collision_reset_0)
WRITE_LINE_MEMBER(changela_state::collision_reset_0_w)
{
m_collision_reset = data & 0x01;
m_collision_reset = state;
}
WRITE8_MEMBER(changela_state::changela_collision_reset_1)
WRITE_LINE_MEMBER(changela_state::collision_reset_1_w)
{
m_tree_collision_reset = data & 0x01;
m_tree_collision_reset = state;
}
WRITE8_MEMBER(changela_state::changela_coin_counter_w)
WRITE_LINE_MEMBER(changela_state::coin_counter_1_w)
{
machine().bookkeeping().coin_counter_w(offset, data);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(changela_state::coin_counter_2_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
@ -172,14 +178,11 @@ static ADDRESS_MAP_START( changela_map, AS_PROGRAM, 8, changela_state )
AM_RANGE(0xd010, 0xd011) AM_DEVREADWRITE("ay2", ay8910_device, data_r, address_data_w)
/* LS259 - U44 */
AM_RANGE(0xd020, 0xd020) AM_WRITE(changela_collision_reset_0)
AM_RANGE(0xd021, 0xd022) AM_WRITE(changela_coin_counter_w)
//AM_RANGE(0xd023, 0xd023) AM_WRITENOP
AM_RANGE(0xd020, 0xd027) AM_DEVWRITE("outlatch", ls259_device, write_d0)
/* LS139 - U24 */
AM_RANGE(0xd024, 0xd024) AM_READWRITE(changela_24_r, mcu_pc_0_w)
AM_RANGE(0xd025, 0xd025) AM_READWRITE(changela_25_r, changela_collision_reset_1)
AM_RANGE(0xd026, 0xd026) AM_WRITENOP
AM_RANGE(0xd024, 0xd024) AM_READ(changela_24_r)
AM_RANGE(0xd025, 0xd025) AM_READ(changela_25_r)
AM_RANGE(0xd028, 0xd028) AM_READ(mcu_r)
AM_RANGE(0xd02c, 0xd02c) AM_READ(changela_2c_r)
AM_RANGE(0xd02d, 0xd02d) AM_READ(changela_2d_r)
@ -419,6 +422,13 @@ static MACHINE_CONFIG_START( changela )
MCFG_M68705_PORTC_W_CB(WRITE8(changela_state, changela_68705_port_c_w))
MCFG_CPU_VBLANK_INT_DRIVER("screen", changela_state, chl_mcu_irq)
MCFG_DEVICE_ADD("outlatch", LS259, 0) // U44 on Sound I/O Board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(changela_state, collision_reset_0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(changela_state, coin_counter_1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(changela_state, coin_counter_2_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(changela_state, mcu_pc_0_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(changela_state, collision_reset_1_w))
MCFG_WATCHDOG_ADD("watchdog")
MCFG_SCREEN_ADD("screen", RASTER)

39
src/mame/drivers/cinemat.cpp
View File

@ -120,19 +120,17 @@ READ8_MEMBER(cinemat_state::coin_input_r)
*
*************************************/
WRITE8_MEMBER(cinemat_state::coin_reset_w)
WRITE_LINE_MEMBER(cinemat_state::coin_reset_w)
{
/* on the rising edge of a coin reset, clear the coin_detected flag */
if (m_coin_last_reset != data && data != 0)
if (state)
m_coin_detected = 0;
m_coin_last_reset = data;
}
WRITE8_MEMBER(cinemat_state::mux_select_w)
WRITE_LINE_MEMBER(cinemat_state::mux_select_w)
{
m_mux_select = data;
cinemat_sound_control_w(space, 0x07, data);
m_mux_select = state;
}
@ -272,7 +270,7 @@ READ8_MEMBER(cinemat_state::qb3_frame_r)
}
WRITE8_MEMBER(cinemat_state::qb3_ram_bank_w)
WRITE_LINE_MEMBER(cinemat_state::qb3_ram_bank_w)
{
membank("bank1")->set_entry(m_maincpu->state_int(ccpu_cpu_device::CCPU_P) & 3);
}
@ -321,9 +319,7 @@ static ADDRESS_MAP_START( io_map, AS_IO, 8, cinemat_state )
AM_RANGE(0x10, 0x16) AM_READ(switches_r)
AM_RANGE(0x17, 0x17) AM_READ(coin_input_r)
AM_RANGE(0x05, 0x05) AM_WRITE(coin_reset_w)
AM_RANGE(0x06, 0x06) AM_WRITE(cinemat_vector_control_w)
AM_RANGE(0x00, 0x07) AM_WRITE(cinemat_sound_control_w)
AM_RANGE(0x00, 0x07) AM_DEVWRITE("outlatch", ls259_device, write_d0)
ADDRESS_MAP_END
@ -968,6 +964,10 @@ static MACHINE_CONFIG_START( cinemat_nojmi_4k )
MCFG_CPU_DATA_MAP(data_map)
MCFG_CPU_IO_MAP(io_map)
MCFG_DEVICE_ADD("outlatch", LS259, 0) // 7J on CCG-1
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(cinemat_state, coin_reset_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(cinemat_state, vector_control_w))
/* video hardware */
MCFG_VECTOR_ADD("vector")
MCFG_SCREEN_ADD("screen", VECTOR)
@ -1048,6 +1048,9 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( tailg, cinemat_nojmi_8k )
MCFG_FRAGMENT_ADD(tailg_sound)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(cinemat_state, mux_select_w))
MACHINE_CONFIG_END
@ -1082,6 +1085,9 @@ static MACHINE_CONFIG_DERIVED( boxingb, cinemat_jmi_32k )
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_VISIBLE_AREA(0, 1024, 0, 788)
MCFG_VIDEO_START_OVERRIDE(cinemat_state,cinemat_color)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(cinemat_state, mux_select_w))
MACHINE_CONFIG_END
@ -1112,6 +1118,9 @@ static MACHINE_CONFIG_DERIVED( qb3, cinemat_jmi_32k )
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_VISIBLE_AREA(0, 1120, 0, 780)
MCFG_VIDEO_START_OVERRIDE(cinemat_state,cinemat_qb3color)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cinemat_state, qb3_ram_bank_w))
MACHINE_CONFIG_END
@ -1434,23 +1443,15 @@ DRIVER_INIT_MEMBER(cinemat_state,sundance)
}
DRIVER_INIT_MEMBER(cinemat_state,tailg)
{
m_maincpu->space(AS_IO).install_write_handler(0x07, 0x07, write8_delegate(FUNC(cinemat_state::mux_select_w),this));
}
DRIVER_INIT_MEMBER(cinemat_state,boxingb)
{
m_maincpu->space(AS_IO).install_read_handler(0x0c, 0x0f, read8_delegate(FUNC(cinemat_state::boxingb_dial_r),this));
m_maincpu->space(AS_IO).install_write_handler(0x07, 0x07, write8_delegate(FUNC(cinemat_state::mux_select_w),this));
}
DRIVER_INIT_MEMBER(cinemat_state,qb3)
{
m_maincpu->space(AS_IO).install_read_handler(0x0f, 0x0f, read8_delegate(FUNC(cinemat_state::qb3_frame_r),this));
m_maincpu->space(AS_IO).install_write_handler(0x00, 0x00, write8_delegate(FUNC(cinemat_state::qb3_ram_bank_w),this));
membank("bank1")->configure_entries(0, 4, m_rambase, 0x100*2);
}
@ -1469,7 +1470,7 @@ GAMEL(1979, barrier, 0, barrier, barrier, cinemat_state, 0, ORIE
GAME( 1979, speedfrk, 0, speedfrk, speedfrk, cinemat_state, speedfrk, ORIENTATION_FLIP_Y, "Vectorbeam", "Speed Freak", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
GAME( 1979, starhawk, 0, starhawk, starhawk, cinemat_state, 0, ORIENTATION_FLIP_Y, "Cinematronics", "Star Hawk", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
GAMEL(1979, sundance, 0, sundance, sundance, cinemat_state, sundance, ORIENTATION_FLIP_X ^ ROT270, "Cinematronics", "Sundance", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_sundance )
GAMEL(1979, tailg, 0, tailg, tailg, cinemat_state, tailg, ORIENTATION_FLIP_Y, "Cinematronics", "Tailgunner", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_tailg )
GAMEL(1979, tailg, 0, tailg, tailg, cinemat_state, 0, ORIENTATION_FLIP_Y, "Cinematronics", "Tailgunner", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_tailg )
GAME( 1979, warrior, 0, warrior, warrior, cinemat_state, 0, ORIENTATION_FLIP_Y, "Vectorbeam", "Warrior", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
GAMEL(1980, armora, 0, armora, armora, cinemat_state, 0, ORIENTATION_FLIP_Y, "Cinematronics", "Armor Attack", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_armora )
GAMEL(1980, armorap, armora, armora, armora, cinemat_state, 0, ORIENTATION_FLIP_Y, "Cinematronics", "Armor Attack (prototype)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_armora )

34
src/mame/drivers/cloak.cpp
View File

@ -43,7 +43,7 @@
3200-327F: (W) Color RAM, Address bit 6 becomes the 9th bit of color RAM
3800: (W) Right Coin Counter
3801: (W) Left Coint Counter
3801: (W) Left Coin Counter
3803: (W) Cocktail Output
3806: (W) Start 2 LED
3807: (W) Start 1 LED
@ -121,6 +121,7 @@
#include "cpu/m6502/m6502.h"
#include "sound/pokey.h"
#include "machine/74259.h"
#include "machine/nvram.h"
#include "machine/watchdog.h"
#include "speaker.h"
@ -132,14 +133,24 @@
*
*************************************/
WRITE8_MEMBER(cloak_state::cloak_led_w)
WRITE_LINE_MEMBER(cloak_state::start_led_1_w)
{
output().set_led_value(1 - offset, ~data & 0x80);
output().set_led_value(0, !state);
}
WRITE8_MEMBER(cloak_state::cloak_coin_counter_w)
WRITE_LINE_MEMBER(cloak_state::start_led_2_w)
{
machine().bookkeeping().coin_counter_w(1 - offset, data & 0x80);
output().set_led_value(1, !state);
}
WRITE_LINE_MEMBER(cloak_state::coin_counter_l_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(cloak_state::coin_counter_r_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
WRITE8_MEMBER(cloak_state::cloak_custom_w)
@ -183,10 +194,7 @@ static ADDRESS_MAP_START( master_map, AS_PROGRAM, 8, cloak_state )
AM_RANGE(0x2f00, 0x2fff) AM_NOP
AM_RANGE(0x3000, 0x30ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x3200, 0x327f) AM_WRITE(cloak_paletteram_w)
AM_RANGE(0x3800, 0x3801) AM_WRITE(cloak_coin_counter_w)
AM_RANGE(0x3803, 0x3803) AM_WRITE(cloak_flipscreen_w)
AM_RANGE(0x3805, 0x3805) AM_WRITENOP // ???
AM_RANGE(0x3806, 0x3807) AM_WRITE(cloak_led_w)
AM_RANGE(0x3800, 0x3807) AM_DEVWRITE("outlatch", ls259_device, write_d7)
AM_RANGE(0x3a00, 0x3a00) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x3c00, 0x3c00) AM_WRITE(cloak_irq_reset_0_w)
AM_RANGE(0x3e00, 0x3e00) AM_WRITE(cloak_nvram_enable_w)
@ -328,6 +336,14 @@ static MACHINE_CONFIG_START( cloak )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("outlatch", LS259, 0) // 10B
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cloak_state, coin_counter_r_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cloak_state, coin_counter_l_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cloak_state, cocktail_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // ???
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(cloak_state, start_led_2_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(cloak_state, start_led_1_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

33
src/mame/drivers/cloud9.cpp
View File

@ -216,15 +216,27 @@ WRITE8_MEMBER(cloud9_state::irq_ack_w)
}
WRITE8_MEMBER(cloud9_state::cloud9_led_w)
WRITE_LINE_MEMBER(cloud9_state::led1_w)
{
output().set_led_value(offset, ~data & 0x80);
output().set_led_value(0, !state);
}
WRITE8_MEMBER(cloud9_state::cloud9_coin_counter_w)
WRITE_LINE_MEMBER(cloud9_state::led2_w)
{
machine().bookkeeping().coin_counter_w(offset, data & 0x80);
output().set_led_value(1, !state);
}
WRITE_LINE_MEMBER(cloud9_state::coin1_counter_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(cloud9_state::coin2_counter_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
@ -272,9 +284,8 @@ static ADDRESS_MAP_START( cloud9_map, AS_PROGRAM, 8, cloud9_state )
AM_RANGE(0x5400, 0x547f) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x5480, 0x54ff) AM_WRITE(irq_ack_w)
AM_RANGE(0x5500, 0x557f) AM_RAM_WRITE(cloud9_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0x5580, 0x5587) AM_MIRROR(0x0078) AM_WRITE(cloud9_video_control_w)
AM_RANGE(0x5600, 0x5601) AM_MIRROR(0x0078) AM_WRITE(cloud9_coin_counter_w)
AM_RANGE(0x5602, 0x5603) AM_MIRROR(0x0078) AM_WRITE(cloud9_led_w)
AM_RANGE(0x5580, 0x5587) AM_MIRROR(0x0078) AM_DEVWRITE("videolatch", ls259_device, write_d7) // video control registers
AM_RANGE(0x5600, 0x5607) AM_MIRROR(0x0078) AM_DEVWRITE("outlatch", ls259_device, write_d7)
AM_RANGE(0x5680, 0x56ff) AM_WRITE(nvram_store_w)
AM_RANGE(0x5700, 0x577f) AM_WRITE(nvram_recall_w)
AM_RANGE(0x5800, 0x5800) AM_MIRROR(0x007e) AM_READ_PORT("IN0")
@ -410,6 +421,12 @@ static MACHINE_CONFIG_START( cloud9 )
MCFG_CPU_ADD("maincpu", M6502, MASTER_CLOCK/8)
MCFG_CPU_PROGRAM_MAP(cloud9_map)
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cloud9_state, coin1_counter_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cloud9_state, coin2_counter_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cloud9_state, led1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cloud9_state, led2_w))
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_VBLANK_INIT("screen", 8)
@ -427,6 +444,8 @@ static MACHINE_CONFIG_START( cloud9 )
MCFG_SCREEN_UPDATE_DRIVER(cloud9_state, screen_update_cloud9)
MCFG_SCREEN_PALETTE("palette")
MCFG_DEVICE_ADD("videolatch", LS259, 0)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")

32
src/mame/drivers/clshroad.cpp
View File

@ -31,6 +31,7 @@ TODO:
#include "audio/wiping.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "screen.h"
#include "speaker.h"
@ -58,19 +59,14 @@ READ8_MEMBER(clshroad_state::input_r)
// irq/reset controls like in wiping.cpp
WRITE8_MEMBER(clshroad_state::subcpu_reset_w)
WRITE_LINE_MEMBER(clshroad_state::main_irq_mask_w)
{
m_audiocpu->set_input_line(INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
m_main_irq_mask = state;
}
WRITE8_MEMBER(clshroad_state::main_irq_mask_w)
WRITE_LINE_MEMBER(clshroad_state::sound_irq_mask_w)
{
m_main_irq_mask = data & 1;
}
WRITE8_MEMBER(clshroad_state::sound_irq_mask_w)
{
m_sound_irq_mask = data & 1;
m_sound_irq_mask = state;
}
@ -80,9 +76,7 @@ static ADDRESS_MAP_START( clshroad_map, AS_PROGRAM, 8, clshroad_state )
AM_RANGE(0x9600, 0x97ff) AM_RAM AM_SHARE("share1")
AM_RANGE(0x9800, 0x9dff) AM_RAM
AM_RANGE(0x9e00, 0x9fff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xa000, 0xa000) AM_WRITE(subcpu_reset_w)
AM_RANGE(0xa001, 0xa001) AM_WRITE(main_irq_mask_w)
AM_RANGE(0xa004, 0xa004) AM_WRITE(flipscreen_w)
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xa100, 0xa107) AM_READ(input_r)
AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(vram_1_w) AM_SHARE("vram_1") // Layer 1
AM_RANGE(0xb000, 0xb003) AM_WRITEONLY AM_SHARE("vregs") // Scroll
@ -93,7 +87,7 @@ static ADDRESS_MAP_START( clshroad_sound_map, AS_PROGRAM, 8, clshroad_state )
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x4000, 0x7fff) AM_DEVWRITE("custom", wiping_sound_device, sound_w)
AM_RANGE(0x9600, 0x97ff) AM_RAM AM_SHARE("share1")
AM_RANGE(0xa003, 0xa003) AM_WRITE(sound_irq_mask_w)
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
ADDRESS_MAP_END
@ -287,6 +281,12 @@ static MACHINE_CONFIG_START( firebatl )
MCFG_CPU_PROGRAM_MAP(clshroad_sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(clshroad_state, sound_timer_irq, 120) /* periodic interrupt, don't know about the frequency */
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(INPUTLINE("audiocpu", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(clshroad_state, main_irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(clshroad_state, sound_irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(clshroad_state, flipscreen_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -322,6 +322,12 @@ static MACHINE_CONFIG_START( clshroad )
//MCFG_CPU_VBLANK_INT_DRIVER("screen", clshroad_state, irq0_line_hold) /* IRQ, no NMI */
MCFG_CPU_PERIODIC_INT_DRIVER(clshroad_state, sound_timer_irq, 60) /* periodic interrupt, don't know about the frequency */
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(NOOP) // never writes here?
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(clshroad_state, main_irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(clshroad_state, sound_irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(clshroad_state, flipscreen_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)

11
src/mame/drivers/copsnrob.cpp
View File

@ -60,7 +60,6 @@ Added Dip locations according to manual.
#include "includes/copsnrob.h"
#include "cpu/m6502/m6502.h"
#include "speaker.h"
#include "copsnrob.lh"
@ -94,7 +93,7 @@ WRITE8_MEMBER(copsnrob_state::copsnrob_misc2_w)
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, copsnrob_state )
ADDRESS_MAP_GLOBAL_MASK(0x1fff)
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x0500, 0x0507) AM_WRITE(copsnrob_misc_w)
AM_RANGE(0x0500, 0x0507) AM_DEVWRITE("latch", f9334_device, write_d0)
AM_RANGE(0x0600, 0x0600) AM_WRITEONLY AM_SHARE("trucky")
AM_RANGE(0x0700, 0x07ff) AM_WRITEONLY AM_SHARE("truckram")
AM_RANGE(0x0800, 0x08ff) AM_RAM AM_SHARE("bulletsram")
@ -265,13 +264,7 @@ static MACHINE_CONFIG_START( copsnrob )
MCFG_GFXDECODE_ADD("gfxdecode", "palette", copsnrob)
MCFG_PALETTE_ADD_MONOCHROME("palette")
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_SOUND_ADD("discrete", DISCRETE, 0)
MCFG_DISCRETE_INTF(copsnrob)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
MCFG_FRAGMENT_ADD(copsnrob_audio)
MACHINE_CONFIG_END

15
src/mame/drivers/cortex.cpp
View File

@ -25,6 +25,7 @@
#include "emu.h"
#include "cpu/tms9900/tms9995.h"
#include "machine/74259.h"
#include "video/tms9928a.h"
class cortex_state : public driver_device
@ -51,8 +52,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( cortex_io, AS_IO, 8, cortex_state )
ADDRESS_MAP_UNMAP_HIGH
//AM_RANGE(0x0000, 0x000f) AM_READWRITE(pio_r,pio_w)
//AM_RANGE(0x0010, 0x001f) AM_READ(keyboard_r)
AM_RANGE(0x0000, 0x000f) AM_MIRROR(0x0030) AM_DEVWRITE("control", ls259_device, write_a0)
//AM_RANGE(0x0000, 0x000f) AM_MIRROR(0x0020) AM_READ(pio_r)
//AM_RANGE(0x0010, 0x001f) AM_MIRROR(0x0020) AM_READ(keyboard_r)
//AM_RANGE(0x0080, 0x00bf) AM_READWRITE(rs232_r,rs232_w)
//AM_RANGE(0x0180, 0x01bf) AM_READWRITE(cass_r,cass_w)
//AM_RANGE(0x0800, 0x080f) AM_WRITE(cent_data_w)
@ -81,6 +83,15 @@ static MACHINE_CONFIG_START( cortex )
// No lines connected yet
MCFG_TMS99xx_ADD("maincpu", TMS9995, 12000000, cortex_mem, cortex_io)
MCFG_DEVICE_ADD("control", LS259, 0) // IC64
//MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(cortex_state, basic_led_w))
//MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(cortex_state, keyboard_ack_w))
//MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(cortex_state, ebus_int_ack_w))
//MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(cortex_state, ebus_to_en_w))
//MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(cortex_state, disk_size_w))
//MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(cortex_state, eprom_on_off_w))
//MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(cortex_state, bell_en_w))
/* video hardware */
MCFG_DEVICE_ADD( "tms9928a", TMS9929A, XTAL_10_738635MHz / 2 )
MCFG_TMS9928A_VRAM_SIZE(0x4000)

56
src/mame/drivers/crgolf.cpp
View File

@ -93,6 +93,7 @@ protected or a snippet should do the aforementioned string copy.
#include "includes/crgolf.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "sound/ay8910.h"
#include "sound/msm5205.h"
#include "screen.h"
@ -128,6 +129,10 @@ void crgolf_state::machine_start()
save_item(NAME(m_sound_to_main_data));
save_item(NAME(m_sample_offset));
save_item(NAME(m_sample_count));
save_item(NAME(m_color_select));
save_item(NAME(m_screen_flip));
save_item(NAME(m_screena_enable));
save_item(NAME(m_screenb_enable));
}
@ -290,10 +295,34 @@ WRITE8_MEMBER(crgolf_state::crgolfhi_sample_w)
}
}
WRITE8_MEMBER(crgolf_state::screen_select_w)
WRITE_LINE_MEMBER(crgolf_state::color_select_w)
{
// if (data & 0xfe) printf("vram_page_select_w %02x\n", data);
m_vrambank->set_bank(data & 0x1);
m_color_select = state;
}
WRITE_LINE_MEMBER(crgolf_state::screen_flip_w)
{
m_screen_flip = state;
}
WRITE_LINE_MEMBER(crgolf_state::screen_select_w)
{
m_vrambank->set_bank(state);
}
WRITE_LINE_MEMBER(crgolf_state::screena_enable_w)
{
m_screena_enable = state;
}
WRITE_LINE_MEMBER(crgolf_state::screenb_enable_w)
{
m_screenb_enable = state;
}
@ -308,11 +337,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, crgolf_state )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x5fff) AM_RAM
AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1")
AM_RANGE(0x8003, 0x8003) AM_WRITEONLY AM_SHARE("color_select")
AM_RANGE(0x8004, 0x8004) AM_WRITEONLY AM_SHARE("screen_flip")
AM_RANGE(0x8005, 0x8005) AM_WRITE( screen_select_w )
AM_RANGE(0x8006, 0x8006) AM_WRITEONLY AM_SHARE("screenb_enable")
AM_RANGE(0x8007, 0x8007) AM_WRITEONLY AM_SHARE("screena_enable")
AM_RANGE(0x8000, 0x8007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x8800, 0x8800) AM_READWRITE(sound_to_main_r, main_to_sound_w)
AM_RANGE(0x9000, 0x9000) AM_WRITE(rom_bank_select_w)
AM_RANGE(0xa000, 0xffff) AM_DEVICE("vrambank", address_map_bank_device, amap8)
@ -357,13 +382,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mastrglf_io, AS_IO, 8, crgolf_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x03, 0x03) AM_WRITEONLY AM_SHARE("color_select")
AM_RANGE(0x04, 0x04) AM_WRITEONLY AM_SHARE("screen_flip")
AM_RANGE(0x05, 0x05) AM_WRITE( screen_select_w )
AM_RANGE(0x06, 0x06) AM_WRITEONLY AM_SHARE("screenb_enable")
AM_RANGE(0x07, 0x07) AM_WRITEONLY AM_SHARE("screena_enable")
AM_RANGE(0x00, 0x07) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
// AM_RANGE(0x20, 0x20) AM_WRITE( main_to_sound_w )
AM_RANGE(0x40, 0x40) AM_WRITE( main_to_sound_w )
AM_RANGE(0xa0, 0xa0) AM_READ( sound_to_main_r )
@ -505,6 +524,13 @@ static MACHINE_CONFIG_START( crgolf )
MCFG_QUANTUM_TIME(attotime::from_hz(6000))
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 1H
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(crgolf_state, color_select_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(crgolf_state, screen_flip_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(crgolf_state, screen_select_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(crgolf_state, screenb_enable_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(crgolf_state, screena_enable_w))
MCFG_DEVICE_ADD("vrambank", ADDRESS_MAP_BANK, 0)
MCFG_DEVICE_PROGRAM_MAP(vrambank_map)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)

11
src/mame/drivers/ddenlovr.cpp
View File

@ -4264,10 +4264,7 @@ static ADDRESS_MAP_START( htengoku_io_map, AS_IO, 8, ddenlovr_state )
AM_RANGE( 0xc4, 0xc4 ) AM_WRITE(dynax_blit_pen_w) // Destination Pen
AM_RANGE( 0xc5, 0xc5 ) AM_WRITE(dynax_blit_dest_w) // Destination Layer
AM_RANGE( 0xc6, 0xc6 ) AM_WRITE(htengoku_blit_romregion_w) // Blitter ROM bank
AM_RANGE( 0xe0, 0xe0 ) AM_WRITE(yarunara_flipscreen_w)
AM_RANGE( 0xe1, 0xe1 ) AM_WRITE(yarunara_layer_half_w) // half of the interleaved layer to write to
AM_RANGE( 0xe2, 0xe2 ) AM_WRITE(yarunara_layer_half2_w) //
AM_RANGE( 0xe5, 0xe5 ) AM_WRITE(dynax_blitter_ack_w) // Blitter IRQ Ack
AM_RANGE( 0xe0, 0xe7 ) AM_WRITE(yarunara_mainlatch_w)
ADDRESS_MAP_END
/***************************************************************************
@ -4296,6 +4293,12 @@ static MACHINE_CONFIG_START( htengoku )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, layer_half_w)) // half of the interleaved layer to write to
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, layer_half2_w)) //
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(dynax_state, blitter_ack_w)) // Blitter IRQ Ack
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)

54
src/mame/drivers/destroyr.cpp
View File

@ -14,6 +14,7 @@ TODO:
#include "emu.h"
#include "cpu/m6800/m6800.h"
#include "machine/74259.h"
#include "machine/watchdog.h"
#include "screen.h"
@ -68,7 +69,8 @@ public:
DECLARE_WRITE8_MEMBER(misc_w);
DECLARE_WRITE8_MEMBER(cursor_load_w);
DECLARE_WRITE8_MEMBER(interrupt_ack_w);
DECLARE_WRITE8_MEMBER(output_w);
DECLARE_WRITE_LINE_MEMBER(led0_w);
DECLARE_WRITE_LINE_MEMBER(led1_w);
DECLARE_READ8_MEMBER(input_r);
DECLARE_READ8_MEMBER(scanline_r);
@ -244,37 +246,15 @@ WRITE8_MEMBER(destroyr_state::interrupt_ack_w)
}
WRITE8_MEMBER(destroyr_state::output_w)
WRITE_LINE_MEMBER(destroyr_state::led0_w)
{
if (offset & 8) misc_w(space, 8, data);
output().set_led_value(0, state);
}
else switch (offset & 7)
{
case 0:
output().set_led_value(0, data & 1);
break;
case 1:
output().set_led_value(1, data & 1); /* no second LED present on cab */
break;
case 2:
/* bit 0 => songate */
break;
case 3:
/* bit 0 => launch */
break;
case 4:
/* bit 0 => explosion */
break;
case 5:
/* bit 0 => sonar */
break;
case 6:
/* bit 0 => high explosion */
break;
case 7:
/* bit 0 => low explosion */
break;
}
WRITE_LINE_MEMBER(destroyr_state::led1_w)
{
output().set_led_value(1, state); /* no second LED present on cab */
}
@ -308,7 +288,9 @@ READ8_MEMBER(destroyr_state::scanline_r)
static ADDRESS_MAP_START( destroyr_map, AS_PROGRAM, 8, destroyr_state )
ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x00ff) AM_MIRROR(0xf00) AM_RAM
AM_RANGE(0x1000, 0x1fff) AM_READWRITE(input_r, output_w)
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0xffe) AM_READ(input_r)
AM_RANGE(0x1000, 0x1007) AM_MIRROR(0xff0) AM_DEVWRITE("outlatch", f9334_device, write_d0)
AM_RANGE(0x1008, 0x1008) AM_MIRROR(0xff7) AM_WRITE(misc_w)
AM_RANGE(0x2000, 0x2fff) AM_READ_PORT("IN2")
AM_RANGE(0x3000, 0x30ff) AM_MIRROR(0xf00) AM_WRITEONLY AM_SHARE("alpha_nuram")
AM_RANGE(0x4000, 0x401f) AM_MIRROR(0xfe0) AM_WRITEONLY AM_SHARE("major_obj_ram")
@ -497,6 +479,16 @@ static MACHINE_CONFIG_START( destroyr )
MCFG_CPU_PROGRAM_MAP(destroyr_map)
MCFG_CPU_PERIODIC_INT_DRIVER(destroyr_state, irq0_line_assert, 4*60)
MCFG_DEVICE_ADD("outlatch", F9334, 0) // F8
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(destroyr_state, led0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(destroyr_state, led1_w))
// Q2 => songate
// Q3 => launch
// Q4 => explosion
// Q5 => sonar
// Q6 => high explosion
// Q7 => low explosion
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

122
src/mame/drivers/dragrace.cpp
View File

@ -9,6 +9,7 @@
#include "emu.h"
#include "includes/dragrace.h"
#include "cpu/m6800/m6800.h"
#include "machine/74259.h"
#include "sound/discrete.h"
#include "speaker.h"
@ -38,82 +39,34 @@ TIMER_DEVICE_CALLBACK_MEMBER(dragrace_state::dragrace_frame_callback)
}
void dragrace_state::dragrace_update_misc_flags( address_space &space )
WRITE8_MEMBER(dragrace_state::speed1_w)
{
/* 0x0900 = set 3SPEED1 0x00000001
* 0x0901 = set 4SPEED1 0x00000002
* 0x0902 = set 5SPEED1 0x00000004
* 0x0903 = set 6SPEED1 0x00000008
* 0x0904 = set 7SPEED1 0x00000010
* 0x0905 = set EXPLOSION1 0x00000020
* 0x0906 = set SCREECH1 0x00000040
* 0x0920 - 0x0927 = clear 0x0900 - 0x0907
* 0x0909 = set KLEXPL1 0x00000200
* 0x090b = set MOTOR1 0x00000800
* 0x090c = set ATTRACT 0x00001000
* 0x090d = set LOTONE 0x00002000
* 0x090f = set Player 1 Start Lamp 0x00008000
* 0x0928 - 0x092f = clear 0x0908 - 0x090f
* 0x0910 = set 3SPEED2 0x00010000
* 0x0911 = set 4SPEED2 0x00020000
* 0x0912 = set 5SPEED2 0x00040000
* 0x0913 = set 6SPEED2 0x00080000
* 0x0914 = set 7SPEED2 0x00100000
* 0x0915 = set EXPLOSION2 0x00200000
* 0x0916 = set SCREECH2 0x00400000
* 0x0930 = clear 0x0910 - 0x0917
* 0x0919 = set KLEXPL2 0x02000000
* 0x091b = set MOTOR2 0x08000000
* 0x091d = set HITONE 0x20000000
* 0x091f = set Player 2 Start Lamp 0x80000000
* 0x0938 = clear 0x0918 - 0x091f
*/
output().set_led_value(0, m_misc_flags & 0x00008000);
output().set_led_value(1, m_misc_flags & 0x80000000);
m_discrete->write(space, DRAGRACE_MOTOR1_DATA, ~m_misc_flags & 0x0000001f); // Speed1 data*
m_discrete->write(space, DRAGRACE_EXPLODE1_EN, (m_misc_flags & 0x00000020) ? 1: 0); // Explosion1 enable
m_discrete->write(space, DRAGRACE_SCREECH1_EN, (m_misc_flags & 0x00000040) ? 1: 0); // Screech1 enable
m_discrete->write(space, DRAGRACE_KLEXPL1_EN, (m_misc_flags & 0x00000200) ? 1: 0); // KLEXPL1 enable
m_discrete->write(space, DRAGRACE_MOTOR1_EN, (m_misc_flags & 0x00000800) ? 1: 0); // Motor1 enable
m_discrete->write(space, DRAGRACE_MOTOR2_DATA, (~m_misc_flags & 0x001f0000) >> 0x10); // Speed2 data*
m_discrete->write(space, DRAGRACE_EXPLODE2_EN, (m_misc_flags & 0x00200000) ? 1: 0); // Explosion2 enable
m_discrete->write(space, DRAGRACE_SCREECH2_EN, (m_misc_flags & 0x00400000) ? 1: 0); // Screech2 enable
m_discrete->write(space, DRAGRACE_KLEXPL2_EN, (m_misc_flags & 0x02000000) ? 1: 0); // KLEXPL2 enable
m_discrete->write(space, DRAGRACE_MOTOR2_EN, (m_misc_flags & 0x08000000) ? 1: 0); // Motor2 enable
m_discrete->write(space, DRAGRACE_ATTRACT_EN, (m_misc_flags & 0x00001000) ? 1: 0); // Attract enable
m_discrete->write(space, DRAGRACE_LOTONE_EN, (m_misc_flags & 0x00002000) ? 1: 0); // LoTone enable
m_discrete->write(space, DRAGRACE_HITONE_EN, (m_misc_flags & 0x20000000) ? 1: 0); // HiTone enable
unsigned freq = ~data & 0x1f;
m_discrete->write(machine().dummy_space(), DRAGRACE_MOTOR1_DATA, freq);
// the tachometers are driven from the same frequency generator that creates the engine sound
output().set_value("tachometer", ~m_misc_flags & 0x0000001f);
output().set_value("tachometer2", (~m_misc_flags & 0x001f0000) >> 0x10);
output().set_value("tachometer", freq);
}
WRITE8_MEMBER(dragrace_state::dragrace_misc_w)
WRITE8_MEMBER(dragrace_state::speed2_w)
{
/* Set/clear individual bit */
uint32_t mask = 1 << offset;
if (data & 0x01)
m_misc_flags |= mask;
else
m_misc_flags &= (~mask);
logerror("Set %#6x, Mask=%#10x, Flag=%#10x, Data=%x\n", 0x0900 + offset, mask, m_misc_flags, data & 0x01);
dragrace_update_misc_flags(space);
unsigned freq = ~data & 0x1f;
m_discrete->write(machine().dummy_space(), DRAGRACE_MOTOR2_DATA, freq);
// the tachometers are driven from the same frequency generator that creates the engine sound
output().set_value("tachometer2", freq);
}
WRITE8_MEMBER(dragrace_state::dragrace_misc_clear_w)
WRITE_LINE_MEMBER(dragrace_state::p1_start_w)
{
/* Clear 8 bits */
uint32_t mask = 0xff << (((offset >> 3) & 0x03) * 8);
m_misc_flags &= (~mask);
logerror("Clear %#6x, Mask=%#10x, Flag=%#10x, Data=%x\n", 0x0920 + offset, mask, m_misc_flags, data & 0x01);
dragrace_update_misc_flags(space);
// set Player 1 Start Lamp
output().set_led_value(0, state);
}
WRITE_LINE_MEMBER(dragrace_state::p2_start_w)
{
// set Player 2 Start Lamp
output().set_led_value(1, state);
}
READ8_MEMBER(dragrace_state::dragrace_input_r)
@ -168,8 +121,14 @@ READ8_MEMBER(dragrace_state::dragrace_scanline_r)
static ADDRESS_MAP_START( dragrace_map, AS_PROGRAM, 8, dragrace_state )
AM_RANGE(0x0080, 0x00ff) AM_RAM
AM_RANGE(0x0800, 0x083f) AM_READ(dragrace_input_r)
AM_RANGE(0x0900, 0x091f) AM_WRITE(dragrace_misc_w)
AM_RANGE(0x0920, 0x093f) AM_WRITE(dragrace_misc_clear_w)
AM_RANGE(0x0900, 0x0907) AM_DEVWRITE("latch_f5", addressable_latch_device, write_d0)
AM_RANGE(0x0908, 0x090f) AM_DEVWRITE("latch_a5", addressable_latch_device, write_d0)
AM_RANGE(0x0910, 0x0917) AM_DEVWRITE("latch_h5", addressable_latch_device, write_d0)
AM_RANGE(0x0918, 0x091f) AM_DEVWRITE("latch_e5", addressable_latch_device, write_d0)
AM_RANGE(0x0920, 0x0927) AM_DEVWRITE("latch_f5", addressable_latch_device, clear)
AM_RANGE(0x0928, 0x092f) AM_DEVWRITE("latch_a5", addressable_latch_device, clear)
AM_RANGE(0x0930, 0x0937) AM_DEVWRITE("latch_h5", addressable_latch_device, clear)
AM_RANGE(0x0938, 0x093f) AM_DEVWRITE("latch_e5", addressable_latch_device, clear)
AM_RANGE(0x0a00, 0x0aff) AM_WRITEONLY AM_SHARE("playfield_ram")
AM_RANGE(0x0b00, 0x0bff) AM_WRITEONLY AM_SHARE("position_ram")
AM_RANGE(0x0c00, 0x0c00) AM_READ(dragrace_steering_r)
@ -314,13 +273,11 @@ PALETTE_INIT_MEMBER(dragrace_state, dragrace)
void dragrace_state::machine_start()
{
save_item(NAME(m_misc_flags));
save_item(NAME(m_gear));
}
void dragrace_state::machine_reset()
{
m_misc_flags = 0;
m_gear[0] = 0;
m_gear[1] = 0;
}
@ -356,6 +313,29 @@ static MACHINE_CONFIG_START( dragrace )
MCFG_DISCRETE_INTF(dragrace)
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
MCFG_DEVICE_ADD("latch_f5", F9334, 0) // F5
MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(WRITE8(dragrace_state, speed1_w)) MCFG_DEVCB_MASK(0x1f) // set 3SPEED1-7SPEED1
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_EXPLODE1_EN>)) // Explosion1 enable
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_SCREECH1_EN>)) // Screech1 enable
MCFG_DEVICE_ADD("latch_a5", F9334, 0) // A5
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_KLEXPL1_EN>)) // KLEXPL1 enable
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_MOTOR1_EN>)) // Motor1 enable
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_ATTRACT_EN>)) // Attract enable
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_LOTONE_EN>)) // LoTone enable
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(dragrace_state, p1_start_w))
MCFG_DEVICE_ADD("latch_h5", F9334, 0) // H5
MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(WRITE8(dragrace_state, speed2_w)) MCFG_DEVCB_MASK(0x1f) // set 3SPEED2-7SPEED2
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_EXPLODE2_EN>)) // Explosion2 enable
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_SCREECH2_EN>)) // Screech2 enable
MCFG_DEVICE_ADD("latch_e5", F9334, 0) // E5
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_KLEXPL2_EN>)) // KLEXPL2 enable
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_MOTOR2_EN>)) // Motor2 enable
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<DRAGRACE_HITONE_EN>)) // HiTone enable
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(dragrace_state, p2_start_w))
MACHINE_CONFIG_END

284
src/mame/drivers/dynax.cpp
View File

@ -116,8 +116,9 @@ WRITE8_MEMBER(dynax_state::dynax_vblank_ack_w)
sprtmtch_update_irq();
}
WRITE8_MEMBER(dynax_state::dynax_blitter_ack_w)
WRITE_LINE_MEMBER(dynax_state::blitter_ack_w)
{
// probably not exactly how this works
m_blitter_irq = 0;
sprtmtch_update_irq();
}
@ -152,15 +153,15 @@ WRITE8_MEMBER(dynax_state::jantouki_vblank_ack_w)
jantouki_update_irq();
}
WRITE8_MEMBER(dynax_state::jantouki_blitter_ack_w)
WRITE_LINE_MEMBER(dynax_state::jantouki_blitter_ack_w)
{
m_blitter_irq = data;
m_blitter_irq = state;
jantouki_update_irq();
}
WRITE8_MEMBER(dynax_state::jantouki_blitter2_ack_w)
WRITE_LINE_MEMBER(dynax_state::jantouki_blitter2_ack_w)
{
m_blitter2_irq = data;
m_blitter2_irq = state;
jantouki_update_irq();
}
@ -212,14 +213,14 @@ WRITE_LINE_MEMBER(dynax_state::jantouki_sound_callback)
Sports Match
***************************************************************************/
WRITE8_MEMBER(dynax_state::dynax_coincounter_0_w)
WRITE_LINE_MEMBER(dynax_state::coincounter_0_w)
{
machine().bookkeeping().coin_counter_w(0, data);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE8_MEMBER(dynax_state::dynax_coincounter_1_w)
WRITE_LINE_MEMBER(dynax_state::coincounter_1_w)
{
machine().bookkeeping().coin_counter_w(1, data);
machine().bookkeeping().coin_counter_w(1, state);
}
READ8_MEMBER(dynax_state::ret_ff)
@ -286,12 +287,6 @@ WRITE8_MEMBER(dynax_state::hnoridur_rombank_w)
}
WRITE8_MEMBER(dynax_state::hnoridur_palbank_w)
{
m_palbank = data & 0x0f;
dynax_blit_palbank_w(space, 0, data);
}
WRITE8_MEMBER(dynax_state::hnoridur_palette_w)
{
switch (m_hnoridur_bank)
@ -428,6 +423,11 @@ WRITE8_MEMBER(dynax_state::adpcm_reset_w)
m_msm->reset_w(~data & 1);
}
WRITE_LINE_MEMBER(dynax_state::adpcm_reset_kludge_w)
{
m_resetkludge = state;
}
MACHINE_RESET_MEMBER(dynax_state,adpcm)
{
/* start with the MSM5205 reset */
@ -435,16 +435,6 @@ MACHINE_RESET_MEMBER(dynax_state,adpcm)
m_msm->reset_w(1);
}
WRITE8_MEMBER(dynax_state::yarunara_layer_half_w)
{
hanamai_layer_half_w(space, 0, data >> 1);
}
WRITE8_MEMBER(dynax_state::yarunara_layer_half2_w)
{
hnoridur_layer_half2_w(space, 0, data >> 1);
}
static ADDRESS_MAP_START( cdracula_mem_map, AS_PROGRAM, 8, dynax_state )
AM_RANGE( 0x0000, 0xbfff ) AM_ROM
AM_RANGE( 0xc000, 0xffff ) AM_RAM
@ -537,13 +527,7 @@ static ADDRESS_MAP_START( hanamai_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x6c, 0x6c ) AM_WRITE(dynax_blit_palette01_w) // Layers Palettes (Low Bits)
AM_RANGE( 0x6d, 0x6d ) AM_WRITE(dynax_blit_palette23_w) //
AM_RANGE( 0x6e, 0x6e ) AM_WRITE(dynax_blit_backpen_w) // Background Color
AM_RANGE( 0x70, 0x70 ) AM_WRITE(adpcm_reset_w) // MSM5205 reset
AM_RANGE( 0x71, 0x71 ) AM_WRITE(dynax_flipscreen_w) // Flip Screen
AM_RANGE( 0x72, 0x72 ) AM_WRITE(dynax_coincounter_0_w) // Coin Counters
AM_RANGE( 0x73, 0x73 ) AM_WRITE(dynax_coincounter_1_w) //
AM_RANGE( 0x74, 0x74 ) AM_WRITE(dynax_blitter_ack_w) // Blitter IRQ Ack
AM_RANGE( 0x76, 0x76 ) AM_WRITE(dynax_blit_palbank_w) // Layers Palettes (High Bit)
AM_RANGE( 0x77, 0x77 ) AM_WRITE(hanamai_layer_half_w) // half of the interleaved layer to write to
AM_RANGE( 0x70, 0x77 ) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE( 0x78, 0x79 ) AM_DEVREADWRITE("ym2203", ym2203_device, read, write) // 2 x DSW
AM_RANGE( 0x7a, 0x7b ) AM_DEVWRITE("aysnd", ay8912_device, address_data_w) // AY8912
// AM_RANGE( 0x7c, 0x7c ) AM_WRITENOP // CRT Controller
@ -584,12 +568,8 @@ static ADDRESS_MAP_START( hnoridur_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x55, 0x55 ) AM_WRITENOP // ? VBlank IRQ Ack
AM_RANGE( 0x56, 0x56 ) AM_WRITE(dynax_vblank_ack_w) // VBlank IRQ Ack
AM_RANGE( 0x57, 0x57 ) AM_READ(ret_ff) // ?
AM_RANGE( 0x60, 0x60 ) AM_WRITE(dynax_flipscreen_w) // Flip Screen
AM_RANGE( 0x61, 0x61 ) AM_WRITE(hanamai_layer_half_w) // half of the interleaved layer to write to
AM_RANGE( 0x62, 0x62 ) AM_WRITE(hnoridur_layer_half2_w) //
AM_RANGE( 0x67, 0x67 ) AM_WRITE(dynax_blitter_ack_w) // Blitter IRQ Ack
AM_RANGE( 0x70, 0x70 ) AM_WRITE(dynax_coincounter_0_w) // Coin Counters
AM_RANGE( 0x71, 0x71 ) AM_WRITE(dynax_coincounter_1_w) //
AM_RANGE( 0x60, 0x67 ) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE( 0x70, 0x77 ) AM_DEVWRITE("outlatch", ls259_device, write_d0)
ADDRESS_MAP_END
/***************************************************************************
@ -601,14 +581,14 @@ WRITE8_MEMBER(dynax_state::hjingi_bank_w)
m_hnoridur_bank = data;
}
WRITE8_MEMBER(dynax_state::hjingi_lockout_w)
WRITE_LINE_MEMBER(dynax_state::hjingi_lockout_w)
{
machine().bookkeeping().coin_lockout_w(0, (~data) & 0x01);
machine().bookkeeping().coin_lockout_w(0, !state);
}
WRITE8_MEMBER(dynax_state::hjingi_hopper_w)
WRITE_LINE_MEMBER(dynax_state::hjingi_hopper_w)
{
m_hopper = data & 0x01;
m_hopper = state;
}
uint8_t dynax_state::hjingi_hopper_bit()
@ -672,16 +652,10 @@ static ADDRESS_MAP_START( hjingi_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x56, 0x56 ) AM_WRITE(dynax_vblank_ack_w) // VBlank IRQ Ack
AM_RANGE( 0x57, 0x57 ) AM_READ(ret_ff) // Blitter Busy
AM_RANGE( 0x67, 0x67 ) AM_WRITE(dynax_blitter_ack_w) // Blitter IRQ Ack
AM_RANGE( 0x60, 0x60 ) AM_WRITE(dynax_flipscreen_w) // Flip Screen
AM_RANGE( 0x61, 0x61 ) AM_WRITE(hanamai_layer_half_w) // half of the interleaved layer to write to
AM_RANGE( 0x62, 0x62 ) AM_WRITE(hnoridur_layer_half2_w) //
AM_RANGE( 0x60, 0x67 ) AM_DEVWRITE("mainlatch", ls259_device, write_d0) // Flip screen, layer half select, etc.
AM_RANGE( 0x70, 0x70 ) AM_WRITE(dynax_coincounter_0_w) // Coin Counters
AM_RANGE( 0x71, 0x71 ) AM_WRITE(dynax_coincounter_1_w) //
AM_RANGE( 0x72, 0x72 ) AM_WRITE(hjingi_hopper_w) // Hopper
AM_RANGE( 0x73, 0x73 ) AM_WRITE(hjingi_lockout_w) // Coin Lockout
AM_RANGE( 0x70, 0x77 ) AM_DEVWRITE("outlatch", ls259_device, write_d0) // Coin Counters, Hopper, Coin Lockout
AM_RANGE( 0x80, 0x80 ) AM_WRITE(hnoridur_rombank_w) // BANK ROM Select
ADDRESS_MAP_END
@ -760,14 +734,9 @@ WRITE8_MEMBER(dynax_state::yarunara_rombank_w)
m_hnoridur_bank = data;
}
WRITE8_MEMBER(dynax_state::yarunara_flipscreen_w)
WRITE8_MEMBER(dynax_state::yarunara_mainlatch_w)
{
dynax_flipscreen_w(space, 0, BIT(data, 1));
}
WRITE8_MEMBER(dynax_state::yarunara_flipscreen_inv_w)
{
dynax_flipscreen_w(space, 0, !BIT(data, 1));
m_mainlatch->write_bit(offset, BIT(data, 1));
}
WRITE8_MEMBER(dynax_state::yarunara_blit_romregion_w)
@ -799,12 +768,7 @@ static ADDRESS_MAP_START( yarunara_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x4b, 0x4b ) AM_WRITE(dynax_vblank_ack_w) // VBlank IRQ Ack
AM_RANGE( 0x4c, 0x4c ) AM_READ_PORT("DSW0") // DSW 1
AM_RANGE( 0x4f, 0x4f ) AM_READ_PORT("DSW1") // DSW 2
AM_RANGE( 0x50, 0x50 ) AM_WRITE(yarunara_flipscreen_w)
AM_RANGE( 0x51, 0x51 ) AM_WRITE(yarunara_layer_half_w) // half of the interleaved layer to write to
AM_RANGE( 0x52, 0x52 ) AM_WRITE(yarunara_layer_half2_w) //
// 53 ?
// 54 ?
AM_RANGE( 0x57, 0x57 ) AM_WRITE(dynax_blitter_ack_w) // Blitter IRQ Ack
AM_RANGE( 0x50, 0x57 ) AM_WRITE(yarunara_mainlatch_w)
AM_RANGE( 0x68, 0x68 ) AM_WRITE(dynax_blit_pen_w) // Destination Pen
AM_RANGE( 0x69, 0x69 ) AM_WRITE(dynax_blit_dest_w) // Destination Layer
AM_RANGE( 0x6a, 0x6a ) AM_WRITE(dynax_blit_palette01_w) // Layers Palettes
@ -845,12 +809,8 @@ static ADDRESS_MAP_START( mcnpshnt_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x54, 0x54 ) AM_WRITE(hnoridur_rombank_w) // BANK ROM Select
AM_RANGE( 0x56, 0x56 ) AM_WRITE(dynax_vblank_ack_w) // VBlank IRQ Ack
AM_RANGE( 0x57, 0x57 ) AM_READ(ret_ff) // ?
AM_RANGE( 0x60, 0x60 ) AM_WRITE(dynax_flipscreen_w) // Flip Screen
AM_RANGE( 0x61, 0x61 ) AM_WRITE(hanamai_layer_half_w) // half of the interleaved layer to write to
AM_RANGE( 0x62, 0x62 ) AM_WRITE(hnoridur_layer_half2_w) //
AM_RANGE( 0x67, 0x67 ) AM_WRITE(dynax_blitter_ack_w) // Blitter IRQ Ack
AM_RANGE( 0x70, 0x70 ) AM_WRITE(dynax_coincounter_0_w) // Coin Counters
AM_RANGE( 0x71, 0x71 ) AM_WRITE(dynax_coincounter_1_w) //
AM_RANGE( 0x60, 0x67 ) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE( 0x70, 0x77 ) AM_DEVWRITE("outlatch", ls259_device, write_d0)
ADDRESS_MAP_END
@ -872,12 +832,7 @@ static ADDRESS_MAP_START( sprtmtch_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x35, 0x35 ) AM_WRITE(dynax_blit_palette23_w) //
AM_RANGE( 0x36, 0x36 ) AM_WRITE(dynax_blit_backpen_w) // Background Color
AM_RANGE( 0x37, 0x37 ) AM_WRITE(dynax_vblank_ack_w) // VBlank IRQ Ack
// AM_RANGE( 0x40, 0x40 ) AM_WRITE(adpcm_reset_w) // MSM5205 reset
AM_RANGE( 0x41, 0x41 ) AM_WRITE(dynax_flipscreen_w) // Flip Screen
AM_RANGE( 0x42, 0x42 ) AM_WRITE(dynax_coincounter_0_w) // Coin Counters
AM_RANGE( 0x43, 0x43 ) AM_WRITE(dynax_coincounter_1_w) //
AM_RANGE( 0x44, 0x44 ) AM_WRITE(dynax_blitter_ack_w) // Blitter IRQ Ack
AM_RANGE( 0x45, 0x45 ) AM_WRITE(dynax_blit_palbank_w) // Layers Palettes (High Bit)
AM_RANGE( 0x40, 0x47 ) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
ADDRESS_MAP_END
@ -888,12 +843,7 @@ static ADDRESS_MAP_START( mjfriday_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x01, 0x01 ) AM_WRITE(dynax_blit_palette01_w) // Layers Palettes (Low Bits)
AM_RANGE( 0x02, 0x02 ) AM_WRITE(dynax_rombank_w) // BANK ROM Select
AM_RANGE( 0x03, 0x03 ) AM_WRITE(dynax_blit_backpen_w) // Background Color
AM_RANGE( 0x10, 0x11 ) AM_WRITE(mjdialq2_blit_dest_w) // Destination Layer
AM_RANGE( 0x12, 0x12 ) AM_WRITE(dynax_blit_palbank_w) // Layers Palettes (High Bit)
AM_RANGE( 0x13, 0x13 ) AM_WRITE(dynax_flipscreen_w) // Flip Screen
AM_RANGE( 0x14, 0x14 ) AM_WRITE(dynax_coincounter_0_w) // Coin Counters
AM_RANGE( 0x15, 0x15 ) AM_WRITE(dynax_coincounter_1_w) //
AM_RANGE( 0x16, 0x17 ) AM_WRITE(mjdialq2_layer_enable_w) // Layers Enable
AM_RANGE( 0x10, 0x17 ) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE( 0x41, 0x47 ) AM_WRITE(dynax_blitter_rev2_w) // Blitter
// AM_RANGE( 0x50, 0x50 ) AM_WRITENOP // CRT Controller
// AM_RANGE( 0x51, 0x51 ) AM_WRITENOP // CRT Controller
@ -924,11 +874,8 @@ static ADDRESS_MAP_START( nanajign_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x16, 0x16 ) AM_READ_PORT("DSW2") // DSW3
// AM_RANGE( 0x20, 0x21 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x31, 0x37 ) AM_WRITE(dynax_blitter_rev2_w) // Blitter
AM_RANGE( 0x40, 0x40 ) AM_WRITE(dynax_coincounter_0_w) // Coin Counter
AM_RANGE( 0x50, 0x50 ) AM_WRITE(dynax_flipscreen_w) // Flip Screen
AM_RANGE( 0x51, 0x51 ) AM_WRITE(hanamai_layer_half_w) // half of the interleaved layer to write to
AM_RANGE( 0x52, 0x52 ) AM_WRITE(hnoridur_layer_half2_w) //
AM_RANGE( 0x57, 0x57 ) AM_WRITE(dynax_blitter_ack_w) // Blitter IRQ Ack
AM_RANGE( 0x40, 0x47 ) AM_DEVWRITE("outlatch", ls259_device, write_d0) // Coin Counter
AM_RANGE( 0x50, 0x57 ) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE( 0x60, 0x60 ) AM_WRITE(dynax_extra_scrollx_w) // screen scroll X
AM_RANGE( 0x62, 0x62 ) AM_WRITE(dynax_extra_scrolly_w) // screen scroll Y
AM_RANGE( 0x6a, 0x6a ) AM_WRITE(hnoridur_rombank_w) // BANK ROM Select
@ -988,11 +935,7 @@ static ADDRESS_MAP_START( jantouki_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x54, 0x54 ) AM_READ_PORT("COINS") // Coins
AM_RANGE( 0x55, 0x55 ) AM_READ_PORT("DSW0") // DSW1
AM_RANGE( 0x56, 0x56 ) AM_READ_PORT("DSW1") // DSW2
AM_RANGE( 0x58, 0x58 ) AM_WRITE(dynax_coincounter_0_w) // Coin Counter
AM_RANGE( 0x5b, 0x5b ) AM_WRITE(dynax_blit2_palbank_w) // Layers Palettes (High Bit)
AM_RANGE( 0x5d, 0x5d ) AM_WRITE(dynax_blit_palbank_w) //
AM_RANGE( 0x5e, 0x5e ) AM_WRITE(jantouki_blitter_ack_w) // Blitter IRQ Ack
AM_RANGE( 0x5f, 0x5f ) AM_WRITE(jantouki_blitter2_ack_w) // Blitter 2 IRQ Ack
AM_RANGE( 0x58, 0x5f ) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE( 0x60, 0x60 ) AM_WRITE(dynax_blit_palette67_w) // Layers Palettes (Low Bits)
AM_RANGE( 0x61, 0x61 ) AM_WRITE(dynax_blit_palette45_w) //
AM_RANGE( 0x62, 0x62 ) AM_WRITE(dynax_blit_palette23_w) //
@ -1076,8 +1019,7 @@ static ADDRESS_MAP_START( mjelctrn_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x11, 0x12 ) AM_WRITE(mjelctrn_blitter_ack_w) //?
// AM_RANGE( 0x20, 0x20 ) AM_WRITENOP // CRT Controller
// AM_RANGE( 0x21, 0x21 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x40, 0x40 ) AM_WRITE(dynax_coincounter_0_w) // Coin Counters
AM_RANGE( 0x41, 0x41 ) AM_WRITE(dynax_coincounter_1_w) //
AM_RANGE( 0x40, 0x47 ) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE( 0x60, 0x60 ) AM_WRITE(dynax_extra_scrollx_w) // screen scroll X
AM_RANGE( 0x62, 0x62 ) AM_WRITE(dynax_extra_scrolly_w) // screen scroll Y
// AM_RANGE( 0x64, 0x64 ) AM_WRITE(dynax_extra_scrollx_w) // screen scroll X
@ -1090,10 +1032,7 @@ static ADDRESS_MAP_START( mjelctrn_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x84, 0x84 ) AM_READ(mjelctrn_dsw_r) // DSW8 x 4
AM_RANGE( 0x85, 0x85 ) AM_READ_PORT("SW1") // DSW2
AM_RANGE( 0xa1, 0xa7 ) AM_WRITE(dynax_blitter_rev2_w) // Blitter
AM_RANGE( 0xc0, 0xc0 ) AM_WRITE(dynax_flipscreen_w) // Flip Screen
AM_RANGE( 0xc1, 0xc1 ) AM_WRITE(hanamai_layer_half_w) // half of the interleaved layer to write to
AM_RANGE( 0xc2, 0xc2 ) AM_WRITE(hnoridur_layer_half2_w) //
// c3,c4 seem to be related to wrap around enable
AM_RANGE( 0xc0, 0xc7 ) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE( 0xe0, 0xe0 ) AM_WRITE(dynax_blit_pen_w) // Destination Pen
AM_RANGE( 0xe1, 0xe1 ) AM_WRITE(dynax_blit_dest_w) // Destination Layer
AM_RANGE( 0xe2, 0xe2 ) AM_WRITE(dynax_blit_palette01_w) // Layers Palettes
@ -1121,11 +1060,7 @@ static ADDRESS_MAP_START( mjembase_io_map, AS_IO, 8, dynax_state )
// AM_RANGE( 0x40, 0x40 ) AM_WRITENOP // CRT Controller
// AM_RANGE( 0x41, 0x41 ) AM_WRITENOP // CRT Controller
AM_RANGE( 0x61, 0x67 ) AM_WRITE(dynax_blitter_rev2_w) // Blitter
AM_RANGE( 0x80, 0x80 ) AM_WRITE(dynax_flipscreen_w) // Flip Screen
AM_RANGE( 0x81, 0x81 ) AM_WRITE(hanamai_layer_half_w) // half of the interleaved layer to write to
AM_RANGE( 0x82, 0x82 ) AM_WRITE(hnoridur_layer_half2_w) //
AM_RANGE( 0x83, 0x83 ) AM_WRITE(dynax_coincounter_0_w) // Coin Counters
AM_RANGE( 0x84, 0x84 ) AM_WRITE(dynax_coincounter_1_w) //
AM_RANGE( 0x80, 0x87 ) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE( 0xa0, 0xa0 ) AM_WRITE(hnoridur_rombank_w) // BANK ROM Select
AM_RANGE( 0xc0, 0xc0 ) AM_WRITE(dynax_blit_pen_w) // Destination Pen
AM_RANGE( 0xc1, 0xc1 ) AM_WRITE(mjembase_blit_dest_w) // Destination Layer
@ -1351,15 +1286,15 @@ void dynax_state::tenkai_show_6c()
// popmessage("%02x %02x", m_tenkai_6c, m_tenkai_70);
}
WRITE8_MEMBER(dynax_state::tenkai_6c_w)
WRITE_LINE_MEMBER(dynax_state::tenkai_6c_w)
{
m_tenkai_6c = data;
m_tenkai_6c = state;
tenkai_show_6c();
}
WRITE8_MEMBER(dynax_state::tenkai_70_w)
WRITE_LINE_MEMBER(dynax_state::tenkai_70_w)
{
m_tenkai_70 = data;
m_tenkai_70 = state;
tenkai_show_6c();
}
@ -1374,6 +1309,11 @@ WRITE8_MEMBER(dynax_state::tenkai_blit_romregion_w)
logerror("%04x: unmapped romregion=%02X\n", space.device().safe_pc(), data);
}
WRITE8_MEMBER(dynax_state::tenkai_mainlatch_w)
{
m_mainlatch->write_bit(offset >> 2, BIT(data, 1));
}
static ADDRESS_MAP_START( tenkai_map, AS_PROGRAM, 8, dynax_state )
AM_RANGE( 0x0000, 0x5fff ) AM_ROM
AM_RANGE( 0x6000, 0x6fff ) AM_RAM
@ -1390,12 +1330,7 @@ static ADDRESS_MAP_START( tenkai_map, AS_PROGRAM, 8, dynax_state )
AM_RANGE( 0x10050, 0x10050 ) AM_WRITE(tenkai_priority_w) // layer priority and enable
AM_RANGE( 0x10054, 0x10054 ) AM_WRITE(dynax_blit_backpen_w) // Background Color
AM_RANGE( 0x10058, 0x10058 ) AM_WRITE(tenkai_blit_romregion_w) // Blitter ROM bank
AM_RANGE( 0x10060, 0x10060 ) AM_WRITE(yarunara_flipscreen_inv_w) // Flip Screen
AM_RANGE( 0x10064, 0x10064 ) AM_WRITE(yarunara_layer_half_w) // half of the interleaved layer to write to
AM_RANGE( 0x10068, 0x10068 ) AM_WRITE(yarunara_layer_half2_w) //
AM_RANGE( 0x1006c, 0x1006c ) AM_WRITE(tenkai_6c_w) // ?
AM_RANGE( 0x10070, 0x10070 ) AM_WRITE(tenkai_70_w) // ?
AM_RANGE( 0x1007c, 0x1007c ) AM_WRITENOP // IRQ Ack? (0,2)
AM_RANGE( 0x10060, 0x1007f ) AM_WRITE(tenkai_mainlatch_w)
AM_RANGE( 0x100c0, 0x100c0 ) AM_WRITE(tenkai_ipsel_w)
AM_RANGE( 0x100c1, 0x100c1 ) AM_WRITE(tenkai_ip_w)
AM_RANGE( 0x100c2, 0x100c3 ) AM_READ(tenkai_ip_r)
@ -1488,18 +1423,9 @@ WRITE8_MEMBER(dynax_state::gekisha_8000_w)
case 0x8003: dynax_blit_backpen_w(space, offset - 0x03, data); return;
case 0x8010:
case 0x8011: mjdialq2_blit_dest_w(space, offset - 0x10, data); return;
case 0x8012: dynax_blit_palbank_w(space, offset - 0x12, data); return;
case 0x8013: dynax_flipscreen_w(space, offset - 0x13, data); return;
case 0x8014: dynax_coincounter_0_w(space, offset - 0x14, data); return;
case 0x8015: dynax_coincounter_1_w(space, offset - 0x15, data); return;
case 0x8016:
case 0x8017: mjdialq2_layer_enable_w(space, offset - 0x16, data); return;
case 0x8010: case 0x8011: case 0x8012: case 0x8013:
case 0x8014: case 0x8015: case 0x8016: case 0x8017:
m_mainlatch->write_bit(offset & 7, BIT(data, 0)); return;
case 0x8020:
case 0x8021: gekisha_hopper_w(space, offset - 0x20, data); return;
@ -1569,9 +1495,7 @@ static ADDRESS_MAP_START( cdracula_io_map, AS_IO, 8, dynax_state )
AM_RANGE( 0x35, 0x35 ) AM_WRITE(dynax_blit_palette23_w) //
AM_RANGE( 0x36, 0x36 ) AM_WRITE(dynax_blit_backpen_w) // Background Color
AM_RANGE( 0x37, 0x37 ) AM_WRITE(dynax_vblank_ack_w) // VBlank IRQ Ack
AM_RANGE( 0x41, 0x41 ) AM_WRITE(dynax_flipscreen_w) // Flip Screen
AM_RANGE( 0x44, 0x44 ) AM_WRITE(jantouki_blitter_ack_w) // Blitter IRQ Ack
AM_RANGE( 0x45, 0x45 ) AM_WRITE(dynax_blit_palbank_w) // Layers Palettes (High Bit)
AM_RANGE( 0x40, 0x47 ) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE( 0x60, 0x60 ) AM_READ_PORT("DSW2")
AM_RANGE( 0x61, 0x61 ) AM_READ_PORT("DSW1")
AM_RANGE( 0x6b, 0x6b ) AM_WRITE(cdracula_sound_rombank_w) // OKI Bank
@ -4381,6 +4305,11 @@ static MACHINE_CONFIG_START( cdracula )
// MCFG_NVRAM_ADD_0FILL("nvram") // no battery
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, flipscreen_w)) // Flip Screen
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(dynax_state, jantouki_blitter_ack_w)) // Blitter IRQ Ack
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(dynax_state, blit_palbank_w)) // Layers Palettes (High Bit)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(58.56)
@ -4420,6 +4349,16 @@ static MACHINE_CONFIG_START( hanamai )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE("msm", msm5205_device, reset_w)) MCFG_DEVCB_INVERT // MSM5205 reset
MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE(dynax_state, adpcm_reset_kludge_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, flipscreen_w)) // Flip Screen
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, coincounter_0_w)) // Coin Counters
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(dynax_state, coincounter_1_w)) //
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(dynax_state, blitter_ack_w)) // Blitter IRQ Ack
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(dynax_state, blit_palbank_w)) // Layers Palettes (High Bit)
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(dynax_state, layer_half_w)) // half of the interleaved layer to write to
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -4474,6 +4413,16 @@ static MACHINE_CONFIG_START( hnoridur )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // IC25
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, layer_half_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, layer_half2_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(dynax_state, blitter_ack_w))
MCFG_DEVICE_ADD("outlatch", LS259, 0) // IC61
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, coincounter_1_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -4521,6 +4470,18 @@ static MACHINE_CONFIG_START( hjingi )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, layer_half_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, layer_half2_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(dynax_state, blitter_ack_w))
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, coincounter_1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, hjingi_hopper_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(dynax_state, hjingi_lockout_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -4568,6 +4529,13 @@ static MACHINE_CONFIG_START( sprtmtch )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // UF12 on Intergirl
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(dynax_state, coincounter_1_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(dynax_state, blitter_ack_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(dynax_state, blit_palbank_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -4613,6 +4581,16 @@ static MACHINE_CONFIG_START( mjfriday )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // IC15
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, mjdialq2_blit_dest1_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, mjdialq2_blit_dest0_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, blit_palbank_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(dynax_state, coincounter_1_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(dynax_state, mjdialq2_layer1_enable_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(dynax_state, mjdialq2_layer0_enable_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -4677,6 +4655,8 @@ static MACHINE_CONFIG_DERIVED( yarunara, hnoridur )
MCFG_NVRAM_REPLACE_0FILL("nvram")
MCFG_DEVICE_REMOVE("outlatch") // ???
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_VISIBLE_AREA(0, 336-1, 8, 256-1-8-1)
@ -4752,6 +4732,13 @@ static MACHINE_CONFIG_START( jantouki )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, coincounter_0_w)) // Coin Counter
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(dynax_state, blit2_palbank_w)) // Layers Palettes (High Bit)
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(dynax_state, blit_palbank_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(dynax_state, jantouki_blitter_ack_w)) // Blitter IRQ Ack
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(dynax_state, jantouki_blitter2_ack_w)) // Blitter 2 IRQ Ack
/* video hardware */
MCFG_PALETTE_ADD("palette", 512)
MCFG_PALETTE_INIT_OWNER(dynax_state,sprtmtch) // static palette
@ -4830,6 +4817,12 @@ static MACHINE_CONFIG_DERIVED( mjelctrn, hnoridur )
MCFG_CPU_IO_MAP(mjelctrn_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", dynax_state, mjelctrn_vblank_interrupt) /* IM 2 needs a vector on the data bus */
MCFG_DEVICE_REPLACE("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, layer_half_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, layer_half2_w))
// Q3, Q4 seem to be related to wrap around enable
MCFG_VIDEO_START_OVERRIDE(dynax_state,mjelctrn)
MACHINE_CONFIG_END
@ -4839,6 +4832,13 @@ static MACHINE_CONFIG_DERIVED( mjembase, hnoridur )
MCFG_CPU_IO_MAP(mjembase_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", dynax_state, mjelctrn_vblank_interrupt) /* IM 2 needs a vector on the data bus */
MCFG_DEVICE_REPLACE("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, layer_half_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, layer_half2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(dynax_state, coincounter_1_w))
MCFG_VIDEO_START_OVERRIDE(dynax_state,mjembase)
MACHINE_CONFIG_END
@ -4954,6 +4954,14 @@ static MACHINE_CONFIG_START( tenkai )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 10C on Ougon no Pai
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, flipscreen_w)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, layer_half_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, layer_half2_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(dynax_state, tenkai_6c_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(dynax_state, tenkai_70_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) // IRQ Ack?
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -4989,6 +4997,11 @@ static MACHINE_CONFIG_DERIVED( majrjhdx, tenkai )
MCFG_PALETTE_INIT_OWNER(dynax_state,sprtmtch) // static palette
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( mjreach, tenkai )
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, flipscreen_w)) // not inverted
MACHINE_CONFIG_END
/***************************************************************************
Mahjong Gekisha
***************************************************************************/
@ -5025,6 +5038,16 @@ static MACHINE_CONFIG_START( gekisha )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(dynax_state, mjdialq2_blit_dest1_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(dynax_state, mjdialq2_blit_dest0_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(dynax_state, blit_palbank_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(dynax_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(dynax_state, coincounter_0_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(dynax_state, coincounter_1_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(dynax_state, mjdialq2_layer1_enable_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(dynax_state, mjdialq2_layer0_enable_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -6834,11 +6857,6 @@ ROM_START( mjreach )
ROM_RELOAD( 0x80000, 0x80000 )
ROM_END
DRIVER_INIT_MEMBER(dynax_state,mjreach)
{
m_maincpu->space(AS_PROGRAM).install_write_handler(0x10060, 0x10060, write8_delegate(FUNC(dynax_state::yarunara_flipscreen_w),this));
}
/***************************************************************************
Mahjong Tenkaigen
@ -7512,7 +7530,7 @@ GAME( 1991, tenkaicb, tenkai, tenkai, tenkai, dynax_state, 0, ROT0,
GAME( 1991, tenkaie, tenkai, tenkai, tenkai, dynax_state, 0, ROT0, "Dynax", "Mahjong Tenkaigen (set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1991, ougonpai, 0, tenkai, tenkai, dynax_state, 0, ROT0, "Dynax", "Mahjong Ougon No Pai", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
GAME( 1991, ougonpaib,ougonpai, tenkai, tenkai, dynax_state, 0, ROT0, "bootleg", "Mahjong Ougon No Pai (bootleg)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
GAME( 1994, mjreach, 0, tenkai, mjreach, dynax_state, mjreach, ROT0, "bootleg / Dynax", "Mahjong Reach (bootleg)", MACHINE_SUPPORTS_SAVE )
GAME( 1994, mjreach, 0, mjreach, mjreach, dynax_state, 0, ROT0, "bootleg / Dynax", "Mahjong Reach (bootleg)", MACHINE_SUPPORTS_SAVE )
GAME( 1994, cdracula, 0, cdracula, cdracula, dynax_state, 0, ROT0, "Yun Sung (Escape license)","Castle Of Dracula", MACHINE_SUPPORTS_SAVE ) // not a dynax board
GAME( 1995, shpeng, 0, sprtmtch, drgpunch, dynax_state, 0, ROT0, "WSAC Systems?", "Sea Hunter Penguin", MACHINE_NO_COCKTAIL | MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) // not a dynax board. proms?
GAME( 1995, intrgirl, 0, sprtmtch, drgpunch, dynax_state, 0, ROT0, "Barko", "Intergirl", MACHINE_NO_COCKTAIL | MACHINE_SUPPORTS_SAVE ) // not a dynax board.

41
src/mame/drivers/equites.cpp
View File

@ -592,7 +592,7 @@ CUSTOM_INPUT_MEMBER(equites_state::gekisou_unknown_bit_r)
WRITE16_MEMBER(equites_state::gekisou_unknown_bit_w)
{
// data bit is A16 (offset)
// data bit is A17 (offset)
m_gekisou_unknown_bit = (offset == 0) ? 0 : 1;;
}
@ -605,6 +605,12 @@ READ16_MEMBER(equites_state::equites_spriteram_kludge_r)
return m_spriteram[0];
}
WRITE8_MEMBER(equites_state::mainlatch_w)
{
// data bit is A17; address bits are A16(?)-A14 (offset is shifted by 1 here)
m_mainlatch->write_bit((offset & 0xe000) >> 13, BIT(offset, 16));
}
READ8_MEMBER(equites_state::mcu_ram_r)
{
if (m_fakemcu == nullptr)
@ -621,20 +627,18 @@ WRITE8_MEMBER(equites_state::mcu_ram_w)
m_mcuram[offset] = data;
}
WRITE16_MEMBER(equites_state::mcu_start_w)
WRITE_LINE_MEMBER(equites_state::mcu_start_w)
{
// data bit is A16 (offset)
if (m_fakemcu == nullptr)
m_alpha_8201->mcu_start_w(offset != 0);
m_alpha_8201->mcu_start_w(state != 0);
else
m_fakemcu->set_input_line(INPUT_LINE_HALT, (offset != 0) ? ASSERT_LINE : CLEAR_LINE);
m_fakemcu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
}
WRITE16_MEMBER(equites_state::mcu_switch_w)
WRITE_LINE_MEMBER(equites_state::mcu_switch_w)
{
// data bit is A16 (offset)
if (m_fakemcu == nullptr)
m_alpha_8201->bus_dir_w(offset == 0);
m_alpha_8201->bus_dir_w(state == 0);
}
@ -653,9 +657,7 @@ static ADDRESS_MAP_START( equites_map, AS_PROGRAM, 16, equites_state )
AM_RANGE(0x100000, 0x1001ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x140000, 0x1407ff) AM_READWRITE8(mcu_ram_r, mcu_ram_w, 0x00ff)
AM_RANGE(0x180000, 0x180001) AM_READ_PORT("IN1") AM_DEVWRITE8("soundlatch", generic_latch_8_device, write, 0x00ff)
AM_RANGE(0x184000, 0x184001) AM_SELECT(0x020000) AM_WRITE(equites_flipw_w)
AM_RANGE(0x188000, 0x188001) AM_SELECT(0x020000) AM_WRITE(mcu_start_w)
AM_RANGE(0x18c000, 0x18c001) AM_SELECT(0x020000) AM_WRITE(mcu_switch_w)
AM_RANGE(0x180000, 0x180001) AM_SELECT(0x03c000) AM_WRITE8(mainlatch_w, 0xff00)
AM_RANGE(0x1c0000, 0x1c0001) AM_READ_PORT("IN0") AM_WRITE(equites_scrollreg_w)
AM_RANGE(0x380000, 0x380001) AM_WRITE8(equites_bgcolor_w, 0xff00)
AM_RANGE(0x780000, 0x780001) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w)
@ -675,10 +677,7 @@ static ADDRESS_MAP_START( splndrbt_map, AS_PROGRAM, 16, equites_state )
AM_RANGE(0x080000, 0x080001) AM_READ_PORT("IN0")
AM_RANGE(0x0c0000, 0x0c0001) AM_READ_PORT("IN1")
AM_RANGE(0x0c0000, 0x0c0001) AM_SELECT(0x020000) AM_WRITE8(equites_bgcolor_w, 0xff00) // note: addressmask does not apply here
AM_RANGE(0x0c0000, 0x0c0001) AM_SELECT(0x020000) AM_WRITE8(equites_flipb_w, 0x00ff)
AM_RANGE(0x0c4000, 0x0c4001) AM_SELECT(0x020000) AM_WRITE(mcu_start_w)
AM_RANGE(0x0c8000, 0x0c8001) AM_SELECT(0x020000) AM_WRITE(mcu_switch_w)
AM_RANGE(0x0cc000, 0x0cc001) AM_SELECT(0x020000) AM_WRITE(splndrbt_selchar_w)
AM_RANGE(0x0c0000, 0x0c0001) AM_SELECT(0x03c000) AM_WRITE8(mainlatch_w, 0x00ff)
AM_RANGE(0x100000, 0x100001) AM_WRITE(splndrbt_bg_scrollx_w)
AM_RANGE(0x140000, 0x140001) AM_DEVWRITE8("soundlatch", generic_latch_8_device, write, 0x00ff)
AM_RANGE(0x1c0000, 0x1c0001) AM_WRITE(splndrbt_bg_scrolly_w)
@ -1130,7 +1129,6 @@ void equites_state::machine_start()
void equites_state::machine_reset()
{
flip_screen_set(0);
}
@ -1141,6 +1139,11 @@ static MACHINE_CONFIG_START( equites )
MCFG_CPU_PROGRAM_MAP(equites_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", equites_state, equites_scanline, "screen", 0, 1)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(equites_state, flip_screen_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(equites_state, mcu_start_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(equites_state, mcu_switch_w))
MCFG_FRAGMENT_ADD(common_sound)
MCFG_DEVICE_ADD("alpha_8201", ALPHA_8201, 4000000/8) // 8303 or 8304 (same device!)
@ -1186,6 +1189,12 @@ static MACHINE_CONFIG_START( splndrbt )
MCFG_CPU_PROGRAM_MAP(splndrbt_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", equites_state, splndrbt_scanline, "screen", 0, 1)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(equites_state, flip_screen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(equites_state, mcu_start_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(equites_state, mcu_switch_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(equites_state, splndrbt_selchar_w))
MCFG_FRAGMENT_ADD(common_sound)
MCFG_DEVICE_ADD("alpha_8201", ALPHA_8201, 4000000/8) // 8303 or 8304 (same device!)

54
src/mame/drivers/fastfred.cpp
View File

@ -14,6 +14,7 @@
#include "includes/fastfred.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "machine/watchdog.h"
#include "sound/ay8910.h"
@ -143,9 +144,9 @@ MACHINE_START_MEMBER(fastfred_state,imago)
m_gfxdecode->gfx(1)->set_source(m_imago_sprites);
}
WRITE8_MEMBER(fastfred_state::imago_dma_irq_w)
WRITE_LINE_MEMBER(fastfred_state::imago_dma_irq_w)
{
m_maincpu->set_input_line(0, data & 1 ? ASSERT_LINE : CLEAR_LINE);
m_maincpu->set_input_line(0, state ? ASSERT_LINE : CLEAR_LINE);
}
WRITE8_MEMBER(fastfred_state::imago_sprites_bank_w)
@ -176,9 +177,9 @@ READ8_MEMBER(fastfred_state::imago_sprites_offset_r)
return 0xff; //not really used
}
WRITE8_MEMBER(fastfred_state::nmi_mask_w)
WRITE_LINE_MEMBER(fastfred_state::nmi_mask_w)
{
m_nmi_mask = data & 1;
m_nmi_mask = state;
}
WRITE8_MEMBER(fastfred_state::sound_nmi_mask_w)
@ -196,15 +197,7 @@ static ADDRESS_MAP_START( fastfred_map, AS_PROGRAM, 8, fastfred_state )
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("BUTTONS") AM_WRITEONLY AM_SHARE("bgcolor")
AM_RANGE(0xe800, 0xe800) AM_READ_PORT("JOYS")
AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW") AM_WRITENOP
AM_RANGE(0xf001, 0xf001) AM_WRITE(nmi_mask_w)
AM_RANGE(0xf002, 0xf002) AM_WRITE(fastfred_colorbank1_w)
AM_RANGE(0xf003, 0xf003) AM_WRITE(fastfred_colorbank2_w)
AM_RANGE(0xf004, 0xf004) AM_WRITE(fastfred_charbank1_w)
AM_RANGE(0xf005, 0xf005) AM_WRITE(fastfred_charbank2_w)
AM_RANGE(0xf006, 0xf006) AM_WRITE(fastfred_flip_screen_x_w)
AM_RANGE(0xf007, 0xf007) AM_WRITE(fastfred_flip_screen_y_w)
AM_RANGE(0xf116, 0xf116) AM_WRITE(fastfred_flip_screen_x_w)
AM_RANGE(0xf117, 0xf117) AM_WRITE(fastfred_flip_screen_y_w)
AM_RANGE(0xf000, 0xf007) AM_MIRROR(0x07f8) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0xf800, 0xf800) AM_DEVREAD("watchdog", watchdog_timer_device, reset_r) AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
ADDRESS_MAP_END
@ -221,16 +214,7 @@ static ADDRESS_MAP_START( jumpcoas_map, AS_PROGRAM, 8, fastfred_state )
AM_RANGE(0xe801, 0xe801) AM_READ_PORT("DSW2")
AM_RANGE(0xe802, 0xe802) AM_READ_PORT("BUTTONS")
AM_RANGE(0xe803, 0xe803) AM_READ_PORT("JOYS")
AM_RANGE(0xf000, 0xf000) AM_WRITENOP // Unused, but initialized
AM_RANGE(0xf001, 0xf001) AM_WRITE(nmi_mask_w)
AM_RANGE(0xf002, 0xf002) AM_WRITE(fastfred_colorbank1_w)
AM_RANGE(0xf003, 0xf003) AM_WRITE(fastfred_colorbank2_w)
AM_RANGE(0xf004, 0xf004) AM_WRITE(fastfred_charbank1_w)
AM_RANGE(0xf005, 0xf005) AM_WRITE(fastfred_charbank2_w)
AM_RANGE(0xf006, 0xf006) AM_WRITE(fastfred_flip_screen_x_w)
AM_RANGE(0xf007, 0xf007) AM_WRITE(fastfred_flip_screen_y_w)
AM_RANGE(0xf116, 0xf116) AM_WRITE(fastfred_flip_screen_x_w)
AM_RANGE(0xf117, 0xf117) AM_WRITE(fastfred_flip_screen_y_w)
AM_RANGE(0xf000, 0xf007) AM_MIRROR(0x07f8) AM_DEVWRITE("outlatch", ls259_device, write_d0)
//AM_RANGE(0xf800, 0xf800) AM_DEVREAD("watchdog", watchdog_timer_device, reset_r) // Why doesn't this work???
AM_RANGE(0xf800, 0xf801) AM_READNOP AM_DEVWRITE("ay8910.1", ay8910_device, address_data_w)
ADDRESS_MAP_END
@ -250,14 +234,8 @@ static ADDRESS_MAP_START( imago_map, AS_PROGRAM, 8, fastfred_state )
AM_RANGE(0xd860, 0xd8ff) AM_RAM // Unused, but initialized
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("BUTTONS")
AM_RANGE(0xe800, 0xe800) AM_READ_PORT("JOYS")
AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW") AM_WRITENOP // writes 1 when level starts, 0 when game over
AM_RANGE(0xf001, 0xf001) AM_WRITE(nmi_mask_w)
AM_RANGE(0xf002, 0xf002) AM_WRITE(fastfred_colorbank1_w)
AM_RANGE(0xf003, 0xf003) AM_WRITE(fastfred_colorbank2_w)
AM_RANGE(0xf004, 0xf004) AM_WRITE(imago_dma_irq_w)
AM_RANGE(0xf005, 0xf005) AM_WRITE(imago_charbank_w)
AM_RANGE(0xf006, 0xf006) AM_WRITE(fastfred_flip_screen_x_w)
AM_RANGE(0xf007, 0xf007) AM_WRITE(fastfred_flip_screen_y_w)
AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW")
AM_RANGE(0xf000, 0xf007) AM_MIRROR(0x07f8) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0xf400, 0xf400) AM_WRITENOP // writes 0 or 2
AM_RANGE(0xf401, 0xf401) AM_WRITE(imago_sprites_bank_w)
AM_RANGE(0xf800, 0xf800) AM_READNOP AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
@ -659,6 +637,15 @@ static MACHINE_CONFIG_START( fastfred )
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(fastfred_state, sound_timer_irq, 4*60)
MCFG_DEVICE_ADD("outlatch", LS259, 0) // "Control Signal Latch" at D10
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(fastfred_state, nmi_mask_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(fastfred_state, colorbank1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(fastfred_state, colorbank2_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(fastfred_state, charbank1_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(fastfred_state, charbank2_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(fastfred_state, flip_screen_x_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(fastfred_state, flip_screen_y_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
@ -711,6 +698,11 @@ static MACHINE_CONFIG_DERIVED( imago, fastfred )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(imago_map)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(NOOP) // writes 1 when level starts, 0 when game over
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(fastfred_state, imago_dma_irq_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(fastfred_state, imago_charbank_w))
MCFG_MACHINE_START_OVERRIDE(fastfred_state,imago)
/* video hardware */

120
src/mame/drivers/firefox.cpp
View File

@ -33,6 +33,7 @@ but requires a special level III player for proper control. Video: CAV. Audio: A
#include "cpu/m6502/m6502.h"
#include "sound/pokey.h"
#include "sound/tms5220.h"
#include "machine/74259.h"
#include "machine/ldvp931.h"
#include "machine/6532riot.h"
#include "machine/gen_latch.h"
@ -77,10 +78,11 @@ public:
DECLARE_READ8_MEMBER(firefox_disc_status_r);
DECLARE_READ8_MEMBER(firefox_disc_data_r);
DECLARE_WRITE8_MEMBER(firefox_disc_read_w);
DECLARE_WRITE8_MEMBER(firefox_disc_lock_w);
DECLARE_WRITE8_MEMBER(audio_enable_w);
DECLARE_WRITE8_MEMBER(firefox_disc_reset_w);
DECLARE_WRITE8_MEMBER(firefox_disc_write_w);
DECLARE_WRITE_LINE_MEMBER(firefox_disc_lock_w);
DECLARE_WRITE_LINE_MEMBER(audio_enable_left_w);
DECLARE_WRITE_LINE_MEMBER(audio_enable_right_w);
DECLARE_WRITE_LINE_MEMBER(firefox_disc_reset_w);
DECLARE_WRITE_LINE_MEMBER(firefox_disc_write_w);
DECLARE_WRITE8_MEMBER(firefox_disc_data_w);
DECLARE_WRITE8_MEMBER(tileram_w);
DECLARE_WRITE8_MEMBER(tile_palette_w);
@ -88,21 +90,23 @@ public:
DECLARE_WRITE8_MEMBER(firefox_objram_bank_w);
DECLARE_READ8_MEMBER(sound_to_main_r);
DECLARE_WRITE8_MEMBER(main_to_sound_w);
DECLARE_WRITE8_MEMBER(sound_reset_w);
DECLARE_WRITE_LINE_MEMBER(sound_reset_w);
DECLARE_READ8_MEMBER(main_to_sound_r);
DECLARE_WRITE8_MEMBER(sound_to_main_w);
DECLARE_READ8_MEMBER(adc_r);
DECLARE_WRITE8_MEMBER(adc_select_w);
DECLARE_WRITE8_MEMBER(nvram_w);
DECLARE_READ8_MEMBER(nvram_r);
DECLARE_WRITE8_MEMBER(novram_recall_w);
DECLARE_WRITE8_MEMBER(novram_store_w);
DECLARE_WRITE8_MEMBER(rom_bank_w);
DECLARE_WRITE8_MEMBER(main_irq_clear_w);
DECLARE_WRITE8_MEMBER(main_firq_clear_w);
DECLARE_WRITE8_MEMBER(self_reset_w);
DECLARE_WRITE8_MEMBER(led_w);
DECLARE_WRITE8_MEMBER(firefox_coin_counter_w);
DECLARE_WRITE_LINE_MEMBER(led0_w);
DECLARE_WRITE_LINE_MEMBER(led1_w);
DECLARE_WRITE_LINE_MEMBER(led2_w);
DECLARE_WRITE_LINE_MEMBER(led3_w);
DECLARE_WRITE_LINE_MEMBER(coin_counter_right_w);
DECLARE_WRITE_LINE_MEMBER(coin_counter_left_w);
DECLARE_CUSTOM_INPUT_MEMBER(mainflag_r);
DECLARE_CUSTOM_INPUT_MEMBER(soundflag_r);
DECLARE_READ8_MEMBER(riot_porta_r);
@ -180,25 +184,30 @@ WRITE8_MEMBER(firefox_state::firefox_disc_read_w)
m_n_disc_read_data = m_laserdisc->data_r();
}
WRITE8_MEMBER(firefox_state::firefox_disc_lock_w)
WRITE_LINE_MEMBER(firefox_state::firefox_disc_lock_w)
{
m_n_disc_lock = data & 0x80;
m_n_disc_lock = state;
}
WRITE8_MEMBER(firefox_state::audio_enable_w)
WRITE_LINE_MEMBER(firefox_state::audio_enable_left_w)
{
m_laserdisc->set_output_gain(~offset & 1, (data & 0x80) ? 1.0 : 0.0);
m_laserdisc->set_output_gain(0, state ? 1.0 : 0.0);
}
WRITE8_MEMBER(firefox_state::firefox_disc_reset_w)
WRITE_LINE_MEMBER(firefox_state::audio_enable_right_w)
{
m_laserdisc->reset_w((data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
m_laserdisc->set_output_gain(1, state ? 1.0 : 0.0);
}
WRITE_LINE_MEMBER(firefox_state::firefox_disc_reset_w)
{
m_laserdisc->reset_w(state ? CLEAR_LINE : ASSERT_LINE);
}
/* active low on dbb7 */
WRITE8_MEMBER(firefox_state::firefox_disc_write_w)
WRITE_LINE_MEMBER(firefox_state::firefox_disc_write_w)
{
if ( ( data & 0x80 ) == 0 )
if (state == 0)
m_laserdisc->data_w(m_n_disc_data);
}
@ -339,10 +348,10 @@ WRITE8_MEMBER(firefox_state::main_to_sound_w)
m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
WRITE8_MEMBER(firefox_state::sound_reset_w)
WRITE_LINE_MEMBER(firefox_state::sound_reset_w)
{
m_audiocpu->set_input_line(INPUT_LINE_RESET, (data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
if ((data & 0x80) != 0)
m_audiocpu->set_input_line(INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
if (state != 0)
m_sound_to_main_flag = m_main_to_sound_flag = 0;
}
@ -440,18 +449,6 @@ READ8_MEMBER(firefox_state::nvram_r)
return (m_nvram_1c->read(space, offset) << 4) | (m_nvram_1d->read(space, offset) & 0x0f);
}
WRITE8_MEMBER(firefox_state::novram_recall_w)
{
m_nvram_1c->recall(data & 0x80);
m_nvram_1d->recall(data & 0x80);
}
WRITE8_MEMBER(firefox_state::novram_store_w)
{
m_nvram_1c->store(data & 0x80);
m_nvram_1d->store(data & 0x80);
}
/*************************************
@ -488,14 +485,34 @@ WRITE8_MEMBER(firefox_state::self_reset_w)
*
*************************************/
WRITE8_MEMBER(firefox_state::led_w)
WRITE_LINE_MEMBER(firefox_state::led0_w)
{
output().set_led_value(offset, ( data & 0x80 ) == 0 );
output().set_led_value(0, !state);
}
WRITE8_MEMBER(firefox_state::firefox_coin_counter_w)
WRITE_LINE_MEMBER(firefox_state::led1_w)
{
machine().bookkeeping().coin_counter_w(offset, data & 0x80 );
output().set_led_value(1, !state);
}
WRITE_LINE_MEMBER(firefox_state::led2_w)
{
output().set_led_value(2, !state);
}
WRITE_LINE_MEMBER(firefox_state::led3_w)
{
output().set_led_value(3, !state);
}
WRITE_LINE_MEMBER(firefox_state::coin_counter_right_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(firefox_state::coin_counter_left_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
@ -549,15 +566,8 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, firefox_state )
AM_RANGE(0x4218, 0x4218) AM_MIRROR(0x0047) AM_WRITE(firefox_disc_read_w) /* DSKREAD */
AM_RANGE(0x4220, 0x4223) AM_MIRROR(0x0044) AM_WRITE(adc_select_w) /* ADCSTART */
AM_RANGE(0x4230, 0x4230) AM_MIRROR(0x0047) AM_WRITE(self_reset_w) /* AMUCK */
AM_RANGE(0x4280, 0x4280) AM_MIRROR(0x0040) AM_WRITE(novram_recall_w) /* LATCH0 -> NVRECALL */
AM_RANGE(0x4281, 0x4281) AM_MIRROR(0x0040) AM_WRITE(sound_reset_w) /* LATCH0 -> RSTSOUND */
AM_RANGE(0x4282, 0x4282) AM_MIRROR(0x0040) AM_WRITE(novram_store_w) /* LATCH0 -> NVRSTORE */
AM_RANGE(0x4283, 0x4283) AM_MIRROR(0x0040) AM_WRITE(firefox_disc_lock_w) /* LATCH0 -> LOCK */
AM_RANGE(0x4284, 0x4285) AM_MIRROR(0x0040) AM_WRITE(audio_enable_w) /* LATCH0 -> SWDSKR, SWDSKL */
AM_RANGE(0x4286, 0x4286) AM_MIRROR(0x0040) AM_WRITE(firefox_disc_reset_w) /* LATCH0 -> RSTDSK */
AM_RANGE(0x4287, 0x4287) AM_MIRROR(0x0040) AM_WRITE(firefox_disc_write_w) /* LATCH0 -> WRDSK */
AM_RANGE(0x4288, 0x4289) AM_MIRROR(0x0040) AM_WRITE(firefox_coin_counter_w) /* LATCH1 -> COIN COUNTERR, COUNTERL */
AM_RANGE(0x428c, 0x428f) AM_MIRROR(0x0040) AM_WRITE(led_w) /* LATCH1 -> LEDs */
AM_RANGE(0x4280, 0x4287) AM_MIRROR(0x0040) AM_DEVWRITE("latch0", ls259_device, write_d7)
AM_RANGE(0x4288, 0x428f) AM_MIRROR(0x0040) AM_DEVWRITE("latch1", ls259_device, write_d7)
AM_RANGE(0x4290, 0x4290) AM_MIRROR(0x0047) AM_WRITE(rom_bank_w) /* WRTREG */
AM_RANGE(0x4298, 0x4298) AM_MIRROR(0x0047) AM_WRITE(main_to_sound_w) /* WRSOUND */
AM_RANGE(0x42a0, 0x42a0) AM_MIRROR(0x0047) AM_WRITE(firefox_disc_data_w) /* DSKLATCH */
@ -723,6 +733,26 @@ static MACHINE_CONFIG_START( firefox )
MCFG_QUANTUM_TIME(attotime::from_hz(60000))
MCFG_DEVICE_ADD("latch0", LS259, 0) // 7F
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE("nvram_1c", x2212_device, recall)) // NVRECALL
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("nvram_1d", x2212_device, recall))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(firefox_state, sound_reset_w)) // RSTSOUND
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE("nvram_1c", x2212_device, store)) // NVRSTORE
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("nvram_1d", x2212_device, store))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(firefox_state, firefox_disc_lock_w)) // LOCK
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(firefox_state, audio_enable_right_w)) // SWDSKR
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(firefox_state, audio_enable_left_w)) // SWDSKL
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(firefox_state, firefox_disc_reset_w)) // RSTDSK
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(firefox_state, firefox_disc_write_w)) // WRDSK
MCFG_DEVICE_ADD("latch1", LS259, 0) // 1F
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(firefox_state, coin_counter_right_w)) // COIN COUNTERR
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(firefox_state, coin_counter_left_w)) // COIN COUNTERL
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(firefox_state, led0_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(firefox_state, led1_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(firefox_state, led2_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(firefox_state, led3_w))
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_TIME_INIT(attotime::from_hz((double)MASTER_XTAL/8/16/16/16/16))

40
src/mame/drivers/flyball.cpp
View File

@ -20,6 +20,7 @@ TODO:
#include "emu.h"
#include "cpu/m6502/m6502.h"
#include "machine/74259.h"
#include "screen.h"
#define MASTER_CLOCK XTAL_12_096MHz
@ -42,6 +43,7 @@ public:
m_gfxdecode(*this, "gfxdecode"),
m_screen(*this, "screen"),
m_palette(*this, "palette"),
m_outlatch(*this, "outlatch"),
m_playfield_ram(*this, "playfield_ram") { }
/* devices */
@ -49,6 +51,7 @@ public:
required_device<gfxdecode_device> m_gfxdecode;
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
required_device<f9334_device> m_outlatch;
/* memory pointers */
required_shared_ptr<uint8_t> m_playfield_ram;
@ -79,6 +82,7 @@ public:
DECLARE_WRITE8_MEMBER(pitcher_vert_w);
DECLARE_WRITE8_MEMBER(pitcher_horz_w);
DECLARE_WRITE8_MEMBER(misc_w);
DECLARE_WRITE_LINE_MEMBER(lamp_w);
TILEMAP_MAPPER_MEMBER(get_memory_offset);
TILE_GET_INFO_MEMBER(get_tile_info);
@ -273,29 +277,13 @@ WRITE8_MEMBER(flyball_state::pitcher_horz_w)
WRITE8_MEMBER(flyball_state::misc_w)
{
int bit = ~data & 1;
// address and data lines passed through inverting buffers
m_outlatch->write_d0(space, ~offset, ~data);
}
switch (offset)
{
case 0:
output().set_led_value(0, bit);
break;
case 1:
/* crowd very loud */
break;
case 2:
/* footstep off-on */
break;
case 3:
/* crowd off-on */
break;
case 4:
/* crowd soft-loud */
break;
case 5:
/* bat hit */
break;
}
WRITE_LINE_MEMBER(flyball_state::lamp_w)
{
output().set_led_value(0, state);
}
@ -468,6 +456,14 @@ static MACHINE_CONFIG_START( flyball )
MCFG_CPU_PROGRAM_MAP(flyball_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", flyball_state, nmi_line_pulse)
MCFG_DEVICE_ADD("outlatch", F9334, 0) // F7
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(flyball_state, lamp_w)) // 1 player lamp
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(NOOP) // crowd very loud
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // footstep off-on
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(NOOP) // crowd off-on
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(NOOP) // crowd soft-loud
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(NOOP) // bat hit
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)

96
src/mame/drivers/freekick.cpp
View File

@ -45,6 +45,7 @@ TODO:
#include "includes/freekick.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/i8255.h"
#include "machine/mc8123.h"
#include "sound/sn76496.h"
@ -58,27 +59,38 @@ TODO:
*
*************************************/
WRITE8_MEMBER(freekick_state::flipscreen_xy_w)
WRITE_LINE_MEMBER(freekick_state::flipscreen_x_w)
{
/* flip Y/X could be the other way round... */
if (offset)
flip_screen_y_set(~data & 1);
else
flip_screen_x_set(~data & 1);
flip_screen_x_set(!state);
}
WRITE8_MEMBER(freekick_state::flipscreen_w)
WRITE_LINE_MEMBER(freekick_state::flipscreen_y_w)
{
flip_screen_set(~data & 1);
flip_screen_y_set(!state);
}
WRITE_LINE_MEMBER(freekick_state::flipscreen_w)
{
flip_screen_set(!state);
}
WRITE8_MEMBER(freekick_state::coin_w)
WRITE_LINE_MEMBER(freekick_state::coin1_w)
{
machine().bookkeeping().coin_counter_w(offset, data & 1);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE8_MEMBER(freekick_state::spinner_select_w)
WRITE_LINE_MEMBER(freekick_state::coin2_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
WRITE_LINE_MEMBER(freekick_state::spinner_select_w)
{
m_spinner = state;
}
WRITE8_MEMBER(freekick_state::gigas_spinner_select_w)
{
m_spinner = data & 1;
}
@ -95,9 +107,9 @@ WRITE8_MEMBER(freekick_state::pbillrd_bankswitch_w)
m_bank1d->set_entry(data & 1);
}
WRITE8_MEMBER(freekick_state::nmi_enable_w)
WRITE_LINE_MEMBER(freekick_state::nmi_enable_w)
{
m_nmi_en = data & 1;
m_nmi_en = state;
}
INTERRUPT_GEN_MEMBER(freekick_state::freekick_irqgen)
@ -184,10 +196,8 @@ static ADDRESS_MAP_START( omega_map, AS_PROGRAM, 8, freekick_state )
AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(freek_videoram_w) AM_SHARE("videoram")
AM_RANGE(0xd800, 0xd8ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xd900, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0") AM_WRITE(flipscreen_w)
AM_RANGE(0xe002, 0xe003) AM_WRITE(coin_w)
AM_RANGE(0xe004, 0xe004) AM_WRITE(nmi_enable_w)
AM_RANGE(0xe005, 0xe005) AM_WRITENOP
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0")
AM_RANGE(0xe000, 0xe007) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0xe800, 0xe800) AM_READ_PORT("IN1")
AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW1") AM_WRITENOP //bankswitch ?
AM_RANGE(0xf800, 0xf800) AM_READ_PORT("DSW2")
@ -205,9 +215,7 @@ static ADDRESS_MAP_START( pbillrd_map, AS_PROGRAM, 8, freekick_state )
AM_RANGE(0xd800, 0xd8ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xd900, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0")
AM_RANGE(0xe000, 0xe001) AM_WRITE(flipscreen_xy_w)
AM_RANGE(0xe002, 0xe003) AM_WRITE(coin_w)
AM_RANGE(0xe004, 0xe004) AM_WRITE(nmi_enable_w)
AM_RANGE(0xe000, 0xe007) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0xe800, 0xe800) AM_READ_PORT("IN1")
AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW1") AM_WRITE(pbillrd_bankswitch_w)
AM_RANGE(0xf800, 0xf800) AM_READ_PORT("DSW2")
@ -229,13 +237,11 @@ static ADDRESS_MAP_START( freekick_map, AS_PROGRAM, 8, freekick_state )
AM_RANGE(0xe800, 0xe8ff) AM_RAM AM_SHARE("spriteram") // sprites
AM_RANGE(0xec00, 0xec03) AM_DEVREADWRITE("ppi8255_0", i8255_device, read, write)
AM_RANGE(0xf000, 0xf003) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write)
AM_RANGE(0xf800, 0xf800) AM_READ_PORT("IN0") AM_WRITE(flipscreen_w)
AM_RANGE(0xf800, 0xf800) AM_READ_PORT("IN0")
AM_RANGE(0xf801, 0xf801) AM_READ_PORT("IN1")
AM_RANGE(0xf802, 0xf802) AM_READNOP //MUST return bit 0 = 0, otherwise game resets
AM_RANGE(0xf803, 0xf803) AM_READ(spinner_r)
AM_RANGE(0xf802, 0xf803) AM_WRITE(coin_w)
AM_RANGE(0xf804, 0xf804) AM_WRITE(nmi_enable_w)
AM_RANGE(0xf806, 0xf806) AM_WRITE(spinner_select_w)
AM_RANGE(0xf800, 0xf807) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0xfc00, 0xfc00) AM_DEVWRITE("sn1", sn76489a_device, write)
AM_RANGE(0xfc01, 0xfc01) AM_DEVWRITE("sn2", sn76489a_device, write)
AM_RANGE(0xfc02, 0xfc02) AM_DEVWRITE("sn3", sn76489a_device, write)
@ -248,10 +254,8 @@ static ADDRESS_MAP_START( gigas_map, AS_PROGRAM, 8, freekick_state )
AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(freek_videoram_w) AM_SHARE("videoram")
AM_RANGE(0xd800, 0xd8ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xd900, 0xdfff) AM_RAM
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0") AM_WRITE(flipscreen_w)
AM_RANGE(0xe002, 0xe003) AM_WRITE(coin_w)
AM_RANGE(0xe004, 0xe004) AM_WRITE(nmi_enable_w)
AM_RANGE(0xe005, 0xe005) AM_WRITENOP
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0")
AM_RANGE(0xe000, 0xe007) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0xe800, 0xe800) AM_READ_PORT("IN1")
AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW1") AM_WRITENOP //bankswitch ?
AM_RANGE(0xf800, 0xf800) AM_READ_PORT("DSW2")
@ -263,19 +267,19 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( omega_io_map, AS_IO, 8, freekick_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READWRITE(spinner_r, spinner_select_w)
AM_RANGE(0x00, 0x00) AM_READWRITE(spinner_r, gigas_spinner_select_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("DSW3")
ADDRESS_MAP_END
static ADDRESS_MAP_START( gigas_io_map, AS_IO, 8, freekick_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READWRITE(spinner_r, spinner_select_w)
AM_RANGE(0x00, 0x00) AM_READWRITE(spinner_r, gigas_spinner_select_w)
AM_RANGE(0x01, 0x01) AM_READNOP //unused dip 3
ADDRESS_MAP_END
static ADDRESS_MAP_START( oigas_io_map, AS_IO, 8, freekick_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READWRITE(spinner_r, spinner_select_w)
AM_RANGE(0x00, 0x00) AM_READWRITE(spinner_r, gigas_spinner_select_w)
AM_RANGE(0x01, 0x01) AM_READNOP //unused dip 3
AM_RANGE(0x02, 0x02) AM_READ(oigas_2_r)
AM_RANGE(0x03, 0x03) AM_READ(oigas_3_r)
@ -682,7 +686,6 @@ MACHINE_RESET_MEMBER(freekick_state,freekick)
{
m_romaddr = 0;
m_spinner = 0;
m_nmi_en = 0;
m_ff_data = 0;
machine().bookkeeping().coin_counter_w(0, 0);
@ -722,6 +725,13 @@ static MACHINE_CONFIG_START( omega )
MCFG_CPU_PERIODIC_INT_DRIVER(freekick_state, irq0_line_hold, 120) // measured on PCB
MCFG_CPU_VBLANK_INT_DRIVER("screen", freekick_state, freekick_irqgen)
MCFG_DEVICE_ADD("outlatch", LS259, 0) // 3M
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(freekick_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(freekick_state, coin1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(freekick_state, coin2_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(freekick_state, nmi_enable_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // ???
// video hardware
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL_18_432MHz/3, 768/2, 0, 512/2, 263, 0+16, 224+16) // unknown divisor
@ -755,6 +765,11 @@ static MACHINE_CONFIG_START( base )
MCFG_CPU_PERIODIC_INT_DRIVER(freekick_state, irq0_line_hold, 120) // measured on PCB
MCFG_CPU_VBLANK_INT_DRIVER("screen", freekick_state, freekick_irqgen)
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(freekick_state, coin1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(freekick_state, coin2_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(freekick_state, nmi_enable_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(XTAL_12MHz/2, 768/2, 0, 512/2, 263, 0+16, 224+16)
@ -781,8 +796,11 @@ static MACHINE_CONFIG_START( base )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( pbillrd, base )
MCFG_DEVICE_MODIFY("outlatch") // 10K
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(freekick_state, flipscreen_x_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(freekick_state, flipscreen_y_w))
/* flip Y/X could be the other way round... */
/* basic machine hardware */
MCFG_MACHINE_START_OVERRIDE(freekick_state,pbillrd)
MCFG_MACHINE_RESET_OVERRIDE(freekick_state,freekick)
MACHINE_CONFIG_END
@ -802,6 +820,10 @@ static MACHINE_CONFIG_DERIVED( freekick, base )
MCFG_CPU_PROGRAM_MAP(freekick_map)
MCFG_CPU_IO_MAP(freekick_io_map)
MCFG_DEVICE_MODIFY("outlatch") // 5C
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(freekick_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(freekick_state, spinner_select_w))
MCFG_MACHINE_START_OVERRIDE(freekick_state,freekick)
MCFG_MACHINE_RESET_OVERRIDE(freekick_state,freekick)
@ -828,6 +850,10 @@ static MACHINE_CONFIG_DERIVED( gigas, base )
MCFG_CPU_IO_MAP(gigas_io_map)
MCFG_CPU_DECRYPTED_OPCODES_MAP(decrypted_opcodes_map)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(freekick_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // ???
MCFG_MACHINE_START_OVERRIDE(freekick_state,freekick)
MCFG_MACHINE_RESET_OVERRIDE(freekick_state,freekick)
@ -846,6 +872,10 @@ static MACHINE_CONFIG_DERIVED( gigasm, base )
MCFG_CPU_PERIODIC_INT_DRIVER(freekick_state, irq0_line_hold, 120) // measured on PCB
MCFG_CPU_VBLANK_INT_DRIVER("screen", freekick_state, freekick_irqgen)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(freekick_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // ???
MCFG_MACHINE_START_OVERRIDE(freekick_state,freekick)
MCFG_MACHINE_RESET_OVERRIDE(freekick_state,freekick)

23
src/mame/drivers/funkybee.cpp
View File

@ -77,6 +77,7 @@ Stephh's notes (based on the games Z80 code and some tests) :
#include "includes/funkybee.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "sound/ay8910.h"
#include "screen.h"
#include "speaker.h"
@ -88,9 +89,14 @@ READ8_MEMBER(funkybee_state::funkybee_input_port_0_r)
return ioport("IN0")->read();
}
WRITE8_MEMBER(funkybee_state::funkybee_coin_counter_w)
WRITE_LINE_MEMBER(funkybee_state::coin_counter_1_w)
{
machine().bookkeeping().coin_counter_w(offset, data);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(funkybee_state::coin_counter_2_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
static ADDRESS_MAP_START( funkybee_map, AS_PROGRAM, 8, funkybee_state )
@ -99,9 +105,7 @@ static ADDRESS_MAP_START( funkybee_map, AS_PROGRAM, 8, funkybee_state )
AM_RANGE(0xa000, 0xbfff) AM_RAM_WRITE(funkybee_videoram_w) AM_SHARE("videoram")
AM_RANGE(0xc000, 0xdfff) AM_RAM_WRITE(funkybee_colorram_w) AM_SHARE("colorram")
AM_RANGE(0xe000, 0xe000) AM_WRITE(funkybee_scroll_w)
AM_RANGE(0xe800, 0xe800) AM_WRITE(funkybee_flipscreen_w)
AM_RANGE(0xe802, 0xe803) AM_WRITE(funkybee_coin_counter_w)
AM_RANGE(0xe805, 0xe805) AM_WRITE(funkybee_gfx_bank_w)
AM_RANGE(0xe800, 0xe807) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xf000, 0xf000) AM_READNOP /* IRQ Ack */
AM_RANGE(0xf800, 0xf800) AM_READ(funkybee_input_port_0_r) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0xf801, 0xf801) AM_READ_PORT("IN1")
@ -275,10 +279,7 @@ GFXDECODE_END
void funkybee_state::machine_start()
{
save_item(NAME(m_gfx_bank));
}
void funkybee_state::machine_reset()
{
m_gfx_bank = 0;
}
@ -290,6 +291,12 @@ static MACHINE_CONFIG_START( funkybee )
MCFG_CPU_IO_MAP(io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", funkybee_state, irq0_line_hold)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(funkybee_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(funkybee_state, coin_counter_1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(funkybee_state, coin_counter_2_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(funkybee_state, gfx_bank_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

55
src/mame/drivers/gaelco.cpp
View File

@ -44,19 +44,29 @@ WRITE8_MEMBER(gaelco_state::bigkarnk_sound_command_w)
m_audiocpu->set_input_line(M6809_FIRQ_LINE, HOLD_LINE);
}
WRITE8_MEMBER(gaelco_state::bigkarnk_coin_w)
WRITE8_MEMBER(gaelco_state::output_latch_w)
{
switch ((offset >> 3))
{
case 0x00: /* Coin Lockouts */
case 0x01:
machine().bookkeeping().coin_lockout_w((offset >> 3) & 0x01, ~data & 0x01);
break;
case 0x02: /* Coin Counters */
case 0x03:
machine().bookkeeping().coin_counter_w((offset >> 3) & 0x01, data & 0x01);
break;
}
m_outlatch->write_bit(offset >> 3, BIT(data, 0));
}
WRITE_LINE_MEMBER(gaelco_state::coin1_lockout_w)
{
machine().bookkeeping().coin_lockout_w(0, state);
}
WRITE_LINE_MEMBER(gaelco_state::coin2_lockout_w)
{
machine().bookkeeping().coin_lockout_w(1, state);
}
WRITE_LINE_MEMBER(gaelco_state::coin1_counter_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(gaelco_state::coin2_counter_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
WRITE8_MEMBER(gaelco_state::OKIM6295_bankswitch_w)
@ -120,8 +130,8 @@ static ADDRESS_MAP_START( bigkarnk_map, AS_PROGRAM, 16, gaelco_state )
AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
AM_RANGE(0x700008, 0x700009) AM_READ_PORT("SERVICE")
AM_RANGE(0x70000a, 0x70000b) AM_SELECT(0x000070) AM_WRITE8(output_latch_w, 0x00ff) /* Coin Counters + Coin Lockout */
AM_RANGE(0x70000e, 0x70000f) AM_WRITE8(bigkarnk_sound_command_w, 0x00ff) /* Triggers a FIRQ on the sound CPU */
AM_RANGE(0x70000a, 0x70003b) AM_WRITE8(bigkarnk_coin_w, 0x00ff) /* Coin Counters + Coin Lockout */
AM_RANGE(0xff8000, 0xffffff) AM_RAM /* Work RAM */
ADDRESS_MAP_END
@ -163,6 +173,7 @@ static ADDRESS_MAP_START( squash_map, AS_PROGRAM, 16, gaelco_state )
AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSW1")
AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
AM_RANGE(0x70000a, 0x70000b) AM_SELECT(0x000070) AM_WRITE8(output_latch_w, 0x00ff)
AM_RANGE(0x70000c, 0x70000d) AM_WRITE8(OKIM6295_bankswitch_w, 0x00ff)
AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) /* OKI6295 status register */
AM_RANGE(0xff0000, 0xffffff) AM_RAM /* Work RAM */
@ -180,6 +191,7 @@ static ADDRESS_MAP_START( thoop_map, AS_PROGRAM, 16, gaelco_state )
AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSW1")
AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
AM_RANGE(0x70000a, 0x70000b) AM_SELECT(0x000070) AM_WRITE8(output_latch_w, 0x00ff)
AM_RANGE(0x70000c, 0x70000d) AM_WRITE8(OKIM6295_bankswitch_w, 0x00ff)
AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) /* OKI6295 status register */
AM_RANGE(0xff0000, 0xffffff) AM_RAM /* Work RAM */
@ -510,6 +522,11 @@ static MACHINE_CONFIG_START( bigkarnk )
MCFG_QUANTUM_TIME(attotime::from_hz(600))
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gaelco_state, coin1_lockout_w)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gaelco_state, coin2_lockout_w)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(gaelco_state, coin1_counter_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(gaelco_state, coin2_counter_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -578,6 +595,12 @@ static MACHINE_CONFIG_START( squash )
MCFG_QUANTUM_TIME(attotime::from_hz(600))
MCFG_DEVICE_ADD("outlatch", LS259, 0) // B8
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gaelco_state, coin1_lockout_w)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gaelco_state, coin2_lockout_w)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(gaelco_state, coin1_counter_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(gaelco_state, coin2_counter_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(NOOP) // used
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -611,6 +634,12 @@ static MACHINE_CONFIG_START( thoop )
MCFG_QUANTUM_TIME(attotime::from_hz(600))
MCFG_DEVICE_ADD("outlatch", LS259, 0) // B8
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gaelco_state, coin1_lockout_w)) // not inverted
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gaelco_state, coin2_lockout_w)) // not inverted
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(gaelco_state, coin1_counter_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(gaelco_state, coin2_counter_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(NOOP) // used
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

46
src/mame/drivers/gaelco2.cpp
View File

@ -90,7 +90,7 @@ static ADDRESS_MAP_START( maniacsq_map, AS_PROGRAM, 16, gaelco2_state )
AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1") /* DSW #2 + Input 2P */
AM_RANGE(0x30004a, 0x30004b) AM_WRITENOP /* Sound muting? */
AM_RANGE(0x320000, 0x320001) AM_READ_PORT("COIN") /* COINSW + SERVICESW */
AM_RANGE(0x500000, 0x500001) AM_WRITE(gaelco2_coin_w) /* Coin lockout + counters */
AM_RANGE(0x500000, 0x500001) AM_WRITE(alighunt_coin_w) /* Coin lockout + counters */
AM_RANGE(0xfe0000, 0xfe7fff) AM_RAM /* Work RAM */
AM_RANGE(0xfe8000, 0xfeffff) AM_RAM AM_SHARE("shareram") /* Work RAM */
ADDRESS_MAP_END
@ -272,10 +272,7 @@ static ADDRESS_MAP_START( bang_map, AS_PROGRAM, 16, bang_state )
AM_RANGE(0x218008, 0x218009) AM_WRITENOP /* CLR INT Video */
AM_RANGE(0x300000, 0x300001) AM_READ_PORT("P1")
AM_RANGE(0x300002, 0x300003) AM_READNOP /* Random number generator? */
AM_RANGE(0x300000, 0x300003) AM_WRITE(gaelco2_coin2_w) /* Coin Counters */
AM_RANGE(0x300008, 0x300009) AM_WRITE(gaelco2_eeprom_data_w) /* EEPROM data */
AM_RANGE(0x30000a, 0x30000b) AM_WRITE(gaelco2_eeprom_sk_w) /* EEPROM serial clock */
AM_RANGE(0x30000c, 0x30000d) AM_WRITE(gaelco2_eeprom_cs_w) /* EEPROM chip select */
AM_RANGE(0x300000, 0x30000f) AM_DEVWRITE8("mainlatch", ls259_device, write_d0, 0x00ff) /* Coin Counters & serial EEPROM */
AM_RANGE(0x300010, 0x300011) AM_READ_PORT("P2")
AM_RANGE(0x300020, 0x300021) AM_READ_PORT("COIN")
AM_RANGE(0x310000, 0x310001) AM_READ(p1_gun_x) AM_WRITE(bang_clr_gun_int_w) /* Gun 1P X */ /* CLR INT Gun */
@ -324,6 +321,13 @@ static MACHINE_CONFIG_START( bang )
MCFG_EEPROM_SERIAL_93C66_ADD("eeprom")
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gaelco2_state, coin1_counter_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gaelco2_state, coin2_counter_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, di_write)) /* EEPROM data */
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, clk_write)) /* EEPROM serial clock */
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, cs_write)) /* EEPROM chip select */
/* video hardware */
MCFG_BUFFERED_SPRITERAM16_ADD("spriteram")
@ -472,7 +476,7 @@ static ADDRESS_MAP_START( alighunt_map, AS_PROGRAM, 16, gaelco2_state )
AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0") /* DSW #1 + Input 1P */
AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1") /* DSW #2 + Input 2P */
AM_RANGE(0x320000, 0x320001) AM_READ_PORT("COIN") /* COINSW + SERVICESW */
AM_RANGE(0x500000, 0x500001) AM_WRITE(gaelco2_coin_w) /* Coin lockout + counters */
AM_RANGE(0x500000, 0x500001) AM_WRITE(alighunt_coin_w) /* Coin lockout + counters */
AM_RANGE(0x500006, 0x500007) AM_WRITENOP /* ??? */
AM_RANGE(0xfe0000, 0xfe7fff) AM_RAM /* Work RAM */
AM_RANGE(0xfe8000, 0xfeffff) AM_RAM AM_SHARE("shareram") /* Work RAM (shared with D5002FP) */
@ -689,7 +693,7 @@ static ADDRESS_MAP_START( touchgo_map, AS_PROGRAM, 16, gaelco2_state )
AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1") /* DSW #2 + Input 2P */
AM_RANGE(0x300004, 0x300005) AM_READ_PORT("IN2") /* COINSW + Input 3P */
AM_RANGE(0x300006, 0x300007) AM_READ_PORT("IN3") /* SERVICESW + Input 4P */
AM_RANGE(0x500000, 0x50001f) AM_WRITE(touchgo_coin_w) /* Coin counters */
AM_RANGE(0x500000, 0x500001) AM_SELECT(0x0038) AM_WRITE(wrally2_latch_w) /* Coin counters */
AM_RANGE(0xfe0000, 0xfe7fff) AM_RAM /* Work RAM */
AM_RANGE(0xfe8000, 0xfeffff) AM_RAM AM_SHARE("shareram") /* Work RAM (shared with D5002FP) */
ADDRESS_MAP_END
@ -809,6 +813,12 @@ static MACHINE_CONFIG_START( touchgo )
MCFG_CPU_PROGRAM_MAP(touchgo_map)
MCFG_CPU_VBLANK_INT_DRIVER("lscreen", gaelco2_state, irq6_line_hold)
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // IC6
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gaelco2_state, coin1_counter_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gaelco2_state, coin2_counter_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(gaelco2_state, coin3_counter_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(gaelco2_state, coin4_counter_w))
/* video hardware */
MCFG_BUFFERED_SPRITERAM16_ADD("spriteram")
MCFG_GFXDECODE_ADD("gfxdecode", "palette", 0x0400000)
@ -1003,10 +1013,7 @@ static ADDRESS_MAP_START( snowboar_map, AS_PROGRAM, 16, gaelco2_state )
AM_RANGE(0x212000, 0x213fff) AM_RAM /* Extra RAM */
AM_RANGE(0x218004, 0x218009) AM_RAM AM_SHARE("vregs") /* Video Registers */
AM_RANGE(0x300000, 0x300001) AM_READ_PORT("P1")
AM_RANGE(0x300000, 0x300003) AM_WRITE(gaelco2_coin2_w) /* Coin Counters */
AM_RANGE(0x300008, 0x300009) AM_WRITE(gaelco2_eeprom_data_w) /* EEPROM data */
AM_RANGE(0x30000a, 0x30000b) AM_WRITE(gaelco2_eeprom_sk_w) /* EEPROM serial clock */
AM_RANGE(0x30000c, 0x30000d) AM_WRITE(gaelco2_eeprom_cs_w) /* EEPROM chip select */
AM_RANGE(0x300000, 0x30000f) AM_DEVWRITE8("mainlatch", ls259_device, write_d0, 0x00ff) /* Coin Counters & serial EEPROM */
AM_RANGE(0x300010, 0x300011) AM_READ_PORT("P2")
AM_RANGE(0x300020, 0x300021) AM_READ_PORT("COIN")
AM_RANGE(0x310000, 0x31ffff) AM_READWRITE(snowboar_protection_r,snowboar_protection_w) AM_SHARE("snowboar_prot") /* Protection */
@ -1054,6 +1061,13 @@ static MACHINE_CONFIG_START( snowboar )
MCFG_EEPROM_SERIAL_93C66_ADD("eeprom")
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gaelco2_state, coin1_counter_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gaelco2_state, coin2_counter_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, di_write)) /* EEPROM data */
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, clk_write)) /* EEPROM serial clock */
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, cs_write)) /* EEPROM chip select */
/* video hardware */
MCFG_BUFFERED_SPRITERAM16_ADD("spriteram")
@ -1187,9 +1201,7 @@ static ADDRESS_MAP_START( wrally2_map, AS_PROGRAM, 16, wrally2_state )
AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1") /* DIPSW #1 */
AM_RANGE(0x300004, 0x300005) AM_READ_PORT("IN2") /* Inputs 2P + COINSW */
AM_RANGE(0x300006, 0x300007) AM_READ_PORT("IN3") /* SERVICESW */
AM_RANGE(0x400000, 0x400011) AM_WRITE(wrally2_coin_w) /* Coin Counters */
AM_RANGE(0x400028, 0x400029) AM_WRITE(wrally2_adc_clk) /* ADCs clock-in line */
AM_RANGE(0x400030, 0x400031) AM_WRITE(wrally2_adc_cs) /* ADCs chip select line */
AM_RANGE(0x400000, 0x400001) AM_SELECT(0x0038) AM_WRITE(wrally2_latch_w) /* Coin counters, etc. */
AM_RANGE(0xfe0000, 0xfe7fff) AM_RAM /* Work RAM */
AM_RANGE(0xfe8000, 0xfeffff) AM_RAM AM_SHARE("shareram") /* Work RAM (shared with D5002FP) */
ADDRESS_MAP_END
@ -1293,6 +1305,12 @@ static MACHINE_CONFIG_START( wrally2 )
MCFG_DEVICE_ADD("gaelco_ds5002fp", GAELCO_DS5002FP, XTAL_24MHz / 2)
MCFG_DEVICE_ADDRESS_MAP(0, mcu_hostmem_map)
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gaelco2_state, coin1_counter_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(gaelco2_state, coin2_counter_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(wrally2_state, wrally2_adc_clk)) /* ADCs clock-in line */
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(wrally2_state, wrally2_adc_cs)) /* ADCs chip select line */
MCFG_EEPROM_SERIAL_93C66_ADD("eeprom")
/* video hardware */

212
src/mame/drivers/gaelco3d.cpp
View File

@ -253,16 +253,6 @@ WRITE16_MEMBER(gaelco3d_state::irq_ack_w)
m_maincpu->set_input_line(2, CLEAR_LINE);
}
WRITE32_MEMBER(gaelco3d_state::irq_ack32_w)
{
if (mem_mask == 0xffff0000)
irq_ack_w(space, offset, data, mem_mask >> 16);
else if (ACCESSING_BITS_0_7)
m_serial->tr_w(space, 0, data & 0x01);
else
logerror("%06X:irq_ack_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
}
/*************************************
*
@ -290,52 +280,6 @@ READ16_MEMBER(gaelco3d_state::eeprom_data_r)
return result;
}
READ32_MEMBER(gaelco3d_state::eeprom_data32_r)
{
if (ACCESSING_BITS_16_31)
return (eeprom_data_r(space, 0, mem_mask >> 16) << 16) | 0xffff;
else if (ACCESSING_BITS_0_7)
{
uint8_t data = m_serial->data_r(space,0);
if (LOG)
logerror("%06X:read(%02X) = %08X & %08X\n", m_maincpu->pc(), offset, data, mem_mask);
return data | 0xffffff00;
}
else
logerror("%06X:read(%02X) = mask %08X\n", m_maincpu->pc(), offset, mem_mask);
return 0xffffffff;
}
WRITE16_MEMBER(gaelco3d_state::eeprom_data_w)
{
if (ACCESSING_BITS_0_7)
{
m_eeprom->di_write(data & 0x01);
}
else if (mem_mask != 0xffff)
logerror("write mask: %08x data %08x\n", mem_mask, data);
}
WRITE16_MEMBER(gaelco3d_state::eeprom_clock_w)
{
if (ACCESSING_BITS_0_7)
{
m_eeprom->clk_write((data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
}
}
WRITE16_MEMBER(gaelco3d_state::eeprom_cs_w)
{
if (ACCESSING_BITS_0_7)
{
m_eeprom->cs_write((data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
}
}
/*************************************
@ -403,46 +347,29 @@ CUSTOM_INPUT_MEMBER(gaelco3d_state::analog_bit_r)
}
WRITE16_MEMBER(gaelco3d_state::analog_port_clock_w)
WRITE_LINE_MEMBER(gaelco3d_state::analog_port_clock_w)
{
/* a zero/one combo is written here to clock the next analog port bit */
if (ACCESSING_BITS_0_7)
if (!state)
{
if (!(data & 0xff))
{
m_analog_ports[0] <<= 1;
m_analog_ports[1] <<= 1;
m_analog_ports[2] <<= 1;
m_analog_ports[3] <<= 1;
}
}
else
{
if (LOG)
logerror("%06X:analog_port_clock_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
m_analog_ports[0] <<= 1;
m_analog_ports[1] <<= 1;
m_analog_ports[2] <<= 1;
m_analog_ports[3] <<= 1;
}
}
WRITE16_MEMBER(gaelco3d_state::analog_port_latch_w)
WRITE_LINE_MEMBER(gaelco3d_state::analog_port_latch_w)
{
/* a zero is written here to read the analog ports, and a one is written when finished */
if (ACCESSING_BITS_0_7)
if (!state)
{
if (!(data & 0xff))
{
m_analog_ports[0] = m_analog[0].read_safe(0);
m_analog_ports[1] = m_analog[1].read_safe(0);
m_analog_ports[2] = m_analog[2].read_safe(0);
m_analog_ports[3] = m_analog[3].read_safe(0);
}
m_analog_ports[0] = m_analog[0].read_safe(0);
m_analog_ports[1] = m_analog[1].read_safe(0);
m_analog_ports[2] = m_analog[2].read_safe(0);
m_analog_ports[3] = m_analog[3].read_safe(0);
}
else
{
if (LOG)
logerror("%06X:analog_port_latch_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
}
}
@ -481,31 +408,30 @@ WRITE8_MEMBER(gaelco3d_state::tms_iack_w)
*
*************************************/
WRITE16_MEMBER(gaelco3d_state::tms_reset_w)
WRITE_LINE_MEMBER(gaelco3d_state::tms_reset_w)
{
/* this is set to 0 while data is uploaded, then set to $ffff after it is done */
/* it does not ever appear to be touched after that */
if (LOG)
logerror("%06X:tms_reset_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
m_tms->set_input_line(INPUT_LINE_RESET, (data == 0xffff) ? CLEAR_LINE : ASSERT_LINE);
logerror("%06X:tms_reset_w = %d\n", m_maincpu->pc(), state);
m_tms->set_input_line(INPUT_LINE_RESET, state ? CLEAR_LINE : ASSERT_LINE);
}
WRITE16_MEMBER(gaelco3d_state::tms_irq_w)
WRITE_LINE_MEMBER(gaelco3d_state::tms_irq_w)
{
/* this is written twice, 0,1, in quick succession */
/* done after uploading, and after modifying the comm area */
if (LOG)
logerror("%06X:tms_irq_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
if (ACCESSING_BITS_0_7)
m_tms->set_input_line(0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
logerror("%06X:tms_irq_w = %d\n", m_maincpu->pc(), state);
m_tms->set_input_line(0, state ? CLEAR_LINE : ASSERT_LINE);
}
WRITE16_MEMBER(gaelco3d_state::tms_control3_w)
WRITE_LINE_MEMBER(gaelco3d_state::tms_control3_w)
{
if (LOG)
logerror("%06X:tms_control3_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
logerror("%06X:tms_control3_w = %d\n", m_maincpu->pc(), state);
}
@ -708,31 +634,22 @@ WRITE32_MEMBER(gaelco3d_state::adsp_tx_callback)
*************************************/
WRITE32_MEMBER(gaelco3d_state::radikalb_lamp_w)
WRITE_LINE_MEMBER(gaelco3d_state::radikalb_lamp_w)
{
/* arbitrary data written */
if (ACCESSING_BITS_0_7)
logerror("%06X:unknown_127_w = %02X\n", space.device().safe_pc(), data & 0xff);
else
logerror("%06X:unknown_127_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
logerror("%06X:unknown_127_w = %d\n", m_maincpu->pc(), state);
}
WRITE32_MEMBER(gaelco3d_state::unknown_137_w)
WRITE_LINE_MEMBER(gaelco3d_state::unknown_137_w)
{
/* only written $00 or $ff */
if (ACCESSING_BITS_0_7)
logerror("%06X:unknown_137_w = %02X\n", space.device().safe_pc(), data & 0xff);
else
logerror("%06X:unknown_137_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
logerror("%06X:unknown_137_w = %d\n", m_maincpu->pc(), state);
}
WRITE32_MEMBER(gaelco3d_state::unknown_13a_w)
WRITE_LINE_MEMBER(gaelco3d_state::unknown_13a_w)
{
/* only written $0000 or $0001 */
if (ACCESSING_BITS_0_15)
logerror("%06X:unknown_13a_w = %04X\n", space.device().safe_pc(), data & 0xffff);
else
logerror("%06X:unknown_13a_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
logerror("%06X:unknown_13a_w = %04X\n", m_maincpu->pc(), state);
}
@ -743,6 +660,16 @@ WRITE32_MEMBER(gaelco3d_state::unknown_13a_w)
*
*************************************/
WRITE8_MEMBER(gaelco3d_state::mainlatch_68000_w)
{
m_mainlatch->write_bit(offset >> 2, BIT(data, 0));
}
WRITE8_MEMBER(gaelco3d_state::outlatch_68000_w)
{
m_outlatch->write_bit(offset >> 3, BIT(data, 0));
}
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, gaelco3d_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x000000, 0x1fffff) AM_ROM
@ -753,27 +680,26 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, gaelco3d_state )
AM_RANGE(0x51003c, 0x51003d) AM_READ_PORT("IN3")
AM_RANGE(0x510040, 0x510041) AM_WRITE(sound_data_w)
AM_RANGE(0x510042, 0x510043) AM_READ(sound_status_r)
AM_RANGE(0x510100, 0x510101) AM_READ(eeprom_data_r)
AM_RANGE(0x510100, 0x510101) AM_WRITE(irq_ack_w)
AM_RANGE(0x510102, 0x510103) AM_DEVWRITE8("serial", gaelco_serial_device, tr_w, 0x00ff)
AM_RANGE(0x510100, 0x510101) AM_READWRITE(eeprom_data_r, irq_ack_w)
AM_RANGE(0x510102, 0x510103) AM_DEVREAD8("serial", gaelco_serial_device, data_r, 0x00ff)
AM_RANGE(0x510102, 0x510103) AM_SELECT(0x000038) AM_WRITE8(mainlatch_68000_w, 0x00ff)
AM_RANGE(0x510104, 0x510105) AM_DEVWRITE8("serial", gaelco_serial_device, data_w, 0x00ff)
AM_RANGE(0x51010a, 0x51010b) AM_DEVWRITE8("serial", gaelco_serial_device, rts_w, 0x00ff)
AM_RANGE(0x510110, 0x510113) AM_WRITE(eeprom_data_w)
AM_RANGE(0x510116, 0x510117) AM_WRITE(tms_control3_w)
AM_RANGE(0x510118, 0x51011b) AM_WRITE(eeprom_clock_w)
AM_RANGE(0x510120, 0x510123) AM_WRITE(eeprom_cs_w)
AM_RANGE(0x51012a, 0x51012b) AM_WRITE(tms_reset_w)
AM_RANGE(0x510132, 0x510133) AM_WRITE(tms_irq_w)
AM_RANGE(0x510146, 0x510147) AM_DEVWRITE8("serial", gaelco_serial_device, irq_enable, 0x00ff)
AM_RANGE(0x510156, 0x510157) AM_WRITE(analog_port_clock_w)
AM_RANGE(0x510166, 0x510167) AM_WRITE(analog_port_latch_w)
AM_RANGE(0x510176, 0x510177) AM_DEVWRITE8("serial", gaelco_serial_device, unknown_w, 0x00ff)
AM_RANGE(0x510106, 0x510107) AM_SELECT(0x000070) AM_WRITE8(outlatch_68000_w, 0x00ff)
AM_RANGE(0xfe7f80, 0xfe7fff) AM_WRITE(tms_comm_w) AM_SHARE("tms_comm_base")
AM_RANGE(0xfe0000, 0xfeffff) AM_RAM AM_SHARE("m68k_ram_base")
ADDRESS_MAP_END
WRITE8_MEMBER(gaelco3d_state::mainlatch_68020_w)
{
m_mainlatch->write_bit(offset >> 1, BIT(data, 0));
}
WRITE8_MEMBER(gaelco3d_state::outlatch_68020_w)
{
m_outlatch->write_bit(offset >> 2, BIT(data, 0));
}
static ADDRESS_MAP_START( main020_map, AS_PROGRAM, 32, gaelco3d_state )
AM_RANGE(0x000000, 0x1fffff) AM_ROM
AM_RANGE(0x400000, 0x40ffff) AM_RAM_WRITE(gaelco3d_paletteram_020_w) AM_SHARE("paletteram")
@ -783,23 +709,11 @@ static ADDRESS_MAP_START( main020_map, AS_PROGRAM, 32, gaelco3d_state )
AM_RANGE(0x51003c, 0x51003f) AM_READ_PORT("IN3")
AM_RANGE(0x510040, 0x510043) AM_READ16(sound_status_r, 0x0000ffff)
AM_RANGE(0x510040, 0x510043) AM_WRITE16(sound_data_w, 0xffff0000)
AM_RANGE(0x510100, 0x510103) AM_READ(eeprom_data32_r)
AM_RANGE(0x510100, 0x510103) AM_WRITE(irq_ack32_w)
AM_RANGE(0x510100, 0x510103) AM_READWRITE16(eeprom_data_r, irq_ack_w, 0xffff0000)
AM_RANGE(0x510100, 0x510103) AM_DEVREAD8("serial", gaelco_serial_device, data_r, 0x000000ff)
AM_RANGE(0x510100, 0x510103) AM_SELECT(0x000038) AM_WRITE8(mainlatch_68020_w, 0x000000ff)
AM_RANGE(0x510104, 0x510107) AM_DEVWRITE8("serial", gaelco_serial_device, data_w, 0x00ff0000)
AM_RANGE(0x510108, 0x51010b) AM_DEVWRITE8("serial", gaelco_serial_device, rts_w, 0x000000ff)
AM_RANGE(0x510110, 0x510113) AM_WRITE16(eeprom_data_w, 0x0000ffff)
AM_RANGE(0x510114, 0x510117) AM_WRITE16(tms_control3_w, 0x0000ffff)
AM_RANGE(0x510118, 0x51011b) AM_WRITE16(eeprom_clock_w, 0x0000ffff)
AM_RANGE(0x510120, 0x510123) AM_WRITE16(eeprom_cs_w, 0x0000ffff)
AM_RANGE(0x510124, 0x510127) AM_WRITE(radikalb_lamp_w)
AM_RANGE(0x510128, 0x51012b) AM_WRITE16(tms_reset_w, 0x0000ffff)
AM_RANGE(0x510130, 0x510133) AM_WRITE16(tms_irq_w, 0x0000ffff)
AM_RANGE(0x510134, 0x510137) AM_WRITE(unknown_137_w)
AM_RANGE(0x510138, 0x51013b) AM_WRITE(unknown_13a_w)
AM_RANGE(0x510144, 0x510147) AM_DEVWRITE8("serial", gaelco_serial_device, irq_enable, 0x000000ff)
AM_RANGE(0x510154, 0x510157) AM_WRITE16(analog_port_clock_w, 0x0000ffff)
AM_RANGE(0x510164, 0x510167) AM_WRITE16(analog_port_latch_w, 0x0000ffff)
AM_RANGE(0x510174, 0x510177) AM_DEVWRITE8("serial", gaelco_serial_device, unknown_w, 0x000000ff)
AM_RANGE(0x510104, 0x510107) AM_SELECT(0x000070) AM_WRITE8(outlatch_68020_w, 0x000000ff)
AM_RANGE(0xfe7f80, 0xfe7fff) AM_WRITE16(tms_comm_w, 0xffffffff) AM_SHARE("tms_comm_base")
AM_RANGE(0xfe0000, 0xfeffff) AM_RAM AM_SHARE("m68k_ram_base")
ADDRESS_MAP_END
@ -967,7 +881,6 @@ static MACHINE_CONFIG_START( gaelco3d )
MCFG_CPU_PROGRAM_MAP(adsp_program_map)
MCFG_CPU_DATA_MAP(adsp_data_map)
MCFG_EEPROM_SERIAL_93C66_ADD("eeprom")
MCFG_QUANTUM_TIME(attotime::from_hz(6000))
@ -977,6 +890,25 @@ static MACHINE_CONFIG_START( gaelco3d )
MCFG_DEVICE_ADD("serial", GAELCO_SERIAL, 0)
MCFG_GAELCO_SERIAL_IRQ_HANDLER(WRITELINE(gaelco3d_state, ser_irq))
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // IC5 on bottom board next to EEPROM
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE("serial", gaelco_serial_device, tr_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("serial", gaelco_serial_device, rts_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, di_write))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, clk_write))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("eeprom", eeprom_serial_93cxx_device, cs_write))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(gaelco3d_state, tms_reset_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(gaelco3d_state, tms_irq_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(gaelco3d_state, unknown_13a_w))
MCFG_DEVICE_ADD("outlatch", LS259, 0) // IC2 on top board near edge connector
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gaelco3d_state, tms_control3_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(gaelco3d_state, radikalb_lamp_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(gaelco3d_state, unknown_137_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("serial", gaelco_serial_device, irq_enable))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(gaelco3d_state, analog_port_clock_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(gaelco3d_state, analog_port_latch_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(DEVWRITELINE("serial", gaelco_serial_device, unknown_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)

187
src/mame/drivers/galaga.cpp
View File

@ -520,27 +520,27 @@ Line up the LS32 so pin 7 is in line with Z80 pin 29
Atach the 2 chips to the top of the Z80 with some glue
Connect like this....
LS32 pin 1 tied to Z80 pin 22
LS32 pin 2 tied to Z80 pin 19
LS32 pin 1 tied to Z80 pin 22 (WR)
LS32 pin 2 tied to Z80 pin 19 (MREQ)
LS32 pin 3,4 tied together
LS32 pin 5 tied to Z80 pin 4
LS32 pin 5 tied to Z80 pin 4 (A14)
LS32 pin 6 tied to pin 10 LS32
LS32 pin 7 tied to Z80 pin 29 (GND)
LS32 pin 8 tied to LS259 pin 14
LS32 pin 9 tied to Z80 pin 5
LS32 pin 9 tied to Z80 pin 5 (A15)
LS32 pins 11, 12, 13 have NC
LS32 pin 14 tied to Z80 pin 11 (+5V)
LS259 pin 1 tied to Z80 pin 30
LS259 pin 2 tied to Z80 pin 31
LS259 pin 3 tied to Z80 pin 32
LS259 pin 1 tied to Z80 pin 30 (A0)
LS259 pin 2 tied to Z80 pin 31 (A1)
LS259 pin 3 tied to Z80 pin 32 (A2)
LS259 pin 4 to ROM 8 (as above)
LS259 pins 5, 6, 7 have NC
LS259 pin 8 tied to Z80 pin 29 (GND)
LS259 pins 9, 10, 11, 12 have NC
LS259 pin 13 tied to Z80 pin 14
LS259 pin 15 tied to Z80 pin 26
LS259 pin 16 tied to Z80 pin 11
LS259 pin 13 tied to Z80 pin 14 (D0)
LS259 pin 15 tied to Z80 pin 26 (RESET)
LS259 pin 16 tied to Z80 pin 11 (+5V)
@ -734,57 +734,28 @@ READ8_MEMBER(galaga_state::bosco_dsw_r)
return bit0 | (bit1 << 1);
}
WRITE8_MEMBER(galaga_state::galaga_flip_screen_w)
WRITE_LINE_MEMBER(galaga_state::flip_screen_w)
{
flip_screen_set(data & 1);
flip_screen_set(state);
}
WRITE8_MEMBER(bosco_state::bosco_flip_screen_w)
WRITE_LINE_MEMBER(galaga_state::irq1_clear_w)
{
flip_screen_set(~data & 1);
m_main_irq_mask = state;
if (!m_main_irq_mask)
m_maincpu->set_input_line(0, CLEAR_LINE);
}
WRITE8_MEMBER(galaga_state::bosco_latch_w)
WRITE_LINE_MEMBER(galaga_state::irq2_clear_w)
{
switch (offset)
{
case 0x00: /* IRQ1 */
m_main_irq_mask = data & 1;
if (!m_main_irq_mask)
m_maincpu->set_input_line(0, CLEAR_LINE);
break;
m_sub_irq_mask = state;
if (!m_sub_irq_mask)
m_subcpu->set_input_line(0, CLEAR_LINE);
}
case 0x01: /* IRQ2 */
m_sub_irq_mask = data & 1;
if (!m_sub_irq_mask)
m_subcpu->set_input_line(0, CLEAR_LINE);
break;
case 0x02: /* NMION */
m_sub2_nmi_mask = !(data & 1);
break;
case 0x03: /* RESET */
m_subcpu->set_input_line(INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
m_subcpu2->set_input_line(INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
break;
case 0x04: /* n.c. */
break;
case 0x05: /* MOD 0 (xevious: n.c.) */
m_custom_mod = (m_custom_mod & ~0x01) | ((data & 1) << 0);
break;
case 0x06: /* MOD 1 (xevious: n.c.) */
m_custom_mod = (m_custom_mod & ~0x02) | ((data & 1) << 1);
break;
case 0x07: /* MOD 2 (xevious: n.c.) */
m_custom_mod = (m_custom_mod & ~0x04) | ((data & 1) << 2);
break;
}
WRITE_LINE_MEMBER(galaga_state::nmion_w)
{
m_sub2_nmi_mask = !state;
}
CUSTOM_INPUT_MEMBER(digdug_state::shifted_port_r){ return ioport((const char *)param)->read() >> 4; }
@ -823,12 +794,6 @@ READ8_MEMBER(galaga_state::namco_52xx_si_r)
return 0;
}
READ8_MEMBER(galaga_state::custom_mod_r)
{
/* MOD0-2 is connected to K1-3; K0 is left unconnected */
return m_custom_mod << 1;
}
TIMER_CALLBACK_MEMBER(galaga_state::cpu3_interrupt_callback)
{
int scanline = param;
@ -849,28 +814,13 @@ MACHINE_START_MEMBER(galaga_state,galaga)
{
/* create the interrupt timer */
m_cpu3_interrupt_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(galaga_state::cpu3_interrupt_callback),this));
m_custom_mod = 0;
save_item(NAME(m_custom_mod));
save_item(NAME(m_main_irq_mask));
save_item(NAME(m_sub_irq_mask));
save_item(NAME(m_sub2_nmi_mask));
}
void galaga_state::bosco_latch_reset()
{
address_space &space = m_maincpu->space(AS_PROGRAM);
int i;
/* Reset all latches */
for (i = 0;i < 8;i++)
bosco_latch_w(space,i,0);
}
MACHINE_RESET_MEMBER(galaga_state,galaga)
{
/* Reset all latches */
bosco_latch_reset();
m_cpu3_interrupt_timer->adjust(m_screen->time_until_pos(64), 64);
}
@ -886,7 +836,7 @@ static ADDRESS_MAP_START( bosco_map, AS_PROGRAM, 8, bosco_state )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_WRITENOP /* the only area different for each CPU */
AM_RANGE(0x6800, 0x6807) AM_READ(bosco_dsw_r)
AM_RANGE(0x6800, 0x681f) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x6820, 0x6827) AM_WRITE(bosco_latch_w) /* misc latches */
AM_RANGE(0x6820, 0x6827) AM_DEVWRITE("misclatch", ls259_device, write_d0)
AM_RANGE(0x6830, 0x6830) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x7000, 0x70ff) AM_DEVREADWRITE("06xx_0", namco_06xx_device, data_r, data_w)
AM_RANGE(0x7100, 0x7100) AM_DEVREADWRITE("06xx_0", namco_06xx_device, ctrl_r, ctrl_w)
@ -899,8 +849,7 @@ static ADDRESS_MAP_START( bosco_map, AS_PROGRAM, 8, bosco_state )
AM_RANGE(0x9820, 0x9820) AM_WRITE(bosco_scrolly_w)
AM_RANGE(0x9830, 0x9830) AM_WRITEONLY AM_SHARE("starcontrol")
AM_RANGE(0x9840, 0x9840) AM_WRITE(bosco_starclr_w)
AM_RANGE(0x9870, 0x9870) AM_WRITE(bosco_flip_screen_w)
AM_RANGE(0x9874, 0x9875) AM_WRITEONLY AM_SHARE("bosco_starblink")
AM_RANGE(0x9870, 0x9877) AM_DEVWRITE("videolatch", ls259_device, write_d0)
ADDRESS_MAP_END
@ -908,7 +857,7 @@ static ADDRESS_MAP_START( galaga_map, AS_PROGRAM, 8, galaga_state )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_WRITENOP /* the only area different for each CPU */
AM_RANGE(0x6800, 0x6807) AM_READ(bosco_dsw_r)
AM_RANGE(0x6800, 0x681f) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x6820, 0x6827) AM_WRITE(bosco_latch_w) /* misc latches */
AM_RANGE(0x6820, 0x6827) AM_DEVWRITE("misclatch", ls259_device, write_d0)
AM_RANGE(0x6830, 0x6830) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x7000, 0x70ff) AM_DEVREADWRITE("06xx", namco_06xx_device, data_r, data_w)
AM_RANGE(0x7100, 0x7100) AM_DEVREADWRITE("06xx", namco_06xx_device, ctrl_r, ctrl_w)
@ -916,8 +865,12 @@ static ADDRESS_MAP_START( galaga_map, AS_PROGRAM, 8, galaga_state )
AM_RANGE(0x8800, 0x8bff) AM_RAM AM_SHARE("galaga_ram1")
AM_RANGE(0x9000, 0x93ff) AM_RAM AM_SHARE("galaga_ram2")
AM_RANGE(0x9800, 0x9bff) AM_RAM AM_SHARE("galaga_ram3")
AM_RANGE(0xa000, 0xa005) AM_WRITEONLY AM_SHARE("starcontrol")
AM_RANGE(0xa007, 0xa007) AM_WRITE(galaga_flip_screen_w)
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("videolatch", ls259_device, write_d0)
ADDRESS_MAP_END
static ADDRESS_MAP_START( gatsbee_main_map, AS_PROGRAM, 8, galaga_state )
AM_RANGE(0x0000, 0x0007) AM_MIRROR(0x3ff8) AM_DEVWRITE("extralatch", ls259_device, write_d0)
AM_IMPORT_FROM(galaga_map)
ADDRESS_MAP_END
@ -925,7 +878,7 @@ static ADDRESS_MAP_START( xevious_map, AS_PROGRAM, 8, xevious_state )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_WRITENOP /* the only area different for each CPU */
AM_RANGE(0x6800, 0x6807) AM_READ(bosco_dsw_r)
AM_RANGE(0x6800, 0x681f) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x6820, 0x6827) AM_WRITE(bosco_latch_w) /* misc latches */
AM_RANGE(0x6820, 0x6827) AM_DEVWRITE("misclatch", ls259_device, write_d0)
AM_RANGE(0x6830, 0x6830) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x7000, 0x70ff) AM_DEVREADWRITE("06xx", namco_06xx_device, data_r, data_w)
AM_RANGE(0x7100, 0x7100) AM_DEVREADWRITE("06xx", namco_06xx_device, ctrl_r, ctrl_w)
@ -945,7 +898,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( digdug_map, AS_PROGRAM, 8, digdug_state )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_WRITENOP /* the only area different for each CPU */
AM_RANGE(0x6800, 0x681f) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x6820, 0x6827) AM_WRITE(bosco_latch_w) /* misc latches */
AM_RANGE(0x6820, 0x6827) AM_DEVWRITE("misclatch", ls259_device, write_d0)
AM_RANGE(0x6830, 0x6830) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x7000, 0x70ff) AM_DEVREADWRITE("06xx", namco_06xx_device, data_r, data_w)
AM_RANGE(0x7100, 0x7100) AM_DEVREADWRITE("06xx", namco_06xx_device, ctrl_r, ctrl_w)
@ -954,7 +907,7 @@ static ADDRESS_MAP_START( digdug_map, AS_PROGRAM, 8, digdug_state )
AM_RANGE(0x8800, 0x8bff) AM_RAM AM_SHARE("digdug_objram") /* work RAM + sprite registers */
AM_RANGE(0x9000, 0x93ff) AM_RAM AM_SHARE("digdug_posram") /* work RAM + sprite registers */
AM_RANGE(0x9800, 0x9bff) AM_RAM AM_SHARE("digdug_flpram") /* work RAM + sprite registers */
AM_RANGE(0xa000, 0xa007) AM_READNOP AM_WRITE(digdug_PORT_w) /* video latches (spurious reads when setting latch bits) */
AM_RANGE(0xa000, 0xa007) AM_READNOP AM_DEVWRITE("videolatch", ls259_device, write_d0) /* video latches (spurious reads when setting latch bits) */
AM_RANGE(0xb800, 0xb83f) AM_DEVREADWRITE("earom", atari_vg_earom_device, read, write) /* non volatile memory data */
AM_RANGE(0xb840, 0xb840) AM_DEVWRITE("earom", atari_vg_earom_device, ctrl_w) /* non volatile memory control */
ADDRESS_MAP_END
@ -1619,6 +1572,13 @@ static MACHINE_CONFIG_START( bosco )
MCFG_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
MCFG_CPU_PROGRAM_MAP(bosco_map)
MCFG_DEVICE_ADD("misclatch", LS259, 0) // 3C on CPU board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(galaga_state, irq1_clear_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(galaga_state, irq2_clear_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(galaga_state, nmion_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(INPUTLINE("sub2", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_NAMCO_50XX_ADD("50xx_1", MASTER_CLOCK/6/2) /* 1.536 MHz */
MCFG_NAMCO_50XX_ADD("50xx_2", MASTER_CLOCK/6/2) /* 1.536 MHz */
MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
@ -1657,6 +1617,12 @@ static MACHINE_CONFIG_START( bosco )
MCFG_NAMCO_06XX_WRITE_0_CB(DEVWRITE8("50xx_2", namco_50xx_device, write))
MCFG_NAMCO_06XX_WRITE_1_CB(DEVWRITE8("52xx", namco_52xx_device, write))
MCFG_DEVICE_ADD("videolatch", LS259, 0) // 1B on video board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(galaga_state, flip_screen_w)) MCFG_DEVCB_INVERT
// Q4-Q5 to 05XX for starfield blink
//MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(DEVWRITE("50xx_2", namco_50xx_device, reset_w))
//MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITE("52xx", namco_52xx_device, reset_w))
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_VBLANK_INIT("screen", 8)
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
@ -1704,6 +1670,13 @@ static MACHINE_CONFIG_START( galaga )
MCFG_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
MCFG_CPU_PROGRAM_MAP(galaga_map)
MCFG_DEVICE_ADD("misclatch", LS259, 0) // 3C on CPU board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(galaga_state, irq1_clear_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(galaga_state, irq2_clear_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(galaga_state, nmion_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(INPUTLINE("sub2", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
MCFG_NAMCO_51XX_INPUT_0_CB(IOPORT("IN0L"))
MCFG_NAMCO_51XX_INPUT_1_CB(IOPORT("IN0H"))
@ -1722,6 +1695,10 @@ static MACHINE_CONFIG_START( galaga )
MCFG_NAMCO_06XX_WRITE_0_CB(DEVWRITE8("51xx", namco_51xx_device, write))
MCFG_NAMCO_06XX_WRITE_3_CB(DEVWRITE8("54xx", namco_54xx_device, write))
MCFG_DEVICE_ADD("videolatch", LS259, 0) // 5K on video board
// Q0-Q5 to 05XX for starfield control
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(galaga_state, flip_screen_w))
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_VBLANK_INIT("screen", 8)
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
@ -1775,6 +1752,14 @@ static MACHINE_CONFIG_DERIVED( galagab, galaga )
MCFG_DEVICE_REMOVE("discrete")
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( gatsbee, galaga )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(gatsbee_main_map)
MCFG_DEVICE_ADD("extralatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(galaga_state, gatsbee_bank_w))
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( xevious )
/* basic machine hardware */
@ -1789,6 +1774,13 @@ static MACHINE_CONFIG_START( xevious )
MCFG_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
MCFG_CPU_PROGRAM_MAP(xevious_map)
MCFG_DEVICE_ADD("misclatch", LS259, 0) // 5K
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(galaga_state, irq1_clear_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(galaga_state, irq2_clear_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(galaga_state, nmion_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(INPUTLINE("sub2", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_NAMCO_50XX_ADD("50xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
@ -1889,6 +1881,14 @@ static MACHINE_CONFIG_START( digdug )
MCFG_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
MCFG_CPU_PROGRAM_MAP(digdug_map)
MCFG_DEVICE_ADD("misclatch", LS259, 0) // 8R
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(galaga_state, irq1_clear_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(galaga_state, irq2_clear_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(galaga_state, nmion_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(INPUTLINE("sub2", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
// Q5-Q7 also used (see below)
MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
MCFG_NAMCO_51XX_INPUT_0_CB(IOPORT("IN0L"))
MCFG_NAMCO_51XX_INPUT_1_CB(IOPORT("IN0H"))
@ -1898,7 +1898,10 @@ static MACHINE_CONFIG_START( digdug )
MCFG_NAMCO_51XX_OUTPUT_1_CB(WRITE8(galaga_state,out_1))
MCFG_NAMCO_53XX_ADD("53xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
MCFG_NAMCO_53XX_K_CB(READ8(galaga_state,custom_mod_r))
MCFG_NAMCO_53XX_K_CB(DEVREADLINE("misclatch", ls259_device, q7_r)) MCFG_DEVCB_BIT(3) // MOD 2 = K3
MCFG_DEVCB_CHAIN_INPUT(DEVREADLINE("misclatch", ls259_device, q6_r)) MCFG_DEVCB_BIT(2) // MOD 1 = K2
MCFG_DEVCB_CHAIN_INPUT(DEVREADLINE("misclatch", ls259_device, q5_r)) MCFG_DEVCB_BIT(1) // MOD 0 = K1
// K0 is left unconnected
MCFG_NAMCO_53XX_INPUT_0_CB(IOPORT("DSWA"))
MCFG_NAMCO_53XX_INPUT_1_CB(IOPORT("DSWA_HI"))
MCFG_NAMCO_53XX_INPUT_2_CB(IOPORT("DSWB"))
@ -1911,6 +1914,12 @@ static MACHINE_CONFIG_START( digdug )
MCFG_NAMCO_06XX_READ_1_CB(DEVREAD8("53xx", namco_53xx_device, read))
MCFG_NAMCO_06XX_READ_REQUEST_1_CB(DEVWRITELINE("53xx", namco_53xx_device, read_request))
MCFG_DEVICE_ADD("videolatch", LS259, 0) // 5R
MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(WRITE8(digdug_state, bg_select_w)) MCFG_DEVCB_MASK(0x33)
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(digdug_state, tx_color_mode_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(digdug_state, bg_disable_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(digdug_state, flip_screen_w))
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
/* synchronization of the CPUs */
MCFG_MACHINE_START_OVERRIDE(galaga_state,galaga)
@ -3412,14 +3421,6 @@ DRIVER_INIT_MEMBER(galaga_state,galaga)
}
}
DRIVER_INIT_MEMBER(galaga_state,gatsbee)
{
DRIVER_INIT_CALL(galaga);
/* Gatsbee has a larger character ROM, we need a handler for banking */
m_maincpu->space(AS_PROGRAM).install_write_handler(0x1000, 0x1000, write8_delegate(FUNC(galaga_state::gatsbee_bank_w),this));
}
DRIVER_INIT_MEMBER(xevious_state,xevious)
{
@ -3496,7 +3497,7 @@ GAME( 1982, digsid, digdug, digdug, digdug, digdug_state, 0, ROT90
/* Bootlegs with replacement I/O chips */
GAME( 1982, gallag, galaga, galagab, galaga, galaga_state, galaga, ROT90, "bootleg", "Gallag", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
GAME( 1984, gatsbee, galaga, galagab, gatsbee, galaga_state, gatsbee, ROT90, "hack (Uchida)", "Gatsbee", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
GAME( 1984, gatsbee, galaga, gatsbee, gatsbee, galaga_state, galaga, ROT90, "hack (Uchida)", "Gatsbee", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
GAME( 1981, nebulbee, galaga, galagab, galaga, galaga_state, galaga, ROT90, "bootleg", "Nebulous Bee", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
GAME( 1982, xevios, xevious, xevious, xevious, xevious_state, xevios, ROT90, "bootleg", "Xevios", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )

50
src/mame/drivers/gauntlet.cpp
View File

@ -190,12 +190,10 @@ WRITE16_MEMBER(gauntlet_state::sound_reset_w)
if ((oldword ^ m_sound_reset_val) & 1)
{
m_audiocpu->set_input_line(INPUT_LINE_RESET, (m_sound_reset_val & 1) ? CLEAR_LINE : ASSERT_LINE);
m_soundctl->clear_w(m_sound_reset_val & 1);
m_soundcomm->sound_cpu_reset();
if (m_sound_reset_val & 1)
{
m_ym2151->reset();
m_tms5220->reset();
m_tms5220->set_unscaled_clock(ATARI_CLOCK_14MHz/2 / 11);
m_ym2151->set_output_gain(ALL_OUTPUTS, 0.0f);
m_pokey->set_output_gain(ALL_OUTPUTS, 0.0f);
m_tms5220->set_output_gain(ALL_OUTPUTS, 0.0f);
@ -231,27 +229,28 @@ READ8_MEMBER(gauntlet_state::switch_6502_r)
*
*************************************/
WRITE8_MEMBER(gauntlet_state::sound_ctl_w)
WRITE_LINE_MEMBER(gauntlet_state::ym2151_reset_w)
{
switch (offset & 7)
{
case 0: /* music reset, bit D7, low reset */
if (((data>>7)&1) == 0) m_ym2151->reset();
break;
if (state == 0)
m_ym2151->reset();
}
case 1: /* speech write, bit D7, active low */
m_tms5220->wsq_w(data >> 7);
break;
WRITE_LINE_MEMBER(gauntlet_state::speech_squeak_w)
{
uint8_t data = 5 | (state ? 2 : 0);
m_tms5220->set_unscaled_clock(ATARI_CLOCK_14MHz/2 / (16 - data));
}
case 2: /* speech reset, bit D7, active low */
m_tms5220->rsq_w(data >> 7);
break;
WRITE_LINE_MEMBER(gauntlet_state::coin_counter_left_w)
{
// coins 1 & 2 combined
machine().bookkeeping().coin_counter_w(0, state);
}
case 3: /* speech squeak, bit D7 */
data = 5 | ((data >> 6) & 2);
m_tms5220->set_unscaled_clock(ATARI_CLOCK_14MHz/2 / (16 - data));
break;
}
WRITE_LINE_MEMBER(gauntlet_state::coin_counter_right_w)
{
// coins 3 & 4 combined
machine().bookkeeping().coin_counter_w(1, state);
}
@ -325,7 +324,8 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, gauntlet_state )
AM_RANGE(0x1000, 0x100f) AM_MIRROR(0x27c0) AM_DEVWRITE("soundcomm", atari_sound_comm_device, sound_response_w)
AM_RANGE(0x1010, 0x101f) AM_MIRROR(0x27c0) AM_DEVREAD("soundcomm", atari_sound_comm_device, sound_command_r)
AM_RANGE(0x1020, 0x102f) AM_MIRROR(0x27c0) AM_READ_PORT("COIN") AM_WRITE(mixer_w)
AM_RANGE(0x1030, 0x103f) AM_MIRROR(0x27c0) AM_READWRITE(switch_6502_r, sound_ctl_w)
AM_RANGE(0x1030, 0x1030) AM_MIRROR(0x27cf) AM_READ(switch_6502_r)
AM_RANGE(0x1030, 0x1037) AM_MIRROR(0x27c8) AM_DEVWRITE("soundctl", ls259_device, write_d7)
AM_RANGE(0x1800, 0x180f) AM_MIRROR(0x27c0) AM_DEVREADWRITE("pokey", pokey_device, read, write)
AM_RANGE(0x1810, 0x1811) AM_MIRROR(0x27ce) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
AM_RANGE(0x1820, 0x182f) AM_MIRROR(0x27c0) AM_DEVWRITE("tms", tms5220_device, data_w)
@ -544,6 +544,14 @@ static MACHINE_CONFIG_START( gauntlet_base )
MCFG_SOUND_ADD("tms", TMS5220C, ATARI_CLOCK_14MHz/2/11) /* potentially ATARI_CLOCK_14MHz/2/9 as well */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.80)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.80)
MCFG_DEVICE_ADD("soundctl", LS259, 0) // 16T/U
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gauntlet_state, ym2151_reset_w)) // music reset, low reset
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("tms", tms5220_device, wsq_w)) // speech write, active low
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE("tms", tms5220_device, rsq_w)) // speech reset, active low
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(gauntlet_state, speech_squeak_w)) // speech squeak, low = 650 Hz
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(gauntlet_state, coin_counter_right_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(gauntlet_state, coin_counter_left_w))
MACHINE_CONFIG_END

28
src/mame/drivers/gladiatr.cpp
View File

@ -195,6 +195,7 @@ TODO:
#include "cpu/mcs48/mcs48.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/clock.h"
#include "machine/nvram.h"
@ -205,12 +206,6 @@ TODO:
#include "speaker.h"
WRITE8_MEMBER(gladiatr_state::gladiatr_bankswitch_w)
{
// ROM bankswitching
membank("bank1")->set_entry(data & 0x01);
}
MACHINE_RESET_MEMBER(gladiatr_state,gladiator)
{
// 6809 bank memory set
@ -258,9 +253,9 @@ READ8_MEMBER(gladiatr_state::gladiator_cpu_sound_command_r)
return m_soundlatch->read(space,0);
}
WRITE8_MEMBER(gladiatr_state::gladiatr_flipscreen_w)
WRITE_LINE_MEMBER(gladiatr_state::flipscreen_w)
{
flip_screen_set(data & 1);
flip_screen_set(state);
}
@ -512,12 +507,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( gladiatr_cpu1_io, AS_IO, 8, gladiatr_state )
// ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0xc000, 0xc000) AM_WRITE(spritebuffer_w)
AM_RANGE(0xc001, 0xc001) AM_WRITE(gladiatr_spritebank_w)
AM_RANGE(0xc002, 0xc002) AM_WRITE(gladiatr_bankswitch_w)
AM_RANGE(0xc004, 0xc004) AM_WRITE(gladiatr_irq_patch_w) /* !!! patch to 2nd CPU IRQ !!! */
AM_RANGE(0xc007, 0xc007) AM_WRITE(gladiatr_flipscreen_w)
AM_RANGE(0xc000, 0xc007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xc09e, 0xc09f) AM_DEVREADWRITE("ucpu", upi41_cpu_device, upi41_master_r, upi41_master_w)
AM_RANGE(0xc0bf, 0xc0bf) AM_NOP // watchdog_reset_w doesn't work
ADDRESS_MAP_END
@ -529,7 +520,7 @@ static ADDRESS_MAP_START( gladiatr_cpu2_io, AS_IO, 8, gladiatr_state )
AM_RANGE(0x40, 0x40) AM_NOP // WRITE(sub_irq_ack_w)
AM_RANGE(0x60, 0x61) AM_DEVREADWRITE("cctl", upi41_cpu_device, upi41_master_r, upi41_master_w)
AM_RANGE(0x80, 0x81) AM_DEVREADWRITE("ccpu", upi41_cpu_device, upi41_master_r, upi41_master_w)
AM_RANGE(0xa0, 0xa7) AM_NOP // filters on sound output
AM_RANGE(0xa0, 0xa7) AM_DEVWRITE("filtlatch", ls259_device, write_d0)
AM_RANGE(0xe0, 0xe0) AM_WRITE(gladiator_cpu_sound_command_w)
ADDRESS_MAP_END
@ -751,6 +742,13 @@ static MACHINE_CONFIG_START( gladiatr )
MCFG_MACHINE_RESET_OVERRIDE(gladiatr_state,gladiator)
MCFG_NVRAM_ADD_0FILL("nvram") // NEC uPD449 CMOS SRAM
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 5L on main board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gladiatr_state, spritebuffer_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gladiatr_state, spritebank_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(MEMBANK("bank1"))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) // shadowed by aforementioned hack
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(gladiatr_state, flipscreen_w))
MCFG_DEVICE_ADD("cctl", I8741, XTAL_12MHz/2) /* verified on pcb */
MCFG_MCS48_PORT_T0_IN_CB(IOPORT("COINS")) MCFG_DEVCB_RSHIFT(3)
MCFG_MCS48_PORT_T1_IN_CB(IOPORT("COINS")) MCFG_DEVCB_RSHIFT(2)
@ -815,6 +813,8 @@ static MACHINE_CONFIG_START( gladiatr )
MCFG_SOUND_ADD("msm", MSM5205, XTAL_455kHz) /* verified on pcb */
MCFG_MSM5205_PRESCALER_SELECTOR(SEX_4B) /* vclk input mode */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.60)
MCFG_DEVICE_ADD("filtlatch", LS259, 0) // 9R - filters on sound output
MACHINE_CONFIG_END

43
src/mame/drivers/glass.cpp
View File

@ -79,19 +79,27 @@ WRITE16_MEMBER(glass_state::OKIM6295_bankswitch_w)
WRITE16_MEMBER(glass_state::coin_w)
{
switch (offset >> 3)
{
case 0x00: /* Coin Lockouts */
case 0x01:
machine().bookkeeping().coin_lockout_w((offset >> 3) & 0x01, ~data & 0x01);
break;
case 0x02: /* Coin Counters */
case 0x03:
machine().bookkeeping().coin_counter_w((offset >> 3) & 0x01, data & 0x01);
break;
case 0x04: /* Sound Muting (if bit 0 == 1, sound output stream = 0) */
break;
}
m_outlatch->write_bit(offset >> 3, BIT(data, 0));
}
WRITE_LINE_MEMBER(glass_state::coin1_lockout_w)
{
machine().bookkeeping().coin_lockout_w(0, !state);
}
WRITE_LINE_MEMBER(glass_state::coin2_lockout_w)
{
machine().bookkeeping().coin_lockout_w(1, !state);
}
WRITE_LINE_MEMBER(glass_state::coin1_counter_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(glass_state::coin2_counter_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
@ -113,9 +121,9 @@ static ADDRESS_MAP_START( glass_map, AS_PROGRAM, 16, glass_state )
AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
AM_RANGE(0x700008, 0x700009) AM_WRITE(blitter_w) // serial blitter
AM_RANGE(0x70000a, 0x70000b) AM_SELECT(0x000070) AM_WRITE(coin_w) // Coin Counters/Lockout
AM_RANGE(0x70000c, 0x70000d) AM_WRITE(OKIM6295_bankswitch_w) // OKI6295 bankswitch
AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) // OKI6295 status register
AM_RANGE(0x70000a, 0x70004b) AM_WRITE(coin_w) // Coin Counters/Lockout
AM_RANGE(0xfec000, 0xfeffff) AM_RAM AM_SHARE("shareram") // Work RAM (partially shared with DS5002FP)
ADDRESS_MAP_END
@ -226,6 +234,13 @@ static MACHINE_CONFIG_START( glass )
MCFG_CPU_PROGRAM_MAP(glass_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", glass_state, interrupt)
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(glass_state, coin1_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(glass_state, coin2_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(glass_state, coin1_counter_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(glass_state, coin2_counter_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(NOOP) // Sound Muting (if bit 0 == 1, sound output stream = 0)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)

30
src/mame/drivers/gng.cpp
View File

@ -27,8 +27,8 @@ Notes:
#include "cpu/z80/z80.h"
#include "cpu/m6809/m6809.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "sound/2203intf.h"
#include "screen.h"
#include "speaker.h"
@ -41,9 +41,23 @@ WRITE8_MEMBER(gng_state::gng_bankswitch_w)
membank("bank1")->set_entry((data & 0x03));
}
WRITE8_MEMBER(gng_state::gng_coin_counter_w)
WRITE_LINE_MEMBER(gng_state::coin_counter_1_w)
{
machine().bookkeeping().coin_counter_w(offset, data);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(gng_state::coin_counter_2_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
WRITE_LINE_MEMBER(gng_state::ym_reset_w)
{
if (!state)
{
m_ym[0]->reset();
m_ym[1]->reset();
}
}
static ADDRESS_MAP_START( gng_map, AS_PROGRAM, 8, gng_state )
@ -62,9 +76,7 @@ static ADDRESS_MAP_START( gng_map, AS_PROGRAM, 8, gng_state )
AM_RANGE(0x3b08, 0x3b09) AM_WRITE(gng_bgscrollx_w)
AM_RANGE(0x3b0a, 0x3b0b) AM_WRITE(gng_bgscrolly_w)
AM_RANGE(0x3c00, 0x3c00) AM_NOP /* watchdog? */
AM_RANGE(0x3d00, 0x3d00) AM_WRITE(gng_flipscreen_w)
// { 0x3d01, 0x3d01, reset sound cpu?
AM_RANGE(0x3d02, 0x3d03) AM_WRITE(gng_coin_counter_w)
AM_RANGE(0x3d00, 0x3d07) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x3e00, 0x3e00) AM_WRITE(gng_bankswitch_w)
AM_RANGE(0x4000, 0x5fff) AM_ROMBANK("bank1")
AM_RANGE(0x6000, 0xffff) AM_ROM
@ -353,6 +365,12 @@ static MACHINE_CONFIG_START( gng )
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(gng_state, irq0_line_hold, 4*60)
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 9B on A board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gng_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(INPUTLINE("audiocpu", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE(gng_state, ym_reset_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(gng_state, coin_counter_1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(gng_state, coin_counter_2_w))
/* video hardware */
MCFG_BUFFERED_SPRITERAM8_ADD("spriteram")

16
src/mame/drivers/gomoku.cpp
View File

@ -44,6 +44,12 @@ READ8_MEMBER(gomoku_state::input_port_r)
}
WRITE8_MEMBER(gomoku_state::gomoku_latch_w)
{
m_latch->write_bit(offset, BIT(data, 1));
}
static ADDRESS_MAP_START( gomoku_map, AS_PROGRAM, 8, gomoku_state )
AM_RANGE(0x0000, 0x47ff) AM_ROM
AM_RANGE(0x4800, 0x4fff) AM_RAM
@ -52,10 +58,7 @@ static ADDRESS_MAP_START( gomoku_map, AS_PROGRAM, 8, gomoku_state )
AM_RANGE(0x5800, 0x58ff) AM_RAM_WRITE(gomoku_bgram_w) AM_SHARE("bgram")
AM_RANGE(0x6000, 0x601f) AM_DEVWRITE("gomoku", gomoku_sound_device, sound1_w)
AM_RANGE(0x6800, 0x681f) AM_DEVWRITE("gomoku", gomoku_sound_device, sound2_w)
AM_RANGE(0x7000, 0x7000) AM_WRITENOP
AM_RANGE(0x7001, 0x7001) AM_WRITE(gomoku_flipscreen_w)
AM_RANGE(0x7002, 0x7002) AM_WRITE(gomoku_bg_dispsw_w)
AM_RANGE(0x7003, 0x7007) AM_WRITENOP
AM_RANGE(0x7000, 0x7007) AM_WRITE(gomoku_latch_w)
AM_RANGE(0x7800, 0x7807) AM_READ(input_port_r)
AM_RANGE(0x7800, 0x7800) AM_WRITENOP
ADDRESS_MAP_END
@ -129,6 +132,11 @@ static MACHINE_CONFIG_START( gomoku )
MCFG_CPU_PROGRAM_MAP(gomoku_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", gomoku_state, irq0_line_hold)
MCFG_DEVICE_ADD("latch", LS259, 0) // 7J
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gomoku_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(gomoku_state, bg_dispsw_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) // start LED?
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)

37
src/mame/drivers/gridlee.cpp
View File

@ -270,24 +270,30 @@ READ8_MEMBER(gridlee_state::random_num_r)
*
*************************************/
WRITE8_MEMBER(gridlee_state::led_0_w)
WRITE8_MEMBER(gridlee_state::latch_w)
{
output().set_led_value(0, data & 1);
logerror("LED 0 %s\n", (data & 1) ? "on" : "off");
m_latch->write_bit(offset >> 4, data);
}
WRITE8_MEMBER(gridlee_state::led_1_w)
WRITE_LINE_MEMBER(gridlee_state::led_0_w)
{
output().set_led_value(1, data & 1);
logerror("LED 1 %s\n", (data & 1) ? "on" : "off");
output().set_led_value(0, state);
logerror("LED 0 %s\n", state ? "on" : "off");
}
WRITE8_MEMBER(gridlee_state::gridlee_coin_counter_w)
WRITE_LINE_MEMBER(gridlee_state::led_1_w)
{
machine().bookkeeping().coin_counter_w(0, data & 1);
logerror("coin counter %s\n", (data & 1) ? "on" : "off");
output().set_led_value(1, state);
logerror("LED 1 %s\n", state ? "on" : "off");
}
WRITE_LINE_MEMBER(gridlee_state::coin_counter_w)
{
machine().bookkeeping().coin_counter_w(0, state);
logerror("coin counter %s\n", state ? "on" : "off");
}
@ -302,11 +308,7 @@ WRITE8_MEMBER(gridlee_state::gridlee_coin_counter_w)
static ADDRESS_MAP_START( cpu1_map, AS_PROGRAM, 8, gridlee_state )
AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x0800, 0x7fff) AM_RAM_WRITE(gridlee_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x9000, 0x9000) AM_WRITE(led_0_w)
AM_RANGE(0x9010, 0x9010) AM_WRITE(led_1_w)
AM_RANGE(0x9020, 0x9020) AM_WRITE(gridlee_coin_counter_w)
/* { 0x9060, 0x9060, unknown - only written to at startup */
AM_RANGE(0x9070, 0x9070) AM_WRITE(gridlee_cocktail_flip_w)
AM_RANGE(0x9000, 0x9000) AM_SELECT(0x0070) AM_WRITE(latch_w)
AM_RANGE(0x9200, 0x9200) AM_WRITE(gridlee_palette_select_w)
AM_RANGE(0x9380, 0x9380) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x9500, 0x9501) AM_READ(analog_port_r)
@ -420,6 +422,13 @@ static MACHINE_CONFIG_START( gridlee )
MCFG_WATCHDOG_ADD("watchdog")
MCFG_DEVICE_ADD("latch", LS259, 0) // type can only be guessed
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gridlee_state, led_0_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(gridlee_state, led_1_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(gridlee_state, coin_counter_w))
// Q6 unknown - only written to at startup
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(gridlee_state, cocktail_flip_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(GRIDLEE_PIXEL_CLOCK, GRIDLEE_HTOTAL, GRIDLEE_HBEND, GRIDLEE_HBSTART, GRIDLEE_VTOTAL, GRIDLEE_VBEND, GRIDLEE_VBSTART)

24
src/mame/drivers/gyruss.cpp
View File

@ -64,6 +64,7 @@ and 1 SFX channel controlled by an 8039:
#include "cpu/m6809/m6809.h"
#include "cpu/mcs48/mcs48.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "machine/konami1.h"
#include "sound/ay8910.h"
@ -161,9 +162,9 @@ WRITE8_MEMBER(gyruss_state::gyruss_i8039_irq_w)
m_audiocpu_2->set_input_line(0, ASSERT_LINE);
}
WRITE8_MEMBER(gyruss_state::master_nmi_mask_w)
WRITE_LINE_MEMBER(gyruss_state::master_nmi_mask_w)
{
m_master_nmi_mask = data & 1;
m_master_nmi_mask = state;
if (!m_master_nmi_mask)
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
@ -175,6 +176,16 @@ WRITE8_MEMBER(gyruss_state::slave_irq_mask_w)
m_subcpu->set_input_line(0, CLEAR_LINE);
}
WRITE_LINE_MEMBER(gyruss_state::coin_counter_1_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(gyruss_state::coin_counter_2_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
static ADDRESS_MAP_START( main_cpu1_map, AS_PROGRAM, 8, gyruss_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x83ff) AM_RAM AM_SHARE("colorram")
@ -187,8 +198,7 @@ static ADDRESS_MAP_START( main_cpu1_map, AS_PROGRAM, 8, gyruss_state )
AM_RANGE(0xc0c0, 0xc0c0) AM_READ_PORT("P2")
AM_RANGE(0xc0e0, 0xc0e0) AM_READ_PORT("DSW1")
AM_RANGE(0xc100, 0xc100) AM_READ_PORT("DSW3") AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
AM_RANGE(0xc180, 0xc180) AM_WRITE(master_nmi_mask_w)
AM_RANGE(0xc185, 0xc185) AM_WRITEONLY AM_SHARE("flipscreen")
AM_RANGE(0xc180, 0xc187) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
ADDRESS_MAP_END
static ADDRESS_MAP_START( main_cpu2_map, AS_PROGRAM, 8, gyruss_state )
@ -484,6 +494,12 @@ static MACHINE_CONFIG_START( gyruss )
MCFG_QUANTUM_TIME(attotime::from_hz(6000))
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 3C
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(gyruss_state, master_nmi_mask_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(gyruss_state, coin_counter_1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(gyruss_state, coin_counter_2_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(gyruss_state, flipscreen_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART)

52
src/mame/drivers/hnayayoi.cpp
View File

@ -44,6 +44,8 @@ TODO:
#include "cpu/z80/z80.h"
#include "sound/2203intf.h"
#include "sound/msm5205.h"
#include "machine/74259.h"
#include "machine/clock.h"
#include "machine/nvram.h"
#include "screen.h"
#include "speaker.h"
@ -81,19 +83,25 @@ WRITE8_MEMBER(hnayayoi_state::adpcm_data_w)
m_msm->data_w(data);
}
WRITE8_MEMBER(hnayayoi_state::adpcm_vclk_w)
WRITE_LINE_MEMBER(hnayayoi_state::coin_counter_w)
{
m_msm->vclk_w(data & 1);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE8_MEMBER(hnayayoi_state::adpcm_reset_w)
WRITE_LINE_MEMBER(hnayayoi_state::nmi_enable_w)
{
m_msm->reset_w(data & 1);
m_nmi_enable = state;
if (!state)
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
WRITE8_MEMBER(hnayayoi_state::adpcm_reset_inv_w)
WRITE_LINE_MEMBER(hnayayoi_state::nmi_clock_w)
{
m_msm->reset_w(~data & 1);
if (m_nmi_enable)
m_maincpu->set_input_line(INPUT_LINE_NMI, state);
}
@ -113,8 +121,7 @@ static ADDRESS_MAP_START( hnayayoi_io_map, AS_IO, 8, hnayayoi_state )
// AM_RANGE(0x09, 0x09) AM_WRITENOP // CRT Controller
AM_RANGE(0x0a, 0x0a) AM_WRITE(dynax_blitter_rev1_start_w)
AM_RANGE(0x0c, 0x0c) AM_WRITE(dynax_blitter_rev1_clear_w)
AM_RANGE(0x23, 0x23) AM_WRITE(adpcm_vclk_w)
AM_RANGE(0x24, 0x24) AM_WRITE(adpcm_reset_w)
AM_RANGE(0x20, 0x27) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x40, 0x40) AM_WRITE(keyboard_w)
AM_RANGE(0x41, 0x41) AM_READ(keyboard_0_r)
AM_RANGE(0x42, 0x42) AM_READ(keyboard_1_r)
@ -135,8 +142,7 @@ static ADDRESS_MAP_START( hnfubuki_map, AS_PROGRAM, 8, hnayayoi_state )
// AM_RANGE(0xff09, 0xff09) AM_WRITENOP // CRT Controller
AM_RANGE(0xff0a, 0xff0a) AM_WRITE(dynax_blitter_rev1_start_w)
AM_RANGE(0xff0c, 0xff0c) AM_WRITE(dynax_blitter_rev1_clear_w)
AM_RANGE(0xff23, 0xff23) AM_WRITE(adpcm_vclk_w)
AM_RANGE(0xff24, 0xff24) AM_WRITE(adpcm_reset_inv_w)
AM_RANGE(0xff20, 0xff27) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xff40, 0xff40) AM_WRITE(keyboard_w)
AM_RANGE(0xff41, 0xff41) AM_READ(keyboard_0_r)
AM_RANGE(0xff42, 0xff42) AM_READ(keyboard_1_r)
@ -165,8 +171,7 @@ static ADDRESS_MAP_START( untoucha_io_map, AS_IO, 8, hnayayoi_state )
AM_RANGE(0x1a, 0x1f) AM_WRITE(dynax_blitter_rev1_param_w)
AM_RANGE(0x20, 0x20) AM_WRITE(dynax_blitter_rev1_clear_w)
AM_RANGE(0x28, 0x28) AM_WRITE(dynax_blitter_rev1_start_w)
AM_RANGE(0x31, 0x31) AM_WRITE(adpcm_vclk_w)
AM_RANGE(0x32, 0x32) AM_WRITE(adpcm_reset_inv_w)
AM_RANGE(0x30, 0x37) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x50, 0x50) AM_DEVWRITE("ymsnd", ym2203_device, write_port_w)
AM_RANGE(0x51, 0x51) AM_DEVREAD("ymsnd", ym2203_device, read_port_r)
// AM_RANGE(0x52, 0x52) AM_WRITENOP // CRT Controller
@ -519,13 +524,11 @@ void hnayayoi_state::machine_start()
save_item(NAME(m_blit_dest));
save_item(NAME(m_blit_src));
save_item(NAME(m_keyb));
save_item(NAME(m_nmi_enable));
}
void hnayayoi_state::machine_reset()
{
/* start with the MSM5205 reset */
m_msm->reset_w(1);
m_palbank = 0;
m_blit_layer = 0;
m_blit_dest = 0;
@ -541,11 +544,18 @@ static MACHINE_CONFIG_START( hnayayoi )
MCFG_CPU_PROGRAM_MAP(hnayayoi_map)
MCFG_CPU_IO_MAP(hnayayoi_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", hnayayoi_state, irq0_line_hold)
MCFG_CPU_PERIODIC_INT_DRIVER(hnayayoi_state, nmi_line_pulse, 8000)
MCFG_DEVICE_ADD("nmiclock", CLOCK, 8000)
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(hnayayoi_state, nmi_clock_w))
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(hnayayoi_state, coin_counter_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE("msm", msm5205_device, reset_w)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("msm", msm5205_device, vclk_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(hnayayoi_state, nmi_enable_w)) MCFG_DEVCB_INVERT
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -577,6 +587,10 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( hnfubuki, hnayayoi )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(hnfubuki_map)
MCFG_DEVICE_REMOVE_ADDRESS_MAP(AS_IO)
MCFG_DEVICE_MODIFY("mainlatch") // D5
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(hnayayoi_state, nmi_enable_w))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( untoucha, hnayayoi )
@ -584,6 +598,12 @@ static MACHINE_CONFIG_DERIVED( untoucha, hnayayoi )
MCFG_CPU_PROGRAM_MAP(untoucha_map)
MCFG_CPU_IO_MAP(untoucha_io_map)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("msm", msm5205_device, vclk_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(hnayayoi_state, nmi_enable_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("msm", msm5205_device, reset_w)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(NOOP) // ?
MCFG_VIDEO_START_OVERRIDE(hnayayoi_state,untoucha)
MACHINE_CONFIG_END

20
src/mame/drivers/holeland.cpp
View File

@ -25,13 +25,17 @@
#include "speaker.h"
WRITE_LINE_MEMBER(holeland_state::coin_counter_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
static ADDRESS_MAP_START( holeland_map, AS_PROGRAM, 8, holeland_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_RAM
AM_RANGE(0xa000, 0xbfff) AM_ROM
AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("speech", sp0256_device, ald_w)
AM_RANGE(0xc000, 0xc001) AM_WRITE(pal_offs_w)
AM_RANGE(0xc006, 0xc007) AM_WRITE(flipscreen_w)
AM_RANGE(0xc000, 0xc007) AM_DEVWRITE("latch", ls259_device, write_d0) AM_READNOP
AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(colorram_w) AM_SHARE("colorram")
AM_RANGE(0xe400, 0xe7ff) AM_RAM_WRITE(videoram_w) AM_SHARE("videoram")
AM_RANGE(0xf000, 0xf3ff) AM_RAM AM_SHARE("spriteram")
@ -44,7 +48,7 @@ static ADDRESS_MAP_START( crzrally_map, AS_PROGRAM, 8, holeland_state )
AM_RANGE(0xe400, 0xe7ff) AM_RAM_WRITE(videoram_w) AM_SHARE("videoram")
AM_RANGE(0xe800, 0xebff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xf000, 0xf000) AM_WRITE(scroll_w)
AM_RANGE(0xf800, 0xf801) AM_WRITE(pal_offs_w)
AM_RANGE(0xf800, 0xf807) AM_DEVWRITE("latch", ls259_device, write_d0)
ADDRESS_MAP_END
static ADDRESS_MAP_START( io_map, AS_IO, 8, holeland_state )
@ -276,6 +280,12 @@ static MACHINE_CONFIG_START( holeland )
MCFG_CPU_IO_MAP(io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", holeland_state, irq0_line_hold)
MCFG_DEVICE_ADD("latch", LS259, 0) // 3J
MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(WRITE8(holeland_state, pal_offs_w)) MCFG_DEVCB_MASK(0x03)
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(holeland_state, coin_counter_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(holeland_state, flipscreen_x_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(holeland_state, flipscreen_y_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
@ -353,6 +363,10 @@ static MACHINE_CONFIG_START( crzrally )
MCFG_NVRAM_ADD_1FILL("nvram")
MCFG_DEVICE_ADD("latch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(WRITE8(holeland_state, pal_offs_w)) MCFG_DEVCB_MASK(0x03)
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(holeland_state, coin_counter_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

27
src/mame/drivers/jedi.cpp
View File

@ -114,6 +114,7 @@
#include "emu.h"
#include "cpu/m6502/m6502.h"
#include "machine/74259.h"
#include "machine/nvram.h"
#include "machine/watchdog.h"
#include "includes/jedi.h"
@ -226,9 +227,15 @@ WRITE8_MEMBER(jedi_state::a2d_select_w)
}
WRITE8_MEMBER(jedi_state::jedi_coin_counter_w)
WRITE_LINE_MEMBER(jedi_state::coin_counter_left_w)
{
machine().bookkeeping().coin_counter_w(offset, data);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(jedi_state::coin_counter_right_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
@ -273,12 +280,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, jedi_state )
AM_RANGE(0x1d00, 0x1d00) AM_MIRROR(0x007f) AM_NOP /* write: NVRAM store */
AM_RANGE(0x1d80, 0x1d80) AM_MIRROR(0x007f) AM_READNOP AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x1e00, 0x1e00) AM_MIRROR(0x007f) AM_READNOP AM_WRITE(main_irq_ack_w)
AM_RANGE(0x1e80, 0x1e81) AM_MIRROR(0x0078) AM_READNOP AM_WRITE(jedi_coin_counter_w)
AM_RANGE(0x1e82, 0x1e83) AM_MIRROR(0x0078) AM_NOP /* write: LED control - not used */
AM_RANGE(0x1e84, 0x1e84) AM_MIRROR(0x0078) AM_READNOP AM_WRITEONLY AM_SHARE("foreground_bank")
AM_RANGE(0x1e85, 0x1e85) AM_MIRROR(0x0078) AM_NOP
AM_RANGE(0x1e86, 0x1e86) AM_MIRROR(0x0078) AM_READNOP AM_WRITE(jedi_audio_reset_w)
AM_RANGE(0x1e87, 0x1e87) AM_MIRROR(0x0078) AM_READNOP AM_WRITEONLY AM_SHARE("video_off")
AM_RANGE(0x1e80, 0x1e87) AM_MIRROR(0x0078) AM_READNOP AM_DEVWRITE("outlatch", ls259_device, write_d7)
AM_RANGE(0x1f00, 0x1f00) AM_MIRROR(0x007f) AM_READNOP AM_WRITE(jedi_audio_latch_w)
AM_RANGE(0x1f80, 0x1f80) AM_MIRROR(0x007f) AM_READNOP AM_WRITE(rom_banksel_w)
AM_RANGE(0x2000, 0x27ff) AM_RAM AM_SHARE("backgroundram")
@ -343,6 +345,15 @@ static MACHINE_CONFIG_START( jedi )
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_ADD("outlatch", LS259, 0) // 14J
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(jedi_state, coin_counter_left_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(jedi_state, coin_counter_right_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(NOOP) // LED control - not used
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(NOOP) // LED control - not used
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(jedi_state, foreground_bank_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(jedi_state, audio_reset_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(jedi_state, video_off_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

29
src/mame/drivers/joctronic.cpp
View File

@ -1,11 +1,12 @@
// license:BSD-3-Clause
// copyright-holders:Ivan Vangelista
// copyright-holders:AJR
// PINBALL
// Skeleton driver for Joctronic pinballs.
#include "emu.h"
#include "cpu/z80/z80.h"
#include "machine/74157.h"
#include "machine/74259.h"
#include "machine/nvram.h"
#include "machine/z80ctc.h"
#include "sound/ay8910.h"
@ -23,6 +24,7 @@ public:
, m_soundcpu(*this, "soundcpu")
, m_oki(*this, "oki")
, m_adpcm_select(*this, "adpcm_select")
, m_driver_latch(*this, "drivers%u", 1)
, m_soundbank(*this, "soundbank")
{ }
@ -63,6 +65,7 @@ private:
required_device<cpu_device> m_soundcpu;
optional_device<msm5205_device> m_oki;
optional_device<ls157_device> m_adpcm_select;
optional_device_array<hc259_device, 6> m_driver_latch;
optional_memory_bank m_soundbank;
u8 m_soundlatch;
bool m_adpcm_toggle;
@ -124,7 +127,7 @@ static ADDRESS_MAP_START( maincpu_map, AS_PROGRAM, 8, joctronic_state )
AM_RANGE(0x0000, 0x3fff) AM_MIRROR(0x4000) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x0800) AM_RAM AM_SHARE("nvram")
AM_RANGE(0x9000, 0x9007) AM_MIRROR(0x0ff8) AM_READ(csin_r) // CSIN
AM_RANGE(0xa000, 0xa007) AM_MIRROR(0x0ff8) AM_WRITE(control_port_w) // PORTDS
AM_RANGE(0xa000, 0xa007) AM_MIRROR(0x0ff8) AM_DEVWRITE("mainlatch", ls259_device, write_d0) // PORTDS
AM_RANGE(0xc000, 0xc000) AM_MIRROR(0x0fc7) AM_WRITE(display_1_w) // CSD1
AM_RANGE(0xc008, 0xc008) AM_MIRROR(0x0fc7) AM_WRITE(display_2_w) // CSD2
AM_RANGE(0xc010, 0xc010) AM_MIRROR(0x0fc7) AM_WRITE(display_3_w) // CSD3
@ -159,7 +162,8 @@ WRITE8_MEMBER(joctronic_state::display_strobe_w)
WRITE8_MEMBER(joctronic_state::drivers_w)
{
logerror("drivers[%d] = $%02X\n", offset, data);
for (int i = 0; i < 6; ++i)
m_driver_latch[i]->write_bit(offset, BIT(data, i));
}
WRITE8_MEMBER(joctronic_state::display_ck_w)
@ -171,7 +175,7 @@ static ADDRESS_MAP_START( slalom03_maincpu_map, AS_PROGRAM, 8, joctronic_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x87ff) AM_MIRROR(0x0800) AM_RAM AM_SHARE("nvram")
AM_RANGE(0x9000, 0x9007) AM_MIRROR(0x0ff8) AM_WRITE(control_port_w) // CSPORT
AM_RANGE(0x9000, 0x9007) AM_MIRROR(0x0ff8) AM_DEVWRITE("mainlatch", ls259_device, write_d0) // CSPORT
AM_RANGE(0xa008, 0xa008) AM_MIRROR(0x0fc7) AM_WRITE(display_strobe_w) // STROBE
AM_RANGE(0xa010, 0xa017) AM_MIRROR(0x0fc0) AM_WRITE(drivers_w)
AM_RANGE(0xa018, 0xa018) AM_MIRROR(0x0fc7) AM_WRITE(display_ck_w) // CKD
@ -326,6 +330,11 @@ static MACHINE_CONFIG_START( joctronic )
MCFG_NVRAM_ADD_0FILL("nvram") // 5516
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // IC4 - exact type unknown
//MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(WRITE8(joctronic_state, display_select_w)) MCFG_DEVCB_MASK(0x07)
//MCFG_DEVCB_CHAIN_OUTPUT(WRITE8(joctronic_state, ls145_w)) MCFG_DEVCB_RSHIFT(4)
//MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(joctronic_state, display_reset_w))
MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_12MHz/4) // 3 MHz
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_Z80CTC_ZC0_CB(ASSERTLINE("soundcpu", INPUT_LINE_IRQ0)) // SINT
@ -362,10 +371,22 @@ static MACHINE_CONFIG_START( slalom03 )
MCFG_NVRAM_ADD_0FILL("nvram") // 5516
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // IC6 - exact type unknown
//MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(joctronic_state, cont_w))
//MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(WRITE8(joctronic_state, ls145_w)) MCFG_DEVCB_RSHIFT(3) MCFG_DEVCB_MASK(0x38)
//MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(joctronic_state, slalom03_reset_w))
MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL_12MHz/2) // 6 MHz
MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
//MCFG_Z80CTC_ZC0_CB(ASSERTLINE("soundcpu", INPUT_LINE_IRQ0)) // SINT
MCFG_DEVICE_ADD("drivers1", HC259, 0)
MCFG_DEVICE_ADD("drivers2", HC259, 0)
MCFG_DEVICE_ADD("drivers3", HC259, 0)
MCFG_DEVICE_ADD("drivers4", HC259, 0)
MCFG_DEVICE_ADD("drivers5", HC259, 0)
MCFG_DEVICE_ADD("drivers6", HC259, 0)
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")

34
src/mame/drivers/jrpacman.cpp
View File

@ -104,6 +104,7 @@
#include "includes/pacman.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "screen.h"
#include "speaker.h"
@ -114,7 +115,7 @@ public:
jrpacman_state(const machine_config &mconfig, device_type type, const char *tag)
: pacman_state(mconfig, type, tag) { }
DECLARE_WRITE8_MEMBER(jrpacman_interrupt_vector_w);
DECLARE_WRITE8_MEMBER(irq_mask_w);
DECLARE_WRITE_LINE_MEMBER(irq_mask_w);
DECLARE_DRIVER_INIT(jrpacman);
INTERRUPT_GEN_MEMBER(vblank_irq);
};
@ -127,9 +128,9 @@ WRITE8_MEMBER(jrpacman_state::jrpacman_interrupt_vector_w)
m_maincpu->set_input_line(0, CLEAR_LINE);
}
WRITE8_MEMBER(jrpacman_state::irq_mask_w)
WRITE_LINE_MEMBER(jrpacman_state::irq_mask_w)
{
m_irq_mask = data & 1;
m_irq_mask = state;
}
/*************************************
@ -144,20 +145,14 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, jrpacman_state )
AM_RANGE(0x4800, 0x4fef) AM_RAM
AM_RANGE(0x4ff0, 0x4fff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5000, 0x503f) AM_READ_PORT("P1")
AM_RANGE(0x5000, 0x5000) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5003, 0x5003) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5000, 0x5007) AM_DEVWRITE("latch1", ls259_device, write_d0)
AM_RANGE(0x5040, 0x507f) AM_READ_PORT("P2")
AM_RANGE(0x5040, 0x505f) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x5060, 0x506f) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x5070, 0x5070) AM_WRITE(pengo_palettebank_w)
AM_RANGE(0x5071, 0x5071) AM_WRITE(pengo_colortablebank_w)
AM_RANGE(0x5073, 0x5073) AM_WRITE(jrpacman_bgpriority_w)
AM_RANGE(0x5074, 0x5074) AM_WRITE(jrpacman_charbank_w)
AM_RANGE(0x5075, 0x5075) AM_WRITE(jrpacman_spritebank_w)
AM_RANGE(0x5070, 0x5077) AM_DEVWRITE("latch2", ls259_device, write_d0)
AM_RANGE(0x5080, 0x50bf) AM_READ_PORT("DSW")
AM_RANGE(0x5080, 0x5080) AM_WRITE(jrpacman_scroll_w)
AM_RANGE(0x50c0, 0x50c0) AM_WRITENOP
AM_RANGE(0x50c0, 0x50c0) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x8000, 0xdfff) AM_ROM
ADDRESS_MAP_END
@ -283,6 +278,21 @@ static MACHINE_CONFIG_START( jrpacman )
MCFG_CPU_IO_MAP(port_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", jrpacman_state, vblank_irq)
MCFG_DEVICE_ADD("latch1", LS259, 0) // 5P
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(jrpacman_state, irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("namco", namco_device, pacman_sound_enable_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(jrpacman_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(jrpacman_state, coin_counter_w))
MCFG_DEVICE_ADD("latch2", LS259, 0) // 1H
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(jrpacman_state, pengo_palettebank_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(jrpacman_state, pengo_colortablebank_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(jrpacman_state, jrpacman_bgpriority_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(jrpacman_state, jrpacman_charbank_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(jrpacman_state, jrpacman_spritebank_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60.606060)

38
src/mame/drivers/junofrst.cpp
View File

@ -86,6 +86,7 @@ Blitter source graphics
#include "cpu/m6809/m6809.h"
#include "cpu/mcs48/mcs48.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "machine/konami1.h"
#include "machine/watchdog.h"
@ -123,9 +124,6 @@ public:
DECLARE_WRITE8_MEMBER(sh_irqtrigger_w);
DECLARE_WRITE8_MEMBER(i8039_irq_w);
DECLARE_WRITE8_MEMBER(i8039_irqen_and_status_w);
DECLARE_WRITE8_MEMBER(flip_screen_w);
DECLARE_WRITE8_MEMBER(coincounter_w);
DECLARE_WRITE8_MEMBER(irq_enable_w);
DECLARE_READ8_MEMBER(portA_r);
DECLARE_WRITE8_MEMBER(portB_w);
@ -276,25 +274,6 @@ WRITE8_MEMBER(junofrst_state::i8039_irqen_and_status_w)
}
WRITE8_MEMBER(junofrst_state::flip_screen_w)
{
tutankhm_flip_screen_x_w(space, 0, data);
tutankhm_flip_screen_y_w(space, 0, data);
}
WRITE8_MEMBER(junofrst_state::coincounter_w)
{
machine().bookkeeping().coin_counter_w(offset, data);
}
WRITE8_MEMBER(junofrst_state::irq_enable_w)
{
m_irq_enable = data & 1;
if (!m_irq_enable)
m_maincpu->set_input_line(0, CLEAR_LINE);
}
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, junofrst_state )
AM_RANGE(0x0000, 0x7fff) AM_RAM AM_SHARE("videoram")
AM_RANGE(0x8000, 0x800f) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
@ -304,10 +283,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, junofrst_state )
AM_RANGE(0x8024, 0x8024) AM_READ_PORT("P1")
AM_RANGE(0x8028, 0x8028) AM_READ_PORT("P2")
AM_RANGE(0x802c, 0x802c) AM_READ_PORT("DSW1")
AM_RANGE(0x8030, 0x8030) AM_WRITE(irq_enable_w)
AM_RANGE(0x8031, 0x8032) AM_WRITE(coincounter_w)
AM_RANGE(0x8033, 0x8033) AM_WRITEONLY AM_SHARE("scroll") /* not used in Juno */
AM_RANGE(0x8034, 0x8035) AM_WRITE(flip_screen_w)
AM_RANGE(0x8030, 0x8037) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x8040, 0x8040) AM_WRITE(sh_irqtrigger_w)
AM_RANGE(0x8050, 0x8050) AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
AM_RANGE(0x8060, 0x8060) AM_WRITE(bankselect_w)
@ -394,8 +370,6 @@ MACHINE_RESET_MEMBER(junofrst_state,junofrst)
{
m_i8039_status = 0;
m_last_irq = 0;
m_flip_x = 0;
m_flip_y = 0;
m_blitterdata[0] = 0;
m_blitterdata[1] = 0;
m_blitterdata[2] = 0;
@ -426,6 +400,14 @@ static MACHINE_CONFIG_START( junofrst )
MCFG_MCS48_PORT_P1_OUT_CB(DEVWRITE8("dac", dac_byte_interface, write))
MCFG_MCS48_PORT_P2_OUT_CB(WRITE8(junofrst_state, i8039_irqen_and_status_w))
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // B3
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(junofrst_state, irq_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(junofrst_state, coin_counter_2_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(junofrst_state, coin_counter_1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(NOOP)
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(junofrst_state, flip_screen_x_w)) // HFF
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(junofrst_state, flip_screen_y_w)) // VFLIP
MCFG_WATCHDOG_ADD("watchdog")
MCFG_MACHINE_START_OVERRIDE(junofrst_state,junofrst)

35
src/mame/drivers/kchamp.cpp
View File

@ -68,7 +68,7 @@ IO ports and memory map changes. Dip switches differ too.
#include "includes/kchamp.h"
#include "cpu/z80/z80.h"
#include "sound/ay8910.h"
#include "machine/74259.h"
#include "sound/volt_reg.h"
#include "screen.h"
#include "speaker.h"
@ -78,17 +78,22 @@ IO ports and memory map changes. Dip switches differ too.
* VS Version *
********************/
WRITE8_MEMBER(kchamp_state::control_w)
WRITE_LINE_MEMBER(kchamp_state::nmi_enable_w)
{
m_nmi_enable = data & 1;
m_nmi_enable = state;
if (!m_nmi_enable)
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
WRITE8_MEMBER(kchamp_state::sound_reset_w)
WRITE_LINE_MEMBER(kchamp_state::sound_reset_w)
{
if (!(data & 1))
m_audiocpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
m_audiocpu->set_input_line(INPUT_LINE_RESET, state ? CLEAR_LINE : ASSERT_LINE);
if (!state)
{
m_ay[0]->reset();
m_ay[1]->reset();
sound_control_w(machine().dummy_space(), 0, 0);
}
}
WRITE8_MEMBER(kchamp_state::sound_control_w)
@ -115,9 +120,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( kchampvs_io_map, AS_IO, 8, kchamp_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ_PORT("P1") AM_WRITE(kchamp_flipscreen_w)
AM_RANGE(0x01, 0x01) AM_WRITE(control_w)
AM_RANGE(0x02, 0x02) AM_WRITE(sound_reset_w)
AM_RANGE(0x00, 0x00) AM_READ_PORT("P1")
AM_RANGE(0x00, 0x07) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x40, 0x40) AM_READ_PORT("P2") AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
AM_RANGE(0x80, 0x80) AM_READ_PORT("SYSTEM")
AM_RANGE(0xc0, 0xc0) AM_READ_PORT("DSW")
@ -170,8 +174,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( kchamp_io_map, AS_IO, 8, kchamp_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x80, 0x80) AM_READ_PORT("DSW") AM_WRITE(kchamp_flipscreen_w)
AM_RANGE(0x81, 0x81) AM_WRITE(control_w)
AM_RANGE(0x80, 0x80) AM_READ_PORT("DSW")
AM_RANGE(0x80, 0x87) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x90, 0x90) AM_READ_PORT("P1")
AM_RANGE(0x98, 0x98) AM_READ_PORT("P2")
AM_RANGE(0xa0, 0xa0) AM_READ_PORT("SYSTEM")
@ -404,6 +408,11 @@ static MACHINE_CONFIG_START( kchampvs )
MCFG_CPU_IO_MAP(kchampvs_sound_io_map) /* irq's triggered from main cpu */
/* nmi's from msm5205 */
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 8C
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(kchamp_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(kchamp_state, nmi_enable_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(kchamp_state, sound_reset_w))
MCFG_MACHINE_START_OVERRIDE(kchamp_state,kchampvs)
/* video hardware */
@ -460,6 +469,10 @@ static MACHINE_CONFIG_START( kchamp )
/* irq's triggered from main cpu */
/* nmi's from 125 Hz clock */
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(kchamp_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(kchamp_state, nmi_enable_w))
MCFG_MACHINE_START_OVERRIDE(kchamp_state,kchamp)
/* video hardware */

23
src/mame/drivers/kyugo.cpp
View File

@ -27,6 +27,7 @@
#include "includes/kyugo.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/watchdog.h"
#include "sound/ay8910.h"
#include "screen.h"
@ -65,21 +66,14 @@ ADDRESS_MAP_END
*
*************************************/
WRITE8_MEMBER(kyugo_state::kyugo_nmi_mask_w)
WRITE_LINE_MEMBER(kyugo_state::nmi_mask_w)
{
m_nmi_mask = data & 1;
}
WRITE8_MEMBER(kyugo_state::kyugo_sub_cpu_control_w)
{
m_subcpu->set_input_line(INPUT_LINE_HALT, data ? CLEAR_LINE : ASSERT_LINE);
m_nmi_mask = state;
}
static ADDRESS_MAP_START( kyugo_main_portmap, AS_IO, 8, kyugo_state )
ADDRESS_MAP_GLOBAL_MASK(0x07)
AM_RANGE(0x00, 0x00) AM_WRITE(kyugo_nmi_mask_w)
AM_RANGE(0x01, 0x01) AM_WRITE(kyugo_flipscreen_w)
AM_RANGE(0x02, 0x02) AM_WRITE(kyugo_sub_cpu_control_w)
AM_RANGE(0x00, 0x07) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
ADDRESS_MAP_END
@ -499,11 +493,6 @@ void kyugo_state::machine_start()
void kyugo_state::machine_reset()
{
address_space &space = m_maincpu->space(AS_PROGRAM);
// must start with interrupts and sub CPU disabled
m_nmi_mask = 0;
kyugo_sub_cpu_control_w(space, 0, 0);
m_scroll_x_lo = 0;
m_scroll_x_hi = 0;
m_scroll_y = 0;
@ -533,6 +522,10 @@ static MACHINE_CONFIG_START( kyugo_base )
MCFG_QUANTUM_TIME(attotime::from_hz(6000))
MCFG_DEVICE_ADD("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(kyugo_state, nmi_mask_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(kyugo_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

6
src/mame/drivers/ladybug.cpp
View File

@ -64,6 +64,7 @@ TODO:
#include "includes/ladybug.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "sound/sn76496.h"
#include "screen.h"
#include "speaker.h"
@ -78,7 +79,7 @@ static ADDRESS_MAP_START( ladybug_map, AS_PROGRAM, 8, ladybug_state )
AM_RANGE(0x9001, 0x9001) AM_READ_PORT("IN1")
AM_RANGE(0x9002, 0x9002) AM_READ_PORT("DSW0")
AM_RANGE(0x9003, 0x9003) AM_READ_PORT("DSW1")
AM_RANGE(0xa000, 0xa000) AM_WRITE(ladybug_flipscreen_w)
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("videolatch", ls259_device, write_d0)
AM_RANGE(0xb000, 0xbfff) AM_DEVWRITE("sn1", sn76489_device, write)
AM_RANGE(0xc000, 0xcfff) AM_DEVWRITE("sn2", sn76489_device, write)
AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(ladybug_videoram_w) AM_SHARE("videoram")
@ -535,6 +536,9 @@ static MACHINE_CONFIG_START( ladybug )
MCFG_PALETTE_INDIRECT_ENTRIES(32)
MCFG_PALETTE_INIT_OWNER(ladybug_state,ladybug)
MCFG_DEVICE_ADD("videolatch", LS259, 0) // L5 on video board or H3 on single board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(ladybug_state, flipscreen_w)) // no other outputs used
MCFG_VIDEO_START_OVERRIDE(ladybug_state,ladybug)
/* sound hardware */

52
src/mame/drivers/liberatr.cpp
View File

@ -168,15 +168,33 @@ void liberatr_state::machine_reset()
*
*************************************/
WRITE8_MEMBER( liberatr_state::led_w )
WRITE8_MEMBER(liberatr_state::output_latch_w)
{
output().set_led_value(offset, ~data & 0x10);
m_outlatch->write_bit(offset, BIT(data, 4));
}
WRITE8_MEMBER( liberatr_state::coin_counter_w )
WRITE_LINE_MEMBER(liberatr_state::start_led_1_w)
{
machine().bookkeeping().coin_counter_w(offset ^ 0x01, data & 0x10);
output().set_led_value(0, !state);
}
WRITE_LINE_MEMBER(liberatr_state::start_led_2_w)
{
output().set_led_value(1, !state);
}
WRITE_LINE_MEMBER(liberatr_state::coin_counter_left_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(liberatr_state::coin_counter_right_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
@ -187,17 +205,17 @@ WRITE8_MEMBER( liberatr_state::coin_counter_w )
*
*************************************/
WRITE8_MEMBER( liberatr_state::trackball_reset_w )
WRITE_LINE_MEMBER(liberatr_state::trackball_reset_w)
{
/* on the rising edge of /ctrld, the /ld signal on the LS191 is released and the value of the switches */
/* input becomes the starting point for the trackball counters */
if (((data ^ m_ctrld) & 0x10) && (data & 0x10))
if (!m_ctrld && state)
{
uint8_t trackball = ioport("FAKE")->read();
uint8_t switches = ioport("IN0")->read();
m_trackball_offset = ((trackball & 0xf0) - (switches & 0xf0)) | ((trackball - switches) & 0x0f);
}
m_ctrld = data & 0x10;
m_ctrld = state;
}
@ -279,10 +297,7 @@ static ADDRESS_MAP_START( liberatr_map, AS_PROGRAM, 8, liberatr_state )
AM_RANGE(0x6600, 0x6600) AM_WRITE(earom_control_w)
AM_RANGE(0x6800, 0x6800) AM_WRITEONLY AM_SHARE("planet_frame")
AM_RANGE(0x6a00, 0x6a00) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x6c00, 0x6c01) AM_WRITE(led_w)
AM_RANGE(0x6c04, 0x6c04) AM_WRITE(trackball_reset_w)
AM_RANGE(0x6c05, 0x6c06) AM_WRITE(coin_counter_w)
AM_RANGE(0x6c07, 0x6c07) AM_WRITEONLY AM_SHARE("planet_select")
AM_RANGE(0x6c00, 0x6c07) AM_WRITE(output_latch_w)
AM_RANGE(0x6e00, 0x6e3f) AM_WRITE(earom_w)
AM_RANGE(0x7000, 0x701f) AM_DEVREADWRITE("pokey2", pokey_device, read, write)
AM_RANGE(0x7800, 0x781f) AM_DEVREADWRITE("pokey1", pokey_device, read, write)
@ -312,10 +327,7 @@ static ADDRESS_MAP_START( liberat2_map, AS_PROGRAM, 8, liberatr_state )
AM_RANGE(0x4800, 0x483f) AM_READ(earom_r)
AM_RANGE(0x4800, 0x4800) AM_WRITEONLY AM_SHARE("planet_frame")
AM_RANGE(0x4a00, 0x4a00) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x4c00, 0x4c01) AM_WRITE(led_w)
AM_RANGE(0x4c04, 0x4c04) AM_WRITE(trackball_reset_w)
AM_RANGE(0x4c05, 0x4c06) AM_WRITE(coin_counter_w)
AM_RANGE(0x4c07, 0x4c07) AM_WRITEONLY AM_SHARE("planet_select")
AM_RANGE(0x4c00, 0x4c07) AM_WRITE(output_latch_w)
AM_RANGE(0x4e00, 0x4e3f) AM_WRITE(earom_w)
AM_RANGE(0x5000, 0x501f) AM_DEVREADWRITE("pokey2", pokey_device, read, write)
AM_RANGE(0x5800, 0x581f) AM_DEVREADWRITE("pokey1", pokey_device, read, write)
@ -424,6 +436,16 @@ static MACHINE_CONFIG_START( liberatr )
MCFG_ER2055_ADD("earom")
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(liberatr_state, start_led_1_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(liberatr_state, start_led_2_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(NOOP) // TBSWP
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(NOOP) // SPARE
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(liberatr_state, trackball_reset_w)) // CTRLD
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(liberatr_state, coin_counter_right_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(liberatr_state, coin_counter_left_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(liberatr_state, planet_select_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

10
src/mame/drivers/lisa.cpp
View File

@ -112,6 +112,16 @@ static MACHINE_CONFIG_START( lisa )
MCFG_QUANTUM_TIME(attotime::from_hz(60))
MCFG_DEVICE_ADD("latch", LS259, 0) // U4E
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(lisa_state, diag1_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(lisa_state, diag2_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(lisa_state, seg1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(lisa_state, seg2_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(lisa_state, setup_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(lisa_state, sfmsk_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(lisa_state, vtmsk_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(lisa_state, hdmsk_w))
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
MCFG_SCREEN_REFRESH_RATE(60)

125
src/mame/drivers/looping.cpp
View File

@ -58,6 +58,7 @@ L056-6 9A " " VLI-8-4 7A "
#include "cpu/cop400/cop400.h"
#include "cpu/tms9900/tms9995.h"
#include "cpu/tms9900/tms9980a.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "machine/watchdog.h"
#include "sound/ay8910.h"
@ -115,7 +116,8 @@ public:
m_dac(*this, "dac"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_soundlatch(*this, "soundlatch") { }
m_soundlatch(*this, "soundlatch"),
m_watchdog(*this, "watchdog") { }
/* memory pointers */
required_shared_ptr<uint8_t> m_videoram;
@ -126,33 +128,29 @@ public:
/* tilemaps */
tilemap_t * m_bg_tilemap;
/* sound state */
uint8_t m_sound[8];
int m_last;
DECLARE_WRITE8_MEMBER(flip_screen_x_w);
DECLARE_WRITE8_MEMBER(flip_screen_y_w);
DECLARE_WRITE_LINE_MEMBER(flip_screen_x_w);
DECLARE_WRITE_LINE_MEMBER(flip_screen_y_w);
DECLARE_WRITE8_MEMBER(looping_videoram_w);
DECLARE_WRITE8_MEMBER(looping_colorram_w);
DECLARE_WRITE8_MEMBER(level2_irq_set);
DECLARE_WRITE8_MEMBER(main_irq_ack_w);
DECLARE_WRITE8_MEMBER(looping_souint_clr);
DECLARE_WRITE_LINE_MEMBER(level2_irq_set);
DECLARE_WRITE_LINE_MEMBER(main_irq_ack_w);
DECLARE_WRITE_LINE_MEMBER(watchdog_w);
DECLARE_WRITE_LINE_MEMBER(looping_souint_clr);
DECLARE_WRITE8_MEMBER(looping_soundlatch_w);
DECLARE_WRITE8_MEMBER(ballon_enable_w);
DECLARE_WRITE_LINE_MEMBER(ballon_enable_w);
DECLARE_WRITE8_MEMBER(out_0_w);
DECLARE_WRITE8_MEMBER(out_2_w);
DECLARE_READ8_MEMBER(adc_r);
DECLARE_WRITE8_MEMBER(adc_w);
DECLARE_WRITE8_MEMBER(plr2_w);
DECLARE_WRITE_LINE_MEMBER(plr2_w);
DECLARE_READ8_MEMBER(cop_unk_r);
DECLARE_READ_LINE_MEMBER(cop_serial_r);
DECLARE_WRITE8_MEMBER(cop_l_w);
DECLARE_READ8_MEMBER(protection_r);
DECLARE_WRITE_LINE_MEMBER(looping_spcint);
DECLARE_WRITE8_MEMBER(looping_sound_sw);
DECLARE_WRITE8_MEMBER(ay_enable_w);
DECLARE_WRITE8_MEMBER(speech_enable_w);
DECLARE_WRITE_LINE_MEMBER(ay_enable_w);
DECLARE_WRITE_LINE_MEMBER(speech_enable_w);
DECLARE_DRIVER_INIT(looping);
TILE_GET_INFO_MEMBER(get_tile_info);
virtual void machine_start() override;
@ -168,6 +166,7 @@ public:
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
required_device<generic_latch_8_device> m_soundlatch;
required_device<watchdog_timer_device> m_watchdog;
};
@ -248,16 +247,16 @@ void looping_state::video_start()
*
*************************************/
WRITE8_MEMBER(looping_state::flip_screen_x_w)
WRITE_LINE_MEMBER(looping_state::flip_screen_x_w)
{
flip_screen_x_set(~data & 0x01);
flip_screen_x_set(!state);
m_bg_tilemap->set_scrollx(0, flip_screen() ? 128 : 0);
}
WRITE8_MEMBER(looping_state::flip_screen_y_w)
WRITE_LINE_MEMBER(looping_state::flip_screen_y_w)
{
flip_screen_y_set(~data & 0x01);
flip_screen_y_set(!state);
m_bg_tilemap->set_scrollx(0, flip_screen() ? 128 : 0);
}
@ -345,7 +344,6 @@ uint32_t looping_state::screen_update_looping(screen_device &screen, bitmap_ind1
void looping_state::machine_start()
{
save_item(NAME(m_sound));
}
void looping_state::machine_reset()
@ -366,25 +364,30 @@ INTERRUPT_GEN_MEMBER(looping_state::looping_interrupt)
}
WRITE8_MEMBER(looping_state::level2_irq_set)
WRITE_LINE_MEMBER(looping_state::level2_irq_set)
{
logerror("Level 2 int = %d\n", data);
if (!(data & 1))
logerror("Level 2 int = %d\n", state);
if (state == 0)
m_maincpu->set_input_line(INT_9995_INT1, ASSERT_LINE);
}
WRITE8_MEMBER(looping_state::main_irq_ack_w)
WRITE_LINE_MEMBER(looping_state::main_irq_ack_w)
{
if (data == 0)
if (state == 0)
m_maincpu->set_input_line(INT_9995_INT1, CLEAR_LINE);
}
WRITE8_MEMBER(looping_state::looping_souint_clr)
WRITE_LINE_MEMBER(looping_state::watchdog_w)
{
logerror("Soundint clr = %d\n", data);
if (data == 0)
m_watchdog->watchdog_reset();
}
WRITE_LINE_MEMBER(looping_state::looping_souint_clr)
{
logerror("Soundint clr = %d\n", state);
if (state == 0)
m_audiocpu->set_input_line(0, CLEAR_LINE);
}
@ -421,8 +424,7 @@ WRITE8_MEMBER(looping_state::looping_sound_sw)
0007 = AFA
*/
m_sound[offset + 1] = data ^ 1;
m_dac->write(((m_sound[2] << 1) + m_sound[3]) * m_sound[7]);
m_dac->write(((BIT(~data, 2) << 1) + BIT(~data, 3)) * BIT(~data, 7));
}
@ -433,7 +435,7 @@ WRITE8_MEMBER(looping_state::looping_sound_sw)
*
*************************************/
WRITE8_MEMBER(looping_state::ay_enable_w)
WRITE_LINE_MEMBER(looping_state::ay_enable_w)
{
device_t *device = machine().device("aysnd");
int output;
@ -441,24 +443,22 @@ WRITE8_MEMBER(looping_state::ay_enable_w)
device_sound_interface *sound;
device->interface(sound);
for (output = 0; output < 3; output++)
sound->set_output_gain(output, (data & 1) ? 1.0 : 0.0);
sound->set_output_gain(output, state ? 1.0 : 0.0);
}
WRITE8_MEMBER(looping_state::speech_enable_w)
WRITE_LINE_MEMBER(looping_state::speech_enable_w)
{
device_t *device = machine().device("tms");
device_sound_interface *sound;
device->interface(sound);
sound->set_output_gain(0, (data & 1) ? 1.0 : 0.0);
sound->set_output_gain(0, state ? 1.0 : 0.0);
}
WRITE8_MEMBER(looping_state::ballon_enable_w)
WRITE_LINE_MEMBER(looping_state::ballon_enable_w)
{
if (m_last != data)
osd_printf_debug("ballon_enable_w = %d\n", data);
m_last = data;
osd_printf_debug("ballon_enable_w = %d\n", state);
}
@ -475,7 +475,7 @@ WRITE8_MEMBER(looping_state::out_2_w){ osd_printf_debug("out2 = %02X\n", data);
READ8_MEMBER(looping_state::adc_r){ osd_printf_debug("%04X:ADC read\n", space.device().safe_pc()); return 0xff; }
WRITE8_MEMBER(looping_state::adc_w){ osd_printf_debug("%04X:ADC write = %02X\n", space.device().safe_pc(), data); }
WRITE8_MEMBER(looping_state::plr2_w)
WRITE_LINE_MEMBER(looping_state::plr2_w)
{
/* set to 1 after IDLE, cleared to 0 during processing */
/* is this an LED on the PCB? */
@ -545,9 +545,7 @@ static ADDRESS_MAP_START( looping_map, AS_PROGRAM, 8, looping_state )
AM_RANGE(0x9840, 0x987f) AM_MIRROR(0x0700) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x9880, 0x98ff) AM_MIRROR(0x0700) AM_RAM
AM_RANGE(0xb001, 0xb001) AM_MIRROR(0x07f8) AM_WRITE(level2_irq_set)
AM_RANGE(0xb006, 0xb006) AM_MIRROR(0x07f8) AM_WRITE(flip_screen_x_w)
AM_RANGE(0xb007, 0xb007) AM_MIRROR(0x07f8) AM_WRITE(flip_screen_y_w)
AM_RANGE(0xb000, 0xb007) AM_MIRROR(0x07f8) AM_DEVWRITE("videolatch", ls259_device, write_d0)
AM_RANGE(0xe000, 0xefff) AM_RAM
AM_RANGE(0xf800, 0xf800) AM_MIRROR(0x03fc) AM_READ_PORT("P1") AM_WRITE(out_0_w) /* /OUT0 */
@ -557,14 +555,7 @@ static ADDRESS_MAP_START( looping_map, AS_PROGRAM, 8, looping_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( looping_io_map, AS_IO, 8, looping_state )
/* 400 = A16 */
/* 401 = A17 */
/* 402 = COLOR 9 */
AM_RANGE(0x403, 0x403) AM_WRITE(plr2_w)
/* 404 = C0 */
/* 405 = C1 */
AM_RANGE(0x406, 0x406) AM_WRITE(main_irq_ack_w)
AM_RANGE(0x407, 0x407) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x400, 0x407) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
ADDRESS_MAP_END
@ -582,12 +573,8 @@ static ADDRESS_MAP_START( looping_sound_map, AS_PROGRAM, 8, looping_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( looping_sound_io_map, AS_IO, 8, looping_state )
AM_RANGE(0x000, 0x000) AM_WRITE(looping_souint_clr)
AM_RANGE(0x001, 0x007) AM_WRITE(looping_sound_sw)
AM_RANGE(0x008, 0x008) AM_WRITE(ay_enable_w)
AM_RANGE(0x009, 0x009) AM_WRITE(speech_enable_w)
AM_RANGE(0x00a, 0x00a) AM_WRITE(ballon_enable_w)
AM_RANGE(0x00b, 0x00f) AM_NOP
AM_RANGE(0x000, 0x007) AM_DEVWRITE("sen0", ls259_device, write_d0)
AM_RANGE(0x008, 0x00f) AM_DEVWRITE("sen1", ls259_device, write_d0)
ADDRESS_MAP_END
@ -638,6 +625,16 @@ static MACHINE_CONFIG_START( looping )
MCFG_COP400_READ_IN_CB(READ8(looping_state, cop_unk_r))
MCFG_COP400_READ_SI_CB(READLINE(looping_state, cop_serial_r))
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // C9 on CPU board
// Q0 = A16
// Q1 = A17
// Q2 = COLOR 9
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(looping_state, plr2_w))
// Q4 = C0
// Q5 = C1
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(looping_state, main_irq_ack_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(looping_state, watchdog_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
@ -651,6 +648,11 @@ static MACHINE_CONFIG_START( looping )
MCFG_PALETTE_ADD("palette", 32)
MCFG_PALETTE_INIT_OWNER(looping_state, looping)
MCFG_DEVICE_ADD("videolatch", LS259, 0) // E2 on video board
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(looping_state, level2_irq_set))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(looping_state, flip_screen_x_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(looping_state, flip_screen_y_w))
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("speaker")
@ -667,6 +669,15 @@ static MACHINE_CONFIG_START( looping )
MCFG_SOUND_ADD("dac", DAC_2BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.15) // unknown DAC
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
MCFG_SOUND_ROUTE_EX(0, "dac", 1.0, DAC_VREF_POS_INPUT) MCFG_SOUND_ROUTE_EX(0, "dac", -1.0, DAC_VREF_NEG_INPUT)
MCFG_DEVICE_ADD("sen0", LS259, 0) // B3 on sound board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(looping_state, looping_souint_clr))
MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(WRITE8(looping_state, looping_sound_sw))
MCFG_DEVICE_ADD("sen1", LS259, 0) // A1 on sound board with outputs connected to 4016 at B1
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(looping_state, ay_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(looping_state, speech_enable_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(looping_state, ballon_enable_w))
MACHINE_CONFIG_END

74
src/mame/drivers/m63.cpp
View File

@ -120,6 +120,7 @@ Dip locations verified for:
#include "emu.h"
#include "cpu/z80/z80.h"
#include "cpu/mcs48/mcs48.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "sound/ay8910.h"
#include "sound/samples.h"
@ -182,10 +183,11 @@ public:
DECLARE_WRITE8_MEMBER(m63_videoram_w);
DECLARE_WRITE8_MEMBER(m63_colorram_w);
DECLARE_WRITE8_MEMBER(m63_videoram2_w);
DECLARE_WRITE8_MEMBER(m63_palbank_w);
DECLARE_WRITE8_MEMBER(m63_flipscreen_w);
DECLARE_WRITE8_MEMBER(fghtbskt_flipscreen_w);
DECLARE_WRITE8_MEMBER(coin_w);
DECLARE_WRITE_LINE_MEMBER(pal_bank_w);
DECLARE_WRITE_LINE_MEMBER(m63_flipscreen_w);
DECLARE_WRITE_LINE_MEMBER(fghtbskt_flipscreen_w);
DECLARE_WRITE_LINE_MEMBER(coin1_w);
DECLARE_WRITE_LINE_MEMBER(coin2_w);
DECLARE_WRITE8_MEMBER(snd_irq_w);
DECLARE_WRITE8_MEMBER(snddata_w);
DECLARE_WRITE8_MEMBER(p1_w);
@ -195,7 +197,7 @@ public:
DECLARE_READ8_MEMBER(snddata_r);
DECLARE_WRITE8_MEMBER(fghtbskt_samples_w);
SAMPLES_START_CB_MEMBER(fghtbskt_sh_start);
DECLARE_WRITE8_MEMBER(nmi_mask_w);
DECLARE_WRITE_LINE_MEMBER(nmi_mask_w);
DECLARE_DRIVER_INIT(wilytowr);
DECLARE_DRIVER_INIT(fghtbskt);
TILE_GET_INFO_MEMBER(get_bg_tile_info);
@ -285,27 +287,21 @@ WRITE8_MEMBER(m63_state::m63_videoram2_w)
m_fg_tilemap->mark_tile_dirty(offset);
}
WRITE8_MEMBER(m63_state::m63_palbank_w)
WRITE_LINE_MEMBER(m63_state::pal_bank_w)
{
if (m_pal_bank != (data & 0x01))
{
m_pal_bank = data & 0x01;
m_bg_tilemap->mark_all_dirty();
}
m_pal_bank = state;
m_bg_tilemap->mark_all_dirty();
}
WRITE8_MEMBER(m63_state::m63_flipscreen_w)
WRITE_LINE_MEMBER(m63_state::m63_flipscreen_w)
{
if (flip_screen() != (~data & 0x01))
{
flip_screen_set(~data & 0x01);
machine().tilemap().mark_all_dirty();
}
flip_screen_set(!state);
machine().tilemap().mark_all_dirty();
}
WRITE8_MEMBER(m63_state::fghtbskt_flipscreen_w)
WRITE_LINE_MEMBER(m63_state::fghtbskt_flipscreen_w)
{
flip_screen_set(data);
flip_screen_set(state);
m_fg_flag = flip_screen() ? TILE_FLIPX : 0;
}
@ -388,9 +384,14 @@ uint32_t m63_state::screen_update_m63(screen_device &screen, bitmap_ind16 &bitma
}
WRITE8_MEMBER(m63_state::coin_w)
WRITE_LINE_MEMBER(m63_state::coin1_w)
{
machine().bookkeeping().coin_counter_w(offset, data & 0x01);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(m63_state::coin2_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
WRITE8_MEMBER(m63_state::snd_irq_w)
@ -458,9 +459,9 @@ WRITE8_MEMBER(m63_state::fghtbskt_samples_w)
m_samples->start_raw(0, m_samplebuf.get() + ((data & 0xf0) << 8), 0x2000, 8000);
}
WRITE8_MEMBER(m63_state::nmi_mask_w)
WRITE_LINE_MEMBER(m63_state::nmi_mask_w)
{
m_nmi_mask = data & 1;
m_nmi_mask = state;
}
@ -473,10 +474,7 @@ static ADDRESS_MAP_START( m63_map, AS_PROGRAM, 8, m63_state )
AM_RANGE(0xe400, 0xe7ff) AM_RAM_WRITE(m63_videoram2_w) AM_SHARE("videoram2")
AM_RANGE(0xe800, 0xebff) AM_RAM_WRITE(m63_videoram_w) AM_SHARE("videoram")
AM_RANGE(0xec00, 0xefff) AM_RAM_WRITE(m63_colorram_w) AM_SHARE("colorram")
AM_RANGE(0xf000, 0xf000) AM_WRITE(nmi_mask_w)
AM_RANGE(0xf002, 0xf002) AM_WRITE(m63_flipscreen_w)
AM_RANGE(0xf003, 0xf003) AM_WRITE(m63_palbank_w)
AM_RANGE(0xf006, 0xf007) AM_WRITE(coin_w)
AM_RANGE(0xf000, 0xf007) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0xf800, 0xf800) AM_READ_PORT("P1") AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
AM_RANGE(0xf801, 0xf801) AM_READ_PORT("P2") AM_WRITENOP /* continues game when in stop mode (cleared by NMI handler) */
AM_RANGE(0xf802, 0xf802) AM_READ_PORT("DSW1")
@ -501,14 +499,8 @@ static ADDRESS_MAP_START( fghtbskt_map, AS_PROGRAM, 8, m63_state )
AM_RANGE(0xf000, 0xf000) AM_WRITE(snd_irq_w)
AM_RANGE(0xf001, 0xf001) AM_WRITENOP
AM_RANGE(0xf002, 0xf002) AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
AM_RANGE(0xf800, 0xf800) AM_WRITENOP
AM_RANGE(0xf801, 0xf801) AM_WRITE(nmi_mask_w)
AM_RANGE(0xf802, 0xf802) AM_WRITE(fghtbskt_flipscreen_w)
AM_RANGE(0xf803, 0xf803) AM_WRITENOP
AM_RANGE(0xf804, 0xf804) AM_WRITENOP
AM_RANGE(0xf805, 0xf805) AM_WRITENOP
AM_RANGE(0xf806, 0xf806) AM_WRITENOP
AM_RANGE(0xf807, 0xf807) AM_WRITE(fghtbskt_samples_w)
AM_RANGE(0xf807, 0xf807) AM_WRITE(fghtbskt_samples_w) // FIXME
AM_RANGE(0xf800, 0xf807) AM_DEVWRITE("outlatch", ls259_device, write_d0)
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8039_map, AS_PROGRAM, 8, m63_state )
@ -756,6 +748,13 @@ static MACHINE_CONFIG_START( m63 )
MCFG_CPU_PROGRAM_MAP(m63_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", m63_state, vblank_irq)
MCFG_DEVICE_ADD("outlatch", LS259, 0) // probably chip at E7 obscured by pulldown resistor
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(m63_state, nmi_mask_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(m63_state, m63_flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(m63_state, pal_bank_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(m63_state, coin1_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(m63_state, coin2_w))
MCFG_CPU_ADD("soundcpu",I8039,XTAL_12MHz/4) /* ????? */
MCFG_CPU_PROGRAM_MAP(i8039_map)
MCFG_CPU_IO_MAP(i8039_port_map)
@ -806,6 +805,11 @@ static MACHINE_CONFIG_START( fghtbskt )
MCFG_CPU_PROGRAM_MAP(fghtbskt_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", m63_state, vblank_irq)
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(m63_state, nmi_mask_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(m63_state, fghtbskt_flipscreen_w))
//MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(m63_state, fghtbskt_samples_w))
MCFG_CPU_ADD("soundcpu", I8039,XTAL_12MHz/4) /* ????? */
MCFG_CPU_PROGRAM_MAP(i8039_map)
MCFG_CPU_IO_MAP(i8039_port_map)

219
src/mame/drivers/mappy.cpp
View File

@ -553,6 +553,7 @@ TODO:
#include "cpu/m6809/m6809.h"
#include "machine/74157.h"
#include "machine/74259.h"
#include "machine/watchdog.h"
#include "sound/volt_reg.h"
#include "speaker.h"
@ -581,160 +582,30 @@ TODO:
/***************************************************************************/
void mappy_state::common_latch_w(uint32_t offset)
WRITE_LINE_MEMBER(mappy_state::int_on_w)
{
int bit = offset & 1;
switch (offset & 0x0e)
{
case 0x00: /* INT ON 2 */
m_sub_irq_mask = bit;
if (!bit)
m_subcpu->set_input_line(0, CLEAR_LINE);
break;
case 0x02: /* INT ON */
m_main_irq_mask = bit;
if (!bit)
m_maincpu->set_input_line(0, CLEAR_LINE);
break;
case 0x04: /* n.c. */
break;
case 0x06: /* SOUND ON */
m_namco_15xx->mappy_sound_enable(bit);
break;
case 0x0a: /* SUB RESET */
m_subcpu->set_input_line(INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
break;
case 0x0c: /* n.c. */
break;
case 0x0e: /* n.c. */
break;
}
m_main_irq_mask = state;
if (!state)
m_maincpu->set_input_line(0, CLEAR_LINE);
}
WRITE8_MEMBER(mappy_state::superpac_latch_w)
WRITE_LINE_MEMBER(mappy_state::int_on_2_w)
{
int bit = offset & 1;
switch (offset & 0x0e)
{
case 0x08: /* 4 RESET */
switch (m_type)
{
case GAME_SUPERPAC:
m_namco56xx_1->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
m_namco56xx_2->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
break;
case GAME_PACNPAL:
m_namco56xx_1->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
m_namco59xx->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
break;
case GAME_GROBDA:
m_namco58xx_1->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
m_namco56xx_1->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
break;
}
break;
default:
common_latch_w(offset);
break;
}
m_sub_irq_mask = state;
if (!state)
m_subcpu->set_input_line(0, CLEAR_LINE);
}
WRITE8_MEMBER(mappy_state::phozon_latch_w)
WRITE_LINE_MEMBER(mappy_state::int_on_3_w)
{
int bit = offset & 1;
switch (offset & 0x0e)
{
case 0x04:
m_sub2_irq_mask = bit;
if (!bit)
m_subcpu2->set_input_line(0, CLEAR_LINE);
break;
case 0x08:
m_namco58xx_1->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
m_namco56xx_1->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
break;
case 0x0c:
m_subcpu2->set_input_line(INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
break;
default:
common_latch_w(offset);
break;
}
m_sub2_irq_mask = state;
if (!state)
m_subcpu2->set_input_line(0, CLEAR_LINE);
}
WRITE8_MEMBER(mappy_state::mappy_latch_w)
WRITE_LINE_MEMBER(mappy_state::mappy_flip_w)
{
int bit = offset & 1;
switch (offset & 0x0e)
{
case 0x04: /* FLIP */
flip_screen_set(bit);
break;
case 0x08: /* 4 RESET */
switch (m_type)
{
case GAME_MAPPY:
m_namco58xx_1->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
m_namco58xx_2->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
break;
case GAME_DRUAGA:
case GAME_DIGDUG2:
m_namco58xx_1->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
m_namco56xx_1->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
break;
case GAME_MOTOS:
m_namco56xx_1->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
m_namco56xx_2->set_reset_line(bit ? CLEAR_LINE : ASSERT_LINE);
break;
}
break;
default:
common_latch_w(offset);
break;
}
}
MACHINE_RESET_MEMBER(mappy_state,superpac)
{
address_space &space = m_maincpu->space(AS_PROGRAM);
/* Reset all latches */
for (int i = 0; i < 0x10; i += 2)
superpac_latch_w(space, i, 0);
}
MACHINE_RESET_MEMBER(mappy_state,phozon)
{
address_space &space = m_maincpu->space(AS_PROGRAM);
/* Reset all latches */
for (int i = 0; i < 0x10; i += 2)
phozon_latch_w(space, i, 0);
}
MACHINE_RESET_MEMBER(mappy_state,mappy)
{
address_space &space = m_maincpu->space(AS_PROGRAM);
/* Reset all latches */
for (int i = 0; i < 0x10; i += 2)
mappy_latch_w(space, i, 0);
flip_screen_set(state);
}
@ -964,7 +835,7 @@ static ADDRESS_MAP_START( superpac_cpu1_map, AS_PROGRAM, 8, mappy_state )
AM_RANGE(0x4000, 0x43ff) AM_DEVREADWRITE("namco", namco_15xx_device, sharedram_r, sharedram_w) /* shared RAM with the sound CPU */
AM_RANGE(0x4800, 0x480f) AM_DEVREADWRITE("namcoio_1", namcoio_device, read, write) /* custom I/O chips interface */
AM_RANGE(0x4810, 0x481f) AM_DEVREADWRITE("namcoio_2", namcoio_device, read, write) /* custom I/O chips interface */
AM_RANGE(0x5000, 0x500f) AM_WRITE(superpac_latch_w) /* various control bits */
AM_RANGE(0x5000, 0x500f) AM_DEVWRITE("mainlatch", ls259_device, write_a0) /* various control bits */
AM_RANGE(0x8000, 0x8000) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0xa000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -975,7 +846,7 @@ static ADDRESS_MAP_START( phozon_cpu1_map, AS_PROGRAM, 8, mappy_state )
AM_RANGE(0x4000, 0x43ff) AM_DEVREADWRITE("namco", namco_15xx_device, sharedram_r, sharedram_w) /* shared RAM with the sound CPU */
AM_RANGE(0x4800, 0x480f) AM_DEVREADWRITE("namcoio_1", namcoio_device, read, write) /* custom I/O chips interface */
AM_RANGE(0x4810, 0x481f) AM_DEVREADWRITE("namcoio_2", namcoio_device, read, write) /* custom I/O chips interface */
AM_RANGE(0x5000, 0x500f) AM_WRITE(phozon_latch_w) /* various control bits */
AM_RANGE(0x5000, 0x500f) AM_DEVWRITE("mainlatch", ls259_device, write_a0) /* various control bits */
AM_RANGE(0x7000, 0x7000) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END
@ -987,14 +858,14 @@ static ADDRESS_MAP_START( mappy_cpu1_map, AS_PROGRAM, 8, mappy_state )
AM_RANGE(0x4000, 0x43ff) AM_DEVREADWRITE("namco", namco_15xx_device, sharedram_r, sharedram_w) /* shared RAM with the sound CPU */
AM_RANGE(0x4800, 0x480f) AM_DEVREADWRITE("namcoio_1", namcoio_device, read, write) /* custom I/O chips interface */
AM_RANGE(0x4810, 0x481f) AM_DEVREADWRITE("namcoio_2", namcoio_device, read, write) /* custom I/O chips interface */
AM_RANGE(0x5000, 0x500f) AM_WRITE(mappy_latch_w) /* various control bits */
AM_RANGE(0x5000, 0x500f) AM_DEVWRITE("mainlatch", ls259_device, write_a0) /* various control bits */
AM_RANGE(0x8000, 0x8000) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM code (only a000-ffff in Mappy) */
ADDRESS_MAP_END
static ADDRESS_MAP_START( superpac_cpu2_map, AS_PROGRAM, 8, mappy_state )
AM_RANGE(0x0000, 0x03ff) AM_DEVREADWRITE("namco", namco_15xx_device, sharedram_r, sharedram_w) /* shared RAM with the main CPU (also sound registers) */
AM_RANGE(0x2000, 0x200f) AM_WRITE(superpac_latch_w) /* various control bits */
AM_RANGE(0x2000, 0x200f) AM_DEVWRITE("mainlatch", ls259_device, write_a0) /* various control bits */
AM_RANGE(0xe000, 0xffff) AM_ROM
ADDRESS_MAP_END
@ -1005,7 +876,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mappy_cpu2_map, AS_PROGRAM, 8, mappy_state )
AM_RANGE(0x0000, 0x03ff) AM_DEVREADWRITE("namco", namco_15xx_device, sharedram_r, sharedram_w) /* shared RAM with the main CPU (also sound registers) */
AM_RANGE(0x2000, 0x200f) AM_WRITE(mappy_latch_w) /* various control bits */
AM_RANGE(0x2000, 0x200f) AM_DEVWRITE("mainlatch", ls259_device, write_a0) /* various control bits */
AM_RANGE(0xe000, 0xffff) AM_ROM /* ROM code */
ADDRESS_MAP_END
@ -1659,13 +1530,18 @@ static MACHINE_CONFIG_START( superpac_common )
MCFG_CPU_PROGRAM_MAP(superpac_cpu2_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", mappy_state, sub_vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 2M on CPU board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(mappy_state, int_on_2_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(mappy_state, int_on_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("namco", namco_15xx_device, mappy_sound_enable))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_VBLANK_INIT("screen", 8)
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
/* synchronization of the CPUs */
MCFG_MACHINE_START_OVERRIDE(mappy_state,mappy)
MCFG_MACHINE_RESET_OVERRIDE(mappy_state,superpac)
/* video hardware */
MCFG_GFXDECODE_ADD("gfxdecode", "palette", superpac)
@ -1709,6 +1585,10 @@ static MACHINE_CONFIG_START( superpac )
MCFG_DEVICE_ADD("dipmux", LS157, 0)
MCFG_74157_A_IN_CB(IOPORT("DSW2"))
MCFG_74157_B_IN_CB(IOPORT("DSW2")) MCFG_DEVCB_RSHIFT(4)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("namcoio_1", namco56xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("namcoio_2", namco56xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( pacnpal )
@ -1735,6 +1615,10 @@ static MACHINE_CONFIG_START( pacnpal )
MCFG_DEVICE_ADD("dipmux", LS157, 0)
MCFG_74157_A_IN_CB(IOPORT("DSW2"))
MCFG_74157_B_IN_CB(IOPORT("DSW2")) MCFG_DEVCB_RSHIFT(4)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("namcoio_1", namco56xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("namcoio_2", namco59xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MACHINE_CONFIG_END
@ -1762,6 +1646,10 @@ static MACHINE_CONFIG_START( grobda )
MCFG_74157_A_IN_CB(IOPORT("DSW2"))
MCFG_74157_B_IN_CB(IOPORT("DSW2")) MCFG_DEVCB_RSHIFT(4)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("namcoio_1", namco58xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("namcoio_2", namco56xx_device, set_reset_line)) MCFG_DEVCB_INVERT
/* sound hardware */
MCFG_SOUND_ADD("dac", DAC_4BIT_BINARY_WEIGHTED, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.275) // alternate route to 15XX-related DAC?
MCFG_DEVICE_ADD("vref", VOLTAGE_REGULATOR, 0) MCFG_VOLTAGE_REGULATOR_OUTPUT(5.0)
@ -1784,12 +1672,21 @@ static MACHINE_CONFIG_START( phozon )
MCFG_CPU_PROGRAM_MAP(phozon_cpu3_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", mappy_state, sub2_vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 5C
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(mappy_state, int_on_2_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(mappy_state, int_on_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(mappy_state, int_on_3_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("namco", namco_15xx_device, mappy_sound_enable))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("namcoio_1", namco58xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("namcoio_2", namco56xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(INPUTLINE("sub2", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_VBLANK_INIT("screen", 8)
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
/* synchronization of the CPUs */
MCFG_MACHINE_START_OVERRIDE(mappy_state,mappy)
MCFG_MACHINE_RESET_OVERRIDE(mappy_state,phozon)
MCFG_DEVICE_ADD("namcoio_1", NAMCO_58XX, 0)
MCFG_NAMCO58XX_IN_0_CB(IOPORT("COINS"))
@ -1841,12 +1738,18 @@ static MACHINE_CONFIG_START( mappy_common )
MCFG_CPU_PROGRAM_MAP(mappy_cpu2_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", mappy_state, sub_vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 2M on CPU board
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(mappy_state, int_on_2_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(mappy_state, int_on_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(mappy_state, mappy_flip_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("namco", namco_15xx_device, mappy_sound_enable))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_VBLANK_INIT("screen", 8)
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
/* synchronization of the CPUs */
MCFG_MACHINE_START_OVERRIDE(mappy_state,mappy)
MCFG_MACHINE_RESET_OVERRIDE(mappy_state,mappy)
/* video hardware */
MCFG_GFXDECODE_ADD("gfxdecode", "palette", mappy)
@ -1889,6 +1792,10 @@ static MACHINE_CONFIG_START( mappy )
MCFG_DEVICE_ADD("dipmux", LS157, 0)
MCFG_74157_A_IN_CB(IOPORT("DSW2"))
MCFG_74157_B_IN_CB(IOPORT("DSW2")) MCFG_DEVCB_RSHIFT(4)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("namcoio_1", namco58xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("namcoio_2", namco58xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( digdug2 )
@ -1917,6 +1824,10 @@ static MACHINE_CONFIG_START( digdug2 )
MCFG_DEVICE_ADD("dipmux", LS157, 0)
MCFG_74157_A_IN_CB(IOPORT("DSW2"))
MCFG_74157_B_IN_CB(IOPORT("DSW2")) MCFG_DEVCB_RSHIFT(4)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("namcoio_1", namco58xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("namcoio_2", namco56xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( todruaga, digdug2 )
@ -1951,6 +1862,10 @@ static MACHINE_CONFIG_START( motos )
MCFG_DEVICE_ADD("dipmux", LS157, 0)
MCFG_74157_A_IN_CB(IOPORT("DSW2"))
MCFG_74157_B_IN_CB(IOPORT("DSW2")) MCFG_DEVCB_RSHIFT(4)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE("namcoio_1", namco56xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("namcoio_2", namco56xx_device, set_reset_line)) MCFG_DEVCB_INVERT
MACHINE_CONFIG_END

33
src/mame/drivers/marineb.cpp
View File

@ -41,6 +41,7 @@ write
#include "includes/marineb.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "sound/ay8910.h"
#include "screen.h"
#include "speaker.h"
@ -53,26 +54,15 @@ void marineb_state::machine_reset()
{
m_palette_bank = 0;
m_column_scroll = 0;
m_flipscreen_x = 0;
m_flipscreen_y = 0;
m_marineb_active_low_flipscreen = 0;
}
MACHINE_RESET_MEMBER(marineb_state,springer)
{
marineb_state::machine_reset();
m_marineb_active_low_flipscreen = 1;
}
void marineb_state::machine_start()
{
save_item(NAME(m_marineb_active_low_flipscreen));
}
WRITE8_MEMBER(marineb_state::irq_mask_w)
WRITE_LINE_MEMBER(marineb_state::irq_mask_w)
{
m_irq_mask = data & 1;
m_irq_mask = state;
}
static ADDRESS_MAP_START( marineb_map, AS_PROGRAM, 8, marineb_state )
@ -84,9 +74,8 @@ static ADDRESS_MAP_START( marineb_map, AS_PROGRAM, 8, marineb_state )
AM_RANGE(0x9800, 0x9800) AM_WRITE(marineb_column_scroll_w)
AM_RANGE(0x9a00, 0x9a00) AM_WRITE(marineb_palette_bank_0_w)
AM_RANGE(0x9c00, 0x9c00) AM_WRITE(marineb_palette_bank_1_w)
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P2") AM_WRITE(irq_mask_w)
AM_RANGE(0xa001, 0xa001) AM_WRITE(marineb_flipscreen_y_w)
AM_RANGE(0xa002, 0xa002) AM_WRITE(marineb_flipscreen_x_w)
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P2")
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P1")
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("SYSTEM") AM_WRITENOP /* also watchdog */
@ -545,6 +534,10 @@ static MACHINE_CONFIG_START( marineb )
MCFG_CPU_IO_MAP(marineb_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", marineb_state, marineb_vblank_irq)
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(marineb_state, irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(marineb_state, flipscreen_y_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(marineb_state, flipscreen_x_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -580,7 +573,9 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( springer, marineb )
/* basic machine hardware */
MCFG_MACHINE_RESET_OVERRIDE(marineb_state,springer)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(marineb_state, flipscreen_y_w)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(marineb_state, flipscreen_x_w)) MCFG_DEVCB_INVERT
/* video hardware */
MCFG_SCREEN_MODIFY("screen")
@ -634,7 +629,9 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( bcruzm12, wanted )
/* basic machine hardware */
MCFG_MACHINE_RESET_OVERRIDE(marineb_state,springer)
MCFG_DEVICE_MODIFY("outlatch")
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(marineb_state, flipscreen_y_w)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(marineb_state, flipscreen_x_w)) MCFG_DEVCB_INVERT
MACHINE_CONFIG_END
/***************************************************************************

65
src/mame/drivers/mastboy.cpp
View File

@ -440,6 +440,7 @@
#include "cpu/z180/z180.h"
#include "sound/saa1099.h"
#include "sound/msm5205.h"
#include "machine/74259.h"
#include "machine/eeprompar.h"
#include "screen.h"
#include "speaker.h"
@ -452,6 +453,7 @@ public:
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_msm(*this, "msm"),
m_outlatch(*this, "outlatch"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_earom(*this, "earom") ,
@ -461,6 +463,7 @@ public:
required_device<cpu_device> m_maincpu;
required_device<msm5205_device> m_msm;
required_device<ls259_device> m_outlatch;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
required_device<eeprom_parallel_28xx_device> m_earom;
@ -475,22 +478,17 @@ public:
int m_earom_enabled;
int m_m5205_next;
int m_m5205_part;
int m_m5205_sambit0;
int m_m5205_sambit1;
DECLARE_READ8_MEMBER(banked_ram_r);
DECLARE_WRITE8_MEMBER(banked_ram_w);
DECLARE_WRITE8_MEMBER(bank_w);
DECLARE_READ8_MEMBER(earom_r);
DECLARE_WRITE8_MEMBER(earom_w);
DECLARE_WRITE8_MEMBER(earom_enable_w);
DECLARE_WRITE8_MEMBER(msm5205_sambit0_w);
DECLARE_WRITE8_MEMBER(msm5205_sambit1_w);
DECLARE_WRITE_LINE_MEMBER(earom_enable_w);
DECLARE_WRITE8_MEMBER(msm5205_data_w);
DECLARE_WRITE8_MEMBER(irq0_ack_w);
DECLARE_WRITE_LINE_MEMBER(irq0_ack_w);
DECLARE_READ8_MEMBER(port_38_read);
DECLARE_READ8_MEMBER(nmi_read);
DECLARE_WRITE8_MEMBER(msm5205_reset_w);
DECLARE_WRITE_LINE_MEMBER(adpcm_int);
virtual void machine_start() override;
@ -647,40 +645,18 @@ WRITE8_MEMBER(mastboy_state::earom_w)
// }
}
WRITE8_MEMBER(mastboy_state::earom_enable_w)
WRITE_LINE_MEMBER(mastboy_state::earom_enable_w)
{
/* This is some kind of enable / disable control for backup memory (see Charles's notes) but I'm not
sure how it works in practice, if we use it then it writes a lot of data with it disabled */
m_earom_enabled = data&1;
m_earom_enabled = state;
}
/* MSM5205 Related */
WRITE8_MEMBER(mastboy_state::msm5205_sambit0_w)
{
m_m5205_sambit0 = data & 1;
m_msm->playmode_w((1 << 2) | (m_m5205_sambit1 << 1) | (m_m5205_sambit0) );
logerror("msm5205 samplerate bit 0, set to %02x\n",data);
}
WRITE8_MEMBER(mastboy_state::msm5205_sambit1_w)
{
m_m5205_sambit1 = data & 1;
m_msm->playmode_w((1 << 2) | (m_m5205_sambit1 << 1) | (m_m5205_sambit0) );
logerror("msm5205 samplerate bit 0, set to %02x\n",data);
}
WRITE8_MEMBER(mastboy_state::msm5205_reset_w)
{
m_m5205_part = 0;
m_msm->reset_w(data & 1);
}
WRITE8_MEMBER(mastboy_state::msm5205_data_w)
{
m_m5205_part = 0;
m_m5205_next = data;
}
@ -697,16 +673,15 @@ WRITE_LINE_MEMBER(mastboy_state::adpcm_int)
/* Interrupt Handling */
WRITE8_MEMBER(mastboy_state::irq0_ack_w)
WRITE_LINE_MEMBER(mastboy_state::irq0_ack_w)
{
m_irq0_ack = data;
if ((data & 1) == 1)
if (state)
m_maincpu->set_input_line(0, CLEAR_LINE);
}
INTERRUPT_GEN_MEMBER(mastboy_state::interrupt)
{
if ((m_irq0_ack & 1) == 1)
if (m_outlatch->q0_r() == 1)
{
device.execute().set_input_line(0, ASSERT_LINE);
}
@ -734,11 +709,7 @@ static ADDRESS_MAP_START( mastboy_map, AS_PROGRAM, 8, mastboy_state )
AM_RANGE(0xff820, 0xff827) AM_WRITE(bank_w)
AM_RANGE(0xff828, 0xff829) AM_DEVWRITE("saa", saa1099_device, write)
AM_RANGE(0xff830, 0xff830) AM_WRITE(msm5205_data_w)
AM_RANGE(0xff838, 0xff838) AM_WRITE(irq0_ack_w)
AM_RANGE(0xff839, 0xff839) AM_WRITE(msm5205_sambit0_w)
AM_RANGE(0xff83a, 0xff83a) AM_WRITE(msm5205_sambit1_w)
AM_RANGE(0xff83b, 0xff83b) AM_WRITE(msm5205_reset_w)
AM_RANGE(0xff83c, 0xff83c) AM_WRITE(earom_enable_w)
AM_RANGE(0xff838, 0xff83f) AM_DEVWRITE("outlatch", ls259_device, write_d0)
AM_RANGE(0xffc00, 0xfffff) AM_RAM // Internal RAM
ADDRESS_MAP_END
@ -887,8 +858,6 @@ void mastboy_state::machine_start()
save_item(NAME(m_earom_enabled));
save_item(NAME(m_m5205_next));
save_item(NAME(m_m5205_part));
save_item(NAME(m_m5205_sambit0));
save_item(NAME(m_m5205_sambit1));
}
void mastboy_state::machine_reset()
@ -898,10 +867,6 @@ void mastboy_state::machine_reset()
memset( m_tileram, 0x00, 0x01000);
memset( m_colram, 0x00, 0x00200);
memset( m_vram, 0x00, 0x10000);
m_m5205_part = 0;
m_msm->reset_w(1);
m_irq0_ack = 0;
}
@ -914,6 +879,12 @@ static MACHINE_CONFIG_START( mastboy )
MCFG_EEPROM_2816_ADD("earom")
MCFG_DEVICE_ADD("outlatch", LS259, 0) // IC17
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(mastboy_state, irq0_ack_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("msm", msm5205_device, s2_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE("msm", msm5205_device, s1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE("msm", msm5205_device, reset_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(mastboy_state, earom_enable_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

25
src/mame/drivers/megazone.cpp
View File

@ -15,6 +15,7 @@ To enter service mode, keep 1&2 pressed on reset
#include "cpu/m6809/m6809.h"
#include "cpu/mcs48/mcs48.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "machine/konami1.h"
#include "machine/watchdog.h"
@ -75,21 +76,24 @@ WRITE8_MEMBER(megazone_state::i8039_irqen_and_status_w)
m_i8039_status = (data & 0x70) >> 4;
}
WRITE8_MEMBER(megazone_state::megazone_coin_counter_w)
WRITE_LINE_MEMBER(megazone_state::coin_counter_1_w)
{
machine().bookkeeping().coin_counter_w(1 - offset, data); /* 1-offset, because coin counters are in reversed order */
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE8_MEMBER(megazone_state::irq_mask_w)
WRITE_LINE_MEMBER(megazone_state::coin_counter_2_w)
{
m_irq_mask = data & 1;
machine().bookkeeping().coin_counter_w(1, state);
}
WRITE_LINE_MEMBER(megazone_state::irq_mask_w)
{
m_irq_mask = state;
}
static ADDRESS_MAP_START( megazone_map, AS_PROGRAM, 8, megazone_state )
AM_RANGE(0x0000, 0x0001) AM_WRITE(megazone_coin_counter_w) /* coin counter 2, coin counter 1 */
AM_RANGE(0x0005, 0x0005) AM_WRITE(megazone_flipscreen_w)
AM_RANGE(0x0007, 0x0007) AM_WRITE(irq_mask_w)
AM_RANGE(0x0000, 0x0007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x0800, 0x0800) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x1000, 0x1000) AM_WRITEONLY AM_SHARE("scrolly")
AM_RANGE(0x1800, 0x1800) AM_WRITEONLY AM_SHARE("scrollx")
@ -224,7 +228,6 @@ void megazone_state::machine_start()
void megazone_state::machine_reset()
{
m_flipscreen = 0;
m_i8039_status = 0;
}
@ -255,6 +258,12 @@ static MACHINE_CONFIG_START( megazone )
MCFG_QUANTUM_TIME(attotime::from_hz(900))
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 13A
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(megazone_state, coin_counter_2_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(megazone_state, coin_counter_1_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(megazone_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(megazone_state, irq_mask_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

81
src/mame/drivers/mermaid.cpp
View File

@ -120,6 +120,7 @@ Stephh's notes (based on the games Z80 code and some tests) :
#include "includes/mermaid.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "sound/msm5205.h"
#include "speaker.h"
@ -128,20 +129,30 @@ Stephh's notes (based on the games Z80 code and some tests) :
WRITE8_MEMBER(mermaid_state::mermaid_ay8910_write_port_w)
{
if (m_ay8910_enable[0]) m_ay1->data_w(space, offset, data);
if (m_ay8910_enable[1]) m_ay2->data_w(space, offset, data);
if (m_ay8910_enable[0]) m_ay8910[0]->data_w(space, offset, data);
if (m_ay8910_enable[1]) m_ay8910[1]->data_w(space, offset, data);
}
WRITE8_MEMBER(mermaid_state::mermaid_ay8910_control_port_w)
{
if (m_ay8910_enable[0]) m_ay1->address_w(space, offset, data);
if (m_ay8910_enable[1]) m_ay2->address_w(space, offset, data);
if (m_ay8910_enable[0]) m_ay8910[0]->address_w(space, offset, data);
if (m_ay8910_enable[1]) m_ay8910[1]->address_w(space, offset, data);
}
WRITE8_MEMBER(mermaid_state::nmi_mask_w)
WRITE_LINE_MEMBER(mermaid_state::ay1_enable_w)
{
m_nmi_mask = data & 1;
m_ay8910_enable[0] = state;
}
WRITE_LINE_MEMBER(mermaid_state::ay2_enable_w)
{
m_ay8910_enable[1] = state;
}
WRITE_LINE_MEMBER(mermaid_state::nmi_mask_w)
{
m_nmi_mask = state;
}
/* Memory Map */
@ -156,18 +167,9 @@ static ADDRESS_MAP_START( mermaid_map, AS_PROGRAM, 8, mermaid_state )
AM_RANGE(0xd880, 0xd8bf) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xdc00, 0xdfff) AM_RAM_WRITE(mermaid_colorram_w) AM_SHARE("colorram")
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("DSW")
AM_RANGE(0xe000, 0xe001) AM_RAM AM_SHARE("ay8910_enable")
AM_RANGE(0xe002, 0xe004) AM_WRITENOP // ???
AM_RANGE(0xe005, 0xe005) AM_WRITE(mermaid_flip_screen_x_w)
AM_RANGE(0xe006, 0xe006) AM_WRITE(mermaid_flip_screen_y_w)
AM_RANGE(0xe007, 0xe007) AM_WRITE(nmi_mask_w)
AM_RANGE(0xe800, 0xe800) AM_READ_PORT("P1") AM_WRITENOP // ???
AM_RANGE(0xe801, 0xe801) AM_WRITENOP // ???
AM_RANGE(0xe802, 0xe802) AM_WRITENOP // ???
AM_RANGE(0xe803, 0xe803) AM_WRITENOP // ???
AM_RANGE(0xe804, 0xe804) AM_WRITE(rougien_gfxbankswitch1_w)
AM_RANGE(0xe805, 0xe805) AM_WRITE(rougien_gfxbankswitch2_w)
AM_RANGE(0xe807, 0xe807) AM_WRITENOP // ???
AM_RANGE(0xe000, 0xe007) AM_DEVWRITE("latch1", ls259_device, write_d0)
AM_RANGE(0xe800, 0xe800) AM_READ_PORT("P1")
AM_RANGE(0xe800, 0xe807) AM_DEVWRITE("latch2", ls259_device, write_d0)
AM_RANGE(0xf000, 0xf000) AM_READ_PORT("P2")
AM_RANGE(0xf800, 0xf800) AM_READ(mermaid_collision_r)
AM_RANGE(0xf802, 0xf802) AM_WRITENOP // ???
@ -175,36 +177,27 @@ static ADDRESS_MAP_START( mermaid_map, AS_PROGRAM, 8, mermaid_state )
AM_RANGE(0xf807, 0xf807) AM_WRITE(mermaid_ay8910_control_port_w)
ADDRESS_MAP_END
WRITE8_MEMBER(mermaid_state::rougien_sample_rom_lo_w)
WRITE_LINE_MEMBER(mermaid_state::rougien_sample_rom_lo_w)
{
m_adpcm_rom_sel = (data & 1) | (m_adpcm_rom_sel & 2);
m_adpcm_rom_sel = state | (m_adpcm_rom_sel & 2);
}
WRITE8_MEMBER(mermaid_state::rougien_sample_rom_hi_w)
WRITE_LINE_MEMBER(mermaid_state::rougien_sample_rom_hi_w)
{
m_adpcm_rom_sel = ((data & 1)<<1) | (m_adpcm_rom_sel & 1);
m_adpcm_rom_sel = (state <<1) | (m_adpcm_rom_sel & 1);
}
WRITE8_MEMBER(mermaid_state::rougien_sample_playback_w)
WRITE_LINE_MEMBER(mermaid_state::rougien_sample_playback_w)
{
if((m_adpcm_play_reg & 1) && ((data & 1) == 0))
if (state)
{
m_adpcm_pos = m_adpcm_rom_sel*0x1000;
m_adpcm_end = m_adpcm_pos+0x1000;
m_adpcm_idle = 0;
m_adpcm->reset_w(0);
}
m_adpcm_play_reg = data & 1;
}
static ADDRESS_MAP_START( rougien_map, AS_PROGRAM, 8, mermaid_state )
AM_RANGE(0xe002, 0xe002) AM_WRITE(rougien_sample_playback_w)
AM_RANGE(0xe802, 0xe802) AM_WRITE(rougien_sample_rom_hi_w)
AM_RANGE(0xe803, 0xe803) AM_WRITE(rougien_sample_rom_lo_w)
AM_IMPORT_FROM( mermaid_map )
ADDRESS_MAP_END
/* Input Ports */
static INPUT_PORTS_START( mermaid )
@ -371,6 +364,7 @@ void mermaid_state::machine_start()
save_item(NAME(m_coll_bit6));
save_item(NAME(m_rougien_gfxbank1));
save_item(NAME(m_rougien_gfxbank2));
save_item(NAME(m_ay8910_enable));
save_item(NAME(m_adpcm_pos));
save_item(NAME(m_adpcm_end));
@ -436,6 +430,19 @@ static MACHINE_CONFIG_START( mermaid )
MCFG_CPU_PROGRAM_MAP(mermaid_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", mermaid_state, vblank_irq)
MCFG_DEVICE_ADD("latch1", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(mermaid_state, ay1_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(mermaid_state, ay2_enable_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(NOOP) // ???
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(mermaid_state, flip_screen_x_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(mermaid_state, flip_screen_y_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(mermaid_state, nmi_mask_w))
MCFG_DEVICE_ADD("latch2", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(NOOP) // ???
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(mermaid_state, rougien_gfxbankswitch1_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(mermaid_state, rougien_gfxbankswitch2_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) // very frequent
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@ -465,8 +472,12 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( rougien, mermaid )
MCFG_DEVICE_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(rougien_map)
MCFG_DEVICE_MODIFY("latch1")
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(mermaid_state, rougien_sample_playback_w))
MCFG_DEVICE_MODIFY("latch2")
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(mermaid_state, rougien_sample_rom_hi_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(mermaid_state, rougien_sample_rom_lo_w))
MCFG_PALETTE_MODIFY("palette")
MCFG_PALETTE_INIT_OWNER(mermaid_state,rougien)

137
src/mame/drivers/mjsister.cpp
View File

@ -10,6 +10,7 @@
#include "emu.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "sound/ay8910.h"
#include "sound/dac.h"
#include "sound/volt_reg.h"
@ -31,14 +32,16 @@ public:
mjsister_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_mainlatch(*this, "mainlatch%u", 1),
m_palette(*this, "palette"),
m_dac(*this, "dac") { }
m_dac(*this, "dac"),
m_rombank(*this, "bank1") { }
/* video-related */
std::unique_ptr<bitmap_ind16> m_tmpbitmap0;
std::unique_ptr<bitmap_ind16> m_tmpbitmap1;
int m_flip_screen;
int m_video_enable;
bool m_flip_screen;
bool m_video_enable;
int m_screen_redraw;
int m_vrambank;
int m_colorbank;
@ -46,9 +49,7 @@ public:
/* misc */
int m_input_sel1;
int m_input_sel2;
int m_rombank0;
int m_rombank1;
bool m_irq_enable;
uint32_t m_dac_adr;
uint32_t m_dac_bank;
@ -58,23 +59,32 @@ public:
/* devices */
required_device<cpu_device> m_maincpu;
required_device_array<ls259_device, 2> m_mainlatch;
required_device<palette_device> m_palette;
required_device<dac_byte_interface> m_dac;
/* memory */
required_memory_bank m_rombank;
uint8_t m_videoram0[0x8000];
uint8_t m_videoram1[0x8000];
DECLARE_WRITE8_MEMBER(videoram_w);
DECLARE_WRITE8_MEMBER(dac_adr_s_w);
DECLARE_WRITE8_MEMBER(dac_adr_e_w);
DECLARE_WRITE8_MEMBER(banksel1_w);
DECLARE_WRITE8_MEMBER(banksel2_w);
DECLARE_WRITE_LINE_MEMBER(rombank_w);
DECLARE_WRITE_LINE_MEMBER(flip_screen_w);
DECLARE_WRITE_LINE_MEMBER(colorbank_w);
DECLARE_WRITE_LINE_MEMBER(video_enable_w);
DECLARE_WRITE_LINE_MEMBER(irq_enable_w);
DECLARE_WRITE_LINE_MEMBER(vrambank_w);
DECLARE_WRITE_LINE_MEMBER(dac_bank_w);
DECLARE_WRITE_LINE_MEMBER(coin_counter_w);
DECLARE_WRITE8_MEMBER(input_sel1_w);
DECLARE_WRITE8_MEMBER(input_sel2_w);
DECLARE_READ8_MEMBER(keys_r);
TIMER_CALLBACK_MEMBER(dac_callback);
virtual void machine_start() override;
virtual void machine_reset() override;
INTERRUPT_GEN_MEMBER(interrupt);
virtual void video_start() override;
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void redraw();
@ -227,56 +237,47 @@ WRITE8_MEMBER(mjsister_state::dac_adr_e_w)
m_dac_busy = 1;
}
WRITE8_MEMBER(mjsister_state::banksel1_w)
WRITE_LINE_MEMBER(mjsister_state::rombank_w)
{
int tmp = m_colorbank;
switch (data)
{
case 0x0: m_rombank0 = 0 ; break;
case 0x1: m_rombank0 = 1 ; break;
case 0x2: m_flip_screen = 0 ; break;
case 0x3: m_flip_screen = 1 ; break;
case 0x4: m_colorbank &= 0xfe; break;
case 0x5: m_colorbank |= 0x01; break;
case 0x6: m_colorbank &= 0xfd; break;
case 0x7: m_colorbank |= 0x02; break;
case 0x8: m_colorbank &= 0xfb; break;
case 0x9: m_colorbank |= 0x04; break;
case 0xa: m_video_enable = 0 ; break;
case 0xb: m_video_enable = 1 ; break;
case 0xe: m_vrambank = 0 ; break;
case 0xf: m_vrambank = 1 ; break;
default:
logerror("%04x p30_w:%02x\n", space.device().safe_pc(), data);
}
if (tmp != m_colorbank)
m_screen_redraw = 1;
membank("bank1")->set_entry(m_rombank0 * 2 + m_rombank1);
m_rombank->set_entry((m_mainlatch[0]->q0_r() << 1) | m_mainlatch[1]->q6_r());
}
WRITE8_MEMBER(mjsister_state::banksel2_w)
WRITE_LINE_MEMBER(mjsister_state::flip_screen_w)
{
switch (data)
{
case 0xa: m_dac_bank = 0; break;
case 0xb: m_dac_bank = 1; break;
m_flip_screen = state;
}
case 0xc: m_rombank1 = 0; break;
case 0xd: m_rombank1 = 1; break;
WRITE_LINE_MEMBER(mjsister_state::colorbank_w)
{
m_colorbank = (m_mainlatch[0]->output_state() >> 2) & 7;
redraw();
}
default:
logerror("%04x p31_w:%02x\n", space.device().safe_pc(), data);
}
WRITE_LINE_MEMBER(mjsister_state::video_enable_w)
{
m_video_enable = state;
}
membank("bank1")->set_entry(m_rombank0 * 2 + m_rombank1);
WRITE_LINE_MEMBER(mjsister_state::irq_enable_w)
{
m_irq_enable = state;
if (!m_irq_enable)
m_maincpu->set_input_line(0, CLEAR_LINE);
}
WRITE_LINE_MEMBER(mjsister_state::vrambank_w)
{
m_vrambank = state;
}
WRITE_LINE_MEMBER(mjsister_state::dac_bank_w)
{
m_dac_bank = state;
}
WRITE_LINE_MEMBER(mjsister_state::coin_counter_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE8_MEMBER(mjsister_state::input_sel1_w)
@ -326,8 +327,8 @@ static ADDRESS_MAP_START( mjsister_io_map, AS_IO, 8, mjsister_state )
AM_RANGE(0x12, 0x12) AM_DEVWRITE("aysnd", ay8910_device, data_w)
AM_RANGE(0x20, 0x20) AM_READ(keys_r)
AM_RANGE(0x21, 0x21) AM_READ_PORT("IN0")
AM_RANGE(0x30, 0x30) AM_WRITE(banksel1_w)
AM_RANGE(0x31, 0x31) AM_WRITE(banksel2_w)
AM_RANGE(0x30, 0x30) AM_DEVWRITE("mainlatch1", ls259_device, write_nibble)
AM_RANGE(0x31, 0x31) AM_DEVWRITE("mainlatch2", ls259_device, write_nibble)
AM_RANGE(0x32, 0x32) AM_WRITE(input_sel1_w)
AM_RANGE(0x33, 0x33) AM_WRITE(input_sel2_w)
AM_RANGE(0x34, 0x34) AM_WRITE(dac_adr_s_w)
@ -444,7 +445,7 @@ void mjsister_state::machine_start()
{
uint8_t *ROM = memregion("maincpu")->base();
membank("bank1")->configure_entries(0, 4, &ROM[0x10000], 0x8000);
m_rombank->configure_entries(0, 4, &ROM[0x10000], 0x8000);
m_dac_timer = timer_alloc(TIMER_DAC);
@ -455,8 +456,7 @@ void mjsister_state::machine_start()
save_item(NAME(m_colorbank));
save_item(NAME(m_input_sel1));
save_item(NAME(m_input_sel2));
save_item(NAME(m_rombank0));
save_item(NAME(m_rombank1));
save_item(NAME(m_irq_enable));
save_item(NAME(m_dac_adr));
save_item(NAME(m_dac_bank));
save_item(NAME(m_dac_adr_s));
@ -470,18 +470,19 @@ void mjsister_state::machine_reset()
m_flip_screen = 0;
m_video_enable = 0;
m_screen_redraw = 0;
m_vrambank = 0;
m_colorbank = 0;
m_input_sel1 = 0;
m_input_sel2 = 0;
m_rombank0 = 0;
m_rombank1 = 0;
m_dac_adr = 0;
m_dac_bank = 0;
m_dac_adr_s = 0;
m_dac_adr_e = 0;
}
INTERRUPT_GEN_MEMBER(mjsister_state::interrupt)
{
if (m_irq_enable)
m_maincpu->set_input_line(0, ASSERT_LINE);
}
static MACHINE_CONFIG_START( mjsister )
@ -489,8 +490,22 @@ static MACHINE_CONFIG_START( mjsister )
MCFG_CPU_ADD("maincpu", Z80, MCLK/2) /* 6.000 MHz */
MCFG_CPU_PROGRAM_MAP(mjsister_map)
MCFG_CPU_IO_MAP(mjsister_io_map)
MCFG_CPU_PERIODIC_INT_DRIVER(mjsister_state, irq0_line_hold, 2*60)
MCFG_CPU_PERIODIC_INT_DRIVER(mjsister_state, interrupt, 2*60)
MCFG_DEVICE_ADD("mainlatch1", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(mjsister_state, rombank_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(mjsister_state, flip_screen_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(mjsister_state, colorbank_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(mjsister_state, colorbank_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(mjsister_state, colorbank_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(mjsister_state, video_enable_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(mjsister_state, irq_enable_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(mjsister_state, vrambank_w))
MCFG_DEVICE_ADD("mainlatch2", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(mjsister_state, coin_counter_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(mjsister_state, dac_bank_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(mjsister_state, rombank_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

20
src/mame/drivers/mouser.cpp
View File

@ -18,6 +18,7 @@
#include "includes/mouser.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "sound/ay8910.h"
#include "screen.h"
#include "speaker.h"
@ -25,15 +26,14 @@
/* Mouser has external masking circuitry around
* the NMI input on the main CPU */
WRITE8_MEMBER(mouser_state::mouser_nmi_enable_w)
WRITE_LINE_MEMBER(mouser_state::nmi_enable_w)
{
//logerror("nmi_enable %02x\n", data);
m_nmi_enable = data;
m_nmi_enable = state;
}
INTERRUPT_GEN_MEMBER(mouser_state::mouser_nmi_interrupt)
{
if (BIT(m_nmi_enable, 0))
if (m_nmi_enable)
nmi_line_pulse(device);
}
@ -60,7 +60,7 @@ WRITE8_MEMBER(mouser_state::mouser_sound_nmi_clear_w)
INTERRUPT_GEN_MEMBER(mouser_state::mouser_sound_nmi_assert)
{
if (BIT(m_nmi_enable, 0))
if (m_nmi_enable)
device.execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
}
@ -71,9 +71,8 @@ static ADDRESS_MAP_START( mouser_map, AS_PROGRAM, 8, mouser_state )
AM_RANGE(0x9000, 0x93ff) AM_RAM AM_SHARE("videoram")
AM_RANGE(0x9800, 0x9cff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x9c00, 0x9fff) AM_RAM AM_SHARE("colorram")
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1") AM_WRITE(mouser_nmi_enable_w) /* bit 0 = NMI Enable */
AM_RANGE(0xa001, 0xa001) AM_WRITE(mouser_flip_screen_x_w)
AM_RANGE(0xa002, 0xa002) AM_WRITE(mouser_flip_screen_y_w)
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1")
AM_RANGE(0xa000, 0xa007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("SYSTEM")
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("P2") AM_WRITE(mouser_sound_interrupt_w) /* byte to sound cpu */
@ -198,7 +197,6 @@ void mouser_state::machine_start()
void mouser_state::machine_reset()
{
m_sound_byte = 0;
m_nmi_enable = 0;
}
static MACHINE_CONFIG_START( mouser )
@ -214,6 +212,10 @@ static MACHINE_CONFIG_START( mouser )
MCFG_CPU_IO_MAP(mouser_sound_io_map)
MCFG_CPU_PERIODIC_INT_DRIVER(mouser_state, mouser_sound_nmi_assert, 4*60) /* ??? This controls the sound tempo */
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // type unconfirmed
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(mouser_state, nmi_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(mouser_state, flip_screen_x_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(mouser_state, flip_screen_y_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)

151
src/mame/drivers/nemesis.cpp
View File

@ -54,6 +54,7 @@ So this is the correct behavior of real hardware, not an emulation bug.
#include "cpu/m68000/m68000.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "machine/watchdog.h"
#include "sound/ay8910.h"
@ -103,55 +104,40 @@ TIMER_DEVICE_CALLBACK_MEMBER(nemesis_state::gx400_interrupt)
}
WRITE16_MEMBER(nemesis_state::gx400_irq1_enable_word_w)
WRITE_LINE_MEMBER(nemesis_state::irq_enable_w)
{
if (ACCESSING_BITS_0_7)
m_irq1_on = data & 0x0001;
if (ACCESSING_BITS_8_15)
machine().bookkeeping().coin_lockout_w(1, data & 0x0100);
m_irq_on = state;
}
WRITE16_MEMBER(nemesis_state::gx400_irq2_enable_word_w)
WRITE_LINE_MEMBER(nemesis_state::irq1_enable_w)
{
if (ACCESSING_BITS_0_7)
m_irq2_on = data & 0x0001;
if (ACCESSING_BITS_8_15)
machine().bookkeeping().coin_lockout_w(0, data & 0x0100);
m_irq1_on = state;
}
WRITE16_MEMBER(nemesis_state::gx400_irq4_enable_word_w)
WRITE_LINE_MEMBER(nemesis_state::irq2_enable_w)
{
if (ACCESSING_BITS_8_15)
m_irq4_on = data & 0x0100;
m_irq2_on = state;
}
WRITE16_MEMBER(nemesis_state::nemesis_irq_enable_word_w)
WRITE_LINE_MEMBER(nemesis_state::irq4_enable_w)
{
if (ACCESSING_BITS_0_7)
m_irq_on = data & 0xff;
if (ACCESSING_BITS_8_15)
machine().bookkeeping().coin_lockout_global_w(data & 0x0100);
m_irq4_on = state;
}
WRITE16_MEMBER(nemesis_state::konamigt_irq_enable_word_w)
WRITE_LINE_MEMBER(nemesis_state::coin1_lockout_w)
{
if (ACCESSING_BITS_0_7)
m_irq_on = data & 0xff;
if (ACCESSING_BITS_8_15)
machine().bookkeeping().coin_lockout_w(1, data & 0x0100);
machine().bookkeeping().coin_lockout_w(0, state);
}
WRITE16_MEMBER(nemesis_state::konamigt_irq2_enable_word_w)
WRITE_LINE_MEMBER(nemesis_state::coin2_lockout_w)
{
if (ACCESSING_BITS_0_7)
m_irq2_on = data & 0xff;
machine().bookkeeping().coin_lockout_w(1, state);
}
if (ACCESSING_BITS_8_15)
machine().bookkeeping().coin_lockout_w(0, data & 0x0100);
WRITE_LINE_MEMBER(nemesis_state::sound_irq_w)
{
if (state)
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
}
@ -286,12 +272,8 @@ static ADDRESS_MAP_START( nemesis_map, AS_PROGRAM, 16, nemesis_state )
AM_RANGE(0x05cc02, 0x05cc03) AM_READ_PORT("IN1")
AM_RANGE(0x05cc04, 0x05cc05) AM_READ_PORT("IN2")
AM_RANGE(0x05cc06, 0x05cc07) AM_READ_PORT("TEST")
AM_RANGE(0x05e000, 0x05e001) AM_WRITE(nemesis_irq_enable_word_w)
AM_RANGE(0x05e002, 0x05e003) AM_WRITENOP /* not used irq */
AM_RANGE(0x05e004, 0x05e005) AM_WRITE(nemesis_gfx_flipx_word_w)
AM_RANGE(0x05e006, 0x05e007) AM_WRITE(nemesis_gfx_flipy_word_w)
AM_RANGE(0x05e008, 0x05e009) AM_WRITENOP /* not used irq */
AM_RANGE(0x05e00e, 0x05e00f) AM_WRITENOP /* not used irq */
AM_RANGE(0x05e000, 0x05e00f) AM_DEVWRITE8("outlatch", ls259_device, write_d0, 0xff00)
AM_RANGE(0x05e000, 0x05e00f) AM_DEVWRITE8("intlatch", ls259_device, write_d0, 0x00ff)
AM_RANGE(0x060000, 0x067fff) AM_RAM /* WORK RAM */
ADDRESS_MAP_END
@ -320,12 +302,8 @@ static ADDRESS_MAP_START( gx400_map, AS_PROGRAM, 16, nemesis_state )
AM_RANGE(0x05cc00, 0x05cc01) AM_READ_PORT("IN0")
AM_RANGE(0x05cc02, 0x05cc03) AM_READ_PORT("IN1")
AM_RANGE(0x05cc04, 0x05cc05) AM_READ_PORT("IN2")
AM_RANGE(0x05e000, 0x05e001) AM_WRITE(gx400_irq2_enable_word_w) /* ?? */
AM_RANGE(0x05e002, 0x05e003) AM_WRITE(gx400_irq1_enable_word_w) /* ?? */
AM_RANGE(0x05e004, 0x05e005) AM_WRITE(nemesis_gfx_flipx_word_w)
AM_RANGE(0x05e006, 0x05e007) AM_WRITE(nemesis_gfx_flipy_word_w)
AM_RANGE(0x05e008, 0x05e009) AM_WRITENOP /* IRQ acknowledge??? */
AM_RANGE(0x05e00e, 0x05e00f) AM_WRITE(gx400_irq4_enable_word_w) /* ?? */
AM_RANGE(0x05e000, 0x05e00f) AM_DEVWRITE8("outlatch", ls259_device, write_d0, 0xff00)
AM_RANGE(0x05e000, 0x05e00f) AM_DEVWRITE8("intlatch", ls259_device, write_d0, 0x00ff)
AM_RANGE(0x060000, 0x07ffff) AM_RAM /* WORK RAM */
AM_RANGE(0x080000, 0x0bffff) AM_ROM
ADDRESS_MAP_END
@ -352,12 +330,8 @@ static ADDRESS_MAP_START( konamigt_map, AS_PROGRAM, 16, nemesis_state )
AM_RANGE(0x05cc02, 0x05cc03) AM_READ_PORT("IN1")
AM_RANGE(0x05cc04, 0x05cc05) AM_READ_PORT("IN2")
AM_RANGE(0x05cc06, 0x05cc07) AM_READ_PORT("TEST")
AM_RANGE(0x05e000, 0x05e001) AM_WRITE(konamigt_irq2_enable_word_w)
AM_RANGE(0x05e002, 0x05e003) AM_WRITE(konamigt_irq_enable_word_w)
AM_RANGE(0x05e004, 0x05e005) AM_WRITE(nemesis_gfx_flipx_word_w)
AM_RANGE(0x05e006, 0x05e007) AM_WRITE(nemesis_gfx_flipy_word_w)
AM_RANGE(0x05e008, 0x05e009) AM_WRITENOP /* not used irq */
AM_RANGE(0x05e00e, 0x05e00f) AM_WRITENOP /* not used irq */
AM_RANGE(0x05e000, 0x05e00f) AM_DEVWRITE8("outlatch", ls259_device, write_d0, 0xff00)
AM_RANGE(0x05e000, 0x05e00f) AM_DEVWRITE8("intlatch", ls259_device, write_d0, 0x00ff)
AM_RANGE(0x060000, 0x067fff) AM_RAM /* WORK RAM */
AM_RANGE(0x070000, 0x070001) AM_READ(konamigt_input_word_r)
ADDRESS_MAP_END
@ -386,12 +360,8 @@ static ADDRESS_MAP_START( rf2_gx400_map, AS_PROGRAM, 16, nemesis_state )
AM_RANGE(0x05cc00, 0x05cc01) AM_READ_PORT("IN0")
AM_RANGE(0x05cc02, 0x05cc03) AM_READ_PORT("IN1")
AM_RANGE(0x05cc04, 0x05cc05) AM_READ_PORT("IN2")
AM_RANGE(0x05e000, 0x05e001) AM_WRITE(gx400_irq2_enable_word_w) /* ?? */
AM_RANGE(0x05e002, 0x05e003) AM_WRITE(gx400_irq1_enable_word_w) /* ?? */
AM_RANGE(0x05e004, 0x05e005) AM_WRITE(nemesis_gfx_flipx_word_w)
AM_RANGE(0x05e006, 0x05e007) AM_WRITE(nemesis_gfx_flipy_word_w)
AM_RANGE(0x05e008, 0x05e009) AM_WRITENOP /* IRQ acknowledge??? */
AM_RANGE(0x05e00e, 0x05e00f) AM_WRITE(gx400_irq4_enable_word_w) /* ?? */
AM_RANGE(0x05e000, 0x05e00f) AM_DEVWRITE8("outlatch", ls259_device, write_d0, 0xff00)
AM_RANGE(0x05e000, 0x05e00f) AM_DEVWRITE8("intlatch", ls259_device, write_d0, 0x00ff)
AM_RANGE(0x060000, 0x067fff) AM_RAM /* WORK RAM */
AM_RANGE(0x070000, 0x070001) AM_READ(konamigt_input_word_r)
AM_RANGE(0x080000, 0x0bffff) AM_ROM
@ -606,9 +576,7 @@ static ADDRESS_MAP_START( hcrash_map, AS_PROGRAM, 16, nemesis_state )
AM_RANGE(0x0c0008, 0x0c0009) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w) /* watchdog probably */
AM_RANGE(0x0c000a, 0x0c000b) AM_READ_PORT("IN0")
AM_RANGE(0x0c2000, 0x0c2001) AM_READ(konamigt_input_word_r) /* Konami GT control */
AM_RANGE(0x0c2800, 0x0c2801) AM_WRITENOP
AM_RANGE(0x0c2802, 0x0c2803) AM_WRITE(gx400_irq2_enable_word_w) // or at 0x0c2804 ?
AM_RANGE(0x0c2804, 0x0c2805) AM_WRITENOP
AM_RANGE(0x0c2800, 0x0c280f) AM_DEVWRITE8("intlatch", ls259_device, write_d0, 0x00ff) // ???
AM_RANGE(0x0c4000, 0x0c4001) AM_READ_PORT("IN1") AM_WRITE(selected_ip_word_w)
AM_RANGE(0x0c4002, 0x0c4003) AM_READ(selected_ip_word_r) AM_WRITENOP /* WEC Le Mans 24 control. latches the value read previously */
AM_RANGE(0x100000, 0x100fff) AM_RAM_WRITE(nemesis_videoram2_word_w) AM_SHARE("videoram2") /* VRAM */
@ -1468,9 +1436,6 @@ void nemesis_state::machine_start()
void nemesis_state::machine_reset()
{
m_irq_on = 0;
m_irq1_on = 0;
m_irq2_on = 0;
m_irq4_on = 0;
m_gx400_irq1_cnt = 0;
m_frame_counter = 1;
m_selected_ip = 0;
@ -1491,6 +1456,16 @@ static MACHINE_CONFIG_START( nemesis )
MCFG_CPU_ADD("audiocpu", Z80,14318180/4) /* From schematics, should be accurate */
MCFG_CPU_PROGRAM_MAP(sound_map) /* fixed */
MCFG_DEVICE_ADD("outlatch", LS259, 0) // 13J
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(nemesis_state, coin1_lockout_w))
MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE(nemesis_state, coin2_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(nemesis_state, sound_irq_w))
MCFG_DEVICE_ADD("intlatch", LS259, 0) // 11K
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(nemesis_state, irq_enable_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(nemesis_state, gfx_flipx_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(nemesis_state, gfx_flipy_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
@ -1548,6 +1523,18 @@ static MACHINE_CONFIG_START( gx400 )
MCFG_CPU_PROGRAM_MAP(gx400_sound_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", nemesis_state, nmi_line_pulse) /* interrupts are triggered by the main CPU */
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(nemesis_state, coin1_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(nemesis_state, coin2_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(nemesis_state, sound_irq_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(nemesis_state, irq4_enable_w)) // ??
MCFG_DEVICE_ADD("intlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(nemesis_state, irq2_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(nemesis_state, irq1_enable_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(nemesis_state, gfx_flipx_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(nemesis_state, gfx_flipy_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
@ -1608,6 +1595,17 @@ static MACHINE_CONFIG_START( konamigt )
MCFG_CPU_ADD("audiocpu", Z80,14318180/4) /* 3.579545 MHz */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(nemesis_state, coin2_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(nemesis_state, coin1_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(nemesis_state, sound_irq_w))
MCFG_DEVICE_ADD("intlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(nemesis_state, irq2_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(nemesis_state, irq_enable_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(nemesis_state, gfx_flipx_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(nemesis_state, gfx_flipy_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
@ -1665,6 +1663,18 @@ static MACHINE_CONFIG_START( rf2_gx400 )
MCFG_CPU_PROGRAM_MAP(gx400_sound_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", nemesis_state, nmi_line_pulse) /* interrupts are triggered by the main CPU */
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(nemesis_state, coin1_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(nemesis_state, coin2_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(nemesis_state, sound_irq_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(nemesis_state, irq4_enable_w)) // ??
MCFG_DEVICE_ADD("intlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(nemesis_state, irq2_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(nemesis_state, irq1_enable_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(nemesis_state, gfx_flipx_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(nemesis_state, gfx_flipy_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
@ -1922,6 +1932,11 @@ static MACHINE_CONFIG_START( hcrash )
MCFG_CPU_ADD("audiocpu", Z80,14318180/4) /* 3.579545 MHz */
MCFG_CPU_PROGRAM_MAP(sal_sound_map)
MCFG_DEVICE_ADD("intlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(NOOP) // ?
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(nemesis_state, irq2_enable_w)) // or at 0x0c2804 ?
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(NOOP) // ?
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
@ -2672,6 +2687,18 @@ static MACHINE_CONFIG_START( bubsys )
MCFG_CPU_PROGRAM_MAP(gx400_sound_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", nemesis_state, nmi_line_pulse) /* interrupts are triggered by the main CPU */
MCFG_DEVICE_ADD("outlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(nemesis_state, coin1_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(nemesis_state, coin2_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(nemesis_state, sound_irq_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(nemesis_state, irq4_enable_w)) // ??
MCFG_DEVICE_ADD("intlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(nemesis_state, irq2_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(nemesis_state, irq1_enable_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(nemesis_state, gfx_flipx_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(nemesis_state, gfx_flipy_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

56
src/mame/drivers/orbit.cpp
View File

@ -39,7 +39,7 @@ Atari Orbit Driver
TIMER_DEVICE_CALLBACK_MEMBER(orbit_state::nmi_32v)
{
int scanline = param;
int nmistate = (scanline & 32) && (m_misc_flags & 4);
int nmistate = (scanline & 32) && m_latch->q2_r();
m_maincpu->set_input_line(INPUT_LINE_NMI, nmistate ? ASSERT_LINE : CLEAR_LINE);
}
@ -64,37 +64,23 @@ INTERRUPT_GEN_MEMBER(orbit_state::orbit_interrupt)
*
*************************************/
void orbit_state::update_misc_flags(address_space &space, uint8_t val)
WRITE_LINE_MEMBER(orbit_state::coin_lockout_w)
{
m_misc_flags = val;
/* BIT0 => UNUSED */
/* BIT1 => LOCKOUT */
/* BIT2 => NMI ENABLE */
/* BIT3 => HEAT RST LED */
/* BIT4 => PANEL BUS OC */
/* BIT5 => PANEL STROBE */
/* BIT6 => HYPER LED */
/* BIT7 => WARNING SND */
m_discrete->write(space, ORBIT_WARNING_EN, BIT(m_misc_flags, 7));
output().set_led_value(0, BIT(m_misc_flags, 3));
output().set_led_value(1, BIT(m_misc_flags, 6));
machine().bookkeeping().coin_lockout_w(0, !BIT(m_misc_flags, 1));
machine().bookkeeping().coin_lockout_w(1, !BIT(m_misc_flags, 1));
machine().bookkeeping().coin_lockout_w(0, !state);
machine().bookkeeping().coin_lockout_w(1, !state);
}
WRITE8_MEMBER(orbit_state::orbit_misc_w)
WRITE_LINE_MEMBER(orbit_state::heat_rst_led_w)
{
uint8_t bit = offset >> 1;
output().set_led_value(0, state);
}
if (offset & 1)
update_misc_flags(space, m_misc_flags | (1 << bit));
else
update_misc_flags(space, m_misc_flags & ~(1 << bit));
WRITE_LINE_MEMBER(orbit_state::hyper_led_w)
{
output().set_led_value(1, state);
}
@ -118,7 +104,7 @@ static ADDRESS_MAP_START( orbit_map, AS_PROGRAM, 8, orbit_state )
AM_RANGE(0x3800, 0x3800) AM_MIRROR(0x00ff) AM_WRITE(orbit_note_w)
AM_RANGE(0x3900, 0x3900) AM_MIRROR(0x00ff) AM_WRITE(orbit_noise_amp_w)
AM_RANGE(0x3a00, 0x3a00) AM_MIRROR(0x00ff) AM_WRITE(orbit_note_amp_w)
AM_RANGE(0x3c00, 0x3c0f) AM_MIRROR(0x00f0) AM_WRITE(orbit_misc_w)
AM_RANGE(0x3c00, 0x3c0f) AM_MIRROR(0x00f0) AM_DEVWRITE("latch", f9334_device, write_a0)
AM_RANGE(0x3e00, 0x3e00) AM_MIRROR(0x00ff) AM_WRITE(orbit_noise_rst_w)
AM_RANGE(0x3f00, 0x3f00) AM_MIRROR(0x00ff) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x6000, 0x7fff) AM_ROM
@ -274,13 +260,11 @@ GFXDECODE_END
void orbit_state::machine_start()
{
save_item(NAME(m_misc_flags));
save_item(NAME(m_flip_screen));
}
void orbit_state::machine_reset()
{
update_misc_flags(generic_space(), 0);
m_flip_screen = 0;
}
@ -300,6 +284,20 @@ static MACHINE_CONFIG_START( orbit )
MCFG_TIMER_DRIVER_ADD_SCANLINE("32v", orbit_state, nmi_32v, "screen", 0, 32)
MCFG_DEVICE_ADD("latch", F9334, 0) // M6
/* BIT0 => UNUSED */
/* BIT1 => LOCKOUT */
/* BIT2 => NMI ENABLE */
/* BIT3 => HEAT RST LED */
/* BIT4 => PANEL BUS OC */
/* BIT5 => PANEL STROBE */
/* BIT6 => HYPER LED */
/* BIT7 => WARNING SND */
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(orbit_state, coin_lockout_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(orbit_state, heat_rst_led_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(orbit_state, hyper_led_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(DEVWRITELINE("discrete", discrete_device, write_line<ORBIT_WARNING_EN>))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

214
src/mame/drivers/pacman.cpp
View File

@ -345,7 +345,7 @@ Boards:
#include "cpu/s2650/s2650.h"
#include "cpu/z80/z80.h"
#include "machine/nvram.h"
#include "machine/watchdog.h"
#include "machine/74259.h"
#include "sound/ay8910.h"
#include "sound/sn76496.h"
#include "screen.h"
@ -415,9 +415,9 @@ INTERRUPT_GEN_MEMBER(pacman_state::vblank_nmi)
device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
WRITE8_MEMBER(pacman_state::irq_mask_w)
WRITE_LINE_MEMBER(pacman_state::irq_mask_w)
{
m_irq_mask = data & 1;
m_irq_mask = state;
}
WRITE8_MEMBER(pacman_state::pacman_interrupt_vector_w)
@ -507,21 +507,27 @@ WRITE8_MEMBER(pacman_state::nmouse_interrupt_vector_w)
*
*************************************/
WRITE8_MEMBER(pacman_state::pacman_leds_w)
WRITE_LINE_MEMBER(pacman_state::led1_w)
{
output().set_led_value(offset,data & 1);
output().set_led_value(0, state);
}
WRITE8_MEMBER(pacman_state::pacman_coin_counter_w)
WRITE_LINE_MEMBER(pacman_state::led2_w)
{
machine().bookkeeping().coin_counter_w(offset,data & 1);
output().set_led_value(1, state);
}
WRITE8_MEMBER(pacman_state::pacman_coin_lockout_global_w)
WRITE_LINE_MEMBER(pacman_state::coin_counter_w)
{
machine().bookkeeping().coin_lockout_global_w(~data & 0x01);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(pacman_state::coin_lockout_global_w)
{
machine().bookkeeping().coin_lockout_global_w(!state);
}
@ -971,13 +977,7 @@ static ADDRESS_MAP_START( pacman_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xaf38) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5002, 0x5002) AM_MIRROR(0xaf38) AM_WRITENOP
AM_RANGE(0x5003, 0x5003) AM_MIRROR(0xaf38) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5004, 0x5005) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_leds_w)
AM_RANGE(0x5006, 0x5006) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_coin_lockout_global_w)
AM_RANGE(0x5007, 0x5007) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5007) AM_MIRROR(0xaf38) AM_DEVWRITE("mainlatch", addressable_latch_device, write_d0)
AM_RANGE(0x5040, 0x505f) AM_MIRROR(0xaf00) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x5060, 0x506f) AM_MIRROR(0xaf00) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x5070, 0x507f) AM_MIRROR(0xaf00) AM_WRITENOP
@ -988,8 +988,6 @@ static ADDRESS_MAP_START( pacman_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x5080, 0x5080) AM_MIRROR(0xaf3f) AM_READ_PORT("DSW1")
AM_RANGE(0x50c0, 0x50c0) AM_MIRROR(0xaf3f) AM_READ_PORT("DSW2")
ADDRESS_MAP_END
// The Pacman code uses $5004 and $5005 for LED's and $5007 for coin lockout. This hardware does not
// exist on any Pacman or Puckman board I have seen. DW
static ADDRESS_MAP_START( patched_opcodes_map, AS_OPCODES, 8, pacman_state )
AM_RANGE(0x0000, 0x3fff) AM_MIRROR(0x8000) AM_ROM AM_SHARE("patched_opcodes")
@ -1003,13 +1001,7 @@ static ADDRESS_MAP_START( birdiy_map, AS_PROGRAM, 8, pacman_state )
// AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xaf38) AM_WRITE(irq_mask_w)
// AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xaf38) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
// AM_RANGE(0x5002, 0x5002) AM_MIRROR(0xaf38) AM_WRITENOP
AM_RANGE(0x5003, 0x5003) AM_MIRROR(0xaf38) AM_WRITE(pacman_flipscreen_w)
// AM_RANGE(0x5004, 0x5005) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_leds_w)
// AM_RANGE(0x5006, 0x5006) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_coin_lockout_global_w)
AM_RANGE(0x5007, 0x5007) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5007) AM_MIRROR(0xaf38) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x5080, 0x509f) AM_MIRROR(0xaf00) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x50a0, 0x50af) AM_MIRROR(0xaf00) AM_WRITEONLY AM_SHARE("spriteram2")
// AM_RANGE(0x5070, 0x507f) AM_MIRROR(0xaf00) AM_WRITENOP
@ -1028,13 +1020,7 @@ static ADDRESS_MAP_START( mspacman_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xaf38) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5002, 0x5002) AM_MIRROR(0xaf38) AM_WRITENOP
AM_RANGE(0x5003, 0x5003) AM_MIRROR(0xaf38) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5004, 0x5005) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_leds_w)
AM_RANGE(0x5006, 0x5006) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_lockout_global_w)
AM_RANGE(0x5007, 0x5007) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5007) AM_MIRROR(0xaf38) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x5040, 0x505f) AM_MIRROR(0xaf00) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x5060, 0x506f) AM_MIRROR(0xaf00) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x5070, 0x507f) AM_MIRROR(0xaf00) AM_WRITENOP
@ -1068,13 +1054,7 @@ static ADDRESS_MAP_START( woodpek_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xaf38) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5002, 0x5002) AM_MIRROR(0xaf38) AM_WRITENOP
AM_RANGE(0x5003, 0x5003) AM_MIRROR(0xaf38) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5004, 0x5005) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_leds_w)
AM_RANGE(0x5006, 0x5006) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_coin_lockout_global_w)
AM_RANGE(0x5007, 0x5007) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x5040, 0x505f) AM_MIRROR(0xaf00) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x5060, 0x506f) AM_MIRROR(0xaf00) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x5070, 0x507f) AM_MIRROR(0xaf00) AM_WRITENOP
@ -1101,13 +1081,7 @@ static ADDRESS_MAP_START( numcrash_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4c00, 0x4fef) AM_RAM
AM_RANGE(0x4ff0, 0x4fff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5000, 0x5000) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
// AM_RANGE(0x5002, 0x5002) AM_WRITENOP
// AM_RANGE(0x5003, 0x5003) AM_WRITE(pacman_flipscreen_w)
// AM_RANGE(0x5004, 0x5005) AM_WRITENOP // AM_WRITE(pacman_leds_w)
// AM_RANGE(0x5006, 0x5006) AM_WRITENOP // AM_WRITE(pacman_coin_lockout_global_w)
// AM_RANGE(0x5007, 0x5007) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x5040, 0x505f) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x5060, 0x506f) AM_WRITEONLY AM_SHARE("spriteram2")
// AM_RANGE(0x5070, 0x507f) AM_WRITENOP
@ -1129,17 +1103,12 @@ static ADDRESS_MAP_START( alibaba_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4ef0, 0x4eff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x4f00, 0x4fff) AM_MIRROR(0xa000) AM_RAM
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x5004, 0x5005) AM_MIRROR(0xaf38) AM_WRITE(pacman_leds_w)
AM_RANGE(0x5006, 0x5006) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_lockout_global_w)
AM_RANGE(0x5007, 0x5007) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5007) AM_MIRROR(0xaf38) AM_DEVWRITE("latch1", ls259_device, write_d0)
AM_RANGE(0x5040, 0x506f) AM_MIRROR(0xaf00) AM_WRITE(alibaba_sound_w) /* the sound region is not contiguous */
AM_RANGE(0x5060, 0x506f) AM_MIRROR(0xaf00) AM_WRITEONLY AM_SHARE("spriteram2") /* actually at 5050-505f, here to point to free RAM */
AM_RANGE(0x5070, 0x507f) AM_MIRROR(0xaf00) AM_WRITENOP
AM_RANGE(0x5080, 0x5080) AM_MIRROR(0xaf3f) AM_WRITENOP
AM_RANGE(0x50c0, 0x50c0) AM_MIRROR(0xaf00) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x50c1, 0x50c1) AM_MIRROR(0xaf00) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x50c2, 0x50c2) AM_MIRROR(0xaf00) AM_WRITE(irq_mask_w)
AM_RANGE(0x50c3, 0x50ff) AM_MIRROR(0xaf00) AM_WRITENOP
AM_RANGE(0x50c0, 0x50c7) AM_MIRROR(0xaf00) AM_DEVWRITE("latch2", ls259_device, write_d0)
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf3f) AM_READ_PORT("IN0")
AM_RANGE(0x5040, 0x5040) AM_MIRROR(0xaf3f) AM_READ_PORT("IN1")
AM_RANGE(0x5080, 0x5080) AM_MIRROR(0xaf3f) AM_READ_PORT("DSW1")
@ -1158,13 +1127,7 @@ static ADDRESS_MAP_START( dremshpr_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_SHARE("colorram")
AM_RANGE(0x4800, 0x4fef) AM_MIRROR(0xa000) AM_RAM
AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_WRITE(irq_mask_w)
// AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xaf38) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5002, 0x5002) AM_MIRROR(0xaf38) AM_WRITENOP /* unknown */
AM_RANGE(0x5003, 0x5003) AM_MIRROR(0xaf38) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5004, 0x5005) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_leds_w)
AM_RANGE(0x5006, 0x5006) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_coin_lockout_global_w)
AM_RANGE(0x5007, 0x5007) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5007) AM_MIRROR(0xaf38) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
// AM_RANGE(0x5040, 0x505f) AM_MIRROR(0xaf00) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x5060, 0x506f) AM_MIRROR(0xaf00) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x5070, 0x507f) AM_MIRROR(0xaf00) AM_WRITENOP
@ -1189,13 +1152,7 @@ static ADDRESS_MAP_START( epos_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xaf38) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5002, 0x5002) AM_MIRROR(0xaf38) AM_WRITENOP
AM_RANGE(0x5003, 0x5003) AM_MIRROR(0xaf38) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5004, 0x5005) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_leds_w)
AM_RANGE(0x5006, 0x5006) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_coin_lockout_global_w)
AM_RANGE(0x5007, 0x5007) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x5040, 0x505f) AM_MIRROR(0xaf00) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x5060, 0x506f) AM_MIRROR(0xaf00) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x5070, 0x507f) AM_MIRROR(0xaf00) AM_WRITENOP
@ -1216,10 +1173,7 @@ static ADDRESS_MAP_START( s2650games_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x1490, 0x149f) AM_MIRROR(0x6000) AM_WRITEONLY AM_SHARE("s2650_spriteram")
AM_RANGE(0x14a0, 0x14bf) AM_MIRROR(0x6000) AM_WRITE(s2650games_tilesbank_w) AM_SHARE("s2650_tileram")
AM_RANGE(0x14c0, 0x14ff) AM_MIRROR(0x6000) AM_WRITEONLY
AM_RANGE(0x1500, 0x1502) AM_MIRROR(0x6000) AM_WRITENOP
AM_RANGE(0x1503, 0x1503) AM_MIRROR(0x6000) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x1504, 0x1506) AM_MIRROR(0x6000) AM_WRITENOP
AM_RANGE(0x1507, 0x1507) AM_MIRROR(0x6000) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x1500, 0x1507) AM_MIRROR(0x6000) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x1508, 0x155f) AM_MIRROR(0x6000) AM_WRITEONLY
AM_RANGE(0x1560, 0x156f) AM_MIRROR(0x6000) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x1570, 0x157f) AM_MIRROR(0x6000) AM_WRITEONLY
@ -1243,10 +1197,7 @@ static ADDRESS_MAP_START( rocktrv2_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(pacman_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x4400, 0x47ff) AM_RAM_WRITE(pacman_colorram_w) AM_SHARE("colorram")
AM_RANGE(0x4c00, 0x4fff) AM_RAM
AM_RANGE(0x5000, 0x5000) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5003, 0x5003) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5007, 0x5007) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x5040, 0x505f) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x50c0, 0x50c0) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x5fe0, 0x5fe3) AM_WRITE(rocktrv2_prot_data_w) AM_SHARE("rocktrv2_prot")
@ -1270,10 +1221,7 @@ static ADDRESS_MAP_START( bigbucks_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(pacman_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x4400, 0x47ff) AM_RAM_WRITE(pacman_colorram_w) AM_SHARE("colorram")
AM_RANGE(0x4c00, 0x4fff) AM_RAM
AM_RANGE(0x5000, 0x5000) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5003, 0x5003) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5007, 0x5007) AM_WRITENOP /*?*/
AM_RANGE(0x5000, 0x5007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x5040, 0x505f) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x50c0, 0x50c0) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x5000, 0x503f) AM_READ_PORT("IN0")
@ -1293,13 +1241,7 @@ static ADDRESS_MAP_START( mschamp_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xaf38) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5002, 0x5002) AM_MIRROR(0xaf38) AM_WRITENOP
AM_RANGE(0x5003, 0x5003) AM_MIRROR(0xaf38) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5004, 0x5005) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_leds_w)
AM_RANGE(0x5006, 0x5006) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_coin_lockout_global_w)
AM_RANGE(0x5007, 0x5007) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x5040, 0x505f) AM_MIRROR(0xaf00) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x5060, 0x506f) AM_MIRROR(0xaf00) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x5070, 0x507f) AM_MIRROR(0xaf00) AM_WRITENOP
@ -1319,12 +1261,8 @@ static ADDRESS_MAP_START( superabc_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4400, 0x47ff) AM_MIRROR(0xa000) AM_RAM_WRITE(pacman_colorram_w) AM_SHARE("colorram")
AM_RANGE(0x4800, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("28c16.u17") // nvram
AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xaf38) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5002, 0x5002) AM_MIRROR(0xaf3c) AM_WRITE(superabc_bank_w)
AM_RANGE(0x5003, 0x5003) AM_MIRROR(0xaf38) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5004, 0x5005) AM_MIRROR(0xaf38) AM_WRITE(pacman_leds_w)
AM_RANGE(0x5007, 0x5007) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5007) AM_MIRROR(0xaf38) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x5040, 0x505f) AM_MIRROR(0xaf00) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x5060, 0x506f) AM_MIRROR(0xaf00) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x5070, 0x507f) AM_MIRROR(0xaf00) AM_WRITENOP
@ -1346,13 +1284,7 @@ static ADDRESS_MAP_START( crushs_map, AS_PROGRAM, 8, pacman_state )
AM_RANGE(0x4800, 0x4bff) AM_MIRROR(0xa000) AM_READ(pacman_read_nop) AM_WRITENOP
AM_RANGE(0x4c00, 0x4fef) AM_MIRROR(0xa000) AM_RAM
AM_RANGE(0x4ff0, 0x4fff) AM_MIRROR(0xa000) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_WRITE(irq_mask_w)
AM_RANGE(0x5001, 0x5001) AM_MIRROR(0xaf38) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x5002, 0x5002) AM_MIRROR(0xaf38) AM_WRITENOP
AM_RANGE(0x5003, 0x5003) AM_MIRROR(0xaf38) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x5004, 0x5005) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_leds_w)
AM_RANGE(0x5006, 0x5006) AM_MIRROR(0xaf38) AM_WRITENOP // AM_WRITE(pacman_coin_lockout_global_w)
AM_RANGE(0x5007, 0x5007) AM_MIRROR(0xaf38) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x5000, 0x5000) AM_MIRROR(0xaf38) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x5040, 0x505f) AM_MIRROR(0xaf00) AM_WRITENOP // doesn't use pacman sound hw
AM_RANGE(0x5060, 0x506f) AM_MIRROR(0xaf00) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x5070, 0x507f) AM_MIRROR(0xaf00) AM_WRITENOP
@ -1376,13 +1308,7 @@ static ADDRESS_MAP_START( pengojpm_map, AS_PROGRAM, 8, pacman_state )
// AM_RANGE(0x8800, 0x8bff) AM_READ(pacman_read_nop) AM_WRITENOP
AM_RANGE(0x8c00, 0x8fef) AM_RAM
AM_RANGE(0x8ff0, 0x8fff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x9000, 0x9000) AM_WRITE(irq_mask_w)
AM_RANGE(0x9001, 0x9001) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x9002, 0x9002) AM_WRITENOP
AM_RANGE(0x9003, 0x9003) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x9004, 0x9005) AM_WRITENOP // AM_WRITE(pacman_leds_w)
AM_RANGE(0x9006, 0x9006) AM_WRITENOP // AM_WRITE(pacman_coin_lockout_global_w)
AM_RANGE(0x9007, 0x9007) AM_WRITE(pacman_coin_counter_w)
AM_RANGE(0x9000, 0x9007) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
AM_RANGE(0x9040, 0x905f) AM_DEVWRITE("namco", namco_device, pacman_sound_w)
AM_RANGE(0x9060, 0x906f) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x9070, 0x907f) AM_WRITENOP
@ -3551,6 +3477,17 @@ static MACHINE_CONFIG_START( pacman )
MCFG_CPU_IO_MAP(writeport)
MCFG_CPU_VBLANK_INT_DRIVER("screen", pacman_state, vblank_irq)
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // 74LS259 at 8K or 4099 at 7K
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(pacman_state, irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("namco", namco_device, pacman_sound_enable_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(pacman_state, flipscreen_w))
//MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(pacman_state, led1_w))
//MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(pacman_state, led2_w))
//MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(pacman_state, coin_lockout_global_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(pacman_state, coin_counter_w))
// The Pacman code uses $5004 and $5005 for LED's and $5007 for coin lockout. This hardware does not
// exist on any Pacman or Puckman board I have seen. DW
MCFG_WATCHDOG_ADD("watchdog")
MCFG_WATCHDOG_VBLANK_INIT("screen", 16)
@ -3575,9 +3512,12 @@ static MACHINE_CONFIG_START( pacman )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( pacmanp, pacman )
static MACHINE_CONFIG_DERIVED( maketrax, pacman )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_DECRYPTED_OPCODES_MAP(patched_opcodes_map)
MCFG_DEVICE_MODIFY("mainlatch") // 8K on original boards
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) // outputs 4-7 go to protection chip at 6P
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( pengojpm, pacman )
@ -3593,6 +3533,15 @@ static MACHINE_CONFIG_DERIVED( birdiy, pacman )
MCFG_CPU_PROGRAM_MAP(birdiy_map)
MCFG_CPU_IO_MAP(0)
MCFG_DEVICE_REPLACE("mainlatch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(pacman_state, irq_mask_w))
//MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("namco", namco_device, pacman_sound_enable_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(pacman_state, flipscreen_w))
//MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(pacman_state, led1_w))
//MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(pacman_state, led2_w))
//MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(pacman_state, coin_lockout_global_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(pacman_state, coin_counter_w))
MCFG_VIDEO_START_OVERRIDE(pacman_state,birdiy)
MACHINE_CONFIG_END
@ -3620,6 +3569,9 @@ static MACHINE_CONFIG_DERIVED( mspacman, pacman )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(mspacman_map)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(pacman_state, coin_lockout_global_w))
MACHINE_CONFIG_END
@ -3635,6 +3587,10 @@ static MACHINE_CONFIG_DERIVED( numcrash, pacman )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(numcrash_map)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(NOOP) // ???
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) // ???
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( alibaba, pacman )
@ -3642,6 +3598,17 @@ static MACHINE_CONFIG_DERIVED( alibaba, pacman )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(alibaba_map)
MCFG_DEVICE_REMOVE("mainlatch")
MCFG_DEVICE_ADD("latch1", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(pacman_state, led1_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(pacman_state, led2_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(pacman_state, coin_lockout_global_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(pacman_state, coin_counter_w))
MCFG_DEVICE_ADD("latch2", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE("namco", namco_device, pacman_sound_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(pacman_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(pacman_state, irq_mask_w))
MACHINE_CONFIG_END
@ -3657,6 +3624,9 @@ static MACHINE_CONFIG_DERIVED( dremshpr, pacman )
MCFG_DEVICE_REMOVE("namco")
MCFG_SOUND_ADD("ay8910", AY8910, 14318000/8)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP)
MACHINE_CONFIG_END
@ -3716,6 +3686,9 @@ static MACHINE_CONFIG_DERIVED( vanvan, pacman )
MCFG_SOUND_ADD("sn2", SN76496, 1789750)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP)
MACHINE_CONFIG_END
@ -3729,6 +3702,9 @@ static MACHINE_CONFIG_DERIVED( bigbucks, pacman )
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_VISIBLE_AREA(0*8, 36*8-1, 0*8, 28*8-1)
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(NOOP) /*?*/
MACHINE_CONFIG_END
@ -3742,6 +3718,16 @@ static MACHINE_CONFIG_DERIVED( s2650games, pacman )
MCFG_CPU_VBLANK_INT_DRIVER("screen", pacman_state, s2650_interrupt)
MCFG_S2650_SENSE_INPUT(DEVREADLINE("screen", screen_device, vblank)) MCFG_DEVCB_INVERT
MCFG_DEVICE_MODIFY("mainlatch")
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(NOOP)
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP)
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(NOOP)
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(pacman_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(NOOP)
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP)
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(NOOP)
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(pacman_state, coin_counter_w))
MCFG_GFXDECODE_MODIFY("gfxdecode", s2650games)
MCFG_SCREEN_MODIFY("screen")
@ -7330,20 +7316,20 @@ GAME( 1985, jumpshotp,jumpshot, pacman, jumpshotp,pacman_state, jumpshot, ROT
GAME( 1985, shootbul, 0, pacman, shootbul, pacman_state, jumpshot, ROT90, "Bally Midway", "Shoot the Bull", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crush, 0, pacmanp, maketrax, pacman_state, maketrax, ROT90, "Alpha Denshi Co. / Kural Samno Electric, Ltd.", "Crush Roller (set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crush, 0, maketrax, maketrax, pacman_state, maketrax, ROT90, "Alpha Denshi Co. / Kural Samno Electric, Ltd.", "Crush Roller (set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crush2, crush, pacman, maketrax, pacman_state, 0, ROT90, "Alpha Denshi Co. / Kural Esco Electric, Ltd.", "Crush Roller (set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crush3, crush, pacmanp, maketrax, pacman_state, maketrax, ROT90, "Alpha Denshi Co. / Kural Electric, Ltd.", "Crush Roller (set 3)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crush3, crush, maketrax, maketrax, pacman_state, maketrax, ROT90, "Alpha Denshi Co. / Kural Electric, Ltd.", "Crush Roller (set 3)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crush4, crush, pacman, maketrax, pacman_state, eyes, ROT90, "Alpha Denshi Co. / Kural Electric, Ltd.", "Crush Roller (set 4)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crush5, crush, crush4, crush4, pacman_state, 0, ROT90, "Alpha Denshi Co. / Kural TWT", "Crush Roller (set 5)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, maketrax, crush, pacmanp, maketrax, pacman_state, maketrax, ROT270, "Alpha Denshi Co. / Kural (Williams license)", "Make Trax (US set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, maketrxb, crush, pacmanp, maketrax, pacman_state, maketrax, ROT270, "Alpha Denshi Co. / Kural (Williams license)", "Make Trax (US set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, korosuke, crush, pacmanp, korosuke, pacman_state, korosuke, ROT90, "Alpha Denshi Co. / Kural Electric, Ltd.", "Korosuke Roller (Japan)", MACHINE_SUPPORTS_SAVE ) // ADK considers it a sequel?
GAME( 1981, maketrax, crush, maketrax, maketrax, pacman_state, maketrax, ROT270, "Alpha Denshi Co. / Kural (Williams license)", "Make Trax (US set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, maketrxb, crush, maketrax, maketrax, pacman_state, maketrax, ROT270, "Alpha Denshi Co. / Kural (Williams license)", "Make Trax (US set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, korosuke, crush, maketrax, korosuke, pacman_state, korosuke, ROT90, "Alpha Denshi Co. / Kural Electric, Ltd.", "Korosuke Roller (Japan)", MACHINE_SUPPORTS_SAVE ) // ADK considers it a sequel?
GAME( 1981, crushrlf, crush, pacman, maketrax, pacman_state, 0, ROT90, "bootleg", "Crush Roller (Famaresa PCB)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crushbl, crush, pacman, maketrax, pacman_state, 0, ROT90, "bootleg", "Crush Roller (bootleg set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crushbl2, crush, pacmanp, mbrush, pacman_state, maketrax, ROT90, "bootleg", "Crush Roller (bootleg set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crushbl3, crush, pacmanp, mbrush, pacman_state, maketrax, ROT90, "bootleg", "Crush Roller (bootleg set 3)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crushbl2, crush, maketrax, mbrush, pacman_state, maketrax, ROT90, "bootleg", "Crush Roller (bootleg set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crushbl3, crush, maketrax, mbrush, pacman_state, maketrax, ROT90, "bootleg", "Crush Roller (bootleg set 3)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, crushs, crush, crushs, crushs, pacman_state, 0, ROT90, "bootleg (Sidam)", "Crush Roller (bootleg set 4)", MACHINE_SUPPORTS_SAVE ) // Sidam PCB, no Sidam text
GAME( 1981, mbrush, crush, pacmanp, mbrush, pacman_state, maketrax, ROT90, "bootleg (Olympia)", "Magic Brush (bootleg of Crush Roller)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, mbrush, crush, maketrax, mbrush, pacman_state, maketrax, ROT90, "bootleg (Olympia)", "Magic Brush (bootleg of Crush Roller)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, paintrlr, crush, pacman, paintrlr, pacman_state, 0, ROT90, "bootleg", "Paint Roller (bootleg of Crush Roller)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, eyes, 0, pacman, eyes, pacman_state, eyes, ROT90, "Techstar (Rock-Ola license)", "Eyes (US set 1)", MACHINE_SUPPORTS_SAVE )

73
src/mame/drivers/pandoras.cpp
View File

@ -30,6 +30,7 @@ Boards:
#include "cpu/m6809/m6809.h"
#include "cpu/mcs48/mcs48.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "machine/watchdog.h"
#include "sound/ay8910.h"
@ -46,49 +47,27 @@ Boards:
INTERRUPT_GEN_MEMBER(pandoras_state::pandoras_master_interrupt)
{
if (m_irq_enable_a)
device.execute().set_input_line(M6809_IRQ_LINE, HOLD_LINE);
device.execute().set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
}
INTERRUPT_GEN_MEMBER(pandoras_state::pandoras_slave_interrupt)
{
if (m_irq_enable_b)
device.execute().set_input_line(M6809_IRQ_LINE, HOLD_LINE);
device.execute().set_input_line(M6809_IRQ_LINE, ASSERT_LINE);
}
WRITE8_MEMBER(pandoras_state::pandoras_int_control_w)
WRITE_LINE_MEMBER(pandoras_state::cpua_irq_enable_w)
{
/* byte 0: irq enable (CPU A)
byte 2: coin counter 1
byte 3: coin counter 2
byte 5: flip screen
byte 6: irq enable (CPU B)
byte 7: NMI to CPU B
if (!state)
m_maincpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
m_irq_enable_a = state;
}
other bytes unknown */
switch (offset)
{
case 0x00: if (!data)
m_maincpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
m_irq_enable_a = data;
break;
case 0x02: machine().bookkeeping().coin_counter_w(0,data & 0x01);
break;
case 0x03: machine().bookkeeping().coin_counter_w(1,data & 0x01);
break;
case 0x05: pandoras_flipscreen_w(space, 0, data);
break;
case 0x06: if (!data)
m_subcpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
m_irq_enable_b = data;
break;
case 0x07: m_subcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
break;
default: logerror("%04x: (irq_ctrl) write %02x to %02x\n",space.device().safe_pc(), data, offset);
break;
}
WRITE_LINE_MEMBER(pandoras_state::cpub_irq_enable_w)
{
if (!state)
m_subcpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
m_irq_enable_b = state;
}
WRITE8_MEMBER(pandoras_state::pandoras_cpua_irqtrigger_w)
@ -127,13 +106,22 @@ WRITE8_MEMBER(pandoras_state::pandoras_z80_irqtrigger_w)
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
}
WRITE_LINE_MEMBER(pandoras_state::coin_counter_1_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(pandoras_state::coin_counter_2_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
static ADDRESS_MAP_START( pandoras_master_map, AS_PROGRAM, 8, pandoras_state )
AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("spriteram") /* Work RAM (Shared with CPU B) */
AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(pandoras_cram_w) AM_SHARE("colorram") /* Color RAM (shared with CPU B) */
AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(pandoras_vram_w) AM_SHARE("videoram") /* Video RAM (shared with CPU B) */
AM_RANGE(0x1800, 0x1807) AM_WRITE(pandoras_int_control_w) /* INT control */
AM_RANGE(0x1800, 0x1807) AM_DEVWRITE("mainlatch", ls259_device, write_d0) /* INT control */
AM_RANGE(0x1a00, 0x1a00) AM_WRITE(pandoras_scrolly_w) /* bg scroll */
AM_RANGE(0x1c00, 0x1c00) AM_WRITE(pandoras_z80_irqtrigger_w) /* cause INT on the Z80 */
AM_RANGE(0x1e00, 0x1e00) AM_DEVWRITE("soundlatch", generic_latch_8_device, write) /* sound command to the Z80 */
@ -149,7 +137,7 @@ static ADDRESS_MAP_START( pandoras_slave_map, AS_PROGRAM, 8, pandoras_state )
AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(pandoras_cram_w) AM_SHARE("colorram") /* Color RAM (shared with CPU A) */
AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(pandoras_vram_w) AM_SHARE("videoram") /* Video RAM (shared with CPU A) */
AM_RANGE(0x1800, 0x1800) AM_READ_PORT("DSW1")
AM_RANGE(0x1800, 0x1807) AM_WRITE(pandoras_int_control_w) /* INT control */
AM_RANGE(0x1800, 0x1807) AM_DEVWRITE("mainlatch", ls259_device, write_d0) /* INT control */
AM_RANGE(0x1a00, 0x1a00) AM_READ_PORT("SYSTEM")
AM_RANGE(0x1a01, 0x1a01) AM_READ_PORT("P1")
AM_RANGE(0x1a02, 0x1a02) AM_READ_PORT("P2")
@ -304,11 +292,7 @@ void pandoras_state::machine_reset()
{
m_firq_old_data_a = 0;
m_firq_old_data_b = 0;
m_irq_enable_a = 0;
m_irq_enable_b = 0;
m_i8039_status = 0;
m_flipscreen = 0;
}
READ8_MEMBER(pandoras_state::pandoras_portA_r)
@ -343,6 +327,15 @@ static MACHINE_CONFIG_START( pandoras )
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - needed for correct synchronization of the sound CPUs */
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // C3
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(pandoras_state, cpua_irq_enable_w)) // ENA
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(NOOP) // OFSET - unknown
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(pandoras_state, coin_counter_1_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(pandoras_state, coin_counter_2_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(pandoras_state, flipscreen_w)) // FLIP
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(pandoras_state, cpub_irq_enable_w)) // ENB
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(INPUTLINE("sub", INPUT_LINE_NMI)) MCFG_DEVCB_INVERT // RESETB
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

57
src/mame/drivers/pengo.cpp
View File

@ -67,6 +67,7 @@
#include "includes/pacman.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/segacrpt_device.h"
#include "screen.h"
#include "speaker.h"
@ -77,8 +78,9 @@ class pengo_state : public pacman_state
public:
pengo_state(const machine_config &mconfig, device_type type, const char *tag)
: pacman_state(mconfig, type, tag), m_decrypted_opcodes(*this, "decrypted_opcodes") { }
DECLARE_WRITE8_MEMBER(pengo_coin_counter_w);
DECLARE_WRITE8_MEMBER(irq_mask_w);
DECLARE_WRITE_LINE_MEMBER(coin_counter_1_w);
DECLARE_WRITE_LINE_MEMBER(coin_counter_2_w);
DECLARE_WRITE_LINE_MEMBER(irq_mask_w);
DECLARE_DRIVER_INIT(penta);
INTERRUPT_GEN_MEMBER(vblank_irq);
@ -115,14 +117,19 @@ public:
*
*************************************/
WRITE8_MEMBER(pengo_state::pengo_coin_counter_w)
WRITE_LINE_MEMBER(pengo_state::coin_counter_1_w)
{
machine().bookkeeping().coin_counter_w(offset, data & 1);
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE8_MEMBER(pengo_state::irq_mask_w)
WRITE_LINE_MEMBER(pengo_state::coin_counter_2_w)
{
m_irq_mask = data & 1;
machine().bookkeeping().coin_counter_w(1, state);
}
WRITE_LINE_MEMBER(pengo_state::irq_mask_w)
{
m_irq_mask = state;
}
static ADDRESS_MAP_START( pengo_map, AS_PROGRAM, 8, pengo_state )
@ -135,14 +142,8 @@ static ADDRESS_MAP_START( pengo_map, AS_PROGRAM, 8, pengo_state )
AM_RANGE(0x9020, 0x902f) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x9000, 0x903f) AM_READ_PORT("DSW1")
AM_RANGE(0x9040, 0x907f) AM_READ_PORT("DSW0")
AM_RANGE(0x9040, 0x9040) AM_WRITE(irq_mask_w)
AM_RANGE(0x9041, 0x9041) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x9042, 0x9042) AM_WRITE(pengo_palettebank_w)
AM_RANGE(0x9043, 0x9043) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x9044, 0x9045) AM_WRITE(pengo_coin_counter_w)
AM_RANGE(0x9046, 0x9046) AM_WRITE(pengo_colortablebank_w)
AM_RANGE(0x9047, 0x9047) AM_WRITE(pengo_gfxbank_w)
AM_RANGE(0x9070, 0x9070) AM_WRITENOP
AM_RANGE(0x9040, 0x9047) AM_DEVWRITE("latch", ls259_device, write_d0)
AM_RANGE(0x9070, 0x9070) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x9080, 0x90bf) AM_READ_PORT("IN1")
AM_RANGE(0x90c0, 0x90ff) AM_READ_PORT("IN0")
ADDRESS_MAP_END
@ -164,15 +165,8 @@ static ADDRESS_MAP_START( jrpacmbl_map, AS_PROGRAM, 8, pengo_state )
AM_RANGE(0x9020, 0x902f) AM_WRITEONLY AM_SHARE("spriteram2")
AM_RANGE(0x9030, 0x9030) AM_WRITE(jrpacman_scroll_w)
AM_RANGE(0x9040, 0x904f) AM_READ_PORT("DSW")
AM_RANGE(0x9040, 0x9040) AM_WRITE(irq_mask_w)
AM_RANGE(0x9041, 0x9041) AM_DEVWRITE("namco", namco_device, pacman_sound_enable_w)
AM_RANGE(0x9042, 0x9042) AM_WRITE(pengo_palettebank_w)
AM_RANGE(0x9043, 0x9043) AM_WRITE(pacman_flipscreen_w)
AM_RANGE(0x9044, 0x9044) AM_WRITE(jrpacman_bgpriority_w)
AM_RANGE(0x9045, 0x9045) AM_WRITE(jrpacman_spritebank_w)
AM_RANGE(0x9046, 0x9046) AM_WRITE(pengo_colortablebank_w)
AM_RANGE(0x9047, 0x9047) AM_WRITE(jrpacman_charbank_w)
AM_RANGE(0x9070, 0x9070) AM_WRITENOP
AM_RANGE(0x9040, 0x9047) AM_DEVWRITE("latch", ls259_device, write_d0)
AM_RANGE(0x9070, 0x9070) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0x9080, 0x90bf) AM_READ_PORT("P2")
AM_RANGE(0x90c0, 0x90ff) AM_READ_PORT("P1")
ADDRESS_MAP_END
@ -380,6 +374,18 @@ static MACHINE_CONFIG_START( pengo )
MCFG_CPU_DECRYPTED_OPCODES_MAP(decrypted_opcodes_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", pengo_state, vblank_irq)
MCFG_DEVICE_ADD("latch", LS259, 0) // U27
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(pengo_state, irq_mask_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("namco", namco_device, pacman_sound_enable_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(pengo_state, pengo_palettebank_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(pengo_state, flipscreen_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(pengo_state, coin_counter_1_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(pengo_state, coin_counter_2_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(pengo_state, pengo_colortablebank_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(pengo_state, pengo_gfxbank_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
MCFG_GFXDECODE_ADD("gfxdecode", "palette", pengo)
MCFG_PALETTE_ADD("palette", 128*4)
@ -422,6 +428,11 @@ static MACHINE_CONFIG_DERIVED( jrpacmbl, pengo )
MCFG_CPU_PROGRAM_MAP(jrpacmbl_map)
MCFG_DEVICE_REMOVE_ADDRESS_MAP(AS_OPCODES)
MCFG_DEVICE_MODIFY("latch")
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(pengo_state, jrpacman_bgpriority_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(pengo_state, jrpacman_spritebank_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(pengo_state, jrpacman_charbank_w))
MCFG_VIDEO_START_OVERRIDE(pengo_state,jrpacman)
MACHINE_CONFIG_END

37
src/mame/drivers/playch10.cpp
View File

@ -296,6 +296,7 @@ Notes & Todo:
#include "cpu/m6502/n2a03.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/rp5h01.h"
#include "machine/nvram.h"
@ -307,9 +308,9 @@ Notes & Todo:
/******************************************************************************/
WRITE8_MEMBER(playch10_state::up8w_w)
WRITE_LINE_MEMBER(playch10_state::up8w_w)
{
m_up_8w = data & 1;
m_up_8w = state;
}
READ8_MEMBER(playch10_state::ram_8w_r)
@ -361,18 +362,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( bios_io_map, AS_IO, 8, playch10_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ_PORT("BIOS") AM_WRITE(pc10_SDCS_w)
AM_RANGE(0x01, 0x01) AM_READ_PORT("SW1") AM_WRITE(pc10_CNTRLMASK_w)
AM_RANGE(0x02, 0x02) AM_READ_PORT("SW2") AM_WRITE(pc10_DISPMASK_w)
AM_RANGE(0x03, 0x03) AM_READWRITE(pc10_detectclr_r, pc10_SOUNDMASK_w)
AM_RANGE(0x04, 0x04) AM_WRITE(pc10_GAMERES_w)
AM_RANGE(0x05, 0x05) AM_WRITE(pc10_GAMESTOP_w)
AM_RANGE(0x06, 0x07) AM_WRITENOP
AM_RANGE(0x08, 0x08) AM_WRITE(pc10_NMIENABLE_w)
AM_RANGE(0x09, 0x09) AM_WRITE(pc10_DOGDI_w)
AM_RANGE(0x0a, 0x0a) AM_WRITE(pc10_PPURES_w)
AM_RANGE(0x0b, 0x0e) AM_WRITE(pc10_CARTSEL_w)
AM_RANGE(0x0f, 0x0f) AM_WRITE(up8w_w)
AM_RANGE(0x00, 0x00) AM_READ_PORT("BIOS")
AM_RANGE(0x01, 0x01) AM_READ_PORT("SW1")
AM_RANGE(0x02, 0x02) AM_READ_PORT("SW2")
AM_RANGE(0x03, 0x03) AM_READ(pc10_detectclr_r)
AM_RANGE(0x00, 0x07) AM_DEVWRITE("outlatch1", ls259_device, write_d0)
AM_RANGE(0x08, 0x0f) AM_DEVWRITE("outlatch2", ls259_device, write_d0)
AM_RANGE(0x10, 0x13) AM_WRITE(time_w) AM_SHARE("timedata")
ADDRESS_MAP_END
@ -655,6 +650,20 @@ static MACHINE_CONFIG_START( playch10 )
MCFG_CPU_ADD("cart", N2A03, NTSC_APU_CLOCK)
MCFG_CPU_PROGRAM_MAP(cart_map)
MCFG_DEVICE_ADD("outlatch1", LS259, 0) // 7D
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(playch10_state, SDCS_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(playch10_state, CNTRLMASK_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(playch10_state, DISPMASK_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(playch10_state, SOUNDMASK_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(INPUTLINE("cart", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT // GAMERES
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(INPUTLINE("cart", INPUT_LINE_HALT)) MCFG_DEVCB_INVERT // GAMESTOP
MCFG_DEVICE_ADD("outlatch2", LS259, 0) // 7E
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(playch10_state, NMIENABLE_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(playch10_state, DOGDI_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(playch10_state, PPURES_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(playch10_state, up8w_w))
MCFG_ADDRESSABLE_LATCH_PARALLEL_OUT_CB(WRITE8(playch10_state, CARTSEL_w)) MCFG_DEVCB_MASK(0x78) MCFG_DEVCB_RSHIFT(-3)
// video hardware
MCFG_GFXDECODE_ADD("gfxdecode", "palette", playch10)

97
src/mame/drivers/polepos.cpp
View File

@ -225,6 +225,7 @@ Todo:
#include "cpu/z80/z80.h"
#include "cpu/z8000/z8000.h"
#include "cpu/mb88xx/mb88xx.h"
#include "machine/74259.h"
#include "machine/namco06.h"
#include "machine/namco51.h"
#include "machine/namco53.h"
@ -289,53 +290,36 @@ READ8_MEMBER(polepos_state::polepos_ready_r)
}
WRITE8_MEMBER(polepos_state::polepos_latch_w)
WRITE_LINE_MEMBER(polepos_state::iosel_w)
{
int bit = data & 1;
switch (offset)
{
case 0x00: /* IRQON */
m_main_irq_mask = bit;
if (!bit)
m_maincpu->set_input_line(0, CLEAR_LINE);
break;
case 0x01: /* IOSEL */
// polepos_mcu_enable_w(offset,data);
break;
}
case 0x02: /* CLSON */
m_namco_sound->polepos_sound_enable(bit);
if (!bit)
{
machine().device<polepos_sound_device>("polepos")->polepos_engine_sound_lsb_w(space, 0, 0);
machine().device<polepos_sound_device>("polepos")->polepos_engine_sound_msb_w(space, 0, 0);
}
break;
case 0x03: /* GASEL */
m_adc_input = bit;
break;
case 0x04: /* RESB */
m_subcpu->set_input_line(INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
break;
case 0x05: /* RESA */
m_subcpu2->set_input_line(INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
break;
case 0x06: /* SB0 */
m_auto_start_mask = !bit;
break;
case 0x07: /* CHACL */
polepos_chacl_w(space,offset,data);
break;
WRITE_LINE_MEMBER(polepos_state::clson_w)
{
m_namco_sound->polepos_sound_enable(state);
if (!state)
{
machine().device<polepos_sound_device>("polepos")->polepos_engine_sound_lsb_w(machine().dummy_space(), 0, 0);
machine().device<polepos_sound_device>("polepos")->polepos_engine_sound_msb_w(machine().dummy_space(), 0, 0);
}
}
WRITE_LINE_MEMBER(polepos_state::gasel_w)
{
m_adc_input = state;
}
WRITE_LINE_MEMBER(polepos_state::sb0_w)
{
m_auto_start_mask = !state;
}
WRITE_LINE_MEMBER(polepos_state::chacl_w)
{
polepos_chacl_w(machine().dummy_space(), 0, state);
}
WRITE16_MEMBER(polepos_state::polepos_z8002_nvi_enable_w)
{
data &= 1;
@ -414,7 +398,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(polepos_state::polepos_scanline)
{
int scanline = param;
if (((scanline == 64) || (scanline == 192)) && m_main_irq_mask) // 64V
if (((scanline == 64) || (scanline == 192)) && m_latch->q0_r()) // 64V
m_maincpu->set_input_line(0, ASSERT_LINE);
if (scanline == 240 && m_sub_irq_mask) // VBLANK
@ -427,13 +411,6 @@ TIMER_DEVICE_CALLBACK_MEMBER(polepos_state::polepos_scanline)
MACHINE_RESET_MEMBER(polepos_state,polepos)
{
address_space &space = m_maincpu->space(AS_PROGRAM);
int i;
/* Reset all latches */
for (i = 0; i < 8; i++)
polepos_latch_w(space, i, 0);
/* set the interrupt vectors (this shouldn't be needed) */
m_subcpu->set_input_line_vector(0, Z8000_NVI);
m_subcpu2->set_input_line_vector(0, Z8000_NVI);
@ -459,7 +436,7 @@ static ADDRESS_MAP_START( z80_map, AS_PROGRAM, 8, polepos_state )
AM_RANGE(0x9000, 0x9000) AM_MIRROR(0x0eff) AM_DEVREADWRITE("06xx", namco_06xx_device, data_r, data_w)
AM_RANGE(0x9100, 0x9100) AM_MIRROR(0x0eff) AM_DEVREADWRITE("06xx", namco_06xx_device, ctrl_r, ctrl_w)
AM_RANGE(0xa000, 0xa000) AM_MIRROR(0x0cff) AM_READ(polepos_ready_r) /* READY */
AM_RANGE(0xa000, 0xa007) AM_MIRROR(0x0cf8) AM_WRITE(polepos_latch_w) /* misc latches */
AM_RANGE(0xa000, 0xa007) AM_MIRROR(0x0cf8) AM_DEVWRITE("latch", ls259_device, write_d0)
AM_RANGE(0xa100, 0xa100) AM_MIRROR(0x0cff) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0xa200, 0xa200) AM_MIRROR(0x0cff) AM_DEVWRITE("polepos", polepos_sound_device, polepos_engine_sound_lsb_w) /* Car Sound ( Lower Nibble ) */
AM_RANGE(0xa300, 0xa300) AM_MIRROR(0x0cff) AM_DEVWRITE("polepos", polepos_sound_device, polepos_engine_sound_msb_w) /* Car Sound ( Upper Nibble ) */
@ -920,6 +897,16 @@ static MACHINE_CONFIG_START( polepos )
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", polepos_state, polepos_scanline, "screen", 0, 1)
MCFG_DEVICE_ADD("latch", LS259, 0) // at 8E on polepos
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(CLEARLINE("maincpu", 0)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(polepos_state, iosel_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(polepos_state, clson_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(polepos_state, gasel_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(INPUTLINE("sub2", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(polepos_state, sb0_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(polepos_state, chacl_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK/4, 384, 0, 256, 264, 16, 224+16)
@ -1018,6 +1005,16 @@ static MACHINE_CONFIG_START( topracern )
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", polepos_state, polepos_scanline, "screen", 0, 1)
MCFG_DEVICE_ADD("latch", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(CLEARLINE("maincpu", 0)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(polepos_state, iosel_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(WRITELINE(polepos_state, clson_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(polepos_state, gasel_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(INPUTLINE("sub", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(INPUTLINE("sub2", INPUT_LINE_RESET)) MCFG_DEVCB_INVERT
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(polepos_state, sb0_w))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(polepos_state, chacl_w))
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK/4, 384, 0, 256, 264, 16, 224+16)

37
src/mame/drivers/pooyan.cpp
View File

@ -16,6 +16,7 @@
#include "audio/timeplt.h"
#include "cpu/z80/z80.h"
#include "machine/74259.h"
#include "machine/gen_latch.h"
#include "machine/watchdog.h"
#include "screen.h"
@ -37,14 +38,26 @@ INTERRUPT_GEN_MEMBER(pooyan_state::interrupt)
}
WRITE8_MEMBER(pooyan_state::irq_enable_w)
WRITE_LINE_MEMBER(pooyan_state::irq_enable_w)
{
m_irq_enable = data & 1;
m_irq_enable = state;
if (!m_irq_enable)
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
WRITE_LINE_MEMBER(pooyan_state::coin_counter_1_w)
{
machine().bookkeeping().coin_counter_w(0, state);
}
WRITE_LINE_MEMBER(pooyan_state::coin_counter_2_w)
{
machine().bookkeeping().coin_counter_w(1, state);
}
/*************************************
*
* Memory maps
@ -65,10 +78,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, pooyan_state )
AM_RANGE(0xa0e0, 0xa0e0) AM_MIRROR(0x5e1f) AM_READ_PORT("DSW0")
AM_RANGE(0xa000, 0xa000) AM_MIRROR(0x5e7f) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0xa100, 0xa100) AM_MIRROR(0x5e7f) AM_DEVWRITE("soundlatch", generic_latch_8_device, write)
AM_RANGE(0xa180, 0xa180) AM_MIRROR(0x5e78) AM_WRITE(irq_enable_w)
AM_RANGE(0xa181, 0xa181) AM_MIRROR(0x5e78) AM_DEVWRITE("timeplt_audio", timeplt_audio_device, sh_irqtrigger_w)
AM_RANGE(0xa183, 0xa183) AM_MIRROR(0x5e78) AM_WRITENOP // ???
AM_RANGE(0xa187, 0xa187) AM_MIRROR(0x5e78) AM_WRITE(flipscreen_w)
AM_RANGE(0xa180, 0xa187) AM_MIRROR(0x5e78) AM_DEVWRITE("mainlatch", ls259_device, write_d0)
ADDRESS_MAP_END
@ -182,12 +192,6 @@ void pooyan_state::machine_start()
}
void pooyan_state::machine_reset()
{
m_irq_enable = 0;
}
static MACHINE_CONFIG_START( pooyan )
/* basic machine hardware */
@ -195,6 +199,15 @@ static MACHINE_CONFIG_START( pooyan )
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", pooyan_state, interrupt)
MCFG_DEVICE_ADD("mainlatch", LS259, 0) // B2
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(pooyan_state, irq_enable_w))
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE("timeplt_audio", timeplt_audio_device, sh_irqtrigger_w))
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE("timeplt_audio", timeplt_audio_device, mute_w))
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(pooyan_state, coin_counter_1_w))
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(pooyan_state, coin_counter_2_w))
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(NOOP) // PAY OUT - not used
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(pooyan_state, flipscreen_w))
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */

213
src/mame/drivers/prof80.cpp
View File

@ -47,119 +47,80 @@ void prof80_state::motor(int mon)
}
//-------------------------------------------------
// ls259_w -
//-------------------------------------------------
void prof80_state::ls259_w(int fa, int sa, int fb, int sb)
WRITE_LINE_MEMBER(prof80_state::ready_w)
{
switch (sa)
if (m_ready != state)
{
case 0: // C0/TDI
m_rtc->data_in_w(fa);
m_rtc->c0_w(fa);
m_c0 = fa;
break;
case 1: // C1
m_rtc->c1_w(fa);
m_c1 = fa;
break;
case 2: // C2
m_rtc->c2_w(fa);
m_c2 = fa;
break;
case 3: // READY
if (m_ready != fa)
{
m_fdc->set_ready_line_connected(!fa);
m_fdc->ready_w(!fa);
m_ready = fa;
}
break;
case 4: // TCK
m_rtc->clk_w(fa);
break;
case 5: // IN USE
//m_floppy->inuse_w(fa);
break;
case 6: // _MOTOR
if (fa)
{
// trigger floppy motor off NE555 timer
int t = 110 * RES_M(10) * CAP_U(6.8); // t = 1.1 * R8 * C6
timer_set(attotime::from_msec(t), TIMER_ID_MOTOR);
}
else
{
// turn on floppy motor
motor(0);
// reset floppy motor off NE555 timer
timer_set(attotime::never, TIMER_ID_MOTOR);
}
break;
case 7: // SELECT
if (m_select != fa)
{
//m_fdc->set_select_lines_connected(fa);
m_select = fa;
}
break;
m_fdc->set_ready_line_connected(!state);
m_fdc->ready_w(!state);
m_ready = state;
}
}
switch (sb)
WRITE_LINE_MEMBER(prof80_state::inuse_w)
{
//m_floppy->inuse_w(state);
}
WRITE_LINE_MEMBER(prof80_state::motor_w)
{
if (state)
{
case 0: // RESF
if (fb) m_fdc->soft_reset();
break;
// trigger floppy motor off NE555 timer
int t = 110 * RES_M(10) * CAP_U(6.8); // t = 1.1 * R8 * C6
case 1: // MINI
break;
timer_set(attotime::from_msec(t), TIMER_ID_MOTOR);
}
else
{
// turn on floppy motor
motor(0);
case 2: // _RTS
m_rs232a->write_rts(fb);
break;
// reset floppy motor off NE555 timer
timer_set(attotime::never, TIMER_ID_MOTOR);
}
}
case 3: // TX
m_rs232a->write_txd(fb);
break;
case 4: // _MSTOP
if (!fb)
{
// turn off floppy motor
motor(1);
WRITE_LINE_MEMBER(prof80_state::select_w)
{
if (m_select != state)
{
//m_fdc->set_select_lines_connected(state);
m_select = state;
}
}
// reset floppy motor off NE555 timer
timer_set(attotime::never, TIMER_ID_MOTOR);
}
break;
case 5: // TXP
m_rs232b->write_txd(fb);
break;
WRITE_LINE_MEMBER(prof80_state::resf_w)
{
if (state)
m_fdc->soft_reset();
}
case 6: // TSTB
m_rtc->stb_w(fb);
break;
case 7: // MME
m_mmu->mme_w(fb);
break;
WRITE_LINE_MEMBER(prof80_state::mini_w)
{
}
WRITE_LINE_MEMBER(prof80_state::mstop_w)
{
if (!state)
{
// turn off floppy motor
motor(1);
// reset floppy motor off NE555 timer
timer_set(attotime::never, TIMER_ID_MOTOR);
}
}
//-------------------------------------------------
// flr_w -
// flr_w - flag register
//-------------------------------------------------
WRITE8_MEMBER( prof80_state::flr_w )
@ -179,13 +140,8 @@ WRITE8_MEMBER( prof80_state::flr_w )
*/
int fa = BIT(data, 7);
int sa = (data >> 4) & 0x07;
int fb = BIT(data, 0);
int sb = (data >> 1) & 0x07;
ls259_w(fa, sa, fb, sb);
m_flra->write_bit((data >> 4) & 0x07, BIT(data, 7));
m_flrb->write_bit((data >> 1) & 0x07, BIT(data, 0));
}
@ -258,9 +214,9 @@ READ8_MEMBER( prof80_state::status2_r )
{
case 0: js4 = 0; break;
case 1: js4 = 1; break;
case 2: js4 = !m_c0; break;
case 3: js4 = !m_c1; break;
case 4: js4 = !m_c2; break;
case 2: js4 = !m_flra->q0_r(); break;
case 3: js4 = !m_flra->q1_r(); break;
case 4: js4 = !m_flra->q2_r(); break;
}
data |= js4 << 4;
@ -270,9 +226,9 @@ READ8_MEMBER( prof80_state::status2_r )
{
case 0: js5 = 0; break;
case 1: js5 = 1; break;
case 2: js5 = !m_c0; break;
case 3: js5 = !m_c1; break;
case 4: js5 = !m_c2; break;
case 2: js5 = !m_flra->q0_r(); break;
case 3: js5 = !m_flra->q1_r(); break;
case 4: js5 = !m_flra->q2_r(); break;
}
data |= js5 << 4;
@ -472,26 +428,12 @@ void prof80_state::machine_start()
m_rtc->oe_w(1);
// register for state saving
save_item(NAME(m_c0));
save_item(NAME(m_c1));
save_item(NAME(m_c2));
save_item(NAME(m_motor));
save_item(NAME(m_ready));
save_item(NAME(m_select));
}
void prof80_state::machine_reset()
{
int i;
for (i = 0; i < 8; i++)
{
ls259_w(0, i, 0, i);
}
}
//**************************************************************************
// MACHINE DRIVERS
@ -507,15 +449,40 @@ static MACHINE_CONFIG_START( prof80 )
MCFG_CPU_PROGRAM_MAP(prof80_mem)
MCFG_CPU_IO_MAP(prof80_io)
// devices
// MMU
MCFG_PROF80_MMU_ADD(MMU_TAG, prof80_mmu)
// RTC
MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL_32_768kHz, NOOP, NOOP)
// FDC
MCFG_UPD765A_ADD(UPD765_TAG, true, true)
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", prof80_floppies, "525qd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", prof80_floppies, "525qd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":2", prof80_floppies, nullptr, floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":3", prof80_floppies, nullptr, floppy_image_device::default_floppy_formats)
// DEMUX latches
MCFG_DEVICE_ADD(FLR_A_TAG, LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(DEVWRITELINE(UPD1990A_TAG, upd1990a_device, data_in_w)) // TDI
MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE(UPD1990A_TAG, upd1990a_device, c0_w)) // C0
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(DEVWRITELINE(UPD1990A_TAG, upd1990a_device, c1_w)) // C1
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE(UPD1990A_TAG, upd1990a_device, c2_w)) // C2
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(WRITELINE(prof80_state, ready_w)) // READY
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(DEVWRITELINE(UPD1990A_TAG, upd1990a_device, clk_w)) // TCK
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(WRITELINE(prof80_state, inuse_w)) // IN USE
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE(prof80_state, motor_w)) // _MOTOR
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE(prof80_state, select_w)) // SELECT
MCFG_DEVICE_ADD(FLR_B_TAG, LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(prof80_state, resf_w)) // RESF
MCFG_ADDRESSABLE_LATCH_Q1_OUT_CB(WRITELINE(prof80_state, mini_w)) // MINI
MCFG_ADDRESSABLE_LATCH_Q2_OUT_CB(DEVWRITELINE(RS232_A_TAG, rs232_port_device, write_rts)) // _RTS
MCFG_ADDRESSABLE_LATCH_Q3_OUT_CB(DEVWRITELINE(RS232_A_TAG, rs232_port_device, write_txd)) // TX
MCFG_ADDRESSABLE_LATCH_Q4_OUT_CB(WRITELINE(prof80_state, mstop_w)) // _MSTOP
MCFG_ADDRESSABLE_LATCH_Q5_OUT_CB(DEVWRITELINE(RS232_B_TAG, rs232_port_device, write_txd)) // TXP
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(DEVWRITELINE(UPD1990A_TAG, upd1990a_device, stb_w)) // TSTB
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(DEVWRITELINE(MMU_TAG, prof80_mmu_device, mme_w)) // MME
// ECB bus
MCFG_ECBBUS_ADD()
MCFG_ECBBUS_SLOT_ADD(1, "ecb_1", ecbbus_cards, "grip21")

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