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gigatron: start emulating cpu, remove unnecessary include (#6201)
* gigatron: start emulating cpu, remove unnecessary include * gigatron: start on the registers * gigatron: fixed duplication (nw) * gigaton: start on aluOp (nw) * gigatron: Fix a copy and paste error (nw) * gigatron: start instruction decoding (nw) also, there is an undefined reference to gigatron_cpu_device and I can't figure out why. please help * gigatron: initialize registers * gigatron: fix (nw) * gigatron: add the other ROM versions (nw) * gigatron: Fix ROM order (nw)
This commit is contained in:
Sterophonick
R. Belmont
parent
1a5b900759
commit
daba4e7ca7
@ -5,13 +5,15 @@
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* Skeleton device for Gigatron CPU Core
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*
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*****************************************************************************/
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//https://github.com/PhilThomas/gigatron/blob/master/src/gigatron.js
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#include "emu.h"
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#include "gigatron.h"
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#include "gigatrondasm.h"
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DEFINE_DEVICE_TYPE(GTRON, gigatron_cpu_device, "gigatron", "Gigatron CPU Device")
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DEFINE_DEVICE_TYPE(GTRON, gigatron_cpu_device, "gigatron_cpu", "Gigatron CPU Device")
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/* FLAGS */
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@ -48,9 +50,28 @@ void gigatron_cpu_device::execute_run()
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opcode = gigatron_readop(m_pc);
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m_pc++;
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uint8_t op = (opcode >> 13) & 0x0007;
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uint8_t mode = (opcode >> 10) & 0x0007;
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uint8_t bus = (opcode >> 8) & 0x0003;
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uint8_t d = (opcode >> 0) & 0x00ff;
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switch( opcode )
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switch( op)
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{
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case 0:
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case 1:
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case 2:
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case 3:
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case 4:
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case 5:
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aluOp(op, mode, bus, d);
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break;
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case 6:
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storeOp(op, mode, bus, d);
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break;
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case 7:
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branchOp(op, mode, bus, d);
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break;
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default:
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gigatron_illegal();
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break;
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@ -65,18 +86,45 @@ void gigatron_cpu_device::device_start()
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m_program = &space(AS_PROGRAM);
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m_data = &space(AS_DATA);
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save_item(NAME(m_pc));
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save_item(NAME(m_flags));
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// Register state for debugger
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state_add( GTRON_R0, "PC", m_pc ).formatstr("%02X");
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state_add( STATE_GENPC, "GENPC", m_r[7] ).noshow();
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state_add( STATE_GENPCBASE, "CURPC", m_r[7] ).noshow();
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state_add( STATE_GENFLAGS, "GENFLAGS", m_flags ).noshow();
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init();
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}
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void gigatron_cpu_device::init()
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{
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ac = 0;
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x = 0;
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y = 0;
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m_pc = 0;
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state_add(GTRON_A, "AC", ac);
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state_add(GTRON_X, "X", x);
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state_add(GTRON_Y, "Y", y);
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set_icountptr(m_icount);
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}
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void gigatron_cpu_device::branchOp(int op, int mode, int bus, int d)
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{
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}
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void gigatron_cpu_device::aluOp(int op, int mode, int bus, int d)
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{
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int b;
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switch(bus) {
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case 0:
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b = d;
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break;
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case 1:
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case 2:
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b = ac;
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break;
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case 3:
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}
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}
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void gigatron_cpu_device::storeOp(int op, int mode, int bus, int d)
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{
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}
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void gigatron_cpu_device::device_reset()
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{
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}
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@ -5,6 +5,8 @@
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* Skeleton Device for Gigatron CPU Core
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*
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*****************************************************************************/
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//https://github.com/PhilThomas/gigatron/blob/master/src/gigatron.js
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#ifndef MAME_CPU_GTRON_H
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#define MAME_CPU_GTRON_H
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@ -13,8 +15,7 @@
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enum
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{
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GTRON_R0=1, GTRON_R1, GTRON_R2, GTRON_R3,
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GTRON_R4, GTRON_R5, GTRON_R6, GTRON_R7
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GTRON_AC=1, GTRON_X, GTRON_Y
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};
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@ -44,6 +45,16 @@ protected:
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// device_memory_interface overrides
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virtual space_config_vector memory_space_config() const override;
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void branchOp(int op, int mode, int bus, int d);
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void aluOp(int op, int mode, int bus, int d);
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void storeOp(int op, int mode, int bus, int d);
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uint8_t ac;
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uint8_t x;
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uint8_t y;
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virtual void init();
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private:
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address_space_config m_program_config;
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@ -12,7 +12,6 @@
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#include "emu.h"
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#include "cpu/gigatron/gigatron.h"
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#include "machine/nvram.h"
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#include "screen.h"
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#include "speaker.h"
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@ -81,13 +80,21 @@ void gigatron_state::gigatron(machine_config &config)
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screen.set_visarea(0, 640-1, 0, 480-1);
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screen.set_screen_update(FUNC(gigatron_state::screen_update));
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/* sound hardware */
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SPEAKER(config, "mono").front_center();
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}
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ROM_START( gigatron )
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ROM_REGION( 0x20000, "maincpu", 0 )
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ROM_LOAD( "gigatron.rom", 0x0000, 0x20000, CRC(78995109) SHA1(2395fc48e64099836111f5aeca39ddbf4650ea4e) )
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ROM_SYSTEM_BIOS(0, "v4", "Gigatron ROM V4")
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ROMX_LOAD( "ROMv4.rom", 0x0000, 0x20000, CRC(78995109) SHA1(2395fc48e64099836111f5aeca39ddbf4650ea4e),ROM_BIOS(0))
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ROM_SYSTEM_BIOS(1, "v3", "Gigatron ROM V3")
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ROMX_LOAD( "ROMv3.rom", 0x0000, 0x20000, CRC(38b177c1) SHA1(959268069e761a01d620396eedb9abc1ee63c421),ROM_BIOS(1))
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ROM_SYSTEM_BIOS(2, "v2", "Gigatron ROM V2")
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ROMX_LOAD( "ROMv2.rom", 0x0000, 0x20000, CRC(45f4902c) SHA1(c93f417d589144b912c79f85b9e942d66242c2c3),ROM_BIOS(2))
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ROM_SYSTEM_BIOS(3, "v1", "Gigatron ROM V1")
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ROMX_LOAD( "ROMv1.rom", 0x0000, 0x20000, CRC(c6c9c09f) SHA1(e5758d5cc467c3476bd8f992fd45dfcdf06d0430),ROM_BIOS(3))
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ROM_END
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COMP(2018, gigatron, 0, 0, gigatron, gigatron, gigatron_state, empty_init, "Marcel van Kervinck", "Gigatron TTL Microcomputer", MACHINE_IS_SKELETON)
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