diff --git a/src/emu/cpu/mips/mdrc64.c b/src/emu/cpu/mips/mdrc64.c index c36bc8e88a7..44d713c547a 100644 --- a/src/emu/cpu/mips/mdrc64.c +++ b/src/emu/cpu/mips/mdrc64.c @@ -3034,7 +3034,7 @@ static int compile_set_cop0_reg(drc_core *drc, compiler_state *compiler, const o emit_mov_r32_m32(DRCTOP, REG_EDX, CPR0ADDR(COP0_Status)); // mov edx,[Status] emit_mov_m32_r32(DRCTOP, CPR0ADDR(COP0_Status), REG_EAX); // mov [Status],eax emit_xor_r32_r32(DRCTOP, REG_EDX, REG_EAX); // xor edx,eax - emit_test_r32_imm(DRCTOP, REG_EDX, 0x8000); // test edx,0x8000 + emit_test_r32_imm(DRCTOP, REG_EDX, SR_IMEX5); // test edx,0x8000 emit_jcc_short_link(DRCTOP, COND_Z, &link1); // jz skip emit_lea_r64_m64(DRCTOP, REG_P1, COREADDR); // lea p1,[mips3.core] emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->mips3com_update_cycle_counting)); // call mips3com_update_cycle_counting diff --git a/src/emu/cpu/mips/mips3com.c b/src/emu/cpu/mips/mips3com.c index 1611f17fa74..e061faf5746 100644 --- a/src/emu/cpu/mips/mips3com.c +++ b/src/emu/cpu/mips/mips3com.c @@ -174,16 +174,13 @@ offs_t mips3com_dasm(mips3_state *mips, char *buffer, offs_t pc, const UINT8 *op void mips3com_update_cycle_counting(mips3_state *mips) { /* modify the timer to go off */ - if ((mips->cpr[0][COP0_Status] & 0x8000) && mips->cpr[0][COP0_Compare] != 0xffffffff) + if ((mips->cpr[0][COP0_Status] & SR_IMEX5) && mips->cpr[0][COP0_Compare] != 0xffffffff) { UINT32 count = (activecpu_gettotalcycles64() - mips->count_zero_time) / 2; UINT32 compare = mips->cpr[0][COP0_Compare]; UINT32 cyclesleft = compare - count; attotime newtime = ATTOTIME_IN_CYCLES(((INT64)cyclesleft * 2), cpu_getactivecpu()); - - /* due to accuracy issues, don't bother setting timers unless they're for less than 100msec */ - if (attotime_compare(newtime, ATTOTIME_IN_MSEC(100)) < 0) - timer_adjust(mips->compare_int_timer, newtime, cpu_getactivecpu(), attotime_zero); + timer_adjust(mips->compare_int_timer, newtime, cpu_getactivecpu(), attotime_zero); } else timer_adjust(mips->compare_int_timer, attotime_never, cpu_getactivecpu(), attotime_zero); diff --git a/src/emu/cpu/mips/mips3drc.c b/src/emu/cpu/mips/mips3drc.c index aa5a4e93b36..96c0cb11d15 100644 --- a/src/emu/cpu/mips/mips3drc.c +++ b/src/emu/cpu/mips/mips3drc.c @@ -233,7 +233,7 @@ static int mips3_execute(int cycles) if (mips3.cache_dirty) drc_cache_reset(mips3.drc); mips3.cache_dirty = FALSE; - + /* execute */ mips3.core->icount = cycles; drc_execute(mips3.drc); diff --git a/src/emu/cpu/rsp/rsp.c b/src/emu/cpu/rsp/rsp.c index cf414100b30..98ee7337d98 100644 --- a/src/emu/cpu/rsp/rsp.c +++ b/src/emu/cpu/rsp/rsp.c @@ -2553,7 +2553,7 @@ static int rsp_execute(int cycles) if( rsp.sr & ( RSP_STATUS_HALT | RSP_STATUS_BROKE ) ) { - rsp_icount = 0; + rsp_icount = MIN(rsp_icount, 0); } while (rsp_icount > 0) @@ -2589,7 +2589,7 @@ static int rsp_execute(int cycles) case 0x0d: /* BREAK */ { (config->sp_set_status)(0x3); - rsp_icount = 1; + rsp_icount = MIN(rsp_icount, 1); #if LOG_INSTRUCTION_EXECUTION fprintf(exec_output, "\n---------- break ----------\n\n"); @@ -2788,7 +2788,7 @@ static int rsp_execute(int cycles) if( rsp.sr & ( RSP_STATUS_HALT | RSP_STATUS_BROKE ) ) { - rsp_icount = 0; + rsp_icount = MIN(rsp_icount, 0); } }