diff --git a/src/devices/cpu/mb88xx/mb88dasm.cpp b/src/devices/cpu/mb88xx/mb88dasm.cpp
index 16e4bf8e902..34fe5a843eb 100644
--- a/src/devices/cpu/mb88xx/mb88dasm.cpp
+++ b/src/devices/cpu/mb88xx/mb88dasm.cpp
@@ -2,7 +2,7 @@
 // copyright-holders:Ernesto Corvi
 /*******************************************************************************
 
-    mb88dasm.c
+    mb88dasm.cpp
     Core implementation for the portable Fujitsu MB88xx series MCU disassembler.
 
     Written by Ernesto Corvi
@@ -12,216 +12,126 @@
 #include "emu.h"
 #include "mb88dasm.h"
 
-u32 mb88_disassembler::opcode_alignment() const
-{
-	return 1;
-}
-
 offs_t mb88_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
 {
-	unsigned startpc = pc;
-	uint8_t op = opcodes.r8(pc++);
-	uint8_t arg = opcodes.r8(pc);
+	offs_t startpc = pc;
+	u8 op = opcodes.r8(pc++);
+	u8 arg = opcodes.r8(pc);
 
-	switch( op )
+	switch (op)
 	{
-		case 0x00: util::stream_format( stream,  "NOP" ); break;
-		case 0x01: util::stream_format( stream,  "OUTO" ); break;
-		case 0x02: util::stream_format( stream,  "OUTP" ); break;
-		case 0x03: util::stream_format( stream,  "OUT" ); break;
-		case 0x04: util::stream_format( stream,  "TAY" ); break;
-		case 0x05: util::stream_format( stream,  "TATH" ); break;
-		case 0x06: util::stream_format( stream,  "TATL" ); break;
-		case 0x07: util::stream_format( stream,  "TAS" ); break;
-		case 0x08: util::stream_format( stream,  "ICY" ); break;
-		case 0x09: util::stream_format( stream,  "ICM" ); break;
-		case 0x0A: util::stream_format( stream,  "STIC" ); break;
-		case 0x0B: util::stream_format( stream,  "X" ); break;
-		case 0x0C: util::stream_format( stream,  "ROL" ); break;
-		case 0x0D: util::stream_format( stream,  "L" ); break;
-		case 0x0E: util::stream_format( stream,  "ADC" ); break;
-		case 0x0F: util::stream_format( stream,  "AND" ); break;
-		case 0x10: util::stream_format( stream,  "DAA" ); break;
-		case 0x11: util::stream_format( stream,  "DAS" ); break;
-		case 0x12: util::stream_format( stream,  "INK" ); break;
-		case 0x13: util::stream_format( stream,  "IN" ); break;
-		case 0x14: util::stream_format( stream,  "TYA" ); break;
-		case 0x15: util::stream_format( stream,  "TTHA" ); break;
-		case 0x16: util::stream_format( stream,  "TTLA" ); break;
-		case 0x17: util::stream_format( stream,  "TSA" ); break;
-		case 0x18: util::stream_format( stream,  "DCY" ); break;
-		case 0x19: util::stream_format( stream,  "DCM" ); break;
-		case 0x1A: util::stream_format( stream,  "STDC" ); break;
-		case 0x1B: util::stream_format( stream,  "XX" ); break;
-		case 0x1C: util::stream_format( stream,  "ROR" ); break;
-		case 0x1D: util::stream_format( stream,  "ST" ); break;
-		case 0x1E: util::stream_format( stream,  "SBC" ); break;
-		case 0x1F: util::stream_format( stream,  "OR" ); break;
-		case 0x20: util::stream_format( stream,  "SETR" ); break;
-		case 0x21: util::stream_format( stream,  "SETC" ); break;
-		case 0x22: util::stream_format( stream,  "RSTR" ); break;
-		case 0x23: util::stream_format( stream,  "RSTC" ); break;
-		case 0x24: util::stream_format( stream,  "TSTR" ); break;
-		case 0x25: util::stream_format( stream,  "TSTI" ); break;
-		case 0x26: util::stream_format( stream,  "TSTV" ); break;
-		case 0x27: util::stream_format( stream,  "TSTS" ); break;
-		case 0x28: util::stream_format( stream,  "TSTC" ); break;
-		case 0x29: util::stream_format( stream,  "TSTZ" ); break;
-		case 0x2A: util::stream_format( stream,  "STS" ); break;
-		case 0x2B: util::stream_format( stream,  "LS" ); break;
-		case 0x2C: util::stream_format( stream,  "RTS" ); break;
-		case 0x2D: util::stream_format( stream,  "NEG" ); break;
-		case 0x2E: util::stream_format( stream,  "C" ); break;
-		case 0x2F: util::stream_format( stream,  "EOR" ); break;
-		case 0x30:
-		case 0x31:
-		case 0x32:
-		case 0x33: util::stream_format( stream,  "SBIT  %d", op&3 ); break;
-		case 0x34:
-		case 0x35:
-		case 0x36:
-		case 0x37: util::stream_format( stream,  "RBIT  %d", op&3 ); break;
-		case 0x38:
-		case 0x39:
-		case 0x3A:
-		case 0x3B: util::stream_format( stream,  "TBIT  %d", op&3 ); break;
-		case 0x3C: util::stream_format( stream,  "RTI" ); break;
-		case 0x3D: util::stream_format( stream,  "JPA   #$%02X", arg ); pc++; break;
-		case 0x3E: util::stream_format( stream,  "EN    #$%02X", arg ); pc++; break;
-		case 0x3F: util::stream_format( stream,  "DIS   #$%02X", arg ); pc++; break;
-		case 0x40:
-		case 0x41:
-		case 0x42:
-		case 0x43: util::stream_format( stream,  "SETD  %d", op&3 ); break;
-		case 0x44:
-		case 0x45:
-		case 0x46:
-		case 0x47: util::stream_format( stream,  "RSTD  %d", op&3 ); break;
-		case 0x48:
-		case 0x49:
-		case 0x4A:
-		case 0x4B: util::stream_format( stream,  "TSTD  %d", (op&3)+8 ); break;
-		case 0x4C:
-		case 0x4D:
-		case 0x4E:
-		case 0x4F: util::stream_format( stream,  "TBA   %d", op&3 ); break;
-		case 0x50:
-		case 0x51:
-		case 0x52:
-		case 0x53: util::stream_format( stream,  "XD    %d", op&3 ); break;
-		case 0x54:
-		case 0x55:
-		case 0x56:
-		case 0x57: util::stream_format( stream,  "XYD   %d", (op&3)+4 ); break;
-		case 0x58:
-		case 0x59:
-		case 0x5A:
-		case 0x5B:
-		case 0x5C:
-		case 0x5D:
-		case 0x5E:
-		case 0x5F: util::stream_format( stream,  "LXI   #$%1X", op&7 ); break;
-		case 0x60:
-		case 0x61:
-		case 0x62:
-		case 0x63:
-		case 0x64:
-		case 0x65:
-		case 0x66:
-		case 0x67: util::stream_format( stream,  "CALL  $%02X%02X", op&7, arg ); pc++; break;
-		case 0x68:
-		case 0x69:
-		case 0x6A:
-		case 0x6B:
-		case 0x6C:
-		case 0x6D:
-		case 0x6E:
-		case 0x6F: util::stream_format( stream,  "JPL   $%02X%02X", op&7, arg ); pc++; break;
-		case 0x70:
-		case 0x71:
-		case 0x72:
-		case 0x73:
-		case 0x74:
-		case 0x75:
-		case 0x76:
-		case 0x77:
-		case 0x78:
-		case 0x79:
-		case 0x7A:
-		case 0x7B:
-		case 0x7C:
-		case 0x7D:
-		case 0x7E:
-		case 0x7F: util::stream_format( stream,  "AI    #$%1X", op&0xf ); break;
-		case 0x80:
-		case 0x81:
-		case 0x82:
-		case 0x83:
-		case 0x84:
-		case 0x85:
-		case 0x86:
-		case 0x87:
-		case 0x88:
-		case 0x89:
-		case 0x8A:
-		case 0x8B:
-		case 0x8C:
-		case 0x8D:
-		case 0x8E:
-		case 0x8F: util::stream_format( stream,  "LYI   #$%1X", op&0xf ); break;
-		case 0x90:
-		case 0x91:
-		case 0x92:
-		case 0x93:
-		case 0x94:
-		case 0x95:
-		case 0x96:
-		case 0x97:
-		case 0x98:
-		case 0x99:
-		case 0x9A:
-		case 0x9B:
-		case 0x9C:
-		case 0x9D:
-		case 0x9E:
-		case 0x9F: util::stream_format( stream,  "LI    #$%1X", op&0xf ); break;
-		case 0xA0:
-		case 0xA1:
-		case 0xA2:
-		case 0xA3:
-		case 0xA4:
-		case 0xA5:
-		case 0xA6:
-		case 0xA7:
-		case 0xA8:
-		case 0xA9:
-		case 0xAA:
-		case 0xAB:
-		case 0xAC:
-		case 0xAD:
-		case 0xAE:
-		case 0xAF: util::stream_format( stream,  "CYI   #$%1X", op&0xf ); break;
-		case 0xB0:
-		case 0xB1:
-		case 0xB2:
-		case 0xB3:
-		case 0xB4:
-		case 0xB5:
-		case 0xB6:
-		case 0xB7:
-		case 0xB8:
-		case 0xB9:
-		case 0xBA:
-		case 0xBB:
-		case 0xBC:
-		case 0xBD:
-		case 0xBE:
-		case 0xBF: util::stream_format( stream,  "CI    #$%1X", op&0xf ); break;
+		case 0x00: util::stream_format(stream, "NOP"); break;
+		case 0x01: util::stream_format(stream, "OUTO"); break;
+		case 0x02: util::stream_format(stream, "OUTP"); break;
+		case 0x03: util::stream_format(stream, "OUT"); break;
+		case 0x04: util::stream_format(stream, "TAY"); break;
+		case 0x05: util::stream_format(stream, "TATH"); break;
+		case 0x06: util::stream_format(stream, "TATL"); break;
+		case 0x07: util::stream_format(stream, "TAS"); break;
+		case 0x08: util::stream_format(stream, "ICY"); break;
+		case 0x09: util::stream_format(stream, "ICM"); break;
+		case 0x0a: util::stream_format(stream, "STIC"); break;
+		case 0x0b: util::stream_format(stream, "X"); break;
+		case 0x0c: util::stream_format(stream, "ROL"); break;
+		case 0x0d: util::stream_format(stream, "L"); break;
+		case 0x0e: util::stream_format(stream, "ADC"); break;
+		case 0x0f: util::stream_format(stream, "AND"); break;
+		case 0x10: util::stream_format(stream, "DAA"); break;
+		case 0x11: util::stream_format(stream, "DAS"); break;
+		case 0x12: util::stream_format(stream, "INK"); break;
+		case 0x13: util::stream_format(stream, "IN"); break;
+		case 0x14: util::stream_format(stream, "TYA"); break;
+		case 0x15: util::stream_format(stream, "TTHA"); break;
+		case 0x16: util::stream_format(stream, "TTLA"); break;
+		case 0x17: util::stream_format(stream, "TSA"); break;
+		case 0x18: util::stream_format(stream, "DCY"); break;
+		case 0x19: util::stream_format(stream, "DCM"); break;
+		case 0x1a: util::stream_format(stream, "STDC"); break;
+		case 0x1b: util::stream_format(stream, "XX"); break;
+		case 0x1c: util::stream_format(stream, "ROR"); break;
+		case 0x1d: util::stream_format(stream, "ST"); break;
+		case 0x1e: util::stream_format(stream, "SBC"); break;
+		case 0x1f: util::stream_format(stream, "OR"); break;
+		case 0x20: util::stream_format(stream, "SETR"); break;
+		case 0x21: util::stream_format(stream, "SETC"); break;
+		case 0x22: util::stream_format(stream, "RSTR"); break;
+		case 0x23: util::stream_format(stream, "RSTC"); break;
+		case 0x24: util::stream_format(stream, "TSTR"); break;
+		case 0x25: util::stream_format(stream, "TSTI"); break;
+		case 0x26: util::stream_format(stream, "TSTV"); break;
+		case 0x27: util::stream_format(stream, "TSTS"); break;
+		case 0x28: util::stream_format(stream, "TSTC"); break;
+		case 0x29: util::stream_format(stream, "TSTZ"); break;
+		case 0x2a: util::stream_format(stream, "STS"); break;
+		case 0x2b: util::stream_format(stream, "LS"); break;
+		case 0x2c: util::stream_format(stream, "RTS"); break;
+		case 0x2d: util::stream_format(stream, "NEG"); break;
+		case 0x2e: util::stream_format(stream, "C"); break;
+		case 0x2f: util::stream_format(stream, "EOR"); break;
 
-		default:
-			/* C0-FF */
-			util::stream_format( stream,  "JMP   $%04X", (pc&(~0x3f))+ op-0xC0 );
-		break;
+		case 0x30: case 0x31: case 0x32: case 0x33:
+			util::stream_format(stream, "SBIT  %d", op & 3); break;
+		case 0x34: case 0x35: case 0x36: case 0x37:
+			util::stream_format(stream, "RBIT  %d", op & 3); break;
+		case 0x38: case 0x39: case 0x3a: case 0x3b:
+			util::stream_format(stream, "TBIT  %d", op & 3); break;
+
+		case 0x3c: util::stream_format(stream, "RTI"); break;
+		case 0x3d: util::stream_format(stream, "JPA   #$%02X", arg); pc++; break;
+		case 0x3e: util::stream_format(stream, "EN    #$%02X", arg); pc++; break;
+		case 0x3f: util::stream_format(stream, "DIS   #$%02X", arg); pc++; break;
+
+		case 0x40: case 0x41: case 0x42: case 0x43:
+			util::stream_format(stream, "SETD  %d", op & 3); break;
+		case 0x44: case 0x45: case 0x46: case 0x47:
+			util::stream_format(stream, "RSTD  %d", op & 3); break;
+		case 0x48: case 0x49: case 0x4a: case 0x4b:
+			util::stream_format(stream, "TSTD  %d", (op & 3) + 8); break;
+		case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+			util::stream_format(stream, "TBA   %d", op & 3); break;
+		case 0x50: case 0x51: case 0x52: case 0x53:
+			util::stream_format(stream, "XD    %d", op & 3); break;
+		case 0x54: case 0x55: case 0x56: case 0x57:
+			util::stream_format(stream, "XYD   %d", (op & 3) + 4); break;
+
+		case 0x58: case 0x59: case 0x5a: case 0x5b:
+		case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+			util::stream_format(stream, "LXI   #$%1X", op & 7); break;
+		case 0x60: case 0x61: case 0x62: case 0x63:
+		case 0x64: case 0x65: case 0x66: case 0x67:
+			util::stream_format(stream, "CALL  $%02X%02X", op & 7, arg); pc++; break;
+		case 0x68: case 0x69: case 0x6a: case 0x6b:
+		case 0x6c: case 0x6d: case 0x6e: case 0x6f:
+			util::stream_format(stream, "JPL   $%02X%02X", op & 7, arg); pc++; break;
+
+		case 0x70: case 0x71: case 0x72: case 0x73:
+		case 0x74: case 0x75: case 0x76: case 0x77:
+		case 0x78: case 0x79: case 0x7a: case 0x7b:
+		case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+			util::stream_format(stream, "AI    #$%1X", op & 0xf); break;
+		case 0x80: case 0x81: case 0x82: case 0x83:
+		case 0x84: case 0x85: case 0x86: case 0x87:
+		case 0x88: case 0x89: case 0x8a: case 0x8b:
+		case 0x8c: case 0x8d: case 0x8e: case 0x8f:
+			util::stream_format(stream, "LYI   #$%1X", op & 0xf); break;
+		case 0x90: case 0x91: case 0x92: case 0x93:
+		case 0x94: case 0x95: case 0x96: case 0x97:
+		case 0x98: case 0x99: case 0x9a: case 0x9b:
+		case 0x9c: case 0x9d: case 0x9e: case 0x9f:
+			util::stream_format(stream, "LI    #$%1X", op & 0xf); break;
+		case 0xa0: case 0xa1: case 0xa2: case 0xa3:
+		case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+		case 0xa8: case 0xa9: case 0xaa: case 0xab:
+		case 0xac: case 0xad: case 0xae: case 0xaf:
+			util::stream_format(stream, "CYI   #$%1X", op & 0xf); break;
+		case 0xb0: case 0xb1: case 0xb2: case 0xb3:
+		case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+		case 0xb8: case 0xb9: case 0xba: case 0xbb:
+		case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+			util::stream_format(stream, "CI    #$%1X", op & 0xf); break;
+
+		default: // C0-FF
+			util::stream_format(stream, "JMP   $%04X", (pc & ~0x3f) + op - 0xc0); break;
 	}
 
 	return (pc - startpc) | SUPPORTED;
diff --git a/src/devices/cpu/mb88xx/mb88dasm.h b/src/devices/cpu/mb88xx/mb88dasm.h
index 80a37a374c7..1c5ee9bdafb 100644
--- a/src/devices/cpu/mb88xx/mb88dasm.h
+++ b/src/devices/cpu/mb88xx/mb88dasm.h
@@ -2,7 +2,7 @@
 // copyright-holders:Ernesto Corvi
 /*******************************************************************************
 
-    mb88dasm.c
+    mb88dasm.h
     Core implementation for the portable Fujitsu MB88xx series MCU disassembler.
 
     Written by Ernesto Corvi
@@ -21,8 +21,8 @@ public:
 	mb88_disassembler() = default;
 	virtual ~mb88_disassembler() = default;
 
-	virtual u32 opcode_alignment() const override;
+	virtual u32 opcode_alignment() const override { return 1; }
 	virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
 };
 
-#endif
+#endif // MAME_CPU_MB88XX_MB88DASM_H
diff --git a/src/devices/cpu/mb88xx/mb88xx.cpp b/src/devices/cpu/mb88xx/mb88xx.cpp
index eb8eda38660..24864c8248c 100644
--- a/src/devices/cpu/mb88xx/mb88xx.cpp
+++ b/src/devices/cpu/mb88xx/mb88xx.cpp
@@ -7,7 +7,6 @@
 
     Written by Ernesto Corvi
 
-
     TODO:
     - Add support for the timer
     - Add support for the serial interface
@@ -58,18 +57,18 @@ DEFINE_DEVICE_TYPE(MB8844,  mb8844_cpu_device,  "mb8844",  "Fujitsu MB8844")
 #define TEST_SF()           (m_sf & 1)
 #define TEST_IF()           (m_if & 1)
 
-#define UPDATE_ST_C(v)      m_st=(v&0x10) ? 0 : 1
-#define UPDATE_ST_Z(v)      m_st=(v==0) ? 0 : 1
+#define UPDATE_ST_C(v)      m_st = (v & 0x10) ? 0 : 1
+#define UPDATE_ST_Z(v)      m_st = (v == 0) ? 0 : 1
 
-#define UPDATE_CF(v)        m_cf=((v&0x10)==0) ? 0 : 1
-#define UPDATE_ZF(v)        m_zf=(v!=0) ? 0 : 1
+#define UPDATE_CF(v)        m_cf = ((v & 0x10) == 0) ? 0 : 1
+#define UPDATE_ZF(v)        m_zf = (v != 0) ? 0 : 1
 
 #define CYCLES(x)           do { m_icount -= (x); } while (0)
 
-#define GETPC()             (((int)m_PA << 6)+m_PC)
-#define GETEA()             ((m_X << 4)+m_Y)
+#define GETPC()             (((int)m_PA << 6) + m_PC)
+#define GETEA()             ((m_X << 4) + m_Y)
 
-#define INCPC()             do { m_PC++; if ( m_PC >= 0x40 ) { m_PC = 0; m_PA++; } } while (0)
+#define INCPC()             do { m_PC++; if (m_PC >= 0x40) { m_PC = 0; m_PA++; } } while (0)
 
 
 /***************************************************************************
@@ -112,10 +111,17 @@ void mb88_cpu_device::data_7bit(address_map &map)
 }
 
 
-mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width)
+mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, int data_width)
 	: cpu_device(mconfig, type, tag, owner, clock)
-	, m_program_config("program", ENDIANNESS_BIG, 8, program_width, 0, (program_width == 9) ? address_map_constructor(FUNC(mb88_cpu_device::program_9bit), this) : (program_width == 10) ? address_map_constructor(FUNC(mb88_cpu_device::program_10bit), this) : address_map_constructor(FUNC(mb88_cpu_device::program_11bit), this))
-	, m_data_config("data", ENDIANNESS_BIG, 8, data_width, 0, (data_width == 4) ? address_map_constructor(FUNC(mb88_cpu_device::data_4bit), this) : (data_width == 5) ? address_map_constructor(FUNC(mb88_cpu_device::data_5bit), this) : (data_width == 6) ? address_map_constructor(FUNC(mb88_cpu_device::data_6bit), this) : address_map_constructor(FUNC(mb88_cpu_device::data_7bit), this))
+	, m_program_config("program", ENDIANNESS_BIG, 8, program_width, 0,
+			(program_width == 9) ? address_map_constructor(FUNC(mb88_cpu_device::program_9bit), this) :
+			(program_width == 10) ? address_map_constructor(FUNC(mb88_cpu_device::program_10bit), this) :
+			address_map_constructor(FUNC(mb88_cpu_device::program_11bit), this))
+	, m_data_config("data", ENDIANNESS_BIG, 8, data_width, 0,
+			(data_width == 4) ? address_map_constructor(FUNC(mb88_cpu_device::data_4bit), this) :
+			(data_width == 5) ? address_map_constructor(FUNC(mb88_cpu_device::data_5bit), this) :
+			(data_width == 6) ? address_map_constructor(FUNC(mb88_cpu_device::data_6bit), this) :
+			address_map_constructor(FUNC(mb88_cpu_device::data_7bit), this))
 	, m_PLA(nullptr)
 	, m_read_k(*this, 0)
 	, m_write_o(*this)
@@ -127,36 +133,36 @@ mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type
 {
 }
 
-mb88201_cpu_device::mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb88201_cpu_device::mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
 	: mb88_cpu_device(mconfig, MB88201, tag, owner, clock, 9, 4)
 {
 }
 
-mb88202_cpu_device::mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb88202_cpu_device::mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
 	: mb88_cpu_device(mconfig, MB88202, tag, owner, clock, 10, 5)
 {
 }
 
 
-mb8841_cpu_device::mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb8841_cpu_device::mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
 	: mb88_cpu_device(mconfig, MB8841, tag, owner, clock, 11, 7)
 {
 }
 
 
-mb8842_cpu_device::mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb8842_cpu_device::mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
 	: mb88_cpu_device(mconfig, MB8842, tag, owner, clock, 11, 7)
 {
 }
 
 
-mb8843_cpu_device::mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb8843_cpu_device::mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
 	: mb88_cpu_device(mconfig, MB8843, tag, owner, clock, 10, 6)
 {
 }
 
 
-mb8844_cpu_device::mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb8844_cpu_device::mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
 	: mb88_cpu_device(mconfig, MB8844, tag, owner, clock, 10, 6)
 {
 }
@@ -212,20 +218,20 @@ void mb88_cpu_device::device_start()
 	save_item(NAME(m_pending_interrupt));
 	save_item(NAME(m_in_irq));
 
-	state_add( MB88_PC,  "PC",  m_PC).formatstr("%02X");
-	state_add( MB88_PA,  "PA",  m_PA).formatstr("%02X");
-	state_add( MB88_SI,  "SI",  m_SI).formatstr("%01X");
-	state_add( MB88_A,   "A",   m_A).formatstr("%01X");
-	state_add( MB88_X,   "X",   m_X).formatstr("%01X");
-	state_add( MB88_Y,   "Y",   m_Y).formatstr("%01X");
-	state_add( MB88_PIO, "PIO", m_pio).formatstr("%02X");
-	state_add( MB88_TH,  "TH",  m_TH).formatstr("%01X");
-	state_add( MB88_TL,  "TL",  m_TL).formatstr("%01X");
-	state_add( MB88_SB,  "SB",  m_SB).formatstr("%01X");
+	state_add(MB88_PC,  "PC",  m_PC).formatstr("%02X");
+	state_add(MB88_PA,  "PA",  m_PA).formatstr("%02X");
+	state_add(MB88_SI,  "SI",  m_SI).formatstr("%01X");
+	state_add(MB88_A,   "A",   m_A).formatstr("%01X");
+	state_add(MB88_X,   "X",   m_X).formatstr("%01X");
+	state_add(MB88_Y,   "Y",   m_Y).formatstr("%01X");
+	state_add(MB88_PIO, "PIO", m_pio).formatstr("%02X");
+	state_add(MB88_TH,  "TH",  m_TH).formatstr("%01X");
+	state_add(MB88_TL,  "TL",  m_TL).formatstr("%01X");
+	state_add(MB88_SB,  "SB",  m_SB).formatstr("%01X");
 
-	state_add( STATE_GENPC, "GENPC", m_debugger_pc ).callimport().callexport().noshow();
-	state_add( STATE_GENPCBASE, "CURPC", m_debugger_pc ).callimport().callexport().noshow();
-	state_add( STATE_GENFLAGS, "GENFLAGS", m_debugger_flags ).callimport().callexport().formatstr("%6s").noshow();
+	state_add(STATE_GENPC, "GENPC", m_debugger_pc).callimport().callexport().noshow();
+	state_add(STATE_GENPCBASE, "CURPC", m_debugger_pc).callimport().callexport().noshow();
+	state_add(STATE_GENFLAGS, "GENFLAGS", m_debugger_flags).callimport().callexport().formatstr("%6s").noshow();
 	set_icountptr(m_icount);
 }
 
@@ -246,7 +252,7 @@ void mb88_cpu_device::state_import(const device_state_entry &entry)
 		case STATE_GENPC:
 		case STATE_GENPCBASE:
 			m_PC = m_debugger_pc & 0x3f;
-			m_PA = ( m_debugger_pc >> 6 ) & 0x1f;
+			m_PA = (m_debugger_pc >> 6) & 0x1f;
 			break;
 	}
 }
@@ -294,7 +300,7 @@ void mb88_cpu_device::state_string_export(const device_state_entry &entry, std::
 
 void mb88_cpu_device::device_reset()
 {
-	/* zero registers and flags */
+	// zero registers and flags
 	m_PC = 0;
 	m_PA = 0;
 	m_SP[0] = m_SP[1] = m_SP[2] = m_SP[3] = 0;
@@ -302,7 +308,7 @@ void mb88_cpu_device::device_reset()
 	m_A = 0;
 	m_X = 0;
 	m_Y = 0;
-	m_st = 1;   /* start off with st=1 */
+	m_st = 1; // start off with st=1
 	m_zf = 0;
 	m_cf = 0;
 	m_vf = 0;
@@ -322,17 +328,16 @@ void mb88_cpu_device::device_reset()
     CORE EXECUTION LOOP
 ***************************************************************************/
 
-TIMER_CALLBACK_MEMBER( mb88_cpu_device::serial_timer )
+TIMER_CALLBACK_MEMBER(mb88_cpu_device::serial_timer)
 {
 	m_SBcount++;
 
-	/* if we get too many interrupts with no servicing, disable the timer
-	   until somebody does something */
+	// if we get too many interrupts with no servicing, disable the timer until somebody does something */
 	if (m_SBcount >= SERIAL_DISABLE_THRESH)
 		m_serial->adjust(attotime::never);
 
-	/* only read if not full; this is needed by the Namco 52xx to ensure that
-	   the program can write to S and recover the value even if serial is enabled */
+	// only read if not full; this is needed by the Namco 52xx to ensure that
+	// the program can write to S and recover the value even if serial is enabled
 	if (!m_sf)
 	{
 		m_SB = (m_SB >> 1) | (m_read_si() ? 8 : 0);
@@ -346,11 +351,11 @@ TIMER_CALLBACK_MEMBER( mb88_cpu_device::serial_timer )
 
 }
 
-int mb88_cpu_device::pla( int inA, int inB )
+int mb88_cpu_device::pla(int inA, int inB)
 {
-	int index = ((inB&1) << 4) | (inA&0x0f);
+	int index = ((inB & 1) << 4) | (inA & 0x0f);
 
-	if ( m_PLA )
+	if (m_PLA)
 		return m_PLA[index];
 
 	return index;
@@ -358,10 +363,9 @@ int mb88_cpu_device::pla( int inA, int inB )
 
 void mb88_cpu_device::execute_set_input(int inputnum, int state)
 {
-	/* On rising edge trigger interrupt.
-	 * Note this is a logical level, the actual pin is high-to-low voltage
-	 * triggered. */
-	if ( (m_pio & INT_CAUSE_EXTERNAL) && !m_if && state != CLEAR_LINE )
+	// On rising edge trigger interrupt.
+	// Note this is a logical level, the actual pin is high-to-low voltage triggered.
+	if ((m_pio & INT_CAUSE_EXTERNAL) && !m_if && state != CLEAR_LINE)
 	{
 		m_pending_interrupt |= INT_CAUSE_EXTERNAL;
 	}
@@ -369,9 +373,9 @@ void mb88_cpu_device::execute_set_input(int inputnum, int state)
 	m_if = state != CLEAR_LINE;
 }
 
-void mb88_cpu_device::update_pio_enable( uint8_t newpio )
+void mb88_cpu_device::update_pio_enable(u8 newpio)
 {
-	/* if the serial state has changed, configure the timer */
+	// if the serial state has changed, configure the timer
 	if ((m_pio ^ newpio) & 0x30)
 	{
 		if ((newpio & 0x30) == 0)
@@ -399,12 +403,12 @@ void mb88_cpu_device::increment_timer()
 	}
 }
 
-void mb88_cpu_device::update_pio( int cycles )
+void mb88_cpu_device::update_pio(int cycles)
 {
-	/* TODO: improve/validate serial and timer support */
+	// TODO: improve/validate serial and timer support
 
-	/* internal clock enable */
-	if ( m_pio & 0x80 )
+	// internal clock enable
+	if (m_pio & 0x80)
 	{
 		m_TP += cycles;
 		while (m_TP >= TIMER_PRESCALE)
@@ -414,34 +418,33 @@ void mb88_cpu_device::update_pio( int cycles )
 		}
 	}
 
-	/* process pending interrupts */
+	// process pending interrupts
 	if (!m_in_irq && m_pending_interrupt & m_pio)
 	{
 		m_in_irq = true;
-		uint16_t intpc = GETPC();
+		u16 intpc = GETPC();
 
 		m_SP[m_SI] = intpc;
 		m_SP[m_SI] |= TEST_CF() << 15;
 		m_SP[m_SI] |= TEST_ZF() << 14;
 		m_SP[m_SI] |= TEST_ST() << 13;
-		m_SI = ( m_SI + 1 ) & 3;
+		m_SI = (m_SI + 1) & 3;
 
-		/* the datasheet doesn't mention interrupt vectors but
-		the Arabian MCU program expects the following */
+		// the datasheet doesn't mention interrupt vectors but the Arabian MCU program expects the following
 		if (m_pending_interrupt & m_pio & INT_CAUSE_EXTERNAL)
 		{
-			/* if we have a live external source, call the irqcallback */
-			standard_irq_callback( 0, intpc );
+			// if we have a live external source, call the irqcallback
+			standard_irq_callback(0, intpc);
 			m_PC = 0x02;
 		}
 		else if (m_pending_interrupt & m_pio & INT_CAUSE_TIMER)
 		{
-			standard_irq_callback( 1, intpc );
+			standard_irq_callback(1, intpc);
 			m_PC = 0x04;
 		}
 		else if (m_pending_interrupt & m_pio & INT_CAUSE_SERIAL)
 		{
-			standard_irq_callback( 2, intpc );
+			standard_irq_callback(2, intpc);
 			m_PC = 0x06;
 		}
 
@@ -449,7 +452,7 @@ void mb88_cpu_device::update_pio( int cycles )
 		m_st = 1;
 		m_pending_interrupt = 0;
 
-		CYCLES(3); /* ? */
+		CYCLES(3); // ?
 	}
 }
 
@@ -459,7 +462,7 @@ void mb88_cpu_device::clock_w(int state)
 	{
 		m_ctr = state;
 
-		/* on a falling clock, increment the timer, but only if enabled */
+		// on a falling clock, increment the timer, but only if enabled
 		if (m_ctr == 0 && (m_pio & 0x40))
 			increment_timer();
 	}
@@ -470,93 +473,93 @@ void mb88_cpu_device::execute_run()
 {
 	while (m_icount > 0)
 	{
-		uint8_t opcode, arg, oc;
+		u8 opcode, arg, oc;
 
-		/* fetch the opcode */
+		// fetch the opcode
 		debugger_instruction_hook(GETPC());
 		opcode = READOP(GETPC());
 
-		/* increment the PC */
+		// increment the PC
 		INCPC();
 
-		/* start with instruction doing 1 cycle */
+		// start with instruction doing 1 cycle
 		oc = 1;
 
 		switch (opcode)
 		{
-			case 0x00: /* nop ZCS:...*/
+			case 0x00: // nop ZCS:...
 				m_st = 1;
 				break;
 
-			case 0x01: /* outO ZCS:...*/
+			case 0x01: // outO ZCS:...
 				m_write_o(pla(m_A, TEST_CF()));
 				m_st = 1;
 				break;
 
-			case 0x02: /* outP ZCS:... */
+			case 0x02: // outP ZCS:...
 				m_write_p(m_A);
 				m_st = 1;
 				break;
 
-			case 0x03: /* outR ZCS:... */
+			case 0x03: // outR ZCS:...
 				arg = m_Y;
 				m_write_r[arg & 3](m_A);
 				m_st = 1;
 				break;
 
-			case 0x04: /* tay ZCS:... */
+			case 0x04: // tay ZCS:...
 				m_Y = m_A;
 				m_st = 1;
 				break;
 
-			case 0x05: /* tath ZCS:... */
+			case 0x05: // tath ZCS:...
 				m_TH = m_A;
 				m_st = 1;
 				break;
 
-			case 0x06: /* tatl ZCS:... */
+			case 0x06: // tatl ZCS:...
 				m_TL = m_A;
 				m_st = 1;
 				break;
 
-			case 0x07: /* tas ZCS:... */
+			case 0x07: // tas ZCS:...
 				m_SB = m_A;
 				m_st = 1;
 				break;
 
-			case 0x08: /* icy ZCS:x.x */
+			case 0x08: // icy ZCS:x.x
 				m_Y++;
 				UPDATE_ST_C(m_Y);
 				m_Y &= 0x0f;
 				UPDATE_ZF(m_Y);
 				break;
 
-			case 0x09: /* icm ZCS:x.x */
-				arg=RDMEM(GETEA());
+			case 0x09: // icm ZCS:x.x
+				arg = RDMEM(GETEA());
 				arg++;
 				UPDATE_ST_C(arg);
 				arg &= 0x0f;
 				UPDATE_ZF(arg);
-				WRMEM(GETEA(),arg);
+				WRMEM(GETEA(), arg);
 				break;
 
-			case 0x0a: /* stic ZCS:x.x */
-				WRMEM(GETEA(),m_A);
+			case 0x0a: // stic ZCS:x.x
+				WRMEM(GETEA(), m_A);
 				m_Y++;
 				UPDATE_ST_C(m_Y);
 				m_Y &= 0x0f;
 				UPDATE_ZF(m_Y);
 				break;
 
-			case 0x0b: /* x ZCS:x.. */
+			case 0x0b: // x ZCS:x..
 				arg = RDMEM(GETEA());
-				WRMEM(GETEA(),m_A);
+				WRMEM(GETEA(), m_A);
 				m_A = arg;
 				UPDATE_ZF(m_A);
 				m_st = 1;
 				break;
 
-			case 0x0c: /* rol ZCS:xxx */
+			case 0x0c: // rol ZCS:xxx
 				m_A <<= 1;
 				m_A |= TEST_CF();
 				UPDATE_ST_C(m_A);
@@ -565,13 +568,13 @@ void mb88_cpu_device::execute_run()
 				UPDATE_ZF(m_A);
 				break;
 
-			case 0x0d: /* l ZCS:x.. */
+			case 0x0d: // l ZCS:x..
 				m_A = RDMEM(GETEA());
 				UPDATE_ZF(m_A);
 				m_st = 1;
 				break;
 
-			case 0x0e: /* adc ZCS:xxx */
+			case 0x0e: // adc ZCS:xxx
 				arg = RDMEM(GETEA());
 				arg += m_A;
 				arg += TEST_CF();
@@ -581,87 +584,87 @@ void mb88_cpu_device::execute_run()
 				UPDATE_ZF(m_A);
 				break;
 
-			case 0x0f: /* and ZCS:x.x */
+			case 0x0f: // and ZCS:x.x
 				m_A &= RDMEM(GETEA());
 				UPDATE_ZF(m_A);
 				m_st = m_zf ^ 1;
 				break;
 
-			case 0x10: /* daa ZCS:.xx */
-				if ( TEST_CF() || m_A > 9 ) m_A += 6;
+			case 0x10: // daa ZCS:.xx
+				if (TEST_CF() || m_A > 9) m_A += 6;
 				UPDATE_ST_C(m_A);
 				m_cf = m_st ^ 1;
 				m_A &= 0x0f;
 				break;
 
-			case 0x11: /* das ZCS:.xx */
-				if ( TEST_CF() || m_A > 9 ) m_A += 10;
+			case 0x11: // das ZCS:.xx
+				if (TEST_CF() || m_A > 9) m_A += 10;
 				UPDATE_ST_C(m_A);
 				m_cf = m_st ^ 1;
 				m_A &= 0x0f;
 				break;
 
-			case 0x12: /* inK ZCS:x.. */
+			case 0x12: // inK ZCS:x..
 				m_A = m_read_k() & 0x0f;
 				UPDATE_ZF(m_A);
 				m_st = 1;
 				break;
 
-			case 0x13: /* inR ZCS:x.. */
+			case 0x13: // inR ZCS:x..
 				arg = m_Y;
 				m_A = m_read_r[arg & 3]() & 0x0f;
 				UPDATE_ZF(m_A);
 				m_st = 1;
 				break;
 
-			case 0x14: /* tya ZCS:x.. */
+			case 0x14: // tya ZCS:x..
 				m_A = m_Y;
 				UPDATE_ZF(m_A);
 				m_st = 1;
 				break;
 
-			case 0x15: /* ttha ZCS:x.. */
+			case 0x15: // ttha ZCS:x..
 				m_A = m_TH;
 				UPDATE_ZF(m_A);
 				m_st = 1;
 				break;
 
-			case 0x16: /* ttla ZCS:x.. */
+			case 0x16: // ttla ZCS:x..
 				m_A = m_TL;
 				UPDATE_ZF(m_A);
 				m_st = 1;
 				break;
 
-			case 0x17: /* tsa ZCS:x.. */
+			case 0x17: // tsa ZCS:x..
 				m_A = m_SB;
 				UPDATE_ZF(m_A);
 				m_st = 1;
 				break;
 
-			case 0x18: /* dcy ZCS:..x */
+			case 0x18: // dcy ZCS:..x
 				m_Y--;
 				UPDATE_ST_C(m_Y);
 				m_Y &= 0x0f;
 				break;
 
-			case 0x19: /* dcm ZCS:x.x */
-				arg=RDMEM(GETEA());
+			case 0x19: // dcm ZCS:x.x
+				arg = RDMEM(GETEA());
 				arg--;
 				UPDATE_ST_C(arg);
 				arg &= 0x0f;
 				UPDATE_ZF(arg);
-				WRMEM(GETEA(),arg);
+				WRMEM(GETEA(), arg);
 				break;
 
-			case 0x1a: /* stdc ZCS:x.x */
-				WRMEM(GETEA(),m_A);
+			case 0x1a: // stdc ZCS:x.x
+				WRMEM(GETEA(), m_A);
 				m_Y--;
 				UPDATE_ST_C(m_Y);
 				m_Y &= 0x0f;
 				UPDATE_ZF(m_Y);
 				break;
 
-			case 0x1b: /* xx ZCS:x.. */
+			case 0x1b: // xx ZCS:x..
 				arg = m_X;
 				m_X = m_A;
 				m_A = arg;
@@ -669,7 +672,7 @@ void mb88_cpu_device::execute_run()
 				m_st = 1;
 				break;
 
-			case 0x1c: /* ror ZCS:xxx */
+			case 0x1c: // ror ZCS:xxx
 				m_A |= TEST_CF() << 4;
 				UPDATE_ST_C(m_A << 4);
 				m_cf = m_st ^ 1;
@@ -678,12 +681,12 @@ void mb88_cpu_device::execute_run()
 				UPDATE_ZF(m_A);
 				break;
 
-			case 0x1d: /* st ZCS:x.. */
-				WRMEM(GETEA(),m_A);
+			case 0x1d: // st ZCS:x..
+				WRMEM(GETEA(), m_A);
 				m_st = 1;
 				break;
 
-			case 0x1e: /* sbc ZCS:xxx */
+			case 0x1e: // sbc ZCS:xxx
 				arg = RDMEM(GETEA());
 				arg -= m_A;
 				arg -= TEST_CF();
@@ -693,53 +696,53 @@ void mb88_cpu_device::execute_run()
 				UPDATE_ZF(m_A);
 				break;
 
-			case 0x1f: /* or ZCS:x.x */
+			case 0x1f: // or ZCS:x.x
 				m_A |= RDMEM(GETEA());
 				UPDATE_ZF(m_A);
 				m_st = m_zf ^ 1;
 				break;
 
-			case 0x20: /* setR ZCS:... */
-				arg = m_read_r[m_Y/4]() & 0x0f;
-				m_write_r[m_Y/4](arg | (1 << (m_Y%4)));
+			case 0x20: // setR ZCS:...
+				arg = m_read_r[m_Y >> 2]() & 0x0f;
+				m_write_r[m_Y >> 2](arg | (1 << (m_Y & 3)));
 				m_st = 1;
 				break;
 
-			case 0x21: /* setc ZCS:.xx */
+			case 0x21: // setc ZCS:.xx
 				m_cf = 1;
 				m_st = 1;
 				break;
 
-			case 0x22: /* rstR ZCS:... */
-				arg = m_read_r[m_Y/4]() & 0x0f;
-				m_write_r[m_Y/4](arg & ~(1 << (m_Y%4)));
+			case 0x22: // rstR ZCS:...
+				arg = m_read_r[m_Y >> 2]() & 0x0f;
+				m_write_r[m_Y >> 2](arg & ~(1 << (m_Y & 3)));
 				m_st = 1;
 				break;
 
-			case 0x23: /* rstc ZCS:.xx */
+			case 0x23: // rstc ZCS:.xx
 				m_cf = 0;
 				m_st = 1;
 				break;
 
-			case 0x24: /* tstr ZCS:..x */
-				arg = m_read_r[m_Y/4]() & 0x0f;
-				m_st = ( arg & ( 1 << (m_Y%4) ) ) ? 0 : 1;
+			case 0x24: // tstr ZCS:..x
+				arg = m_read_r[m_Y >> 2]() & 0x0f;
+				m_st = (arg & (1 << (m_Y & 3))) ? 0 : 1;
 				break;
 
-			case 0x25: /* tsti ZCS:..x */
+			case 0x25: // tsti ZCS:..x
 				m_st = m_if ^ 1;
 				break;
 
-			case 0x26: /* tstv ZCS:..x */
+			case 0x26: // tstv ZCS:..x
 				m_st = m_vf ^ 1;
 				m_vf = 0;
 				break;
 
-			case 0x27: /* tsts ZCS:..x */
+			case 0x27: // tsts ZCS:..x
 				m_st = m_sf ^ 1;
 				if (m_sf)
 				{
-					/* re-enable the timer if we disabled it previously */
+					// re-enable the timer if we disabled it previously
 					if (m_SBcount >= SERIAL_DISABLE_THRESH)
 						m_serial->adjust(attotime::from_hz(clock() / SERIAL_PRESCALE), 0, attotime::from_hz(clock() / SERIAL_PRESCALE));
 					m_SBcount = 0;
@@ -747,40 +750,40 @@ void mb88_cpu_device::execute_run()
 				m_sf = 0;
 				break;
 
-			case 0x28: /* tstc ZCS:..x */
+			case 0x28: // tstc ZCS:..x
 				m_st = m_cf ^ 1;
 				break;
 
-			case 0x29: /* tstz ZCS:..x */
+			case 0x29: // tstz ZCS:..x
 				m_st = m_zf ^ 1;
 				break;
 
-			case 0x2a: /* sts ZCS:x.. */
-				WRMEM(GETEA(),m_SB);
+			case 0x2a: // sts ZCS:x..
+				WRMEM(GETEA(), m_SB);
 				UPDATE_ZF(m_SB);
 				m_st = 1;
 				break;
 
-			case 0x2b: /* ls ZCS:x.. */
+			case 0x2b: // ls ZCS:x..
 				m_SB = RDMEM(GETEA());
 				UPDATE_ZF(m_SB);
 				m_st = 1;
 				break;
 
-			case 0x2c: /* rts ZCS:... */
-				m_SI = ( m_SI - 1 ) & 3;
+			case 0x2c: // rts ZCS:...
+				m_SI = (m_SI - 1) & 3;
 				m_PC = m_SP[m_SI] & 0x3f;
 				m_PA = (m_SP[m_SI] >> 6) & 0x1f;
 				m_st = 1;
 				break;
 
-			case 0x2d: /* neg ZCS: ..x */
-				m_A = (~m_A)+1;
+			case 0x2d: // neg ZCS: ..x
+				m_A = (~m_A) + 1;
 				m_A &= 0x0f;
 				UPDATE_ST_Z(m_A);
 				break;
 
-			case 0x2e: /* c ZCS:xxx */
+			case 0x2e: // c ZCS:xxx
 				arg = RDMEM(GETEA());
 				arg -= m_A;
 				UPDATE_CF(arg);
@@ -789,139 +792,139 @@ void mb88_cpu_device::execute_run()
 				m_zf = m_st ^ 1;
 				break;
 
-			case 0x2f: /* eor ZCS:x.x */
+			case 0x2f: // eor ZCS:x.x
 				m_A ^= RDMEM(GETEA());
 				UPDATE_ST_Z(m_A);
 				m_zf = m_st ^ 1;
 				break;
 
-			case 0x30: case 0x31: case 0x32: case 0x33: /* sbit ZCS:... */
+			case 0x30: case 0x31: case 0x32: case 0x33: // sbit ZCS:...
 				arg = RDMEM(GETEA());
-				WRMEM(GETEA(), arg | (1 << (opcode&3)));
+				WRMEM(GETEA(), arg | (1 << (opcode & 3)));
 				m_st = 1;
 				break;
 
-			case 0x34: case 0x35: case 0x36: case 0x37: /* rbit ZCS:... */
+			case 0x34: case 0x35: case 0x36: case 0x37: // rbit ZCS:...
 				arg = RDMEM(GETEA());
-				WRMEM(GETEA(), arg & ~(1 << (opcode&3)));
+				WRMEM(GETEA(), arg & ~(1 << (opcode & 3)));
 				m_st = 1;
 				break;
 
-			case 0x38: case 0x39: case 0x3a: case 0x3b: /* tbit ZCS:... */
+			case 0x38: case 0x39: case 0x3a: case 0x3b: // tbit ZCS:...
 				arg = RDMEM(GETEA());
-				m_st = ( arg & (1 << (opcode&3) ) ) ? 0 : 1;
+				m_st = (arg & (1 << (opcode & 3))) ? 0 : 1;
 				break;
 
-			case 0x3c: /* rti ZCS:... */
-				/* restore address and saved state flags on the top bits of the stack */
+			case 0x3c: // rti ZCS:...
+				// restore address and saved state flags on the top bits of the stack
 				m_in_irq = false;
-				m_SI = ( m_SI - 1 ) & 3;
+				m_SI = (m_SI - 1) & 3;
 				m_PC = m_SP[m_SI] & 0x3f;
 				m_PA = (m_SP[m_SI] >> 6) & 0x1f;
-				m_st = (m_SP[m_SI] >> 13)&1;
-				m_zf = (m_SP[m_SI] >> 14)&1;
-				m_cf = (m_SP[m_SI] >> 15)&1;
+				m_st = (m_SP[m_SI] >> 13) & 1;
+				m_zf = (m_SP[m_SI] >> 14) & 1;
+				m_cf = (m_SP[m_SI] >> 15) & 1;
 				break;
 
-			case 0x3d: /* jpa imm ZCS:..x */
+			case 0x3d: // jpa imm ZCS:..x
 				m_PA = READOP(GETPC()) & 0x1f;
 				m_PC = m_A * 4;
 				oc = 2;
 				m_st = 1;
 				break;
 
-			case 0x3e: /* en imm ZCS:... */
+			case 0x3e: // en imm ZCS:...
 				update_pio_enable(m_pio | READOP(GETPC()));
 				INCPC();
 				oc = 2;
 				m_st = 1;
 				break;
 
-			case 0x3f: /* dis imm ZCS:... */
+			case 0x3f: // dis imm ZCS:...
 				update_pio_enable(m_pio & ~(READOP(GETPC())));
 				INCPC();
 				oc = 2;
 				m_st = 1;
 				break;
 
-			case 0x40:  case 0x41:  case 0x42:  case 0x43: /* setD ZCS:... */
+			case 0x40: case 0x41: case 0x42: case 0x43: // setD ZCS:...
 				arg = m_read_r[0]() & 0x0f;
-				arg |= (1 << (opcode&3));
+				arg |= (1 << (opcode & 3));
 				m_write_r[0](arg);
 				m_st = 1;
 				break;
 
-			case 0x44:  case 0x45:  case 0x46:  case 0x47: /* rstD ZCS:... */
+			case 0x44: case 0x45: case 0x46: case 0x47: // rstD ZCS:...
 				arg = m_read_r[0]() & 0x0f;
-				arg &= ~(1 << (opcode&3));
+				arg &= ~(1 << (opcode & 3));
 				m_write_r[0](arg);
 				m_st = 1;
 				break;
 
-			case 0x48:  case 0x49:  case 0x4a:  case 0x4b: /* tstD ZCS:..x */
+			case 0x48: case 0x49: case 0x4a: case 0x4b: // tstD ZCS:..x
 				arg = m_read_r[2]() & 0x0f;
-				m_st = (arg & (1 << (opcode&3))) ? 0 : 1;
+				m_st = (arg & (1 << (opcode & 3))) ? 0 : 1;
 				break;
 
-			case 0x4c:  case 0x4d:  case 0x4e:  case 0x4f: /* tba ZCS:..x */
-				m_st = (m_A & (1 << (opcode&3))) ? 0 : 1;
+			case 0x4c: case 0x4d: case 0x4e: case 0x4f: // tba ZCS:..x
+				m_st = (m_A & (1 << (opcode & 3))) ? 0 : 1;
 				break;
 
-			case 0x50:  case 0x51:  case 0x52:  case 0x53: /* xd ZCS:x.. */
+			case 0x50: case 0x51: case 0x52: case 0x53: // xd ZCS:x..
 				arg = RDMEM(opcode&3);
-				WRMEM((opcode&3),m_A);
+				WRMEM((opcode & 3), m_A);
 				m_A = arg;
 				UPDATE_ZF(m_A);
 				m_st = 1;
 				break;
 
-			case 0x54:  case 0x55:  case 0x56:  case 0x57: /* xyd ZCS:x.. */
-				arg = RDMEM((opcode&3)+4);
-				WRMEM((opcode&3)+4,m_Y);
+			case 0x54: case 0x55: case 0x56: case 0x57: // xyd ZCS:x..
+				arg = RDMEM((opcode & 3) + 4);
+				WRMEM((opcode & 3) + 4, m_Y);
 				m_Y = arg;
 				UPDATE_ZF(m_Y);
 				m_st = 1;
 				break;
 
-			case 0x58:  case 0x59:  case 0x5a:  case 0x5b:
-			case 0x5c:  case 0x5d:  case 0x5e:  case 0x5f: /* lxi ZCS:x.. */
+			case 0x58: case 0x59: case 0x5a: case 0x5b:
+			case 0x5c: case 0x5d: case 0x5e: case 0x5f: // lxi ZCS:x..
 				m_X = opcode & 7;
 				UPDATE_ZF(m_X);
 				m_st = 1;
 				break;
 
-			case 0x60:  case 0x61:  case 0x62:  case 0x63:
-			case 0x64:  case 0x65:  case 0x66:  case 0x67: /* call imm ZCS:..x */
+			case 0x60: case 0x61: case 0x62: case 0x63:
+			case 0x64: case 0x65: case 0x66: case 0x67: // call imm ZCS:..x
 				arg = READOP(GETPC());
 				INCPC();
 				oc = 2;
-				if ( TEST_ST() )
+				if (TEST_ST())
 				{
 					m_SP[m_SI] = GETPC();
-					m_SI = ( m_SI + 1 ) & 3;
+					m_SI = (m_SI + 1) & 3;
 					m_PC = arg & 0x3f;
-					m_PA = ( ( opcode & 7 ) << 2 ) | ( arg >> 6 );
+					m_PA = ((opcode & 7) << 2) | (arg >> 6);
 				}
 				m_st = 1;
 				break;
 
-			case 0x68:  case 0x69:  case 0x6a:  case 0x6b:
-			case 0x6c:  case 0x6d:  case 0x6e:  case 0x6f: /* jpl imm ZCS:..x */
+			case 0x68: case 0x69: case 0x6a: case 0x6b:
+			case 0x6c: case 0x6d: case 0x6e: case 0x6f: // jpl imm ZCS:..x
 				arg = READOP(GETPC());
 				INCPC();
 				oc = 2;
-				if ( TEST_ST() )
+				if (TEST_ST())
 				{
 					m_PC = arg & 0x3f;
-					m_PA = ( ( opcode & 7 ) << 2 ) | ( arg >> 6 );
+					m_PA = ((opcode & 7) << 2) | (arg >> 6);
 				}
 				m_st = 1;
 				break;
 
-			case 0x70:  case 0x71:  case 0x72:  case 0x73:
-			case 0x74:  case 0x75:  case 0x76:  case 0x77:
-			case 0x78:  case 0x79:  case 0x7a:  case 0x7b:
-			case 0x7c:  case 0x7d:  case 0x7e:  case 0x7f: /* ai ZCS:xxx */
+			case 0x70: case 0x71: case 0x72: case 0x73:
+			case 0x74: case 0x75: case 0x76: case 0x77:
+			case 0x78: case 0x79: case 0x7a: case 0x7b:
+			case 0x7c: case 0x7d: case 0x7e: case 0x7f: // ai ZCS:xxx
 				arg = opcode & 0x0f;
 				arg += m_A;
 				UPDATE_ST_C(arg);
@@ -930,28 +933,28 @@ void mb88_cpu_device::execute_run()
 				UPDATE_ZF(m_A);
 				break;
 
-			case 0x80:  case 0x81:  case 0x82:  case 0x83:
-			case 0x84:  case 0x85:  case 0x86:  case 0x87:
-			case 0x88:  case 0x89:  case 0x8a:  case 0x8b:
-			case 0x8c:  case 0x8d:  case 0x8e:  case 0x8f: /* lxi ZCS:x.. */
+			case 0x80: case 0x81: case 0x82: case 0x83:
+			case 0x84: case 0x85: case 0x86: case 0x87:
+			case 0x88: case 0x89: case 0x8a: case 0x8b:
+			case 0x8c: case 0x8d: case 0x8e: case 0x8f: // lxi ZCS:x..
 				m_Y = opcode & 0x0f;
 				UPDATE_ZF(m_Y);
 				m_st = 1;
 				break;
 
-			case 0x90:  case 0x91:  case 0x92:  case 0x93:
-			case 0x94:  case 0x95:  case 0x96:  case 0x97:
-			case 0x98:  case 0x99:  case 0x9a:  case 0x9b:
-			case 0x9c:  case 0x9d:  case 0x9e:  case 0x9f: /* li ZCS:x.. */
+			case 0x90: case 0x91: case 0x92: case 0x93:
+			case 0x94: case 0x95: case 0x96: case 0x97:
+			case 0x98: case 0x99: case 0x9a: case 0x9b:
+			case 0x9c: case 0x9d: case 0x9e: case 0x9f: // li ZCS:x..
 				m_A = opcode & 0x0f;
 				UPDATE_ZF(m_A);
 				m_st = 1;
 				break;
 
-			case 0xa0:  case 0xa1:  case 0xa2:  case 0xa3:
-			case 0xa4:  case 0xa5:  case 0xa6:  case 0xa7:
-			case 0xa8:  case 0xa9:  case 0xaa:  case 0xab:
-			case 0xac:  case 0xad:  case 0xae:  case 0xaf: /* cyi ZCS:xxx */
+			case 0xa0: case 0xa1: case 0xa2: case 0xa3:
+			case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+			case 0xa8: case 0xa9: case 0xaa: case 0xab:
+			case 0xac: case 0xad: case 0xae: case 0xaf: // cyi ZCS:xxx
 				arg = (opcode & 0x0f) - m_Y;
 				UPDATE_CF(arg);
 				arg &= 0x0f;
@@ -959,10 +962,10 @@ void mb88_cpu_device::execute_run()
 				m_zf = m_st ^ 1;
 				break;
 
-			case 0xb0:  case 0xb1:  case 0xb2:  case 0xb3:
-			case 0xb4:  case 0xb5:  case 0xb6:  case 0xb7:
-			case 0xb8:  case 0xb9:  case 0xba:  case 0xbb:
-			case 0xbc:  case 0xbd:  case 0xbe:  case 0xbf: /* ci ZCS:xxx */
+			case 0xb0: case 0xb1: case 0xb2: case 0xb3:
+			case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+			case 0xb8: case 0xb9: case 0xba: case 0xbb:
+			case 0xbc: case 0xbd: case 0xbe: case 0xbf: // ci ZCS:xxx
 				arg = (opcode & 0x0f) - m_A;
 				UPDATE_CF(arg);
 				arg &= 0x0f;
@@ -970,19 +973,17 @@ void mb88_cpu_device::execute_run()
 				m_zf = m_st ^ 1;
 				break;
 
-			default: /* jmp ZCS:..x */
-				if ( TEST_ST() )
-				{
+			default: // jmp ZCS:..x
+				if (TEST_ST())
 					m_PC = opcode & 0x3f;
-				}
 				m_st = 1;
 				break;
 		}
 
-		/* update cycle counts */
-		CYCLES( oc );
+		// update cycle counts
+		CYCLES(oc);
 
-		/* update interrupts, serial and timer flags */
+		// update interrupts, serial and timer flags
 		update_pio(oc);
 	}
 }
diff --git a/src/devices/cpu/mb88xx/mb88xx.h b/src/devices/cpu/mb88xx/mb88xx.h
index e207a2f39af..9c21d99906e 100644
--- a/src/devices/cpu/mb88xx/mb88xx.h
+++ b/src/devices/cpu/mb88xx/mb88xx.h
@@ -54,7 +54,7 @@
 
 enum
 {
-	MB88_PC=1,
+	MB88_PC = 1,
 	MB88_PA,
 	MB88_FLAGS,
 	MB88_SI,
@@ -94,7 +94,7 @@ public:
 	// SO: serial output
 	auto write_so() { return m_write_so.bind(); }
 
-	void set_pla(uint8_t *pla) { m_PLA = pla; }
+	void set_pla(u8 *pla) { m_PLA = pla; }
 
 	void clock_w(int state);
 
@@ -105,21 +105,22 @@ public:
 	void program_10bit(address_map &map);
 	void program_11bit(address_map &map);
 	void program_9bit(address_map &map);
+
 protected:
-	mb88_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width);
+	mb88_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, int data_width);
 
 	// device-level overrides
 	virtual void device_start() override;
 	virtual void device_reset() override;
 
 	// device_execute_interface overrides
-	virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
-	virtual uint32_t execute_max_cycles() const noexcept override { return 3; }
-	virtual uint32_t execute_input_lines() const noexcept override { return 1; }
+	virtual u32 execute_min_cycles() const noexcept override { return 1; }
+	virtual u32 execute_max_cycles() const noexcept override { return 3; }
+	virtual u32 execute_input_lines() const noexcept override { return 1; }
 	virtual void execute_run() override;
 	virtual void execute_set_input(int inputnum, int state) override;
-	virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 6 - 1) / 6; }
-	virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 6); }
+	virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 6 - 1) / 6; }
+	virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 6); }
 
 	// device_memory_interface overrides
 	virtual space_config_vector memory_space_config() const override;
@@ -136,36 +137,36 @@ private:
 	address_space_config m_program_config;
 	address_space_config m_data_config;
 
-	uint8_t   m_PC;     /* Program Counter: 6 bits */
-	uint8_t   m_PA;     /* Page Address: 4 bits */
-	uint16_t  m_SP[4];  /* Stack is 4*10 bit addresses deep, but we also use 3 top bits per address to store flags during irq */
-	uint8_t   m_SI;     /* Stack index: 2 bits */
-	uint8_t   m_A;      /* Accumulator: 4 bits */
-	uint8_t   m_X;      /* Index X: 4 bits */
-	uint8_t   m_Y;      /* Index Y: 4 bits */
-	uint8_t   m_st;     /* State flag: 1 bit */
-	uint8_t   m_zf;     /* Zero flag: 1 bit */
-	uint8_t   m_cf;     /* Carry flag: 1 bit */
-	uint8_t   m_vf;     /* Timer overflow flag: 1 bit */
-	uint8_t   m_sf;     /* Serial Full/Empty flag: 1 bit */
-	uint8_t   m_if;     /* Interrupt flag: 1 bit */
+	u8   m_PC;     // Program Counter: 6 bits
+	u8   m_PA;     // Page Address: 4 bits
+	u16  m_SP[4];  // Stack is 4*10 bit addresses deep, but we also use 3 top bits per address to store flags during irq
+	u8   m_SI;     // Stack index: 2 bits
+	u8   m_A;      // Accumulator: 4 bits
+	u8   m_X;      // Index X: 4 bits
+	u8   m_Y;      // Index Y: 4 bits
+	u8   m_st;     // State flag: 1 bit
+	u8   m_zf;     // Zero flag: 1 bit
+	u8   m_cf;     // Carry flag: 1 bit
+	u8   m_vf;     // Timer overflow flag: 1 bit
+	u8   m_sf;     // Serial Full/Empty flag: 1 bit
+	u8   m_if;     // Interrupt flag: 1 bit
 
-	/* Peripheral Control */
-	uint8_t   m_pio; /* Peripheral enable bits: 8 bits */
+	// Peripheral Control
+	u8   m_pio;    // Peripheral enable bits: 8 bits
 
-	/* Timer registers */
-	uint8_t   m_TH; /* Timer High: 4 bits */
-	uint8_t   m_TL; /* Timer Low: 4 bits */
-	uint8_t   m_TP; /* Timer Prescale: 6 bits? */
-	uint8_t   m_ctr; /* current external counter value */
+	// Timer registers
+	u8   m_TH;     // Timer High: 4 bits
+	u8   m_TL;     // Timer Low: 4 bits
+	u8   m_TP;     // Timer Prescale: 6 bits?
+	u8   m_ctr;    // current external counter value
 
-	/* Serial registers */
-	uint8_t   m_SB; /* Serial buffer: 4 bits */
-	uint16_t  m_SBcount;    /* number of bits received */
+	// Serial registers
+	u8   m_SB;     // Serial buffer: 4 bits
+	u16  m_SBcount;// number of bits received
 	emu_timer *m_serial;
 
-	/* PLA configuration and port callbacks */
-	uint8_t * m_PLA;
+	// PLA configuration and port callbacks
+	u8 *m_PLA;
 	devcb_read8 m_read_k;
 	devcb_write8 m_write_o;
 	devcb_write8 m_write_p;
@@ -174,9 +175,9 @@ private:
 	devcb_read_line m_read_si;
 	devcb_write_line m_write_so;
 
-	/* IRQ handling */
-	uint8_t m_pending_interrupt;
-	bool    m_in_irq;
+	// IRQ handling
+	u8 m_pending_interrupt;
+	bool m_in_irq;
 
 	memory_access<11, 0, 0, ENDIANNESS_BIG>::cache m_cache;
 	memory_access<11, 0, 0, ENDIANNESS_BIG>::specific m_program;
@@ -185,62 +186,56 @@ private:
 	int m_icount;
 
 	// For the debugger
-	uint16_t m_debugger_pc;
-	uint8_t m_debugger_flags;
+	u16 m_debugger_pc;
+	u8 m_debugger_flags;
 
-	TIMER_CALLBACK_MEMBER( serial_timer );
-	int pla( int inA, int inB );
-	void update_pio_enable( uint8_t newpio );
+	TIMER_CALLBACK_MEMBER(serial_timer);
+	int pla(int inA, int inB);
+	void update_pio_enable(u8 newpio);
 	void increment_timer();
-	void update_pio( int cycles );
+	void update_pio(int cycles);
 };
 
 
 class mb88201_cpu_device : public mb88_cpu_device
 {
 public:
-	// construction/destruction
-	mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+	mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
 
 class mb88202_cpu_device : public mb88_cpu_device
 {
 public:
-	// construction/destruction
-	mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+	mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
 
 class mb8841_cpu_device : public mb88_cpu_device
 {
 public:
-	// construction/destruction
-	mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+	mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
 
 class mb8842_cpu_device : public mb88_cpu_device
 {
 public:
-	// construction/destruction
-	mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+	mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
 
 class mb8843_cpu_device : public mb88_cpu_device
 {
 public:
-	// construction/destruction
-	mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+	mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };
 
 
 class mb8844_cpu_device : public mb88_cpu_device
 {
 public:
-	// construction/destruction
-	mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+	mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
 };