mirror of
https://github.com/holub/mame
synced 2025-05-18 11:39:29 +03:00
Electrocoin driver splitup by Haze (no whatsnew)
Out of log: it require msm8251 from mess, which I will convert in next days and hookup again.
This commit is contained in:
Miodrag Milanovic
parent
fe6a5c5813
commit
dbe5cfe7e0
3
.gitattributes
vendored
3
.gitattributes
vendored
@ -2045,6 +2045,9 @@ src/mame/drivers/dwarfd.c svneol=native#text/plain
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src/mame/drivers/dynadice.c svneol=native#text/plain
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src/mame/drivers/dynax.c svneol=native#text/plain
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src/mame/drivers/dynduke.c svneol=native#text/plain
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src/mame/drivers/ecoinf1.c svneol=native#text/plain
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src/mame/drivers/ecoinf2.c svneol=native#text/plain
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src/mame/drivers/ecoinf3.c svneol=native#text/plain
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src/mame/drivers/ecoinfr.c svneol=native#text/plain
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src/mame/drivers/egghunt.c svneol=native#text/plain
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src/mame/drivers/embargo.c svneol=native#text/plain
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340
src/mame/drivers/ecoinf1.c
Normal file
340
src/mame/drivers/ecoinf1.c
Normal file
@ -0,0 +1,340 @@
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/* Electrocoin Older (original?) HW type
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this appears to be the earliest of the Electrocoin hardware
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it has a smaller rom space than ecoinfr.c and apparently
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lacks any form of protection PIC.
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*/
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#include "emu.h"
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#include "cpu/z80/z80.h"
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class ecoinf1_state : public driver_device
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{
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public:
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ecoinf1_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag) { }
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};
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static ADDRESS_MAP_START( older_memmap, AS_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x2fff) AM_ROM
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AM_RANGE(0x4000, 0x4fff) AM_RAM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( older_portmap, AS_IO, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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ADDRESS_MAP_END
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static INPUT_PORTS_START( ecoinf1 )
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PORT_START("IN0")
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PORT_DIPNAME( 0x01, 0x01, "IN0:01" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "IN0:02" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "IN0:04" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "IN0:08" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "IN0:10" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "IN0:20" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "IN0:40" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, "IN0:80" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN1")
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PORT_DIPNAME( 0x01, 0x01, "IN1:01" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "IN1:02" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "IN1:04" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "IN1:08" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "IN1:10" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "IN1:20" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "IN1:40" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, "IN1:80" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN2")
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PORT_DIPNAME( 0x01, 0x01, "IN2:01" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "IN2:02" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "IN2:04" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "IN2:08" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "IN2:10" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "IN2:20" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "IN2:40" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, "IN2:80" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN3")
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PORT_DIPNAME( 0x01, 0x01, "IN3:01" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "IN3:02" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "IN3:04" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "IN3:08" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "IN3:10" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "IN3:20" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "IN3:40" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, "IN3:80" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN4")
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PORT_DIPNAME( 0x01, 0x01, "IN4:01" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "IN4:02" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "IN4:04" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "IN4:08" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "IN4:10" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "IN4:20" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "IN4:40" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, "IN4:80" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN5")
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PORT_DIPNAME( 0x01, 0x01, "IN5:01" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "IN5:02" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "IN5:04" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "IN5:08" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "IN5:10" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "IN5:20" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "IN5:40" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, "IN5:80" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN6")
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PORT_DIPNAME( 0x01, 0x01, "IN6:01" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "IN6:02" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "IN6:04" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "IN6:08" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "IN6:10" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "IN6:20" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "IN6:40" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, "IN6:80" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_START("IN7")
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PORT_DIPNAME( 0x01, 0x01, "IN7:01" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "IN7:02" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "IN7:04" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "IN7:08" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "IN7:10" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "IN7:20" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "IN7:40" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, "IN7:80" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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INPUT_PORTS_END
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static MACHINE_CONFIG_START( ecoinf1_older, ecoinf1_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", Z80,4000000)
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MCFG_CPU_PROGRAM_MAP(older_memmap)
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MCFG_CPU_IO_MAP(older_portmap)
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MACHINE_CONFIG_END
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/********************************************************************************************************************
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Roms for OLDER hw type
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********************************************************************************************************************/
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ROM_START( ec_bar5 )
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ROM_REGION( 0x200000, "maincpu", 0 )
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ROM_LOAD( "bar5.5a4", 0x0000, 0x001000, CRC(0b12219d) SHA1(140a58afbf713e11f819e5154519b32e822bd1e3) )
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ROM_LOAD( "bar5.5a3", 0x1000, 0x001000, CRC(53185002) SHA1(9cd98ba871fdaa56dfcef0fc285c8537886ff4bd) )
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ROM_LOAD( "bar5.5a2", 0x2000, 0x001000, CRC(82b994e6) SHA1(19e63cb6f689787b74cad610a185f20ae3881238) )
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ROM_END
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ROM_START( ec_barxo )
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ROM_REGION( 0x200000, "maincpu", 0 )
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ROM_LOAD( "barxprog4.bin", 0x0000, 0x001000, CRC(b1a6924e) SHA1(e20f71073a74d0e26bb7abfa03b0bf5e977a4bfd) )
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ROM_LOAD( "barxprog3.bin", 0x1000, 0x001000, CRC(7febfb4e) SHA1(a9777db5a7ce43ab86fbdd1169a0fa129fda7774) )
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ROM_LOAD( "barxprog2.bin", 0x2000, 0x001000, CRC(f7abc4ee) SHA1(6996471bb45f7ad58ea28dcbe1270b7f7d844be7) )
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ROM_REGION( 0x200000, "altrevs", 0 )
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ROM_LOAD( "bx2010a4", 0x0000, 0x001000, CRC(1d29d010) SHA1(b3f7a8b839770402b463d8ec72787c6ddade34bd) )
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ROM_LOAD( "bx2010a3", 0x0000, 0x001000, CRC(21903339) SHA1(7b515269a08ed3f181e1cd35bf4896a011f77806) )
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ROM_LOAD( "bx2010a2", 0x0000, 0x001000, CRC(6a28ea78) SHA1(bcdeabff309346103050f1da427913a23198c699) )
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ROM_LOAD( "bx2010ha", 0x0000, 0x001000, CRC(db267418) SHA1(d4cc325aba62b0da5f63af37c64ea959ca77d91e) ) // close to bx2010a2
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ROM_LOAD( "barx5a4", 0x0000, 0x001000, CRC(7baa7ac3) SHA1(b8124ed5be68f9c4e81977018003f707064bbd58) )
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ROM_LOAD( "barx5a3", 0x0000, 0x001000, CRC(82bf22c7) SHA1(0b31c0f38181f3523776b44b211ee6b2f0fde341) )
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ROM_LOAD( "barx5a2", 0x0000, 0x001000, CRC(0f1839b9) SHA1(ab0f0dfa887d9c113a4971392b12a768b5b5977f) )
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ROM_LOAD( "barx44c", 0x0000, 0x001000, CRC(bd8c9431) SHA1(b8393ec87969541ff56243b7ea1e5c908d8bf027) )
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ROM_LOAD( "barx34c", 0x0000, 0x001000, CRC(d105cbaa) SHA1(a38ed5fa437fbdd2d9efc575fe05a94180dbd90f) )
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ROM_LOAD( "barx24c", 0x0000, 0x001000, CRC(a513263e) SHA1(f83008ff34bc67bcf15f5433cfe2f6051763b75f) )
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ROM_LOAD( "bx54a4", 0x0000, 0x001000, CRC(7dc2d19e) SHA1(ad012de848b586ae8355ea300edce96d0f0ce2a8) )
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ROM_LOAD( "bx54a3", 0x0000, 0x001000, CRC(96cb0c73) SHA1(6fa1fc61cb2761871999516c6663b3948b35f6dc) )
|
||||
ROM_LOAD( "bx54a2", 0x0000, 0x001000, CRC(5b2d42ec) SHA1(abc394cad55786df99d8bea7a4497a338ec180d8) )
|
||||
// same as above
|
||||
// ROM_LOAD( "bx54a4up", 0x0000, 0x001000, CRC(7dc2d19e) SHA1(ad012de848b586ae8355ea300edce96d0f0ce2a8) )
|
||||
// ROM_LOAD( "bx54a3up", 0x0000, 0x001000, CRC(96cb0c73) SHA1(6fa1fc61cb2761871999516c6663b3948b35f6dc) )
|
||||
// ROM_LOAD( "bx54a2up", 0x0000, 0x001000, CRC(5b2d42ec) SHA1(abc394cad55786df99d8bea7a4497a338ec180d8) )
|
||||
|
||||
ROM_LOAD( "bx5pa4", 0x0000, 0x001000, CRC(34b4d7cb) SHA1(b2ff3c79e635fff8f02edc9c953cc619fb409aa5) )
|
||||
ROM_LOAD( "bx5pa3", 0x0000, 0x001000, CRC(2f3c45ed) SHA1(f18aba5ceb9385e37b5857ba28f80230388d0cd2) )
|
||||
ROM_LOAD( "bx5pa2", 0x0000, 0x001000, CRC(a77bcdb4) SHA1(bdb3fc19a933d609cea2a2a2dfc98d3589765484) )
|
||||
|
||||
// alt 'ROM4' roms.. for above set?
|
||||
ROM_LOAD( "a410p.bin", 0x0000, 0x001000, CRC(6c19d237) SHA1(9fa79bd0ab78685fed974e5b82ec419381337252) )
|
||||
ROM_LOAD( "a410p~.bin", 0x0000, 0x001000, CRC(0f1020f1) SHA1(e29cd3954f3cd0ae5c4a113f8922bd1f3be0e740) )
|
||||
//ROM_LOAD( "a45p.bin", 0x0000, 0x001000, CRC(34b4d7cb) SHA1(b2ff3c79e635fff8f02edc9c953cc619fb409aa5) ) // bx5pa4 from ec_barx
|
||||
|
||||
|
||||
/* incomplete set(?), no ROM 4 */
|
||||
ROM_LOAD( "barx6a3", 0x0000, 0x001000, CRC(8884d188) SHA1(64716d214ada873cca64a511fa569e96f1ade062) )
|
||||
ROM_LOAD( "barx6a2", 0x0000, 0x001000, CRC(522950ec) SHA1(89daf57b53d4752a4f5f4f0bef8d976a9fc877ce) )
|
||||
//ROM_LOAD( "barx6", 0x0000, 0x001000, CRC(522950ec) SHA1(89daf57b53d4752a4f5f4f0bef8d976a9fc877ce) ) // == barx6a2
|
||||
|
||||
/* Alt 'rom 2' roms similar to sets above */
|
||||
ROM_LOAD( "a20510.bin", 0x0000, 0x001000, CRC(b4a458a6) SHA1(acda6eece0c9e011bfb147a2f696dbdaa53ea9aa) )
|
||||
ROM_LOAD( "a2054.bin", 0x0000, 0x001000, CRC(a77bcdb4) SHA1(bdb3fc19a933d609cea2a2a2dfc98d3589765484) )
|
||||
ROM_LOAD( "a2058.bin", 0x0000, 0x001000, CRC(7b564e66) SHA1(eaec8efb566f9a017eb66cd2f4d8673971ab5db5) )
|
||||
ROM_LOAD( "a21010.bin", 0x0000, 0x001000, CRC(384b6bcf) SHA1(e9beba847b613ae881a3c7be637c2c38b8c1410f) )
|
||||
ROM_LOAD( "a2104.bin", 0x0000, 0x001000, CRC(2b94fedd) SHA1(d5da5604b1db9fadbae0a6bb7a1d76b1d80a19df) )
|
||||
ROM_LOAD( "a2108.bin", 0x0000, 0x001000, CRC(f7b97d0f) SHA1(a21512cf92a61fcdd9856f017fce06d280c222b7) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( ec_casbxo )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
ROM_LOAD( "bx4c.a4", 0x0000, 0x001000, CRC(f3da815d) SHA1(5eb20a0c384f9bd864bceb5e8f8b622e17b907fd) )
|
||||
ROM_LOAD( "bx4c.a3", 0x1000, 0x001000, CRC(a472d49f) SHA1(4814b28ed46afa931c5e4f19d829374ebd1f20c9) )
|
||||
ROM_LOAD( "bx4c.a2", 0x2000, 0x001000, CRC(f86c221d) SHA1(99f6abd91870221a7d56a6dc062a687d0458546d) )
|
||||
|
||||
ROM_REGION( 0x200000, "altrevs", 0 )
|
||||
ROM_LOAD( "bx5c10p.a4", 0x0000, 0x001000, CRC(0c7df970) SHA1(25fb113a28fd446467bf9a7edf97dc8aaf936eb6) )
|
||||
ROM_LOAD( "bx5c10p.a3", 0x1000, 0x001000, CRC(12640d16) SHA1(fd30abe0551734eea83cefcb5cac15a380a97586) )
|
||||
ROM_LOAD( "bx5c10p.a2", 0x2000, 0x001000, CRC(0bd21303) SHA1(eb60749d3097ce77f0955586fc8ed1d16993286a) )
|
||||
ROM_END
|
||||
|
||||
DRIVER_INIT( ecoinf1 )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
// Early HW Type
|
||||
GAME( 19??, ec_bar5, 0 , ecoinf1_older, ecoinf1, ecoinf1, ROT0, "Electrocoin", "Bar 5 (older PCB) (Electrocoin)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_barxo, ec_barx , ecoinf1_older, ecoinf1, ecoinf1, ROT0, "Electrocoin", "Bar X (older PCB) (Electrocoin)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_casbxo, ec_casbx , ecoinf1_older, ecoinf1, ecoinf1, ROT0, "Electrocoin", "Casino Bar X (older PCB) (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
402
src/mame/drivers/ecoinf2.c
Normal file
402
src/mame/drivers/ecoinf2.c
Normal file
@ -0,0 +1,402 @@
|
||||
/* Electrocoin 'OXO' hardware type (Phoenix?)
|
||||
|
||||
at least some of these are multiple part cabs, with both top and bottom units all linked together
|
||||
see the 'Top Box Roms' in some of the sets.
|
||||
|
||||
This HW seems similar, but not idential to the Pyramid HW in ecoinf3.c
|
||||
|
||||
*/
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/z180/z180.h"
|
||||
|
||||
class ecoinf2_state : public driver_device
|
||||
{
|
||||
public:
|
||||
ecoinf2_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag) { }
|
||||
};
|
||||
|
||||
|
||||
static WRITE8_HANDLER( ox_port5c_out_w )
|
||||
{
|
||||
// Watchdog?
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( oxo_memmap, AS_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xdfff) AM_ROM
|
||||
AM_RANGE(0xe000, 0xffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( oxo_portmap, AS_IO, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x5c, 0x5c) AM_WRITE(ox_port5c_out_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static INPUT_PORTS_START( ecoinf2 )
|
||||
PORT_START("IN0")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN0:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN0:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN0:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN0:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN0:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN0:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN0:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN0:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN1")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN1:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN1:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN1:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN1:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN1:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN1:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN1:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN1:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN2")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN2:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN2:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN2:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN2:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN2:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN2:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN2:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN2:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN3")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN3:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN3:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN3:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN3:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN3:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN3:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN3:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN3:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN4")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN4:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN4:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN4:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN4:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN4:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN4:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN4:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN4:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN5")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN5:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN5:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN5:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN5:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN5:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN5:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN5:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN5:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN6")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN6:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN6:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN6:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN6:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN6:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN6:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN6:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN6:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN7")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN7:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN7:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN7:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN7:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN7:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN7:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN7:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN7:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( ecoinf2_oxo, ecoinf2_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z180,4000000) // some of these hit invalid opcodes with a plain z80, some don't?
|
||||
MCFG_CPU_PROGRAM_MAP(oxo_memmap)
|
||||
MCFG_CPU_IO_MAP(oxo_portmap)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
|
||||
/********************************************************************************************************************
|
||||
ROMs for OXO Hw type
|
||||
********************************************************************************************************************/
|
||||
|
||||
ROM_START( ec_oxocg )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
// all just Z80 roms, no header information the 'TOP' rom is rather different to the rest
|
||||
ROM_LOAD( "ocla-4.1", 0x0000, 0x010000, CRC(fe1db86d) SHA1(7718ecafc562bad39cefa15a0df46f081e6045af) )
|
||||
|
||||
ROM_REGION( 0x200000, "altrevs", 0 )
|
||||
ROM_LOAD( "ocla-4.1p", 0x0000, 0x010000, CRC(f24b2cac) SHA1(96f026df3f3915bee89ecc26725e4a7e861fddce) )
|
||||
ROM_LOAD( "ocsd-5.2", 0x0000, 0x010000, CRC(28c86aae) SHA1(cafdff7ebc57ef4163b40381e84dd2ac2c24937d) )
|
||||
ROM_LOAD( "ocsd-5.3p", 0x0000, 0x010000, CRC(9d422e21) SHA1(9e71ca53054c02c9fb6b23055fa7a5747648bac3) )
|
||||
ROM_LOAD( "oxo-btm4.0", 0x0000, 0x010000, CRC(70c8e340) SHA1(4219a493215e2e296a867a3c7ea4cf48356a8842) )
|
||||
ROM_LOAD( "oxo-btm4.1p", 0x0000, 0x010000, CRC(b970d6f2) SHA1(df2896bb8e540b67b7427c26f247b0627f6f5f15) )
|
||||
ROM_LOAD( "oxo-top4.0", 0x0000, 0x010000, CRC(1b3d8225) SHA1(1951849b3b6966019d5c4c7debef8c5cc6b0259c) )
|
||||
ROM_END
|
||||
|
||||
/*
|
||||
ELECTROCOIN OXO CLUB
|
||||
|
||||
Oxo-2.3n ---------- 54AE ?25
|
||||
Oxo-2.3p ---------- 55AD ?25
|
||||
Oxo-2-2T.box ---- 9976 ?25
|
||||
Oxo-nv7.2-3 ------ 3E15 ?25
|
||||
|
||||
Oxo-1.6n ---------- EC97 ?5 / ?15
|
||||
Oxo-1.8p ---------- 13BD ?5 / ?15
|
||||
Oxo-1-2T.box ---- 9D35 ?5 / ?15
|
||||
*/
|
||||
|
||||
ROM_START( ec_oxocl )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
// looks like a similar config to set above, the 't' roms being the TOP roms
|
||||
ROM_LOAD( "oxo-1.6n", 0x0000, 0x010000, CRC(5c4637c5) SHA1(923a8d50b2b8a7d97d6d1994dafde3aafe0f8c45) )
|
||||
|
||||
ROM_REGION( 0x200000, "altrevs", 0 )
|
||||
ROM_LOAD( "ocn7 v18 non protocol.hex", 0x0000, 0x02680d, CRC(91755ca8) SHA1(38dea02258e4cf731680621c96ebd473e74ae0f6) ) // convert from HEX and check
|
||||
// ROM_LOAD( "oxo club.txt", 0x0000, 0x000127, CRC(2ae1750e) SHA1(e15bcc78bcdb4672a77dd46b8f40313dc4a88c59) )
|
||||
ROM_LOAD( "oxo-1-2t.box", 0x0000, 0x010000, CRC(8fd03d19) SHA1(b3df92a8a4e0f4b8f813758aa4e881f45a04c8e4) )
|
||||
ROM_LOAD( "oxo-1.8p", 0x0000, 0x010000, CRC(26a40f47) SHA1(2c61fa010efc4684e2c53d58a81bd8071246b3f1) )
|
||||
ROM_LOAD( "oxo-2-2t.box", 0x0000, 0x010000, CRC(5fac6c82) SHA1(94b9db912fe85dd4bff099492dedd0b2edbec954) )
|
||||
ROM_LOAD( "oxo-2.3n", 0x0000, 0x010000, CRC(37bdce39) SHA1(5f38a09a4acfddd63b9fb88eb429390bccec6d9c) )
|
||||
ROM_LOAD( "oxo-2.3p", 0x0000, 0x010000, CRC(123e733d) SHA1(41fcb8a15742115ad69d861685f9dffb6242c563) )
|
||||
ROM_LOAD( "oxo-nv7.2-3", 0x0000, 0x010000, CRC(7d53520b) SHA1(33af51b9e3ae9f4d923058a79850cb95a141a9a6) )
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( ec_oxogb )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
ROM_LOAD( "ocla54 non protocol.hex", 0x0000, 0x02680d, CRC(08c18728) SHA1(6cc004db3f7c43b8b7a685becc5de1c84c131048) ) // convert from HEX and check
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( ec_oxorl )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
// again same type of thing as ec_oxocg / ec_oxocl
|
||||
ROM_LOAD( "oxo-btm4.0", 0x0000, 0x010000, CRC(70c8e340) SHA1(4219a493215e2e296a867a3c7ea4cf48356a8842) )
|
||||
|
||||
ROM_REGION( 0x200000, "altrevs", 0 )
|
||||
ROM_LOAD( "or25 v4.2 dereg non protocol.hex", 0x0000, 0x02680d, CRC(9a9489f5) SHA1(4587fe7bb0123559930726d9b7197d7a525218f8) ) // convert from HEX and check
|
||||
ROM_LOAD( "or25 v4.2 dereg protocol.hex", 0x0000, 0x02680d, CRC(4c3a2b4e) SHA1(e18c8c1b8c2fbc8c84c9632d6fcda76ed8a9303a) ) // convert from HEX and check
|
||||
ROM_LOAD( "or5 np.hex", 0x0000, 0x02680d, CRC(15a501eb) SHA1(b66209c02183a222f82a4671962348ae137dc162) ) // convert from HEX and check
|
||||
ROM_LOAD( "oxo-btm4.1p", 0x0000, 0x010000, CRC(b970d6f2) SHA1(df2896bb8e540b67b7427c26f247b0627f6f5f15) )
|
||||
ROM_LOAD( "oxo-top4.0", 0x0000, 0x010000, CRC(1b3d8225) SHA1(1951849b3b6966019d5c4c7debef8c5cc6b0259c) )
|
||||
ROM_LOAD( "oxoreels.2bt", 0x0000, 0x010000, CRC(bfa178ff) SHA1(d433c1f5bc216d76f311566cc80d148fb76eab71) )
|
||||
ROM_LOAD( "oxoreels.3dr", 0x0000, 0x010000, CRC(d629133b) SHA1(2a25540885d34bf38528cecd360953818beb6197) )
|
||||
ROM_LOAD( "oxoreels.btm", 0x0000, 0x010000, CRC(db408784) SHA1(e53d3419fc6fa04970c7ce52bf7afb9baf022a27) )
|
||||
ROM_LOAD( "oxoreels.top", 0x0000, 0x010000, CRC(1b3d8225) SHA1(1951849b3b6966019d5c4c7debef8c5cc6b0259c) )
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( ec_oxorv )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
// again same type of thing as ec_oxocg / ec_oxocl
|
||||
ROM_LOAD( "rev-10-0.btm", 0x0000, 0x010000, CRC(dea90334) SHA1(1023e193fa0973e09e8fbbc559935ce5dd32a093) )
|
||||
|
||||
ROM_REGION( 0x200000, "altrevs", 0 )
|
||||
ROM_LOAD( "nrev 13.0 gala compak.hex", 0x0000, 0x02680d, CRC(1537716f) SHA1(0f9d2cd7387fca7db355fea69bede0b15dcb9c2f) ) // convert from HEX and check
|
||||
ROM_LOAD( "nrev 13.0 gala connexus.hex", 0x0000, 0x02680d, CRC(11eb0066) SHA1(4e836d1a05ba3d7b7ab2fa8e6decc7307daa0b6d) ) // convert from HEX and check
|
||||
ROM_LOAD( "nrev 13.0 non protocol.hex", 0x0000, 0x02680d, CRC(bd2145d5) SHA1(a15cf6081e2b6f4763bf577f31b7b8cc06e8e3de) ) // convert from HEX and check
|
||||
ROM_LOAD( "nrev 13.0 protocol.hex", 0x0000, 0x02680d, CRC(5ae33e51) SHA1(fdabedec9c9adde51fcd3a2ebe000b15c663bcfb) ) // convert from HEX and check
|
||||
ROM_LOAD( "nrev 13.0 rank non protocol.hex", 0x0000, 0x02680d, CRC(35d14c07) SHA1(a7a4a1dc71fe197e97704bcc971893123eb2bc55) ) // convert from HEX and check
|
||||
ROM_LOAD( "nrev 13.0 rank protocol.hex", 0x0000, 0x02680d, CRC(e37feebc) SHA1(185dc87b0187b89cc9bc66c8bd8b83217bdff82a) ) // convert from HEX and check
|
||||
ROM_LOAD( "rev-10-0.top", 0x0000, 0x010000, CRC(7ed49cd2) SHA1(45fc13d4fbd3d9839ad0c5ac1db391199f1d571e) )
|
||||
ROM_LOAD( "rev12-0.top", 0x0000, 0x010000, CRC(029b2036) SHA1(f94409de013d189074d1f64f80d211c888413c28) )
|
||||
ROM_LOAD( "rev13-0.bin", 0x0000, 0x010000, CRC(90741b8d) SHA1(5496e6e79efae6a657524b5ce050cae9ccbdd981) )
|
||||
ROM_LOAD( "rev13-0p.bin", 0x0000, 0x010000, CRC(9fafd48c) SHA1(f34130233e68fe84e5d4941619a93ebbb6c4f900) )
|
||||
ROM_LOAD( "revo120 top.hex", 0x0000, 0x02680d, CRC(0b578ff6) SHA1(956e5ce9fe91d28043fbcff83163663f5aa71909) )
|
||||
ROM_LOAD( "revo2-1.btm", 0x0000, 0x010000, CRC(5d30662f) SHA1(f808c925732c5802ba377034d88c3840cae11cb0) )
|
||||
ROM_LOAD( "revo2-1p.btm", 0x0000, 0x010000, CRC(52eba92e) SHA1(5223e69d5c9fa7b8819e7a0267c25fa79c020c64) )
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( ec_suprl )
|
||||
ROM_REGION( 0x400000, "maincpu", 0 )
|
||||
// again same type of thing as ec_oxocg / ec_oxocl with the top / bottom roms
|
||||
ROM_LOAD( "srv11.btm", 0x0000, 0x010000, CRC(e68b5a8a) SHA1(b9a1b76f93ab62b5c5d8d56a1210e2d8194bb5b6) )
|
||||
|
||||
ROM_REGION( 0x200000, "altrevs", 0 )
|
||||
ROM_LOAD( "sr0520p.0 non protocol.hex", 0x0000, 0x02680d, CRC(864baa72) SHA1(3212dd51b5fe98b9c0b16f8285397c3d68ca4fd4) ) // convert from HEX and check
|
||||
ROM_LOAD( "sr0520p.0 protocol.hex", 0x0000, 0x02680d, CRC(afbbbef4) SHA1(a060db1b8d648b8890ed68f0cf9934b64abdb9fa) ) // convert from HEX and check
|
||||
ROM_LOAD( "sr05b1.8hex", 0x0000, 0x02680d, CRC(12fca690) SHA1(8408159ff7b4a5db6db5fcb08ae636a7e6a1a9b8) ) // convert from HEX and check
|
||||
ROM_LOAD( "sr25b16.hex", 0x0000, 0x02680d, CRC(87c33f5f) SHA1(f1ff058b8f670503f73b1fddb5a58becd671294b) ) // convert from HEX and check
|
||||
ROM_LOAD( "srle v1.0 protocol.hex", 0x0000, 0x02680d, CRC(57bec009) SHA1(ebf99f6ca5f20e9a30ba694cb3d17f6c8b5827f5) ) // convert from HEX and check
|
||||
ROM_LOAD( "srt30.hex", 0x0000, 0x02680d, CRC(d6b970fa) SHA1(d31cc4ae7a920b73f2b377d4e36be56422bc3632) ) // convert from HEX and check
|
||||
|
||||
|
||||
ROM_LOAD( "srv11.top", 0x0000, 0x010000, CRC(05712727) SHA1(b2e29faa7babe560ba928870e96afa3893ba8955) )
|
||||
ROM_LOAD( "srv3-0.btm", 0x0000, 0x010000, CRC(d629133b) SHA1(2a25540885d34bf38528cecd360953818beb6197) )
|
||||
ROM_LOAD( "srv3-0.top", 0x0000, 0x010000, CRC(05712727) SHA1(b2e29faa7babe560ba928870e96afa3893ba8955) )
|
||||
|
||||
ROM_REGION( 0x400000, "oki", 0 )
|
||||
ROM_LOAD( "supersnd.hex", 0x0000, 0x26812e, CRC(90d96c92) SHA1(18d73c1dc9fe6c26ff832d024ddb9824ddeacf90) )
|
||||
ROM_LOAD( "srv3-0.snd", 0x0000, 0x100000, CRC(c40e0609) SHA1(00a2fe56786517b7fa3338918cb8a3bb226f09d8) )
|
||||
ROM_LOAD( "srv11.snd", 0x0000, 0x100000, CRC(cf4d217a) SHA1(28eec63bd0c8bab7524e4e939485d174a6852b10) )
|
||||
ROM_END
|
||||
|
||||
// this has no rom for a top box.. might be missing
|
||||
ROM_START( ec_rcc )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
// Just Z80 roms, no identification
|
||||
ROM_LOAD( "rcas20p4.5", 0x0000, 0x010000, CRC(54a1ddde) SHA1(e98b6dbf0256324fe1cdddbe4b89958d3d5f1233) )
|
||||
|
||||
ROM_REGION( 0x200000, "altrevs", 0 )
|
||||
ROM_LOAD( "rcas20p4.5d", 0x0000, 0x010000, CRC(b42e2415) SHA1(fcc76977a920b6116c5e9029340aa51abb2ab713) )
|
||||
ROM_LOAD( "rcas25p4.5", 0x0000, 0x010000, CRC(0aeb0332) SHA1(1b2f2332ac30736892f72b7771fa0825a95f19ad) )
|
||||
|
||||
ROM_REGION( 0x200000, "oki", 0 )
|
||||
ROM_LOAD( "rcas4-5.snd", 0x0000, 0x100000, CRC(8d9403e1) SHA1(8a8da6f99a524646a8c689861a5cd6aafeef700b) )
|
||||
ROM_END
|
||||
|
||||
DRIVER_INIT( ecoinf2 )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
// OXO wh type (Phoenix?) (watchdog on port 5c?)
|
||||
GAME( 19??, ec_oxocg, 0 , ecoinf2_oxo, ecoinf2, ecoinf2, ROT0, "Electrocoin", "Oxo Classic Gold (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_oxocl, 0 , ecoinf2_oxo, ecoinf2, ecoinf2, ROT0, "Electrocoin", "Oxo Club (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_oxogb, 0 , ecoinf2_oxo, ecoinf2, ecoinf2, ROT0, "Electrocoin", "Oxo Golden Bars (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_oxorl, 0 , ecoinf2_oxo, ecoinf2, ecoinf2, ROT0, "Electrocoin", "Oxo Reels (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_oxorv, 0 , ecoinf2_oxo, ecoinf2, ecoinf2, ROT0, "Electrocoin", "Oxo Revolution (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_suprl, 0 , ecoinf2_oxo, ecoinf2, ecoinf2, ROT0, "Electrocoin", "Super Reels (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_rcc, 0 , ecoinf2_oxo, ecoinf2, ecoinf2, ROT0, "Electrocoin", "Royal Casino Club (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
340
src/mame/drivers/ecoinf3.c
Normal file
340
src/mame/drivers/ecoinf3.c
Normal file
@ -0,0 +1,340 @@
|
||||
/* Electrocoin Pyramid HW type */
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/z180/z180.h"
|
||||
|
||||
class ecoinf3_state : public driver_device
|
||||
{
|
||||
public:
|
||||
ecoinf3_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag) { }
|
||||
};
|
||||
|
||||
static WRITE8_HANDLER( py_port58_out_w )
|
||||
{
|
||||
// Watchdog?
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( pyramid_memmap, AS_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xdfff) AM_ROM
|
||||
AM_RANGE(0xe000, 0xffff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( pyramid_portmap, AS_IO, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
|
||||
AM_RANGE(0x58, 0x58) AM_WRITE(py_port58_out_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/*
|
||||
static ADDRESS_MAP_START( pyramid_submap, AS_PROGRAM, 8 )
|
||||
AM_RANGE(0xe000, 0xffff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
*/
|
||||
|
||||
|
||||
|
||||
static INPUT_PORTS_START( ecoinf3 )
|
||||
PORT_START("IN0")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN0:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN0:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN0:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN0:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN0:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN0:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN0:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN0:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN1")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN1:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN1:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN1:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN1:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN1:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN1:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN1:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN1:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN2")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN2:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN2:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN2:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN2:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN2:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN2:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN2:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN2:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN3")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN3:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN3:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN3:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN3:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN3:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN3:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN3:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN3:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN4")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN4:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN4:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN4:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN4:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN4:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN4:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN4:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN4:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN5")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN5:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN5:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN5:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN5:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN5:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN5:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN5:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN5:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN6")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN6:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN6:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN6:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN6:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN6:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN6:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN6:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN6:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("IN7")
|
||||
PORT_DIPNAME( 0x01, 0x01, "IN7:01" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "IN7:02" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "IN7:04" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "IN7:08" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "IN7:10" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "IN7:20" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "IN7:40" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "IN7:80" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( ecoinf3_pyramid, ecoinf3_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z180,4000000) // certainly not a plain z80 at least, invalid opcodes for that
|
||||
MCFG_CPU_PROGRAM_MAP(pyramid_memmap)
|
||||
MCFG_CPU_IO_MAP(pyramid_portmap)
|
||||
|
||||
// sphinx and pyramid on this hw contain a weird rom, looks almost like half a pair for a 16-bit cpu, but contains
|
||||
// what looks like vectors at the end, no idea what it is.
|
||||
//MCFG_CPU_ADD("subcpu", HD6301, 4000000) // ??
|
||||
//MCFG_CPU_PROGRAM_MAP(pyramid_submap)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
|
||||
|
||||
/********************************************************************************************************************
|
||||
ROMs for PYRAMID Hw Type
|
||||
********************************************************************************************************************/
|
||||
|
||||
ROM_START( ec_pyram )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
// Z80 Program
|
||||
ROM_LOAD( "pyramid 5p 3.bin", 0x0000, 0x010000, CRC(06a047d8) SHA1(4a1a15f1ab9defd3a0c5f2d333beae0daa16c6a4) )
|
||||
|
||||
ROM_REGION( 0x010000, "subcpu", 0 )
|
||||
// this seems to be half of a 16-bit pair, possibly for a 68k. It might come from a different game, it's definitely missing the other part of the pair
|
||||
// actually the end of the code (last 0x2000) bytes look like some 6xxx ROM, is the rest just unused space? the end part is same on Pyramid and Sphinx
|
||||
ROM_LOAD( "pyramid.bin", 0x0000, 0x010000, CRC(370a6d2c) SHA1(ea4f899adeca734529b19ba8de0e371841982c20) )
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( ec_sphin )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
// z80 ROMS but truncated, seem to just contain garbage at the end tho, so probably OK
|
||||
ROM_LOAD( "sphinx8c.bin", 0x0000, 0x00e000, CRC(f8e110fc) SHA1(4f55b5de87151f9127b84ffcf7f6f2e3ce34469f) )
|
||||
|
||||
ROM_REGION( 0x200000, "altrevs", 0 )
|
||||
ROM_LOAD( "spx10cv2.bin", 0x0000, 0x00e000, CRC(e2bf11a0) SHA1(f267385dbb06b2be8bcad7ae5e5804f5bb467f6d) )
|
||||
|
||||
ROM_REGION( 0x010000, "subcpu", 0 )
|
||||
// like Pyramid this looks more like half a 16-bit pair (68k?) ROM...
|
||||
// actually the end of the code (last 0x2000) bytes look like some 6xxx ROM, is the rest just unused space? the end part is same on Pyramid and Sphinx
|
||||
ROM_LOAD( "spnx5p", 0x0000, 0x010000, CRC(b4b49259) SHA1(a26172b659b739564b25dcc0f3f31f131a144d52) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( ec_penni )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
// Z80 code, contains scandisk / windows garbage at the end
|
||||
ROM_LOAD( "pfh_8c.bin", 0x0000, 0x010000, CRC(282a42d8) SHA1(f985d238c72577e755090ce0f04dcc7850af6f3b) )
|
||||
|
||||
ROM_REGION( 0x200000, "altrevs", 0 )
|
||||
ROM_LOAD( "pfh_v6.bin", 0x0000, 0x00e000, CRC(febb3fce) SHA1(f8df085a563405ea5adcd15a4162a7ba56bcfad7) ) // this set is truncated, but that area just seems to be garbage anyway, so should be fine
|
||||
|
||||
ROM_REGION( 0x010000, "subcpu", ROMREGION_ERASE00 )
|
||||
// no strange rom in this set
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( ec_laby ) // no header info with these
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
/* one revision */
|
||||
ROM_LOAD( "lab1v8.bin", 0x0000, 0x008000, CRC(16f0eeac) SHA1(9e28a6ae9176f730234dd8a7a8e50bad2904b611) )
|
||||
ROM_LOAD( "lab2v8.bin", 0x8000, 0x008000, CRC(14d7c58b) SHA1(e6b19523d96c9c1f39b743f8c52791465ab79637) )
|
||||
|
||||
ROM_REGION( 0x200000, "altrevs", 0 )
|
||||
/* another, larger rom size */
|
||||
ROM_LOAD( "laby10", 0x0000, 0x010000, CRC(a8b58fc3) SHA1(16e940b04fa85ff85a29197b4e45c8a39f5cad19) )
|
||||
|
||||
ROM_REGION( 0x010000, "subcpu", ROMREGION_ERASE00 )
|
||||
// no strange rom in this set
|
||||
ROM_END
|
||||
|
||||
ROM_START( ec_secrt )
|
||||
ROM_REGION( 0x200000, "maincpu", 0 )
|
||||
ROM_LOAD( "scastle1.bin", 0x0000, 0x010000, CRC(e6abb596) SHA1(35518c46f1ddf1d3a85af13e4ba8bee07e804f64) )
|
||||
|
||||
ROM_REGION( 0x010000, "subcpu", ROMREGION_ERASE00 )
|
||||
// no strange rom in this set
|
||||
ROM_END
|
||||
|
||||
DRIVER_INIT( ecoinf3 )
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
// another hw type (similar to stuff in ecoinf2.c) (watchdog on port 58?)
|
||||
GAME( 19??, ec_pyram, 0 , ecoinf3_pyramid, ecoinf3, ecoinf3, ROT0, "Electrocoin", "Pyramid (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_sphin, 0 , ecoinf3_pyramid, ecoinf3, ecoinf3, ROT0, "Electrocoin", "Sphinx (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_penni, 0 , ecoinf3_pyramid, ecoinf3, ecoinf3, ROT0, "Electrocoin", "Pennies From Heaven (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_laby, 0 , ecoinf3_pyramid, ecoinf3, ecoinf3, ROT0, "Electrocoin", "Labyrinth (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
GAME( 19??, ec_secrt, 0 , ecoinf3_pyramid, ecoinf3, ecoinf3, ROT0, "Electrocoin", "Secret Castle (Electrocoin) (?)" , GAME_NO_SOUND|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -14249,39 +14249,46 @@ as_ws //
|
||||
|
||||
/* Electrocoin */
|
||||
|
||||
// Oldest PCB
|
||||
|
||||
ec_bar5 // Bar 5 (older PCB) (Electrocoin)
|
||||
ec_barxo // Bar X (older PCB) (Electrocoin)
|
||||
ec_casbxo // Casino Bar X (older PCB) (Electrocoin)
|
||||
|
||||
// Regular PCB
|
||||
|
||||
ec_barx // Bar X (Electrocoin)
|
||||
ec_mag7s // Magic 7s / Cool 7 / Bar X 7 (2001 COOL7) (Electrocoin)
|
||||
ec_bxd7s // Bar X Diamond 7s (2006 COOL7) (Electrocoin)
|
||||
ec_big7 // Big 7 / Super Big 7 (Electrocoin)
|
||||
ec_casbx // Casino Bar X (Electrocoin)
|
||||
ec_redbr // Red Bar (Electrocoin)
|
||||
ec_supbx // Super Bar X (Electrocoin)
|
||||
ec_spbxd // Super Bar X Deluxe (Electrocoin)
|
||||
ec_unk1 // Unknown 'Electrocoin' Fruit Machine '300615' (Electrocoin)
|
||||
ec_unk5 // Unknown 'Electrocoin' Fruit Machine(s) (Electrocoin)
|
||||
ec_barxmab // Bar X (MAB PCB) (Electrocoin)
|
||||
ec_spbg7mab // Super Big 7 (MAB PCB) (Electrocoin)
|
||||
ec_supbxmab // Super Bar X (MAB PCB) (Electrocoin)
|
||||
|
||||
// OXO PCB
|
||||
|
||||
ec_oxocg // Oxo Classic Gold (Electrocoin)
|
||||
ec_oxocl // Oxo Club (Electrocoin)
|
||||
ec_oxogb // Oxo Golden Bars (Electrocoin)
|
||||
ec_oxorl // Oxo Reels (Electrocoin)
|
||||
ec_oxorv // Oxo Revolution (Electrocoin)
|
||||
ec_suprl // Super Reels (Electrocoin)
|
||||
ec_rcc // Royal Casino Club (Electrocoin)
|
||||
|
||||
// Pyramid PCB
|
||||
|
||||
ec_pyram // Pyramid (Electrocoin)
|
||||
ec_sphin // Sphinx (Electrocoin)
|
||||
ec_penni // Pennies From Heaven (Electrocoin)
|
||||
ec_laby // Labyrinth (Electrocoin)
|
||||
ec_secrt // Secret Castle (Electrocoin)
|
||||
|
||||
ec_bar5 // Bar 5
|
||||
ec_barx // Bar X
|
||||
ec_barx7 // Bar X 7
|
||||
ec_barxd // Bar X Deluxe
|
||||
ec_bxd7s // Bar X Diamond 7s
|
||||
ec_big7 // Big 7
|
||||
ec_casbx // Casino Bar X
|
||||
ec_casrb // Casino Red Bar
|
||||
ec_cool7 // Cool 7
|
||||
ec_laby // Labyrinth
|
||||
ec_mag7s // Magic 7s
|
||||
ec_magbr // Magic Bars
|
||||
ec_oxocg // Oxo Classic Gold
|
||||
ec_oxocl // Oxo Club
|
||||
ec_oxogb // Oxo Golden Bars
|
||||
ec_oxorl // Oxo Reels
|
||||
ec_oxorv // Oxo Revolution
|
||||
ec_penni // Pennies From Heaven
|
||||
ec_pyram // Pyramid
|
||||
ec_redbr // Red Bar
|
||||
ec_rcc // Royal Casino Club
|
||||
ec_secrt // Secret Castle
|
||||
ec_sphin // Sphinx
|
||||
ec_supb7 // Super Bar 7
|
||||
ec_supbx // Super Bar X
|
||||
ec_spbxd // Super Bar X Deluxe
|
||||
ec_spbg7 // Super Big 7
|
||||
ec_suprb // Super Red Bar
|
||||
ec_suprl // Super Reels
|
||||
ec_supsl // Super Silver
|
||||
ec_unk1 // Unknown 'Electrocoin' Fruit Machine '300615'
|
||||
ec_unk5 // Unknown 'Electrocoin' Fruit Machine(s)
|
||||
|
||||
/* BGT x86 based platform */
|
||||
bg_ddb //
|
||||
|
||||
@ -1695,6 +1695,9 @@ $(MAMEOBJ)/misc.a: \
|
||||
$(DRIVERS)/dwarfd.o \
|
||||
$(DRIVERS)/dynadice.o \
|
||||
$(DRIVERS)/ecoinfr.o \
|
||||
$(DRIVERS)/ecoinf1.o \
|
||||
$(DRIVERS)/ecoinf2.o \
|
||||
$(DRIVERS)/ecoinf3.o \
|
||||
$(DRIVERS)/epos.o $(VIDEO)/epos.o \
|
||||
$(DRIVERS)/esd16.o $(VIDEO)/esd16.o \
|
||||
$(DRIVERS)/esh.o \
|
||||
|
||||
Loading…
Reference in New Issue
Block a user