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hector: cleanup
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@ -11,19 +11,31 @@
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Hector 1
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Interact
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These machines can load and run cassettes for the interact / hector1.
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The first model (Interact)was made by Interact Electronics Inc of Ann Arbor,
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Michigan. However, just after launch, the company collapsed. The liquidator,
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Protecto, sold some and MicroVideo sold the rest. MicroVideo continued to
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develop but went under 2 years later. Meanwhile, the French company
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Lambda Systems sold a clone called the Victor Lambda. But, like the
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Americans, Lambda Systems also collapsed. Another French company,
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Micronique, purchased all remaining stock and intellectual rights
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from Lambda Systems, Microvideo and Interact, and the computer becomes
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wholly French. The computer has a name change, becoming the Hector.
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This in turn gets upgraded (2HR, HRX, MX). The line is finally
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retired in about 1985.
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These machines can load and run cassettes for the interact / hector1.
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hec2hr - press 2 then 1
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hec2hrp - press 2 then 1
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victor - press R then L
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These machines will load the cassette but the keys don't work
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These machines will load the cassette but the keys don't work
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hec2hrx, hec2mx40, hec2mdhrx - press 5 then 1
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This machine not compatible
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This machine not compatible
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hec2mx80
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2009-05-12 Skeleton driver - Micko : mmicko@gmail.com
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2009-10-29 Update skeleton to functional machine by yo_fr (jj.stac @ aliceadsl.fr)
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2009-05-12 Skeleton driver - Micko : mmicko@gmail.com
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2009-10-29 Update skeleton to functional machine by yo_fr (jj.stac @ aliceadsl.fr)
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=> add Keyboard,
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=> add color,
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=> add cassette,
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@ -35,16 +47,16 @@
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Important note : Keyboard emulation code obtained from
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DChector project : http://dchector.free.fr/ made by DanielCoulom
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(thanks Daniel)
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2010-01-03 Update and cleanup by yo_fr (jj.stac@aliceadsl.fr)
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2010-01-03 Update and cleanup by yo_fr (jj.stac@aliceadsl.fr)
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=> add the port mapping for keyboard
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2010-11-20 : synchronization between uPD765 and Z80 are now OK, CP/M running! JJStacino
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2011-11-11 : add minidisk (3.5") support JJStacino
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2010-11-20 : synchronization between uPD765 and Z80 are now OK, CP/M running! JJStacino
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2011-11-11 : add minidisk (3.5") support JJStacino
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for more information about these machines, see the DChector project : http://dchector.free.fr/ made by DanielCoulom
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For more information about these machines, see the DChector project : http://dchector.free.fr/ made by DanielCoulom
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(thanks to Daniel) and Yves site : http://hectorvictor.free.fr/ (thanks too Yves!)
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TODO : Add cartridge functionality
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Adjust the one-shot and A/D timing (sn76477)
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TODO : Add cartridge functionality
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Adjust the one-shot and A/D timing (sn76477)
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****************************************************************************/
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/* Joystick 1 :
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@ -82,104 +94,44 @@
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#include "formats/hector_minidisc.h"
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void interact_state::interact_mem(address_map &map)
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void hec2hrp_state::interact_mem(address_map &map)
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{
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map.unmap_value_high();
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/* Main ROM page*/
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map(0x0000, 0x3fff).rom(); /*BANK(2)*/
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// map(0x1000,0x3fff).ram();
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/* Hardware address mapping*/
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// map(0x0800, 0x0808).w(FUNC(interact_state::switch_bank_w)); // Bank management not used in BR machine*/
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map(0x1000, 0x1000).w(FUNC(interact_state::color_a_w)); /* Color c0/c1*/
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map(0x1800, 0x1800).w(FUNC(interact_state::color_b_w)); /* Color c2/c3*/
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map(0x2000, 0x2003).w(FUNC(interact_state::sn_2000_w)); /* Sound*/
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map(0x2800, 0x2803).w(FUNC(interact_state::sn_2800_w)); /* Sound*/
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map(0x3000, 0x3000).rw(FUNC(interact_state::cassette_r), FUNC(interact_state::sn_3000_w));/* Write necessary*/
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map(0x3800, 0x3807).rw(FUNC(interact_state::keyboard_r), FUNC(interact_state::keyboard_w)); /* Keyboard*/
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/* Video br mapping*/
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map(0x0000, 0x3fff).rom();
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map(0x1000, 0x1000).w(FUNC(hec2hrp_state::color_a_w)); /* Color c0/c1*/
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map(0x1800, 0x1800).w(FUNC(hec2hrp_state::color_b_w)); /* Color c2/c3*/
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map(0x2000, 0x2003).w(FUNC(hec2hrp_state::sn_2000_w)); /* Sound*/
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map(0x2800, 0x2803).w(FUNC(hec2hrp_state::sn_2800_w)); /* Sound*/
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map(0x3000, 0x3000).rw(FUNC(hec2hrp_state::cassette_r), FUNC(hec2hrp_state::sn_3000_w));/* Write necessary*/
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map(0x3800, 0x3807).rw(FUNC(hec2hrp_state::keyboard_r), FUNC(hec2hrp_state::keyboard_w)); /* Keyboard*/
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map(0x4000, 0x49ff).ram().share("videoram");
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/* continous RAM*/
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map(0x4A00, 0xffff).ram();
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}
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void hec2hrp_state::hecdisc2_mem(address_map &map)
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{
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map.unmap_value_high();
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map(0x0000, 0x3fff).bankrw("bank3"); /* ROM at start up, RAM later */
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map(0x4000, 0xffff).ram();
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}
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void hec2hrp_state::hecdisc2_io(address_map &map)
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{
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map.unmap_value_high();
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map.global_mask(0xff);
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// ROM page handling
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map(0x000, 0x00f).rw(FUNC(hec2hrp_state::disc2_io00_port_r), FUNC(hec2hrp_state::disc2_io00_port_w));
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// RS232 - 8251 comms handling
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map(0x020, 0x02f).rw(FUNC(hec2hrp_state::disc2_io20_port_r), FUNC(hec2hrp_state::disc2_io20_port_w));
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// Hector comms handling
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map(0x030, 0x03f).rw(FUNC(hec2hrp_state::disc2_io30_port_r), FUNC(hec2hrp_state::disc2_io30_port_w));
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map(0x040, 0x04f).rw(FUNC(hec2hrp_state::disc2_io40_port_r), FUNC(hec2hrp_state::disc2_io40_port_w));
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map(0x050, 0x05f).rw(FUNC(hec2hrp_state::disc2_io50_port_r), FUNC(hec2hrp_state::disc2_io50_port_w));
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// uPD765 link
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map(0x060, 0x061).m(m_upd_fdc, FUNC(upd765a_device::map));
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map(0x070, 0x070).mirror(0x00f).rw(m_upd_fdc, FUNC(upd765a_device::dma_r), FUNC(upd765a_device::dma_w));
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}
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void hec2hrp_state::hec2hrp_mem(address_map &map)
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{
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map.unmap_value_high();
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/* Main ROM page*/
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map(0x0000, 0x3fff).rom();
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/* Hardware address mapping */
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map(0x0800, 0x0808).w(FUNC(hec2hrp_state::switch_bank_w));/* Bank handling */
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map(0x1000, 0x1000).w(FUNC(hec2hrp_state::color_a_w)); /* Color c0/c1 */
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map(0x1800, 0x1800).w(FUNC(hec2hrp_state::color_b_w)); /* Color c2/c3 */
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map(0x2000, 0x2003).w(FUNC(hec2hrp_state::sn_2000_w)); /* Sound */
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map(0x2800, 0x2803).w(FUNC(hec2hrp_state::sn_2800_w)); /* Sound */
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map(0x3000, 0x3000).rw(FUNC(hec2hrp_state::cassette_r), FUNC(hec2hrp_state::sn_3000_w)); /* Write necessary */
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map(0x3800, 0x3807).rw(FUNC(hec2hrp_state::keyboard_r), FUNC(hec2hrp_state::keyboard_w)); /* Keyboard */
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/* Video br mapping */
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map(0x4000, 0x49ff).ram().share("videoram");
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/* contiguous RAM */
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map(0x4A00, 0xbfff).ram();
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/* from 0xC000 to 0xFFFF => Bank Ram for video and data */
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map(0xc000, 0xffff).ram().share("hector_videoram");
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interact_mem(map);
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map(0x0800, 0x0808).w(FUNC(hec2hrp_state::switch_bank_w)); // bank management
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map(0xc000, 0xffff).ram().share("hector_videoram"); /* => Bank Ram for video and data */
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}
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void hec2hrp_state::hec2hrx_mem(address_map &map)
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{
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map.unmap_value_high();
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/* Main ROM page*/
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map(0x0000, 0x3fff).bankr("bank2");
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/* Hardware address mapping*/
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map(0x0800, 0x0808).w(FUNC(hec2hrp_state::switch_bank_w));/* Bank handling */
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map(0x1000, 0x1000).w(FUNC(hec2hrp_state::color_a_w)); /* Color c0/c1 */
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map(0x1800, 0x1800).w(FUNC(hec2hrp_state::color_b_w)); /* Color c2/c3 */
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map(0x2000, 0x2003).w(FUNC(hec2hrp_state::sn_2000_w)); /* Sound */
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map(0x2800, 0x2803).w(FUNC(hec2hrp_state::sn_2800_w)); /* Sound */
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map(0x3000, 0x3000).rw(FUNC(hec2hrp_state::cassette_r), FUNC(hec2hrp_state::sn_3000_w)); /* Write necessary */
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map(0x3800, 0x3807).rw(FUNC(hec2hrp_state::keyboard_r), FUNC(hec2hrp_state::keyboard_w)); /* Keyboard */
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/* Video br mapping */
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map(0x4000, 0x49ff).ram().share("videoram");
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/* contiguous RAM */
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map(0x4A00, 0xbfff).ram();
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/* from 0xC000 to 0xFFFF => Bank Ram for video and data */
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map(0xc000, 0xffff).bankrw("bank1").share("hector_videoram");
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hec2hrp_mem(map);
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map(0x0000, 0x3fff).bankr("bank2"); /* Main ROM page*/
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map(0x3000, 0x3000).rw(FUNC(hec2hrp_state::cassette_r), FUNC(hec2hrp_state::sn_3000_w));/* Write necessary*/
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map(0x3800, 0x3807).rw(FUNC(hec2hrp_state::keyboard_r), FUNC(hec2hrp_state::keyboard_w)); /* Keyboard*/
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map(0xc000, 0xffff).bankrw("bank1").share("hector_videoram"); /* => Bank Ram for video and data */
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}
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void hec2hrp_state::hec2hrp_io(address_map &map)
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{
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map.unmap_value_high();
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map.global_mask(0xff);
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map(0x000, 0x0ff).rw(FUNC(hec2hrp_state::io_8255_r), FUNC(hec2hrp_state::io_8255_w));
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map(0x00, 0xff).rw(FUNC(hec2hrp_state::io_8255_r), FUNC(hec2hrp_state::io_8255_w));
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}
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void hec2hrp_state::hec2hrx_io(address_map &map)
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@ -218,6 +170,33 @@ void hec2hrp_state::hec2mx80_io(address_map &map)
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}
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// 2nd cpu
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void hec2hrp_state::hecdisc2_mem(address_map &map)
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{
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map.unmap_value_high();
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map(0x0000, 0x3fff).bankrw("bank3"); /* ROM at start up, RAM later */
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map(0x4000, 0xffff).ram();
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}
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void hec2hrp_state::hecdisc2_io(address_map &map)
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{
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map.unmap_value_high();
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map.global_mask(0xff);
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// ROM page handling
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map(0x00, 0x0f).rw(FUNC(hec2hrp_state::disc2_io00_port_r), FUNC(hec2hrp_state::disc2_io00_port_w));
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// RS232 - 8251 comms handling
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map(0x20, 0x2f).rw(FUNC(hec2hrp_state::disc2_io20_port_r), FUNC(hec2hrp_state::disc2_io20_port_w));
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// Hector comms handling
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map(0x30, 0x3f).rw(FUNC(hec2hrp_state::disc2_io30_port_r), FUNC(hec2hrp_state::disc2_io30_port_w));
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map(0x40, 0x4f).rw(FUNC(hec2hrp_state::disc2_io40_port_r), FUNC(hec2hrp_state::disc2_io40_port_w));
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map(0x50, 0x5f).rw(FUNC(hec2hrp_state::disc2_io50_port_r), FUNC(hec2hrp_state::disc2_io50_port_w));
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// uPD765 link
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map(0x60, 0x61).m(m_upd_fdc, FUNC(upd765a_device::map));
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map(0x70, 0x70).mirror(0x0f).rw(m_upd_fdc, FUNC(upd765a_device::dma_r), FUNC(upd765a_device::dma_w));
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}
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/* Input ports */
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static INPUT_PORTS_START( hec2hrp )
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/* keyboard input */
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@ -309,16 +288,11 @@ static INPUT_PORTS_START( hec2hrp )
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PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED)
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INPUT_PORTS_END
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MACHINE_RESET_MEMBER(interact_state,interact)
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MACHINE_RESET_MEMBER(hec2hrp_state,interact)
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{
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hector_reset(0, 0);
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}
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MACHINE_START_MEMBER(interact_state,interact)
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{
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hector_init();
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}
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MACHINE_START_MEMBER(hec2hrp_state,hec2hrp)
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{
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hector_init();
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@ -332,27 +306,27 @@ MACHINE_RESET_MEMBER(hec2hrp_state,hec2hrp)
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MACHINE_START_MEMBER(hec2hrp_state,hec2hrx)
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{
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uint8_t *RAM = memregion("maincpu")->base();
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uint8_t *r = m_ram->pointer();
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//Patch rom possible !
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//RAMD2[0xff6b] = 0x0ff; // force verbose mode
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//RAMD2[0xff6b] = 0xff; // force verbose mode
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// Memory install for bank switching
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membank("bank1")->configure_entry(HECTOR_BANK_PROG , &RAM[0xc000]);
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membank("bank1")->configure_entry(HECTOR_BANK_VIDEO, m_hector_videoram_hrx); // Video RAM
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m_bank[1]->configure_entry(HECTOR_BANK_PROG, r+0x10000);
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m_bank[1]->configure_entry(HECTOR_BANK_VIDEO, m_hector_videoram_hrx); // Video RAM
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// Set bank HECTOR_BANK_PROG as basic bank
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membank("bank1")->set_entry(HECTOR_BANK_PROG);
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m_bank[1]->set_entry(HECTOR_BANK_PROG);
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// MX-specific
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membank("bank2")->configure_entry(HECTORMX_BANK_PAGE0 , &RAM[0x0000]);
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membank("bank2")->configure_entry(HECTORMX_BANK_PAGE1 , memregion("page1")->base() ); // ROM page 1
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membank("bank2")->configure_entry(HECTORMX_BANK_PAGE2 , memregion("page2")->base() ); // ROM page 2
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membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
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m_bank[2]->configure_entry(HECTORMX_BANK_PAGE0, m_rom);
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m_bank[2]->configure_entry(HECTORMX_BANK_PAGE1, memregion("page1")->base() ); // ROM page 1
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m_bank[2]->configure_entry(HECTORMX_BANK_PAGE2, memregion("page2")->base() ); // ROM page 2
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m_bank[2]->set_entry(HECTORMX_BANK_PAGE0);
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// Disk II-specific
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membank("bank3")->configure_entry(DISCII_BANK_ROM , memregion("rom_disc2")->base() ); // ROM
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membank("bank3")->configure_entry(DISCII_BANK_RAM , memregion("disc2mem" )->base() ); // RAM
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membank("bank3")->set_entry(DISCII_BANK_ROM);
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m_bank[3]->configure_entry(DISCII_BANK_ROM, memregion("rom_disc2")->base() ); // ROM
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m_bank[3]->configure_entry(DISCII_BANK_RAM, r); // RAM
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m_bank[3]->set_entry(DISCII_BANK_ROM);
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// As video HR ram is in bank, use external memory
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m_hector_vram.set_target(m_hector_videoram_hrx,m_hector_vram.bytes());
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@ -364,20 +338,20 @@ MACHINE_START_MEMBER(hec2hrp_state,hec2mdhrx)
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/*****************************************************************************/
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//minidisc
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{
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uint8_t *RAM = memregion("maincpu")->base();
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uint8_t *r = m_ram->pointer();
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// Memory install for bank switching
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membank("bank1")->configure_entry(HECTOR_BANK_PROG, &RAM[0xc000]);
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membank("bank1")->configure_entry(HECTOR_BANK_VIDEO, m_hector_videoram_hrx); // Video RAM
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m_bank[1]->configure_entry(HECTOR_BANK_PROG, r+0x10000);
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m_bank[1]->configure_entry(HECTOR_BANK_VIDEO, m_hector_videoram_hrx); // Video RAM
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// Set HECTOR_BANK_PROG as basic bank
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membank("bank1")->set_entry(HECTOR_BANK_PROG);
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m_bank[1]->set_entry(HECTOR_BANK_PROG);
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//Here, bank 5 is not used for the language switch but for the floppy ROM
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// Mini disk-specific
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membank("bank2")->configure_entry(HECTOR_BANK_BASE, &RAM[0x0000]); // ROM base page
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membank("bank2")->configure_entry(HECTOR_BANK_DISC, memregion("page2")->base() ); // ROM mini disc page
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membank("bank2")->set_entry(HECTOR_BANK_BASE);
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m_bank[2]->configure_entry(HECTOR_BANK_BASE, m_rom); // ROM base page
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m_bank[2]->configure_entry(HECTOR_BANK_DISC, memregion("page2")->base() ); // ROM mini disc page
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m_bank[2]->set_entry(HECTOR_BANK_BASE);
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// As video HR ram is in bank, use external memory
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m_hector_vram.set_target(m_hector_videoram_hrx,m_hector_vram.bytes());
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@ -388,11 +362,11 @@ MACHINE_START_MEMBER(hec2hrp_state,hec2mdhrx)
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MACHINE_RESET_MEMBER(hec2hrp_state,hec2hrx)
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{
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// Hector Memory
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membank("bank1")->set_entry(HECTOR_BANK_PROG);
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membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
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m_bank[1]->set_entry(HECTOR_BANK_PROG);
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m_bank[2]->set_entry(HECTORMX_BANK_PAGE0);
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// DISK II Memory
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membank("bank3")->set_entry(DISCII_BANK_ROM);
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m_bank[3]->set_entry(DISCII_BANK_ROM);
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hector_reset(1, 1);
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hector_disc2_reset();
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@ -402,16 +376,16 @@ MACHINE_RESET_MEMBER(hec2hrp_state,hec2hrx)
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MACHINE_RESET_MEMBER(hec2hrp_state,hec2mdhrx)
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{
|
||||
// Hector Memory
|
||||
membank("bank1")->set_entry(HECTOR_BANK_PROG);
|
||||
membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
|
||||
m_bank[1]->set_entry(HECTOR_BANK_PROG);
|
||||
m_bank[2]->set_entry(HECTORMX_BANK_PAGE0);
|
||||
|
||||
hector_reset(1, 0);
|
||||
}
|
||||
|
||||
void interact_state::interact_common(machine_config &config)
|
||||
void hec2hrp_state::interact_common(machine_config &config)
|
||||
{
|
||||
MCFG_MACHINE_RESET_OVERRIDE(interact_state,interact)
|
||||
MCFG_MACHINE_START_OVERRIDE(interact_state,interact)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(hec2hrp_state,interact)
|
||||
MCFG_MACHINE_START_OVERRIDE(hec2hrp_state,hec2hrp)
|
||||
|
||||
/* video hardware */
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
@ -419,18 +393,16 @@ void interact_state::interact_common(machine_config &config)
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
|
||||
screen.set_size(256, 79);
|
||||
screen.set_visarea(0, 112, 0, 77);
|
||||
screen.set_screen_update(FUNC(interact_state::screen_update_interact));
|
||||
screen.set_screen_update(FUNC(hec2hrp_state::screen_update_interact));
|
||||
screen.set_palette(m_palette);
|
||||
|
||||
PALETTE(config, m_palette).set_entries(16); /* 8 colours, but only 4 at a time*/
|
||||
|
||||
MCFG_VIDEO_START_OVERRIDE(interact_state,hec2hrp)
|
||||
PALETTE(config, m_palette, FUNC(hec2hrp_state::init_palette), 16); /* 8 colours, but only 4 at a time*/
|
||||
|
||||
hector_audio(config);
|
||||
|
||||
CASSETTE(config, m_cassette);
|
||||
m_cassette->set_formats(hector_cassette_formats);
|
||||
m_cassette->set_default_state(CASSETTE_STOPPED | CASSETTE_SPEAKER_ENABLED);
|
||||
m_cassette->set_default_state(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED);
|
||||
m_cassette->add_route(ALL_OUTPUTS, "mono", 0.05);
|
||||
m_cassette->set_interface("interact_cass");
|
||||
|
||||
@ -440,22 +412,22 @@ void interact_state::interact_common(machine_config &config)
|
||||
PRINTER(config, m_printer, 0);
|
||||
}
|
||||
|
||||
void interact_state::interact(machine_config &config)
|
||||
void hec2hrp_state::interact(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
I8080(config, m_maincpu, XTAL(2'000'000));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &interact_state::interact_mem);
|
||||
m_maincpu->set_periodic_int(FUNC(interact_state::irq0_line_hold), attotime::from_hz(50));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &hec2hrp_state::interact_mem);
|
||||
m_maincpu->set_periodic_int(FUNC(hec2hrp_state::irq0_line_hold), attotime::from_hz(50));
|
||||
|
||||
interact_common(config);
|
||||
}
|
||||
|
||||
void interact_state::hector1(machine_config &config)
|
||||
void hec2hrp_state::hector1(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
Z80(config, m_maincpu, XTAL(1'750'000));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &interact_state::interact_mem);
|
||||
m_maincpu->set_periodic_int(FUNC(interact_state::irq0_line_hold), attotime::from_hz(50));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &hec2hrp_state::interact_mem);
|
||||
m_maincpu->set_periodic_int(FUNC(hec2hrp_state::irq0_line_hold), attotime::from_hz(50));
|
||||
|
||||
interact_common(config);
|
||||
}
|
||||
@ -472,6 +444,11 @@ static void minidisc_floppies(device_slot_interface &device)
|
||||
device.option_add("dd", FLOPPY_35_DD);
|
||||
}
|
||||
|
||||
static void hector_floppies(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("525hd", FLOPPY_525_HD);
|
||||
}
|
||||
|
||||
|
||||
void hec2hrp_state::hec2hr(machine_config &config)
|
||||
{
|
||||
@ -491,8 +468,7 @@ void hec2hrp_state::hec2hr(machine_config &config)
|
||||
screen.set_screen_update(FUNC(hec2hrp_state::screen_update_hec2hrp));
|
||||
screen.set_palette(m_palette);
|
||||
|
||||
PALETTE(config, m_palette).set_entries(16);
|
||||
MCFG_VIDEO_START_OVERRIDE(hec2hrp_state,hec2hrp)
|
||||
PALETTE(config, m_palette, FUNC(hec2hrp_state::init_palette), 16); /* 8 colours, but only 4 at a time*/
|
||||
|
||||
hector_audio(config);
|
||||
|
||||
@ -504,65 +480,17 @@ void hec2hrp_state::hec2hr(machine_config &config)
|
||||
|
||||
PRINTER(config, m_printer, 0);
|
||||
|
||||
/* internal ram */
|
||||
RAM(config, RAM_TAG).set_default_size("80K").set_default_value(0x00);
|
||||
|
||||
SOFTWARE_LIST(config, "cass_list").set_original("interact");
|
||||
}
|
||||
|
||||
static void hector_floppies(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("525hd", FLOPPY_525_HD);
|
||||
}
|
||||
|
||||
void hec2hrp_state::hec2mx40(machine_config &config)
|
||||
{
|
||||
Z80(config, m_maincpu, 5_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &hec2hrp_state::hec2hrx_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &hec2hrp_state::hec2mx40_io);
|
||||
m_maincpu->set_periodic_int(FUNC(hec2hrp_state::irq0_line_hold), attotime::from_hz(50)); /* put on the Z80 irq in Hz*/
|
||||
|
||||
Z80(config, m_disc2cpu, 4_MHz_XTAL);
|
||||
m_disc2cpu->set_addrmap(AS_PROGRAM, &hec2hrp_state::hecdisc2_mem);
|
||||
m_disc2cpu->set_addrmap(AS_IO, &hec2hrp_state::hecdisc2_io);
|
||||
|
||||
UPD765A(config, m_upd_fdc, 8'000'000, false, true);
|
||||
m_upd_fdc->intrq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_interrupt));
|
||||
m_upd_fdc->drq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_dma_irq));
|
||||
|
||||
FLOPPY_CONNECTOR(config, m_upd_connector[0], hector_floppies, "525hd", floppy_image_device::default_floppy_formats).enable_sound(true);
|
||||
FLOPPY_CONNECTOR(config, m_upd_connector[1], hector_floppies, "525hd", floppy_image_device::default_floppy_formats).enable_sound(true);
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(hec2hrp_state,hec2hrx)
|
||||
MCFG_MACHINE_START_OVERRIDE(hec2hrp_state,hec2hrx)
|
||||
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_refresh_hz(50);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(400)); /* 2500 not accurate */
|
||||
screen.set_size(512, 230);
|
||||
screen.set_visarea(0, 243, 0, 227);
|
||||
screen.set_screen_update(FUNC(hec2hrp_state::screen_update_hec2hrp));
|
||||
screen.set_palette(m_palette);
|
||||
|
||||
PALETTE(config, m_palette).set_entries(16);
|
||||
MCFG_VIDEO_START_OVERRIDE(hec2hrp_state,hec2hrp)
|
||||
|
||||
hector_audio(config);
|
||||
|
||||
CASSETTE(config, m_cassette);
|
||||
m_cassette->set_formats(hector_cassette_formats);
|
||||
m_cassette->set_default_state(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED);
|
||||
m_cassette->add_route(ALL_OUTPUTS, "mono", 0.05);
|
||||
|
||||
PRINTER(config, m_printer, 0);
|
||||
}
|
||||
|
||||
void hec2hrp_state::hec2hrx(machine_config &config)
|
||||
{
|
||||
Z80(config, m_maincpu, 5_MHz_XTAL);
|
||||
hec2hr(config);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &hec2hrp_state::hec2hrx_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &hec2hrp_state::hec2hrx_io);
|
||||
m_maincpu->set_periodic_int(FUNC(hec2hrp_state::irq0_line_hold), attotime::from_hz(50)); /* put on the Z80 irq in Hz*/
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(hec2hrp_state,hec2hrx)
|
||||
MCFG_MACHINE_START_OVERRIDE(hec2hrp_state,hec2hrx)
|
||||
|
||||
Z80(config, m_disc2cpu, 4_MHz_XTAL);
|
||||
m_disc2cpu->set_addrmap(AS_PROGRAM, &hec2hrp_state::hecdisc2_mem);
|
||||
@ -575,33 +503,27 @@ void hec2hrp_state::hec2hrx(machine_config &config)
|
||||
FLOPPY_CONNECTOR(config, m_upd_connector[0], hector_floppies, "525hd", floppy_image_device::default_floppy_formats).enable_sound(true);
|
||||
FLOPPY_CONNECTOR(config, m_upd_connector[1], hector_floppies, "525hd", floppy_image_device::default_floppy_formats).enable_sound(true);
|
||||
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_refresh_hz(50);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(400)); /* 2500 not accurate */
|
||||
screen.set_size(512, 230);
|
||||
screen.set_visarea(0, 243, 0, 227);
|
||||
screen.set_screen_update(FUNC(hec2hrp_state::screen_update_hec2hrp));
|
||||
screen.set_palette(m_palette);
|
||||
MCFG_MACHINE_RESET_OVERRIDE(hec2hrp_state,hec2hrx)
|
||||
MCFG_MACHINE_START_OVERRIDE(hec2hrp_state,hec2hrx)
|
||||
}
|
||||
|
||||
PALETTE(config, m_palette).set_entries(16);
|
||||
MCFG_VIDEO_START_OVERRIDE(hec2hrp_state,hec2hrp)
|
||||
void hec2hrp_state::hec2mx40(machine_config &config)
|
||||
{
|
||||
hec2hrx(config);
|
||||
m_maincpu->set_addrmap(AS_IO, &hec2hrp_state::hec2mx40_io);
|
||||
}
|
||||
|
||||
hector_audio(config);
|
||||
|
||||
CASSETTE(config, m_cassette);
|
||||
m_cassette->set_formats(hector_cassette_formats);
|
||||
m_cassette->set_default_state(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED);
|
||||
m_cassette->add_route(ALL_OUTPUTS, "mono", 0.05);
|
||||
|
||||
PRINTER(config, m_printer, 0);
|
||||
void hec2hrp_state::hec2mx80(machine_config &config)
|
||||
{
|
||||
hec2hrx(config);
|
||||
m_maincpu->set_addrmap(AS_IO, &hec2hrp_state::hec2mx80_io);
|
||||
}
|
||||
|
||||
void hec2hrp_state::hec2mdhrx(machine_config &config)
|
||||
{
|
||||
Z80(config, m_maincpu, 5_MHz_XTAL);
|
||||
hec2hr(config);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &hec2hrp_state::hec2hrx_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &hec2hrp_state::hec2mdhrx_io);
|
||||
m_maincpu->set_periodic_int(FUNC(hec2hrp_state::irq0_line_hold), attotime::from_hz(50)); /* put on the Z80 irq in Hz*/
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(hec2hrp_state,hec2mdhrx)
|
||||
MCFG_MACHINE_START_OVERRIDE(hec2hrp_state,hec2mdhrx)
|
||||
@ -609,74 +531,13 @@ void hec2hrp_state::hec2mdhrx(machine_config &config)
|
||||
/* 3.5" ("mini") disc */
|
||||
FD1793(config, m_minidisc_fdc, 1_MHz_XTAL);
|
||||
FLOPPY_CONNECTOR(config, "wd179x:0", minidisc_floppies, "dd", hec2hrp_state::minidisc_formats).enable_sound(true);
|
||||
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_refresh_hz(50);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(400)); /* 2500 not accurate */
|
||||
screen.set_size(512, 230);
|
||||
screen.set_visarea(0, 243, 0, 227);
|
||||
screen.set_screen_update(FUNC(hec2hrp_state::screen_update_hec2hrp));
|
||||
screen.set_palette(m_palette);
|
||||
|
||||
PALETTE(config, m_palette).set_entries(16);
|
||||
MCFG_VIDEO_START_OVERRIDE(hec2hrp_state,hec2hrp)
|
||||
|
||||
hector_audio(config);
|
||||
|
||||
CASSETTE(config, m_cassette);
|
||||
m_cassette->set_formats(hector_cassette_formats);
|
||||
m_cassette->set_default_state(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED);
|
||||
m_cassette->add_route(ALL_OUTPUTS, "mono", 0.05);
|
||||
|
||||
PRINTER(config, m_printer, 0);
|
||||
}
|
||||
|
||||
|
||||
void hec2hrp_state::hec2mx80(machine_config &config)
|
||||
{
|
||||
Z80(config, m_maincpu, 5_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &hec2hrp_state::hec2hrx_mem);
|
||||
m_maincpu->set_addrmap(AS_IO, &hec2hrp_state::hec2mx80_io);
|
||||
m_maincpu->set_periodic_int(FUNC(hec2hrp_state::irq0_line_hold), attotime::from_hz(50)); /* put on the Z80 irq in Hz*/
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(hec2hrp_state,hec2hrx)
|
||||
MCFG_MACHINE_START_OVERRIDE(hec2hrp_state,hec2hrx)
|
||||
|
||||
Z80(config, m_disc2cpu, 4_MHz_XTAL);
|
||||
m_disc2cpu->set_addrmap(AS_PROGRAM, &hec2hrp_state::hecdisc2_mem);
|
||||
m_disc2cpu->set_addrmap(AS_IO, &hec2hrp_state::hecdisc2_io);
|
||||
|
||||
UPD765A(config, m_upd_fdc, 8'000'000, false, true);
|
||||
m_upd_fdc->intrq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_interrupt));
|
||||
m_upd_fdc->drq_wr_callback().set(FUNC(hec2hrp_state::disc2_fdc_dma_irq));
|
||||
|
||||
FLOPPY_CONNECTOR(config, m_upd_connector[0], hector_floppies, "525hd", floppy_image_device::default_floppy_formats).enable_sound(true);
|
||||
FLOPPY_CONNECTOR(config, m_upd_connector[1], hector_floppies, "525hd", floppy_image_device::default_floppy_formats).enable_sound(true);
|
||||
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
screen.set_refresh_hz(50);
|
||||
screen.set_vblank_time(ATTOSECONDS_IN_USEC(400)); /* 2500 not accurate */
|
||||
screen.set_size(512, 230);
|
||||
screen.set_visarea(0, 243, 0, 227);
|
||||
screen.set_screen_update(FUNC(hec2hrp_state::screen_update_hec2hrp));
|
||||
screen.set_palette(m_palette);
|
||||
|
||||
PALETTE(config, m_palette).set_entries(16);
|
||||
MCFG_VIDEO_START_OVERRIDE(hec2hrp_state,hec2hrp)
|
||||
|
||||
hector_audio(config);
|
||||
|
||||
CASSETTE(config, m_cassette);
|
||||
m_cassette->set_formats(hector_cassette_formats);
|
||||
m_cassette->set_default_state(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED);
|
||||
m_cassette->add_route(ALL_OUTPUTS, "mono", 0.05);
|
||||
|
||||
PRINTER(config, m_printer, 0);
|
||||
}
|
||||
|
||||
ROM_START( interact )
|
||||
ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "interact.rom", 0x0000, 0x0800, CRC(1aa50444) SHA1(405806c97378abcf7c7b0d549430c78c7fc60ba2))
|
||||
// cartridge space 0800-0FFF, first byte must be 00.
|
||||
ROM_END
|
||||
|
||||
ROM_START( hector1 )
|
||||
@ -687,6 +548,7 @@ ROM_END
|
||||
ROM_START( hec2hr )
|
||||
ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "2hr.bin", 0x0000, 0x1000, CRC(84b9e672) SHA1(8c8b089166122eee565addaed10f84c5ce6d849b))
|
||||
// option roms
|
||||
ROM_REGION( 0x4000, "page1", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x4000, "page2", ROMREGION_ERASEFF )
|
||||
ROM_END
|
||||
@ -694,6 +556,7 @@ ROM_END
|
||||
ROM_START( victor )
|
||||
ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "victor.rom", 0x0000, 0x1000, CRC(d1e9508f) SHA1(d0f1bdcd39917fafc8859223ab38eee2a7dc85ff))
|
||||
// option roms
|
||||
ROM_REGION( 0x4000, "page1", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x4000, "page2", ROMREGION_ERASEFF )
|
||||
ROM_END
|
||||
@ -701,27 +564,27 @@ ROM_END
|
||||
ROM_START( hec2hrp )
|
||||
ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "hector2hrp.rom", 0x0000, 0x4000, CRC(983f52e4) SHA1(71695941d689827356042ee52ffe55ce7e6b8ecd))
|
||||
// option roms
|
||||
ROM_REGION( 0x4000, "page1", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x4000, "page2", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x10000, "disc2cpu", ROMREGION_ERASEFF )
|
||||
// 2nd cpu
|
||||
ROM_REGION( 0x04000, "rom_disc2", ROMREGION_ERASEFF )
|
||||
ROM_END
|
||||
|
||||
ROM_START( hec2hrx )
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "hector2hrx.rom", 0x0000, 0x4000, CRC(f047c521) SHA1(744336b2acc76acd7c245b562bdc96dca155b066))
|
||||
// option roms
|
||||
ROM_REGION( 0x4000, "page1", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x4000, "page2", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x10000, "disc2cpu", ROMREGION_ERASEFF )
|
||||
|
||||
// 2nd cpu
|
||||
ROM_REGION( 0x04000, "rom_disc2", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "d800k.bin" , 0x0000,0x1000, CRC(831bd584) SHA1(9782ee58f570042608d9d568b2c3fc4c6d87d8b9))
|
||||
ROM_REGION( 0x10000, "disc2mem", ROMREGION_ERASE00 )
|
||||
ROM_END
|
||||
|
||||
// minidisc
|
||||
ROM_START( hec2mdhrx )
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "mdic1.bin" , 0x0000,0x2000, CRC(ddda1065) SHA1(e7bba14a72605238d2f8299da029b8320a563254))
|
||||
ROM_LOAD( "mdicmb.bin" , 0x2000,0x2000, CRC(d8090747) SHA1(f2925b68002307562e2ea5e36b740e5458f0f0eb))
|
||||
|
||||
@ -732,42 +595,42 @@ ROM_START( hec2mdhrx )
|
||||
ROM_END
|
||||
|
||||
ROM_START( hec2mx80 )
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "mx80c_page0.rom" , 0x0000,0x4000, CRC(a75945cf) SHA1(542391e482271be0997b069cf13c8b5dae28feec))
|
||||
// option roms
|
||||
ROM_REGION( 0x4000, "page1", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "mx80c_page1.rom", 0x0000, 0x4000, CRC(4615f57c) SHA1(5de291bf3ae0320915133b99f1a088cb56c41658))
|
||||
ROM_REGION( 0x4000, "page2", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "mx80c_page2.rom" , 0x0000,0x4000, CRC(2d5d975e) SHA1(48307132e0f3fad0262859bb8142d108f694a436))
|
||||
|
||||
// 2nd cpu
|
||||
ROM_REGION( 0x04000, "rom_disc2", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "d800k.bin" , 0x0000,0x1000, CRC(831bd584) SHA1(9782ee58f570042608d9d568b2c3fc4c6d87d8b9))
|
||||
ROM_REGION( 0x10000, "disc2mem", ROMREGION_ERASE00 )
|
||||
ROM_END
|
||||
|
||||
ROM_START( hec2mx40 )
|
||||
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "mx40c_page0.rom" , 0x0000,0x4000, CRC(9bb5566d) SHA1(0c8c2e396ec8eb995d2b621abe06b6968ca5d0aa))
|
||||
// option roms
|
||||
ROM_REGION( 0x4000, "page1", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "mx40c_page1.rom", 0x0000, 0x4000, CRC(192a76fa) SHA1(062aa6df0b554b85774d4b5edeea8496a4baca35))
|
||||
ROM_REGION( 0x4000, "page2", ROMREGION_ERASEFF )
|
||||
ROM_LOAD( "mx40c_page2.rom" , 0x0000,0x4000, CRC(ef1b2654) SHA1(66624ea040cb7ede4720ad2eca0738d0d3bad89a))
|
||||
|
||||
// 2nd cpu
|
||||
ROM_REGION( 0x04000, "rom_disc2", ROMREGION_ERASEFF )
|
||||
// ROM_LOAD( "d360k.bin" , 0x0000,0x4000, CRC(2454eacb) SHA1(dc0d5a7d5891a7e422d9d142a2419527bb15dfd5))
|
||||
ROM_LOAD( "d800k.bin" , 0x0000,0x1000, CRC(831bd584) SHA1(9782ee58f570042608d9d568b2c3fc4c6d87d8b9))
|
||||
// ROM_LOAD( "d200k.bin" , 0x0000,0x4000, CRC(e2801377) SHA1(0926df5b417ecd8013e35c71b76780c5a25c1cbf))
|
||||
ROM_REGION( 0x10000, "disc2mem", ROMREGION_ERASE00 )
|
||||
ROM_END
|
||||
|
||||
/* Driver */
|
||||
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
|
||||
COMP(1979, interact, 0, 0, interact, hec2hrp, interact_state, empty_init, "Interact Electronics", "Interact Family Computer", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1983, hector1, interact, 0, hector1, hec2hrp, interact_state, empty_init, "Micronique", "Hector 1", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1983, hec2hrp, 0, interact, hec2hr, hec2hrp, hec2hrp_state, empty_init, "Micronique", "Hector 2HR+", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1980, victor, hec2hrp, 0, hec2hr, hec2hrp, hec2hrp_state, empty_init, "Micronique", "Victor", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1983, hec2hr, hec2hrp, 0, hec2hr, hec2hrp, hec2hrp_state, empty_init, "Micronique", "Hector 2HR", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1984, hec2hrx, hec2hrp, 0, hec2hrx, hec2hrp, hec2hrp_state, empty_init, "Micronique", "Hector HRX + Disc2", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1985, hec2mdhrx, hec2hrp, 0, hec2mdhrx, hec2hrp, hec2hrp_state, empty_init, "Micronique", "Hector HRX + mini Disc", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1985, hec2mx80, hec2hrp, 0, hec2mx80, hec2hrp, hec2hrp_state, empty_init, "Micronique", "Hector MX 80c + Disc2", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1985, hec2mx40, hec2hrp, 0, hec2mx40, hec2hrp, hec2hrp_state, empty_init, "Micronique", "Hector MX 40c + Disc2", MACHINE_IMPERFECT_SOUND)
|
||||
/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
|
||||
COMP(1979, interact, 0, 0, interact, hec2hrp, hec2hrp_state, init_interact, "Interact Electronics", "Interact Family Computer", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1983, hector1, interact, 0, hector1, hec2hrp, hec2hrp_state, init_interact, "Micronique", "Hector 1", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1983, hec2hrp, 0, interact, hec2hr, hec2hrp, hec2hrp_state, init_interact, "Micronique", "Hector 2HR+", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1980, victor, hec2hrp, 0, hec2hr, hec2hrp, hec2hrp_state, init_victor, "Micronique", "Victor", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1983, hec2hr, hec2hrp, 0, hec2hr, hec2hrp, hec2hrp_state, init_victor, "Micronique", "Hector 2HR", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1984, hec2hrx, hec2hrp, 0, hec2hrx, hec2hrp, hec2hrp_state, init_hrx, "Micronique", "Hector HRX + Disc2", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1985, hec2mdhrx, hec2hrp, 0, hec2mdhrx, hec2hrp, hec2hrp_state, init_mdhrx, "Micronique", "Hector HRX + mini Disc", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1985, hec2mx80, hec2hrp, 0, hec2mx80, hec2hrp, hec2hrp_state, init_mx40, "Micronique", "Hector MX 80c + Disc2", MACHINE_IMPERFECT_SOUND)
|
||||
COMP(1985, hec2mx40, hec2hrp, 0, hec2mx40, hec2hrp, hec2hrp_state, init_mx40, "Micronique", "Hector MX 40c + Disc2", MACHINE_IMPERFECT_SOUND)
|
||||
|
@ -48,6 +48,7 @@
|
||||
#include "imagedev/printer.h"
|
||||
#include "machine/upd765.h"
|
||||
#include "machine/wd_fdc.h"
|
||||
#include "machine/ram.h"
|
||||
#include "sound/discrete.h" /* for 1 Bit sound*/
|
||||
#include "sound/sn76477.h" /* for sn sound*/
|
||||
#include "emupal.h"
|
||||
@ -82,21 +83,24 @@ class hec2hrp_state : public driver_device
|
||||
{
|
||||
public:
|
||||
hec2hrp_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_cassette(*this, "cassette"),
|
||||
m_printer(*this, "printer"),
|
||||
m_palette(*this, "palette"),
|
||||
m_disc2cpu(*this, "disc2cpu"),
|
||||
m_discrete(*this, "discrete"),
|
||||
m_sn(*this, "sn76477"),
|
||||
m_vram(*this,"videoram"),
|
||||
m_hector_vram(*this,"hector_videoram") ,
|
||||
m_keyboard(*this, "KEY.%u", 0),
|
||||
m_minidisc_fdc(*this, "wd179x"),
|
||||
m_floppy0(*this, "wd179x:0"),
|
||||
m_upd_fdc(*this, "upd765"),
|
||||
m_upd_connector(*this, "upd765:%u", 0U)
|
||||
: driver_device(mconfig, type, tag)
|
||||
, m_maincpu(*this, "maincpu")
|
||||
, m_cassette(*this, "cassette")
|
||||
, m_printer(*this, "printer")
|
||||
, m_palette(*this, "palette")
|
||||
, m_vram(*this,"videoram")
|
||||
, m_bank(*this, "bank%u", 0U)
|
||||
, m_rom(*this, "maincpu")
|
||||
, m_ram(*this, RAM_TAG)
|
||||
, m_hector_vram(*this,"hector_videoram")
|
||||
, m_disc2cpu(*this, "disc2cpu")
|
||||
, m_discrete(*this, "discrete")
|
||||
, m_sn(*this, "sn76477")
|
||||
, m_keyboard(*this, "KEY.%u", 0)
|
||||
, m_minidisc_fdc(*this, "wd179x")
|
||||
, m_floppy0(*this, "wd179x:0")
|
||||
, m_upd_fdc(*this, "upd765")
|
||||
, m_upd_connector(*this, "upd765:%u", 0U)
|
||||
{}
|
||||
|
||||
void hec2mx80(machine_config &config);
|
||||
@ -107,12 +111,18 @@ public:
|
||||
void hec2hr(machine_config &config);
|
||||
void hector_audio(machine_config &config);
|
||||
|
||||
void hector_init();
|
||||
void init_mx40();
|
||||
void init_mdhrx();
|
||||
void init_victor();
|
||||
void init_hrx();
|
||||
void init_interact();
|
||||
void hector1(machine_config &config);
|
||||
void interact(machine_config &config);
|
||||
void interact_common(machine_config &config);
|
||||
|
||||
protected:
|
||||
DECLARE_VIDEO_START(hec2hrp);
|
||||
void hector_hr(bitmap_ind16 &bitmap, uint8_t *page, int ymax, int yram);
|
||||
void hector_reset(int hr, int with_d2);
|
||||
void hector_reset(bool hr, bool with_d2);
|
||||
|
||||
void keyboard_w(uint8_t data);
|
||||
uint8_t keyboard_r(offs_t offset);
|
||||
@ -122,11 +132,21 @@ protected:
|
||||
void sn_3000_w(uint8_t data);
|
||||
void color_a_w(uint8_t data);
|
||||
void color_b_w(uint8_t data);
|
||||
bool m_has_disc2;
|
||||
bool m_has_minidisc;
|
||||
bool m_is_hr;
|
||||
bool m_is_extended;
|
||||
void init_palette(palette_device &);
|
||||
void hector_init();
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<cassette_image_device> m_cassette;
|
||||
optional_device<printer_image_device> m_printer;
|
||||
required_device<palette_device> m_palette;
|
||||
optional_shared_ptr<uint8_t> m_vram;
|
||||
optional_memory_bank_array<4> m_bank;
|
||||
required_region_ptr<u8> m_rom;
|
||||
optional_device<ram_device> m_ram;
|
||||
|
||||
private:
|
||||
void minidisc_control_w(uint8_t data);
|
||||
@ -151,37 +171,24 @@ private:
|
||||
|
||||
DECLARE_FLOPPY_FORMATS(minidisc_formats);
|
||||
|
||||
optional_device<cpu_device> m_disc2cpu;
|
||||
required_device<discrete_device> m_discrete;
|
||||
required_device<sn76477_device> m_sn;
|
||||
optional_shared_ptr<uint8_t> m_vram;
|
||||
optional_shared_ptr<uint8_t> m_hector_vram;
|
||||
required_ioport_array<9> m_keyboard;
|
||||
|
||||
optional_device<fd1793_device> m_minidisc_fdc;
|
||||
optional_device<floppy_connector> m_floppy0;
|
||||
|
||||
optional_device<upd765a_device> m_upd_fdc;
|
||||
optional_device_array<floppy_connector, 2> m_upd_connector;
|
||||
|
||||
uint8_t m_hector_flag_hr;
|
||||
uint8_t m_hector_flag_80c;
|
||||
bool m_hector_flag_hr;
|
||||
bool m_hector_flag_80c;
|
||||
uint8_t m_hector_color[4];
|
||||
uint8_t m_hector_disc2_data_r_ready;
|
||||
uint8_t m_hector_disc2_data_w_ready;
|
||||
uint8_t m_hector_disc2_data_read;
|
||||
uint8_t m_hector_disc2_data_write;
|
||||
uint8_t m_hector_disc2_rnmi;
|
||||
bool m_hector_disc2_rnmi;
|
||||
uint8_t m_state3000;
|
||||
uint8_t m_write_cassette;
|
||||
bool m_write_cassette;
|
||||
emu_timer *m_cassette_timer;
|
||||
uint8_t m_ck_signal;
|
||||
uint8_t m_flag_clk;
|
||||
bool m_flag_clk;
|
||||
double m_pin_value[29][2];
|
||||
int m_au[17];
|
||||
int m_val_mixer;
|
||||
int m_oldstate3000;
|
||||
int m_oldstate1000;
|
||||
u8 m_au[17];
|
||||
u8 m_val_mixer;
|
||||
u8 m_oldstate3000;
|
||||
u8 m_oldstate1000;
|
||||
uint8_t m_pot0;
|
||||
uint8_t m_pot1;
|
||||
uint8_t m_actions;
|
||||
@ -190,18 +197,15 @@ private:
|
||||
uint8_t m_hector_port_c_h;
|
||||
uint8_t m_hector_port_c_l;
|
||||
uint8_t m_hector_port_cmd;
|
||||
uint8_t m_cassette_bit;
|
||||
uint8_t m_cassette_bit_mem;
|
||||
bool m_cassette_bit;
|
||||
bool m_cassette_bit_mem;
|
||||
uint8_t m_data_k7;
|
||||
int m_counter_write;
|
||||
int m_irq_current_state;
|
||||
int m_nmi_current_state;
|
||||
int m_hector_cmd[10];
|
||||
int m_hector_nb_cde;
|
||||
int m_hector_flag_result;
|
||||
int m_print;
|
||||
uint8_t m_hector_videoram_hrx[0x04000];
|
||||
bool m_irq_current_state;
|
||||
bool m_nmi_current_state;
|
||||
uint8_t m_hector_videoram_hrx[0x4000];
|
||||
|
||||
DECLARE_MACHINE_RESET(interact);
|
||||
DECLARE_MACHINE_START(hec2hrp);
|
||||
DECLARE_MACHINE_RESET(hec2hrp);
|
||||
DECLARE_MACHINE_START(hec2hrx);
|
||||
@ -213,18 +217,16 @@ private:
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( disc2_fdc_interrupt );
|
||||
DECLARE_WRITE_LINE_MEMBER( disc2_fdc_dma_irq );
|
||||
int has_disc2();
|
||||
int has_minidisc();
|
||||
int is_hr();
|
||||
int is_extended();
|
||||
|
||||
void update_state(int Adresse, int Value );
|
||||
void init_sn76477();
|
||||
void update_sound(uint8_t data);
|
||||
void init_palette();
|
||||
void hector_80c(bitmap_ind16 &bitmap, uint8_t *page, int ymax, int yram);
|
||||
/*----------- defined in machine/hecdisk2.c -----------*/
|
||||
|
||||
void hector_disc2_reset();
|
||||
uint32_t screen_update_interact(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void interact_mem(address_map &map);
|
||||
|
||||
void hec2hrp_io(address_map &map);
|
||||
void hec2hrp_mem(address_map &map);
|
||||
@ -235,27 +237,16 @@ private:
|
||||
void hec2mx80_io(address_map &map);
|
||||
void hecdisc2_io(address_map &map);
|
||||
void hecdisc2_mem(address_map &map);
|
||||
};
|
||||
|
||||
class interact_state : public hec2hrp_state
|
||||
{
|
||||
public:
|
||||
interact_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: hec2hrp_state(mconfig, type, tag)
|
||||
, m_vram(*this, "videoram")
|
||||
{ }
|
||||
|
||||
void hector1(machine_config &config);
|
||||
void interact(machine_config &config);
|
||||
void interact_common(machine_config &config);
|
||||
|
||||
private:
|
||||
|
||||
required_shared_ptr<uint8_t> m_vram;
|
||||
DECLARE_MACHINE_START(interact);
|
||||
DECLARE_MACHINE_RESET(interact);
|
||||
uint32_t screen_update_interact(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void interact_mem(address_map &map);
|
||||
optional_shared_ptr<uint8_t> m_hector_vram;
|
||||
optional_device<cpu_device> m_disc2cpu;
|
||||
required_device<discrete_device> m_discrete;
|
||||
required_device<sn76477_device> m_sn;
|
||||
required_ioport_array<9> m_keyboard;
|
||||
optional_device<fd1793_device> m_minidisc_fdc;
|
||||
optional_device<floppy_connector> m_floppy0;
|
||||
optional_device<upd765a_device> m_upd_fdc;
|
||||
optional_device_array<floppy_connector, 2> m_upd_connector;
|
||||
};
|
||||
|
||||
#endif // MAME_INCLUDES_HEC2HRP_H
|
||||
|
@ -36,8 +36,6 @@
|
||||
- http://dchector.free.fr/
|
||||
- http://hectorvictor.free.fr/
|
||||
|
||||
TODO : Add cartridge functionality,
|
||||
Adjust the one shot and A/D timing (sn76477)
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
@ -66,36 +64,48 @@ hec2mx80
|
||||
hec2mx40
|
||||
*/
|
||||
|
||||
/* Helper function*/
|
||||
int hec2hrp_state::has_disc2()
|
||||
|
||||
void hec2hrp_state::init_mx40()
|
||||
{
|
||||
return ((strncmp(machine().system().name , "hec2hrx" , 7)==0) ||
|
||||
(strncmp(machine().system().name , "hec2mx40" , 8)==0) ||
|
||||
(strncmp(machine().system().name , "hec2mx80" , 8)==0));
|
||||
m_has_disc2 = true;
|
||||
m_has_minidisc = false;
|
||||
m_is_hr = true;
|
||||
m_is_extended = true;
|
||||
}
|
||||
|
||||
int hec2hrp_state::has_minidisc()
|
||||
void hec2hrp_state::init_mdhrx()
|
||||
{
|
||||
return ((strncmp(machine().system().name , "hec2mdhrx", 9)==0));
|
||||
m_has_disc2 = false;
|
||||
m_has_minidisc = true;
|
||||
m_is_hr = true;
|
||||
m_is_extended = true;
|
||||
}
|
||||
|
||||
int hec2hrp_state::is_hr()
|
||||
void hec2hrp_state::init_victor()
|
||||
{
|
||||
return ((strncmp(machine().system().name , "hec2hr" , 6)==0) || //Aviable for hr & hrp
|
||||
(strncmp(machine().system().name , "hec2mdhrx", 9)==0) ||
|
||||
(strncmp(machine().system().name , "victor" , 6)==0) ||
|
||||
(strncmp(machine().system().name , "hec2mx40" , 8)==0) ||
|
||||
(strncmp(machine().system().name , "hec2mx80" , 8)==0));
|
||||
m_has_disc2 = false;
|
||||
m_has_minidisc = false;
|
||||
m_is_hr = true;
|
||||
m_is_extended = false;
|
||||
}
|
||||
|
||||
int hec2hrp_state::is_extended()
|
||||
void hec2hrp_state::init_hrx()
|
||||
{
|
||||
return ((strncmp(machine().system().name , "hec2mdhrx", 9)==0) ||
|
||||
(strncmp(machine().system().name , "hec2hrx" , 7)==0) ||
|
||||
(strncmp(machine().system().name , "hec2mx40" , 8)==0) ||
|
||||
(strncmp(machine().system().name , "hec2mx80" , 8)==0));
|
||||
m_has_disc2 = true;
|
||||
m_has_minidisc = false;
|
||||
m_is_hr = false;
|
||||
m_is_extended = true;
|
||||
}
|
||||
|
||||
void hec2hrp_state::init_interact()
|
||||
{
|
||||
m_has_disc2 = false;
|
||||
m_has_minidisc = false;
|
||||
m_is_hr = false;
|
||||
m_is_extended = false;
|
||||
}
|
||||
|
||||
|
||||
/* Cassette timer*/
|
||||
TIMER_CALLBACK_MEMBER(hec2hrp_state::cassette_clock)
|
||||
{
|
||||
@ -118,61 +128,57 @@ void hec2hrp_state::minidisc_control_w(uint8_t data)
|
||||
floppy->ss_w(BIT(data, 4));
|
||||
}
|
||||
|
||||
membank("bank2")->set_entry(BIT(data, 5) ? HECTOR_BANK_BASE : HECTOR_BANK_DISC);
|
||||
m_bank[2]->set_entry(BIT(data, 5) ? HECTOR_BANK_BASE : HECTOR_BANK_DISC);
|
||||
}
|
||||
|
||||
void hec2hrp_state::switch_bank_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset==0x00)
|
||||
{
|
||||
if (is_extended())
|
||||
if (m_is_extended)
|
||||
m_bank[1]->set_entry(HECTOR_BANK_VIDEO);
|
||||
|
||||
if (m_flag_clk)
|
||||
{
|
||||
membank("bank1")->set_entry(HECTOR_BANK_VIDEO);
|
||||
}
|
||||
if (m_flag_clk == 1)
|
||||
{
|
||||
m_flag_clk = 0;
|
||||
m_flag_clk = false;
|
||||
m_maincpu->set_unscaled_clock(XTAL(5'000'000));
|
||||
}
|
||||
}
|
||||
|
||||
if (offset==0x04)
|
||||
{
|
||||
m_hector_flag_hr = 0;
|
||||
if (is_extended())
|
||||
m_hector_flag_hr = false;
|
||||
if (m_is_extended)
|
||||
m_bank[1]->set_entry(HECTOR_BANK_VIDEO);
|
||||
|
||||
if (!m_flag_clk)
|
||||
{
|
||||
membank("bank1")->set_entry(HECTOR_BANK_VIDEO);
|
||||
}
|
||||
if (m_flag_clk == 0)
|
||||
{
|
||||
m_flag_clk = 1;
|
||||
m_flag_clk = true;
|
||||
m_maincpu->set_unscaled_clock(XTAL(1'750'000));
|
||||
}
|
||||
}
|
||||
|
||||
if (offset==0x08)
|
||||
{
|
||||
if (is_extended())
|
||||
if (m_is_extended)
|
||||
m_bank[1]->set_entry(HECTOR_BANK_PROG);
|
||||
|
||||
if (m_flag_clk)
|
||||
{
|
||||
membank("bank1")->set_entry(HECTOR_BANK_PROG);
|
||||
}
|
||||
if (m_flag_clk == 1)
|
||||
{
|
||||
m_flag_clk = 0;
|
||||
m_flag_clk = false;
|
||||
m_maincpu->set_unscaled_clock(XTAL(5'000'000));
|
||||
}
|
||||
}
|
||||
|
||||
if (offset == 0x0c)
|
||||
{
|
||||
m_hector_flag_hr = 0;
|
||||
if (is_extended())
|
||||
m_hector_flag_hr = false;
|
||||
if (m_is_extended)
|
||||
m_bank[1]->set_entry(HECTOR_BANK_PROG);
|
||||
|
||||
if (!m_flag_clk)
|
||||
{
|
||||
membank("bank1")->set_entry(HECTOR_BANK_PROG);
|
||||
}
|
||||
if (m_flag_clk == 0)
|
||||
{
|
||||
m_flag_clk = 1;
|
||||
m_flag_clk = true;
|
||||
m_maincpu->set_unscaled_clock(XTAL(1'750'000));
|
||||
}
|
||||
}
|
||||
@ -195,31 +201,28 @@ uint8_t hec2hrp_state::keyboard_r(offs_t offset)
|
||||
if (data & 0x01) /* Reset machine */
|
||||
{
|
||||
m_maincpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero);
|
||||
if (is_hr())
|
||||
if (m_is_hr)
|
||||
{
|
||||
m_hector_flag_hr = 1;
|
||||
if (is_extended())
|
||||
m_hector_flag_hr = true;
|
||||
if (m_is_extended)
|
||||
{
|
||||
membank("bank1")->set_entry(HECTOR_BANK_PROG);
|
||||
membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
|
||||
m_bank[1]->set_entry(HECTOR_BANK_PROG);
|
||||
m_bank[2]->set_entry(HECTORMX_BANK_PAGE0);
|
||||
}
|
||||
//RESET DISC II unit
|
||||
if (has_disc2())
|
||||
if (m_has_disc2)
|
||||
hector_disc2_reset();
|
||||
|
||||
/* floppy md master reset */
|
||||
if (has_minidisc())
|
||||
if (m_has_minidisc)
|
||||
m_minidisc_fdc->reset();
|
||||
}
|
||||
else
|
||||
{
|
||||
m_hector_flag_hr=0;
|
||||
}
|
||||
m_hector_flag_hr = false;
|
||||
|
||||
|
||||
/*Common flag*/
|
||||
m_hector_flag_80c = 0;
|
||||
m_flag_clk = 0;
|
||||
/*Common flag*/
|
||||
m_hector_flag_80c = false;
|
||||
m_flag_clk = false;
|
||||
}
|
||||
|
||||
m_actions = 0;
|
||||
@ -231,21 +234,27 @@ uint8_t hec2hrp_state::keyboard_r(offs_t offset)
|
||||
|
||||
if (data & 0x08) /* Pot(0)+*/
|
||||
m_pot0 += 1;
|
||||
if (m_pot0>128) m_pot0 = 128;
|
||||
|
||||
if (m_pot0>128)
|
||||
m_pot0 = 128;
|
||||
|
||||
if (data & 0x10) /* Pot(0)-*/
|
||||
m_pot0 -= 1;
|
||||
|
||||
if (m_pot0>250) m_pot0 = 0;
|
||||
if (m_pot0>250)
|
||||
m_pot0 = 0;
|
||||
|
||||
if (data & 0x20) /* Pot(1)+*/
|
||||
m_pot1 += 1;
|
||||
if (m_pot1>128) m_pot1 = 128;
|
||||
|
||||
if (m_pot1>128)
|
||||
m_pot1 = 128;
|
||||
|
||||
if (data & 0x40) /* Pot(1)-*/
|
||||
m_pot1 -= 1;
|
||||
|
||||
if (m_pot1>250) m_pot1 = 0;
|
||||
if (m_pot1>250)
|
||||
m_pot1 = 0;
|
||||
}
|
||||
|
||||
/* in all case return the requested value */
|
||||
@ -283,23 +292,19 @@ uint8_t hec2hrp_state::cassette_r()
|
||||
}
|
||||
else
|
||||
{
|
||||
if (m_write_cassette == 0)
|
||||
if (!m_write_cassette)
|
||||
{
|
||||
level = m_cassette->input();
|
||||
|
||||
if (level < -0.08)
|
||||
m_cassette_bit = 0x00;
|
||||
m_cassette_bit = false;
|
||||
if (level > +0.08)
|
||||
m_cassette_bit = 0x01;
|
||||
m_cassette_bit = true;
|
||||
}
|
||||
|
||||
if ((m_cassette_bit != m_cassette_bit_mem) && (m_cassette_bit !=0))
|
||||
{
|
||||
if (m_data_k7 == 0x00)
|
||||
m_data_k7 = 0x80;
|
||||
else
|
||||
m_data_k7 = 0x00;
|
||||
}
|
||||
if ((m_cassette_bit != m_cassette_bit_mem) && m_cassette_bit)
|
||||
m_data_k7 = m_data_k7 ? 0 : 0x80;
|
||||
|
||||
value = ( m_ck_signal & 0x7F ) + m_data_k7;
|
||||
m_cassette_bit_mem = m_cassette_bit;
|
||||
}
|
||||
@ -308,13 +313,14 @@ uint8_t hec2hrp_state::cassette_r()
|
||||
void hec2hrp_state::sn_3000_w(uint8_t data)
|
||||
{
|
||||
m_state3000 = data & 0xf8; /* except bit 0 to 2*/
|
||||
if ((data & 7) != m_oldstate3000 )
|
||||
data &= 7;
|
||||
if (data != m_oldstate3000 )
|
||||
{
|
||||
/* Update sn76477 only when necessary!*/
|
||||
update_state(0x3000, data & 7 );
|
||||
update_sound(data & 7);
|
||||
update_state(0x3000, data);
|
||||
update_sound(data);
|
||||
}
|
||||
m_oldstate3000 = data & 7;
|
||||
m_oldstate3000 = data;
|
||||
}
|
||||
|
||||
/* Color Interface */
|
||||
@ -323,18 +329,16 @@ void hec2hrp_state::color_a_w(uint8_t data)
|
||||
if (data & 0x40)
|
||||
{
|
||||
/* Bit 6 => motor ON/OFF => for cassette state!*/
|
||||
if (m_write_cassette==0)
|
||||
if (!m_write_cassette)
|
||||
{
|
||||
m_cassette->change_state(
|
||||
CASSETTE_MOTOR_ENABLED,
|
||||
CASSETTE_MASK_MOTOR);
|
||||
m_cassette->change_state(CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR);
|
||||
// m_cassette->set_state(CASSETTE_PLAY | CASSETTE_SPEAKER_ENABLED | CASSETTE_MOTOR_ENABLED);
|
||||
}
|
||||
}
|
||||
else
|
||||
{ /* stop motor*/
|
||||
m_cassette->set_state(CASSETTE_STOPPED);
|
||||
m_write_cassette=0;
|
||||
m_write_cassette = false;
|
||||
m_counter_write =0;
|
||||
}
|
||||
if (((data & 0x80) != (m_oldstate1000 & 0x80)) && ((m_oldstate1000 & 7)==(data & 7)) ) /* Bit7 had change but not the color statement*/
|
||||
@ -344,15 +348,14 @@ void hec2hrp_state::color_a_w(uint8_t data)
|
||||
|
||||
if (m_counter_write > 5)
|
||||
{
|
||||
/* Wait several cycle before lauch the record to prevent somes bugs*/
|
||||
/* Wait several cycles before launch recording to prevent somes bugs*/
|
||||
m_counter_write = 6;
|
||||
if (m_write_cassette==0)
|
||||
{ /* C'est la 1er fois => record*/
|
||||
m_cassette->change_state(
|
||||
CASSETTE_MOTOR_ENABLED,
|
||||
CASSETTE_MASK_MOTOR);
|
||||
if (!m_write_cassette)
|
||||
{
|
||||
// record
|
||||
m_cassette->change_state( CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR);
|
||||
m_cassette->set_state(CASSETTE_RECORD);
|
||||
m_write_cassette=1;
|
||||
m_write_cassette = true;
|
||||
}
|
||||
}
|
||||
/* cassette data */
|
||||
@ -360,22 +363,25 @@ void hec2hrp_state::color_a_w(uint8_t data)
|
||||
}
|
||||
|
||||
/* Other bit : color definition*/
|
||||
m_hector_color[0] = data & 0x07 ;
|
||||
m_hector_color[2] = ((data >> 3) & 0x07) | (m_hector_color[2] & 0x40);
|
||||
m_hector_color[0] = data & 0x07 ;
|
||||
m_hector_color[2] = BIT(data, 3, 3) | (m_hector_color[2] & 0x40);
|
||||
|
||||
m_oldstate1000=data; /* For next step*/
|
||||
}
|
||||
|
||||
void hec2hrp_state::color_b_w(uint8_t data)
|
||||
{
|
||||
m_hector_color[1] = data & 0x07;
|
||||
m_hector_color[3] = (data >> 3) & 0x07;
|
||||
m_hector_color[1] = data & 0x07;
|
||||
m_hector_color[3] = BIT(data, 3, 3);
|
||||
|
||||
/* Half light on color 2 only on HR machines:*/
|
||||
if (data & 0x40) m_hector_color[2] |= 8; else m_hector_color[2] &= 7;
|
||||
if (data & 0x40)
|
||||
m_hector_color[2] |= 8;
|
||||
else
|
||||
m_hector_color[2] &= 7;
|
||||
|
||||
/* Play bit*/
|
||||
m_discrete->write(NODE_01, (data & 0x80) ? 0:1 );
|
||||
m_discrete->write(NODE_01, (data & 0x80) ? 0:1 );
|
||||
}
|
||||
|
||||
|
||||
@ -390,20 +396,20 @@ uint8_t hec2hrp_state::io_8255_r(offs_t offset)
|
||||
uint8_t data =0;
|
||||
uint8_t data_l=0;
|
||||
uint8_t data_h=0;
|
||||
offset &= 3;
|
||||
|
||||
|
||||
if ((offset & 0x3) == 0x0) /* Port A */
|
||||
if (offset == 0) /* Port A */
|
||||
data = m_hector_port_a;
|
||||
|
||||
if ((offset & 0x3) == 0x1) /* Port B */
|
||||
else
|
||||
if (offset == 1) /* Port B */
|
||||
{
|
||||
data = m_hector_port_b;
|
||||
#ifdef DEBUG_TRACE_COM_HECTOR
|
||||
printf("\nLecture data par Hector %x (portB)",data);
|
||||
#endif
|
||||
}
|
||||
|
||||
if ((offset & 0x3) == 0x2) /* Port C */
|
||||
else
|
||||
if (offset == 2) /* Port C */
|
||||
{
|
||||
data_l = (m_hector_port_c_l & 0x0f);
|
||||
data_h = (m_hector_port_c_h & 0xf0);
|
||||
@ -413,18 +419,18 @@ uint8_t hec2hrp_state::io_8255_r(offs_t offset)
|
||||
|
||||
if (BIT(m_hector_port_cmd, 3)) /* Quartet sup en entree ?*/
|
||||
{
|
||||
m_hector_port_c_h = (m_hector_port_c_h & 0x0c0); /* Clear bits 4 & 5*/
|
||||
m_hector_port_c_h = (m_hector_port_c_h & 0xc0); /* Clear bits 4 & 5*/
|
||||
|
||||
if (m_hector_disc2_data_w_ready != 0x00)
|
||||
m_hector_port_c_h = m_hector_port_c_h + 0x010; // PC4 (data write ready from Disc II to Hector)
|
||||
m_hector_port_c_h = m_hector_port_c_h + 0x10; // PC4 (data write ready from Disc II to Hector)
|
||||
|
||||
if (m_hector_disc2_data_r_ready != 0x00)
|
||||
m_hector_port_c_h = m_hector_port_c_h + 0x020; // PC5 (data read ready from Hector to Disc2)
|
||||
m_hector_port_c_h = m_hector_port_c_h + 0x20; // PC5 (data read ready from Hector to Disc2)
|
||||
|
||||
m_hector_port_c_h = m_hector_port_c_h & 0x07F; // PC7 (printer busy=0)
|
||||
m_hector_port_c_h = m_hector_port_c_h & 0x7F; // PC7 (printer busy=0)
|
||||
data_h = m_hector_port_c_h;
|
||||
}
|
||||
data= data_l + data_h;
|
||||
data = data_l + data_h;
|
||||
}
|
||||
return data; // Return the value!
|
||||
}
|
||||
@ -433,8 +439,9 @@ uint8_t hec2hrp_state::io_8255_r(offs_t offset)
|
||||
|
||||
void hec2hrp_state::io_8255_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
offset &= 3;
|
||||
/* 8255 in mode 0 */
|
||||
if ((offset & 0x3) == 0x0) /* Port A => to printer or Disc II*/
|
||||
if (offset == 0) /* Port A => to printer or Disc II*/
|
||||
{
|
||||
m_hector_port_a = data;
|
||||
/* Port A => to printer*/
|
||||
@ -442,16 +449,13 @@ void hec2hrp_state::io_8255_w(offs_t offset, uint8_t data)
|
||||
So, everything sent to the Disc2 unit will be printed too! */
|
||||
|
||||
if (BIT(m_hector_port_c_l, 0)) // PC0 (bit 0) = strobe printer
|
||||
{
|
||||
m_printer->output(m_hector_port_a);
|
||||
}
|
||||
}
|
||||
|
||||
if ((offset & 0x3) == 0x1) /* Port B */
|
||||
else
|
||||
if (offset == 1) /* Port B */
|
||||
m_hector_port_b = data;
|
||||
|
||||
|
||||
if ((offset & 0x3) == 0x2) /* Port C => depending cmd word */
|
||||
else
|
||||
if (offset == 2) /* Port C => depending cmd word */
|
||||
{
|
||||
if (!BIT(m_hector_port_cmd, 0))
|
||||
{
|
||||
@ -476,11 +480,8 @@ void hec2hrp_state::io_8255_w(offs_t offset, uint8_t data)
|
||||
if (!BIT(m_hector_port_cmd, 3))
|
||||
m_hector_port_c_h = (data & 0xf0);
|
||||
}
|
||||
|
||||
if ((offset & 0x3) == 0x3) /* command */
|
||||
{
|
||||
else // offset=3
|
||||
m_hector_port_cmd = data;
|
||||
}
|
||||
}
|
||||
/* End of 8255 managing */
|
||||
|
||||
@ -488,34 +489,44 @@ void hec2hrp_state::io_8255_w(offs_t offset, uint8_t data)
|
||||
/******************* PIO write handler for MX40 *******************/
|
||||
void hec2hrp_state::mx40_io_port_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
offset &= 0xff;
|
||||
|
||||
/* Bank switching on several address */
|
||||
if ((offset &0x0ff) == 0x40) /* Port page 0*/
|
||||
membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
|
||||
if ((offset &0x0ff) == 0x41) /* Port page 1*/
|
||||
if (offset == 0x40) /* Port page 0*/
|
||||
m_bank[2]->set_entry(HECTORMX_BANK_PAGE0);
|
||||
else
|
||||
if (offset == 0x41) /* Port page 1*/
|
||||
{
|
||||
membank("bank2")->set_entry(HECTORMX_BANK_PAGE1);
|
||||
m_hector_flag_80c=0;
|
||||
m_bank[2]->set_entry(HECTORMX_BANK_PAGE1);
|
||||
m_hector_flag_80c = false;
|
||||
}
|
||||
if ((offset &0x0ff) == 0x44) /* Port page 2 => 42 pour MX80*/
|
||||
membank("bank2")->set_entry(HECTORMX_BANK_PAGE2);
|
||||
if ((offset &0x0ff) == 0x49) /* Port screen resolution*/
|
||||
m_hector_flag_80c=0;/* No 80c in 40c !*/
|
||||
else
|
||||
if (offset == 0x44) /* Port page 2 => 42 on MX80*/
|
||||
m_bank[2]->set_entry(HECTORMX_BANK_PAGE2);
|
||||
else
|
||||
if (offset == 0x49) /* Port screen resolution*/
|
||||
m_hector_flag_80c = false;/* No 80c in 40c !*/
|
||||
}
|
||||
|
||||
/******************* PIO write handlerfor MX80 *******************/
|
||||
void hec2hrp_state::mx80_io_port_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if ((offset &0x0ff) == 0x40) /* Port page 0*/
|
||||
membank("bank2")->set_entry(HECTORMX_BANK_PAGE0);
|
||||
if ((offset &0x0ff) == 0x41) /* Port page 1*/
|
||||
offset &= 0xff;
|
||||
|
||||
if (offset == 0x40) /* Port page 0*/
|
||||
m_bank[2]->set_entry(HECTORMX_BANK_PAGE0);
|
||||
else
|
||||
if (offset == 0x41) /* Port page 1*/
|
||||
{
|
||||
membank("bank2")->set_entry(HECTORMX_BANK_PAGE1);
|
||||
m_hector_flag_80c=0;
|
||||
m_bank[2]->set_entry(HECTORMX_BANK_PAGE1);
|
||||
m_hector_flag_80c = false;
|
||||
}
|
||||
if ((offset &0x0ff) == 0x42) /* Port page 2 => different port on MX40 */
|
||||
membank("bank2")->set_entry(HECTORMX_BANK_PAGE2);
|
||||
if ((offset &0x0ff) == 0x49) /* Port screen resolution*/
|
||||
m_hector_flag_80c=1;
|
||||
else
|
||||
if (offset == 0x42) /* Port page 2 => different port on MX40 */
|
||||
m_bank[2]->set_entry(HECTORMX_BANK_PAGE2);
|
||||
else
|
||||
if (offset == 0x49) /* Port screen resolution*/
|
||||
m_hector_flag_80c = true;
|
||||
}
|
||||
|
||||
/********************************************************************************
|
||||
@ -529,43 +540,43 @@ switch(Adresse )
|
||||
{
|
||||
case 0x2000:
|
||||
{
|
||||
m_au[ 0] = BIT(Value, 7);
|
||||
m_au[ 8] = BIT(Value, 6);
|
||||
m_au[ 0] = BIT(Value, 7);
|
||||
m_au[ 8] = BIT(Value, 6);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x2001:
|
||||
{
|
||||
m_au[ 1] = BIT(Value, 7);
|
||||
m_au[ 9] = BIT(Value, 6);
|
||||
m_au[ 1] = BIT(Value, 7);
|
||||
m_au[ 9] = BIT(Value, 6);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x2002:
|
||||
{
|
||||
m_au[ 2] = BIT(Value, 7);
|
||||
m_au[10] = BIT(Value, 6);
|
||||
m_au[ 2] = BIT(Value, 7);
|
||||
m_au[10] = BIT(Value, 6);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x2003:
|
||||
{
|
||||
m_au[ 3] = BIT(Value, 7);
|
||||
m_au[11] = BIT(Value, 6);
|
||||
m_au[ 3] = BIT(Value, 7);
|
||||
m_au[11] = BIT(Value, 6);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x2800:
|
||||
{
|
||||
m_au[ 4] = BIT(Value, 7);
|
||||
m_au[12] = BIT(Value, 6);
|
||||
m_au[ 4] = BIT(Value, 7);
|
||||
m_au[12] = BIT(Value, 6);
|
||||
break;
|
||||
}
|
||||
|
||||
case 0x2801:
|
||||
{
|
||||
m_au[ 5] = BIT(Value, 7);
|
||||
m_au[13] = BIT(Value, 6);
|
||||
m_au[ 5] = BIT(Value, 7);
|
||||
m_au[13] = BIT(Value, 6);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -578,8 +589,8 @@ switch(Adresse )
|
||||
|
||||
case 0x2803:
|
||||
{
|
||||
m_au[ 7] = BIT(Value, 7);
|
||||
m_au[15] = BIT(Value, 6);
|
||||
m_au[ 7] = BIT(Value, 7);
|
||||
m_au[15] = BIT(Value, 6);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -631,8 +642,8 @@ void hec2hrp_state::init_sn76477()
|
||||
m_pin_value[17][0] = CAP_N(47.0) ; /* measured */
|
||||
m_pin_value[17][1] = CAP_N(580.0) ; /* measured */
|
||||
/* R VCO Version 3*/
|
||||
m_pin_value[18][1] = RES_K(1400.0 );/* Measured 1300, instead of 1Mohm*/
|
||||
m_pin_value[18][0] = RES_K( 203.548 );/* Measured 223, instead of 193.548 (1000 // 240KOhm)*/
|
||||
m_pin_value[18][1] = RES_K(1400.0); /* Measured 1300, instead of 1Mohm*/
|
||||
m_pin_value[18][0] = RES_K(203.548);/* Measured 223, instead of 193.548 (1000 // 240KOhm)*/
|
||||
|
||||
/* VCO Controle*/
|
||||
m_pin_value[16][0] = 0.0; /* Volts */
|
||||
@ -666,14 +677,14 @@ void hec2hrp_state::init_sn76477()
|
||||
m_pin_value[6][1] = CAP_U(08.60); /* 0.48*/
|
||||
|
||||
/* Values from schematic */
|
||||
m_pin_value[5][1] = RES_K(3.30 ) ; /* 330Kohm*/
|
||||
m_pin_value[5][0] = RES_K(1.76 ) ; /* 76 Kohm*/
|
||||
m_pin_value[5][1] = RES_K(3.30 ); /* 330Kohm*/
|
||||
m_pin_value[5][0] = RES_K(1.76 ); /* 76 Kohm*/
|
||||
|
||||
/* Noise is not controlled by the audio bus! */
|
||||
/* Only value[0] is documented! */
|
||||
m_pin_value[4][0] = RES_K(47) ; /* 47 K ohm*/
|
||||
m_pin_value[4][0] = RES_K(47); /* 47 K ohm*/
|
||||
m_pin_value[12][0] = RES_K(100); /* 100K ohm*/
|
||||
m_pin_value[3][0] = 0 ; /* NC*/
|
||||
m_pin_value[3][0] = 0; /* NC*/
|
||||
|
||||
/* Envelope-related */
|
||||
m_pin_value[ 1][0] = 0;
|
||||
@ -683,22 +694,9 @@ void hec2hrp_state::init_sn76477()
|
||||
m_pin_value[28][1] = 1;
|
||||
|
||||
/* SN pins initialized to 0 */
|
||||
m_au[0]=0;
|
||||
m_au[1]=0;
|
||||
m_au[2]=0;
|
||||
m_au[3]=0;
|
||||
m_au[4]=0;
|
||||
m_au[5]=0;
|
||||
m_au[6]=0;
|
||||
m_au[7]=0;
|
||||
m_au[8]=0;
|
||||
m_au[9]=0;
|
||||
m_au[10]=0;
|
||||
m_au[11]=0;
|
||||
m_au[12]=0;
|
||||
m_au[13]=0;
|
||||
m_au[14]=0;
|
||||
m_au[15]=0;
|
||||
for (u8 i = 0; i < 16; i++)
|
||||
m_au[i]=0;
|
||||
|
||||
m_val_mixer = 0;
|
||||
}
|
||||
|
||||
@ -752,16 +750,16 @@ void hec2hrp_state::update_sound(uint8_t data)
|
||||
m_sn->enable_w(m_pin_value[9][m_au[14]]);
|
||||
}
|
||||
|
||||
void hec2hrp_state::hector_reset(int hr, int with_d2)
|
||||
void hec2hrp_state::hector_reset(bool hr, bool with_d2)
|
||||
{
|
||||
// Hector init
|
||||
m_hector_flag_hr = hr;
|
||||
m_flag_clk = 0;
|
||||
m_write_cassette = 0;
|
||||
m_flag_clk = false;
|
||||
m_write_cassette = false;
|
||||
m_maincpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero);
|
||||
|
||||
// Disc II init
|
||||
if (with_d2 == 1)
|
||||
if (with_d2)
|
||||
{
|
||||
m_disc2cpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero);
|
||||
m_upd_fdc->reset();
|
||||
@ -855,7 +853,7 @@ void hec2hrp_state::hector_disc2_reset()
|
||||
m_disc2cpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero);
|
||||
m_upd_fdc->reset();
|
||||
// Select ROM to cold restart
|
||||
membank("bank3")->set_entry(DISCII_BANK_ROM);
|
||||
m_bank[3]->set_entry(DISCII_BANK_ROM);
|
||||
|
||||
// Clear the Hardware's buffers
|
||||
m_hector_disc2_data_r_ready = 0x0; /* =ff when PC2 = true and data is in read buffer (state->m_hector_disc2_data_read) */
|
||||
@ -872,13 +870,13 @@ void hec2hrp_state::hector_disc2_reset()
|
||||
uint8_t hec2hrp_state::disc2_io00_port_r()
|
||||
{
|
||||
/* Switch Disc 2 to RAM */
|
||||
membank("bank3")->set_entry(DISCII_BANK_RAM);
|
||||
m_bank[3]->set_entry(DISCII_BANK_RAM);
|
||||
return 0;
|
||||
}
|
||||
void hec2hrp_state::disc2_io00_port_w(uint8_t data)
|
||||
{
|
||||
/* Switch Disc 2 to RAM */
|
||||
membank("bank3")->set_entry(DISCII_BANK_RAM);
|
||||
m_bank[3]->set_entry(DISCII_BANK_RAM);
|
||||
}
|
||||
uint8_t hec2hrp_state::disc2_io20_port_r()
|
||||
{
|
||||
|
@ -3,35 +3,7 @@
|
||||
/////////////////////////////////////////////////////////////////////////////////
|
||||
///// Hector video
|
||||
/////////////////////////////////////////////////////////////////////////////////
|
||||
/* Hector 2HR+
|
||||
Victor
|
||||
Hector 2HR
|
||||
Hector HRX
|
||||
Hector MX40c
|
||||
Hector MX80c
|
||||
Hector 1
|
||||
Interact
|
||||
|
||||
12/05/2009 Skeleton driver - Micko : mmicko@gmail.com
|
||||
31/06/2009 Video - Robbbert
|
||||
|
||||
29/10/2009 Update skeleton to functional machine
|
||||
by yo_fr (jj.stac @ aliceadsl.fr)
|
||||
|
||||
=> add Keyboard,
|
||||
=> add color,
|
||||
=> add cassette,
|
||||
=> add sn76477 sound and 1bit sound,
|
||||
=> add joysticks (stick, pot, fire)
|
||||
=> add BR/HR switching
|
||||
=> add bank switch for HRX
|
||||
=> add device MX80c and bank switching for the ROM
|
||||
Important note : the keyboard function has been taken from the
|
||||
DChector project : http://dchector.free.fr/ made by DanielCoulom
|
||||
(thanks Daniel)
|
||||
TODO : Add the cartridge function,
|
||||
Adjust the one shot and A/D timing (sn76477)
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "includes/hec2hrp.h"
|
||||
@ -39,7 +11,7 @@
|
||||
#include "screen.h"
|
||||
|
||||
|
||||
void hec2hrp_state::init_palette()
|
||||
void hec2hrp_state::init_palette(palette_device &palette)
|
||||
{
|
||||
m_hector_color[0] = 0; // black
|
||||
m_hector_color[1] = 1; // red
|
||||
@ -69,7 +41,6 @@ void hec2hrp_state::init_palette()
|
||||
|
||||
void hec2hrp_state::hector_hr(bitmap_ind16 &bitmap, uint8_t *page, int ymax, int yram)
|
||||
{
|
||||
uint8_t *hector_color = m_hector_color;
|
||||
int sy = 0;
|
||||
int ma = 0;
|
||||
for (int y = 0; y <= ymax; y++)
|
||||
@ -78,20 +49,19 @@ void hec2hrp_state::hector_hr(bitmap_ind16 &bitmap, uint8_t *page, int ymax, int
|
||||
for (int x = ma; x < ma + yram; x++)
|
||||
{
|
||||
uint8_t gfx = *(page + x);
|
||||
*pix++ = hector_color[(gfx >> 0) & 0x03];
|
||||
*pix++ = hector_color[(gfx >> 2) & 0x03];
|
||||
*pix++ = hector_color[(gfx >> 4) & 0x03];
|
||||
*pix++ = hector_color[(gfx >> 6) & 0x03];
|
||||
*pix++ = m_hector_color[BIT(gfx, 0, 2)];
|
||||
*pix++ = m_hector_color[BIT(gfx, 2, 2)];
|
||||
*pix++ = m_hector_color[BIT(gfx, 4, 2)];
|
||||
*pix++ = m_hector_color[BIT(gfx, 6, 2)];
|
||||
}
|
||||
ma+=yram;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t interact_state::screen_update_interact(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
uint32_t hec2hrp_state::screen_update_interact(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
uint8_t *videoram = m_vram;
|
||||
screen.set_visible_area(0, 113, 0, 75);
|
||||
hector_hr(bitmap, videoram, 77, 32);
|
||||
hector_hr(bitmap, m_vram, 77, 32);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -105,46 +75,32 @@ void hec2hrp_state::hector_80c(bitmap_ind16 &bitmap, uint8_t *page, int ymax, in
|
||||
for (int x = ma; x < ma + yram; x++)
|
||||
{
|
||||
uint8_t gfx = *(page + x);
|
||||
*pix++ = (gfx & 0x01) ? 7 : 0;
|
||||
*pix++ = (gfx & 0x02) ? 7 : 0;
|
||||
*pix++ = (gfx & 0x04) ? 7 : 0;
|
||||
*pix++ = (gfx & 0x08) ? 7 : 0;
|
||||
*pix++ = (gfx & 0x10) ? 7 : 0;
|
||||
*pix++ = (gfx & 0x20) ? 7 : 0;
|
||||
*pix++ = (gfx & 0x40) ? 7 : 0;
|
||||
*pix++ = (gfx & 0x80) ? 7 : 0;
|
||||
for (u8 i = 0; i < 8; i++)
|
||||
*pix++ = BIT(gfx, i) ? 7 : 0;
|
||||
}
|
||||
ma += yram;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
VIDEO_START_MEMBER(hec2hrp_state,hec2hrp)
|
||||
{
|
||||
init_palette();
|
||||
}
|
||||
|
||||
uint32_t hec2hrp_state::screen_update_hec2hrp(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
uint8_t *videoram = m_vram;
|
||||
uint8_t *videoram_HR = m_hector_vram;
|
||||
if (m_hector_flag_hr==1)
|
||||
if (m_hector_flag_hr)
|
||||
{
|
||||
if (m_hector_flag_80c==0)
|
||||
if (!m_hector_flag_80c)
|
||||
{
|
||||
screen.set_visible_area(0, 243, 0, 227);
|
||||
hector_hr(bitmap , &videoram_HR[0], 227, 64);
|
||||
hector_hr(bitmap , m_hector_vram, 227, 64);
|
||||
}
|
||||
else
|
||||
{
|
||||
screen.set_visible_area(0, 243*2, 0, 227);
|
||||
hector_80c(bitmap , &videoram_HR[0], 227, 64);
|
||||
hector_80c(bitmap , m_hector_vram, 227, 64);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
screen.set_visible_area(0, 113, 0, 75);
|
||||
hector_hr(bitmap, videoram, 77, 32);
|
||||
hector_hr(bitmap, m_vram, 77, 32);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user