mirror of
https://github.com/holub/mame
synced 2025-05-28 16:43:04 +03:00
- Added driver_data struct to arkanoid.c
- Added driver_data struct and save states to hexa.c
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@ -2427,6 +2427,7 @@ src/mame/includes/grchamp.h svneol=native#text/plain
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src/mame/includes/gridlee.h svneol=native#text/plain
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src/mame/includes/gstriker.h svneol=native#text/plain
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src/mame/includes/harddriv.h svneol=native#text/plain
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src/mame/includes/hexa.h svneol=native#text/plain
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src/mame/includes/hitme.h svneol=native#text/plain
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src/mame/includes/homedata.h svneol=native#text/plain
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src/mame/includes/hyprduel.h svneol=native#text/plain
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@ -509,9 +509,6 @@ DIP locations verified for:
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#include "sound/ay8910.h"
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#include "cpu/m6805/m6805.h"
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int arkanoid_bootleg_id;
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/***************************************************************************/
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/* Memory Maps */
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@ -525,8 +522,8 @@ static ADDRESS_MAP_START( arkanoid_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0xd00c, 0xd00c) AM_READ_PORT("SYSTEM") /* 2 bits from the 68705 */
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AM_RANGE(0xd010, 0xd010) AM_READ_PORT("BUTTONS") AM_WRITE(watchdog_reset_w)
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AM_RANGE(0xd018, 0xd018) AM_READWRITE(arkanoid_Z80_mcu_r, arkanoid_Z80_mcu_w) /* input from the 68705 */
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AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(arkanoid_videoram_w) AM_BASE(&videoram)
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AM_RANGE(0xe800, 0xe83f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
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AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(arkanoid_videoram_w) AM_BASE_MEMBER(arkanoid_state, videoram)
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AM_RANGE(0xe800, 0xe83f) AM_RAM AM_BASE_MEMBER(arkanoid_state, spriteram) AM_SIZE(&spriteram_size)
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AM_RANGE(0xe840, 0xefff) AM_RAM
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AM_RANGE(0xf000, 0xffff) AM_READNOP /* fixes instant death in final level */
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ADDRESS_MAP_END
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@ -540,19 +537,19 @@ static ADDRESS_MAP_START( bootleg_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0xd00c, 0xd00c) AM_READ_PORT("SYSTEM")
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AM_RANGE(0xd010, 0xd010) AM_READ_PORT("BUTTONS") AM_WRITE(watchdog_reset_w)
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AM_RANGE(0xd018, 0xd018) AM_READ_PORT("MUX") AM_WRITENOP
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AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(arkanoid_videoram_w) AM_BASE(&videoram)
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AM_RANGE(0xe800, 0xe83f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
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AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(arkanoid_videoram_w) AM_BASE_MEMBER(arkanoid_state, videoram)
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AM_RANGE(0xe800, 0xe83f) AM_RAM AM_BASE_MEMBER(arkanoid_state, spriteram) AM_SIZE(&spriteram_size)
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AM_RANGE(0xe840, 0xefff) AM_RAM
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AM_RANGE(0xf000, 0xffff) AM_READNOP /* fixes instant death in final level */
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0x7ff)
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AM_RANGE(0x0000, 0x0000) AM_READWRITE(arkanoid_68705_portA_r, arkanoid_68705_portA_w)
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AM_RANGE(0x0000, 0x0000) AM_READWRITE(arkanoid_68705_port_a_r, arkanoid_68705_port_a_w)
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AM_RANGE(0x0001, 0x0001) AM_READ_PORT("MUX")
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AM_RANGE(0x0002, 0x0002) AM_READWRITE(arkanoid_68705_portC_r, arkanoid_68705_portC_w)
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AM_RANGE(0x0004, 0x0004) AM_WRITE(arkanoid_68705_ddrA_w)
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AM_RANGE(0x0006, 0x0006) AM_WRITE(arkanoid_68705_ddrC_w)
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AM_RANGE(0x0002, 0x0002) AM_READWRITE(arkanoid_68705_port_c_r, arkanoid_68705_port_c_w)
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AM_RANGE(0x0004, 0x0004) AM_WRITE(arkanoid_68705_ddr_a_w)
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AM_RANGE(0x0006, 0x0006) AM_WRITE(arkanoid_68705_ddr_c_w)
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AM_RANGE(0x0010, 0x007f) AM_RAM
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AM_RANGE(0x0080, 0x07ff) AM_ROM
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ADDRESS_MAP_END
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@ -800,7 +797,54 @@ static const ay8910_interface ay8910_config =
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/* Machine Drivers */
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MACHINE_START( arkanoid )
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{
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arkanoid_state *state = (arkanoid_state *)machine->driver_data;
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state_save_register_global(machine, state->bootleg_cmd);
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state_save_register_global(machine, state->paddle_select);
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state_save_register_global(machine, state->z80write);
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state_save_register_global(machine, state->fromz80);
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state_save_register_global(machine, state->m68705write);
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state_save_register_global(machine, state->toz80);
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state_save_register_global(machine, state->port_a_in);
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state_save_register_global(machine, state->port_a_out);
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state_save_register_global(machine, state->ddr_a);
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state_save_register_global(machine, state->port_c_out);
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state_save_register_global(machine, state->ddr_c);
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state_save_register_global(machine, state->gfxbank);
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state_save_register_global(machine, state->palettebank);
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}
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MACHINE_RESET( arkanoid )
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{
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arkanoid_state *state = (arkanoid_state *)machine->driver_data;
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state->port_a_in = 0;
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state->port_a_out = 0;
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state->z80write = 0;
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state->m68705write = 0;
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state->bootleg_cmd = 0;
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state->paddle_select = 0;
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state->fromz80 = 0;
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state->toz80 = 0;
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state->ddr_a = 0;
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state->ddr_c = 0;
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state->port_c_out = 0;
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state->gfxbank = 0;
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state->palettebank = 0;
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}
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static MACHINE_DRIVER_START( arkanoid )
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/* driver data */
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MDRV_DRIVER_DATA(arkanoid_state)
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// basic machine hardware
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MDRV_CPU_ADD("maincpu", Z80, XTAL_12MHz/2) /* verified on pcb */
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MDRV_CPU_PROGRAM_MAP(arkanoid_map)
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@ -815,7 +859,6 @@ static MACHINE_DRIVER_START( arkanoid )
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MDRV_MACHINE_RESET(arkanoid)
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// video hardware
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MDRV_SCREEN_ADD("screen", RASTER)
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MDRV_SCREEN_REFRESH_RATE(60)
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MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
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@ -1195,24 +1238,27 @@ static void arkanoid_bootleg_init( running_machine *machine )
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static DRIVER_INIT( arkangc )
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{
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arkanoid_bootleg_id = ARKANGC;
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arkanoid_state *state = (arkanoid_state *)machine->driver_data;
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state->bootleg_id = ARKANGC;
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arkanoid_bootleg_init(machine);
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}
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static DRIVER_INIT( arkangc2 )
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{
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arkanoid_bootleg_id = ARKANGC2;
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arkanoid_state *state = (arkanoid_state *)machine->driver_data;
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state->bootleg_id = ARKANGC2;
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arkanoid_bootleg_init(machine);
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}
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static DRIVER_INIT( block2 )
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{
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arkanoid_state *state = (arkanoid_state *)machine->driver_data;
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// the graphics on this bootleg have the data scrambled
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int tile;
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UINT8* srcgfx = memory_region(machine,"gfx1");
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UINT8* buffer = alloc_array_or_die(UINT8, 0x18000);
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for (tile=0;tile<0x3000;tile++)
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for (tile = 0; tile < 0x3000; tile++)
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{
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int srctile;
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@ -1227,38 +1273,42 @@ static DRIVER_INIT( block2 )
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7,6,8,4,
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3,2,1,0);
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srctile = srctile^0xd4;
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srctile = srctile ^ 0xd4;
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memcpy(&buffer[tile*8], &srcgfx[srctile*8], 8);
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memcpy(&buffer[tile * 8], &srcgfx[srctile * 8], 8);
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}
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memcpy(srcgfx,buffer,0x18000);
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memcpy(srcgfx, buffer, 0x18000);
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arkanoid_bootleg_id = BLOCK2;
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state->bootleg_id = BLOCK2;
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arkanoid_bootleg_init(machine);
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}
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static DRIVER_INIT( arkblock )
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{
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arkanoid_bootleg_id = ARKBLOCK;
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arkanoid_state *state = (arkanoid_state *)machine->driver_data;
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state->bootleg_id = ARKBLOCK;
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arkanoid_bootleg_init(machine);
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}
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static DRIVER_INIT( arkbloc2 )
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{
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arkanoid_bootleg_id = ARKBLOC2;
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arkanoid_state *state = (arkanoid_state *)machine->driver_data;
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state->bootleg_id = ARKBLOC2;
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arkanoid_bootleg_init(machine);
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}
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static DRIVER_INIT( arkgcbl )
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{
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arkanoid_bootleg_id = ARKGCBL;
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arkanoid_state *state = (arkanoid_state *)machine->driver_data;
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state->bootleg_id = ARKGCBL;
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arkanoid_bootleg_init(machine);
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}
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static DRIVER_INIT( paddle2 )
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{
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arkanoid_bootleg_id = PADDLE2;
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arkanoid_state *state = (arkanoid_state *)machine->driver_data;
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state->bootleg_id = PADDLE2;
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arkanoid_bootleg_init(machine);
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}
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@ -1268,9 +1318,9 @@ static DRIVER_INIT( tetrsark )
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UINT8 *ROM = memory_region(machine, "maincpu");
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int x;
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for (x=0;x<0x8000;x++)
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for (x = 0; x < 0x8000; x++)
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{
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ROM[x]=ROM[x]^0x94;
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ROM[x] = ROM[x] ^ 0x94;
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}
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memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd008, 0xd008, 0, 0, tetrsark_d008_w );
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@ -1,62 +1,55 @@
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/****************************************************************************
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This hardware is derived from Arkanoid's hardware. The 1986 date found in
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the roms probably comes from Arkanoid. This is a Columns style game and
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the original Columns wasn't released until 1990 and I find it hard to
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believe that this would pre-date Columns.
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This hardware is derived from Arkanoid's hardware. The 1986 date found in
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the roms probably comes from Arkanoid. This is a Columns style game and
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the original Columns wasn't released until 1990 and I find it hard to
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believe that this would pre-date Columns.
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HEXA
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HEXA
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driver by Howie Cohen
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driver by Howie Cohen
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Memory map (prelim)
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0000 7fff ROM
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8000 bfff bank switch rom space??
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c000 c7ff RAM
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e000 e7ff video ram
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e800-efff unused RAM
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Memory map (prelim)
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0000 7fff ROM
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8000 bfff bank switch rom space??
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c000 c7ff RAM
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e000 e7ff video ram
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e800-efff unused RAM
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read:
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d001 AY8910 read
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f000 ???????
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read:
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d001 AY8910 read
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f000 ???????
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write:
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d000 AY8910 control
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d001 AY8910 write
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d008 bit0/1 = flip screen x/y
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bit 4 = ROM bank??
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bit 5 = char bank
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other bits????????
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d010 watchdog reset, or IRQ acknowledge, or both
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f000 ????????
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write:
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d000 AY8910 control
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d001 AY8910 write
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d008 bit0/1 = flip screen x/y
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bit 4 = ROM bank??
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bit 5 = char bank
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other bits????????
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d010 watchdog reset, or IRQ acknowledge, or both
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f000 ????????
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*************************************************************************
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main hardware consists of.....
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main hardware consists of.....
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sub board with Z80 x2, 2 ROMs and a scratched 18 pin chip (probably a PIC)
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sub board with Z80 x2, 2 ROMs and a scratched 18 pin chip (probably a PIC)
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main board has....
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12MHz xtal
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ay3-8910
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8 position DSW x1
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ROMs x4
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6116 SRAM x3
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82S123 PROMs x3
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main board has....
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12MHz xtal
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ay3-8910
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8 position DSW x1
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ROMs x4
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6116 SRAM x3
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82S123 PROMs x3
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*************************************************************************/
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#include "driver.h"
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#include "cpu/z80/z80.h"
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#include "sound/ay8910.h"
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VIDEO_START( hexa );
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VIDEO_UPDATE( hexa );
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WRITE8_HANDLER( hexa_videoram_w );
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WRITE8_HANDLER( hexa_d008_w );
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#include "hexa.h"
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static ADDRESS_MAP_START( hexa_map, ADDRESS_SPACE_PROGRAM, 8 )
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@ -67,13 +60,13 @@ static ADDRESS_MAP_START( hexa_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0xd000, 0xd001) AM_DEVWRITE("aysnd", ay8910_address_data_w)
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AM_RANGE(0xd008, 0xd008) AM_WRITE(hexa_d008_w)
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AM_RANGE(0xd010, 0xd010) AM_WRITE(watchdog_reset_w) /* or IRQ acknowledge, or both */
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AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(hexa_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
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AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(hexa_videoram_w) AM_BASE_MEMBER(hexa_state, videoram) AM_SIZE(&videoram_size)
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ADDRESS_MAP_END
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static INPUT_PORTS_START( hexa )
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PORT_START("INPUTS") /* IN0 */
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PORT_START("INPUTS")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
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@ -83,7 +76,7 @@ static INPUT_PORTS_START( hexa )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 )
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PORT_START("DSW") /* DSW */
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PORT_START("DSW")
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PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) )
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PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
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PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
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@ -141,13 +134,33 @@ static const ay8910_interface ay8910_config =
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static MACHINE_START( hexa )
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{
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hexa_state *state = (hexa_state *)machine->driver_data;
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state_save_register_global(machine, state->charbank);
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}
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static MACHINE_RESET( hexa )
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{
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hexa_state *state = (hexa_state *)machine->driver_data;
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state->charbank = 0;
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}
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static MACHINE_DRIVER_START( hexa )
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/* driver data */
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MDRV_DRIVER_DATA(hexa_state)
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/* basic machine hardware */
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MDRV_CPU_ADD("maincpu", Z80, 4000000) /* 4 MHz ??????? */
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MDRV_CPU_PROGRAM_MAP(hexa_map)
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MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
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MDRV_MACHINE_START(hexa)
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MDRV_MACHINE_RESET(hexa)
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/* video hardware */
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MDRV_SCREEN_ADD("screen", RASTER)
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MDRV_SCREEN_REFRESH_RATE(60)
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@ -197,8 +210,8 @@ ROM_END
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static DRIVER_INIT( hexa )
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{
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#if 0
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UINT8 *RAM = memory_region(machine, "maincpu");
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#if 0
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/* Hexa is not protected or anything, but it keeps writing 0x3f to register */
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@ -210,7 +223,9 @@ static DRIVER_INIT( hexa )
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RAM[0x0125] = 0x00;
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RAM[0x0126] = 0x00;
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#endif
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memory_configure_bank(machine, 1, 0, 2, &RAM[0x10000], 0x4000);
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}
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GAME( 199?, hexa, 0, hexa, hexa, hexa, ROT0, "D. R. Korea", "Hexa", 0 )
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GAME( 199?, hexa, 0, hexa, hexa, hexa, ROT0, "D. R. Korea", "Hexa", GAME_SUPPORTS_SAVE )
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@ -1,6 +1,6 @@
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/* This it the best way to allow game specific kludges until the system is fully understood */
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enum {
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ARKUNK=0, /* unknown bootlegs for inclusion of possible new sets */
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ARKUNK = 0, /* unknown bootlegs for inclusion of possible new sets */
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ARKANGC,
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ARKANGC2,
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BLOCK2,
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@ -10,10 +10,28 @@ enum {
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PADDLE2
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};
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typedef struct _arkanoid_state arkanoid_state;
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struct _arkanoid_state
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{
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/* memory pointers */
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UINT8 * videoram;
|
||||
UINT8 * spriteram;
|
||||
|
||||
/*----------- defined in drivers/arkanoid.c -----------*/
|
||||
/* video-related */
|
||||
tilemap *bg_tilemap;
|
||||
UINT8 gfxbank, palettebank;
|
||||
|
||||
/* input-related */
|
||||
UINT8 paddle_select;
|
||||
|
||||
/* misc */
|
||||
int bootleg_id;
|
||||
UINT8 z80write, fromz80, m68705write, toz80;
|
||||
UINT8 port_a_in, port_a_out, ddr_a;
|
||||
UINT8 port_c_out, ddr_c;
|
||||
UINT8 bootleg_cmd;
|
||||
};
|
||||
|
||||
extern int arkanoid_bootleg_id;
|
||||
|
||||
|
||||
/*----------- defined in video/arkanoid.c -----------*/
|
||||
@ -29,21 +47,19 @@ extern VIDEO_UPDATE( arkanoid );
|
||||
|
||||
/*----------- defined in machine/arkanoid.c -----------*/
|
||||
|
||||
extern UINT8 arkanoid_paddle_select;
|
||||
|
||||
extern MACHINE_START( arkanoid );
|
||||
extern MACHINE_RESET( arkanoid );
|
||||
|
||||
extern READ8_HANDLER( arkanoid_Z80_mcu_r );
|
||||
extern WRITE8_HANDLER( arkanoid_Z80_mcu_w );
|
||||
|
||||
extern READ8_HANDLER( arkanoid_68705_portA_r );
|
||||
extern WRITE8_HANDLER( arkanoid_68705_portA_w );
|
||||
extern WRITE8_HANDLER( arkanoid_68705_ddrA_w );
|
||||
extern READ8_HANDLER( arkanoid_68705_port_a_r );
|
||||
extern WRITE8_HANDLER( arkanoid_68705_port_a_w );
|
||||
extern WRITE8_HANDLER( arkanoid_68705_ddr_a_w );
|
||||
|
||||
extern READ8_HANDLER( arkanoid_68705_portC_r );
|
||||
extern WRITE8_HANDLER( arkanoid_68705_portC_w );
|
||||
extern WRITE8_HANDLER( arkanoid_68705_ddrC_w );
|
||||
extern READ8_HANDLER( arkanoid_68705_port_c_r );
|
||||
extern WRITE8_HANDLER( arkanoid_68705_port_c_w );
|
||||
extern WRITE8_HANDLER( arkanoid_68705_ddr_c_w );
|
||||
|
||||
extern CUSTOM_INPUT( arkanoid_68705_input_r );
|
||||
extern CUSTOM_INPUT( arkanoid_input_mux );
|
||||
@ -52,4 +68,3 @@ extern READ8_HANDLER( arkanoid_bootleg_f000_r );
|
||||
extern READ8_HANDLER( arkanoid_bootleg_f002_r );
|
||||
extern WRITE8_HANDLER( arkanoid_bootleg_d018_w );
|
||||
extern READ8_HANDLER( arkanoid_bootleg_d008_r );
|
||||
|
||||
|
22
src/mame/includes/hexa.h
Normal file
22
src/mame/includes/hexa.h
Normal file
@ -0,0 +1,22 @@
|
||||
|
||||
|
||||
typedef struct _hexa_state hexa_state;
|
||||
struct _hexa_state
|
||||
{
|
||||
/* memory pointers */
|
||||
UINT8 * videoram;
|
||||
|
||||
/* video-related */
|
||||
tilemap *bg_tilemap;
|
||||
int charbank;
|
||||
|
||||
};
|
||||
|
||||
|
||||
/* ----------- defined in video/hexa.c -----------*/
|
||||
|
||||
WRITE8_HANDLER( hexa_videoram_w );
|
||||
WRITE8_HANDLER( hexa_d008_w );
|
||||
|
||||
VIDEO_START( hexa );
|
||||
VIDEO_UPDATE( hexa );
|
@ -15,46 +15,21 @@
|
||||
#define ARKANOID_BOOTLEG_VERBOSE 1
|
||||
|
||||
|
||||
UINT8 arkanoid_paddle_select;
|
||||
|
||||
static UINT8 z80write, fromz80, m68705write, toz80;
|
||||
|
||||
static UINT8 portA_in, portA_out, ddrA;
|
||||
static UINT8 portC_out, ddrC;
|
||||
|
||||
|
||||
MACHINE_START( arkanoid )
|
||||
{
|
||||
state_save_register_global(machine, arkanoid_paddle_select);
|
||||
state_save_register_global(machine, z80write);
|
||||
state_save_register_global(machine, fromz80);
|
||||
state_save_register_global(machine, m68705write);
|
||||
state_save_register_global(machine, toz80);
|
||||
|
||||
state_save_register_global(machine, portA_in);
|
||||
state_save_register_global(machine, portA_out);
|
||||
state_save_register_global(machine, ddrA);
|
||||
|
||||
state_save_register_global(machine, portC_out);
|
||||
state_save_register_global(machine, ddrC);
|
||||
}
|
||||
|
||||
MACHINE_RESET( arkanoid )
|
||||
{
|
||||
portA_in = portA_out = z80write = m68705write = 0;
|
||||
}
|
||||
|
||||
READ8_HANDLER( arkanoid_Z80_mcu_r )
|
||||
{
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
|
||||
/* return the last value the 68705 wrote, and mark that we've read it */
|
||||
m68705write = 0;
|
||||
return toz80;
|
||||
state->m68705write = 0;
|
||||
return state->toz80;
|
||||
}
|
||||
|
||||
static TIMER_CALLBACK( test )
|
||||
{
|
||||
z80write = 1;
|
||||
fromz80 = param;
|
||||
arkanoid_state *state = (arkanoid_state *)machine->driver_data;
|
||||
|
||||
state->z80write = 1;
|
||||
state->fromz80 = param;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( arkanoid_Z80_mcu_w )
|
||||
@ -64,76 +39,93 @@ WRITE8_HANDLER( arkanoid_Z80_mcu_w )
|
||||
cpuexec_boost_interleave(space->machine, attotime_zero, ATTOTIME_IN_USEC(10));
|
||||
}
|
||||
|
||||
READ8_HANDLER( arkanoid_68705_portA_r )
|
||||
READ8_HANDLER( arkanoid_68705_port_a_r )
|
||||
{
|
||||
return (portA_out & ddrA) | (portA_in & ~ddrA);
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
|
||||
return (state->port_a_out & state->ddr_a) | (state->port_a_in & ~state->ddr_a);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( arkanoid_68705_portA_w )
|
||||
WRITE8_HANDLER( arkanoid_68705_port_a_w )
|
||||
{
|
||||
portA_out = data;
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
|
||||
state->port_a_out = data;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( arkanoid_68705_ddrA_w )
|
||||
WRITE8_HANDLER( arkanoid_68705_ddr_a_w )
|
||||
{
|
||||
ddrA = data;
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
|
||||
state->ddr_a = data;
|
||||
}
|
||||
|
||||
|
||||
READ8_HANDLER( arkanoid_68705_portC_r )
|
||||
READ8_HANDLER( arkanoid_68705_port_c_r )
|
||||
{
|
||||
int res=0;
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
int res = 0;
|
||||
|
||||
/* bit 0 is high on a write strobe; clear it once we've detected it */
|
||||
if (z80write) res |= 0x01;
|
||||
if (state->z80write)
|
||||
res |= 0x01;
|
||||
|
||||
/* bit 1 is high if the previous write has been read */
|
||||
if (!m68705write) res |= 0x02;
|
||||
if (!state->m68705write)
|
||||
res |= 0x02;
|
||||
|
||||
return (portC_out & ddrC) | (res & ~ddrC);
|
||||
return (state->port_c_out & state->ddr_c) | (res & ~state->ddr_c);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( arkanoid_68705_portC_w )
|
||||
WRITE8_HANDLER( arkanoid_68705_port_c_w )
|
||||
{
|
||||
if ((ddrC & 0x04) && (~data & 0x04) && (portC_out & 0x04))
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
|
||||
if ((state->ddr_c & 0x04) && (~data & 0x04) && (state->port_c_out & 0x04))
|
||||
{
|
||||
/* return the last value the Z80 wrote */
|
||||
z80write = 0;
|
||||
portA_in = fromz80;
|
||||
state->z80write = 0;
|
||||
state->port_a_in = state->fromz80;
|
||||
}
|
||||
if ((ddrC & 0x08) && (~data & 0x08) && (portC_out & 0x08))
|
||||
if ((state->ddr_c & 0x08) && (~data & 0x08) && (state->port_c_out & 0x08))
|
||||
{
|
||||
/* a write from the 68705 to the Z80; remember its value */
|
||||
m68705write = 1;
|
||||
toz80 = portA_out;
|
||||
state->m68705write = 1;
|
||||
state->toz80 = state->port_a_out;
|
||||
}
|
||||
|
||||
portC_out = data;
|
||||
state->port_c_out = data;
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( arkanoid_68705_ddrC_w )
|
||||
WRITE8_HANDLER( arkanoid_68705_ddr_c_w )
|
||||
{
|
||||
ddrC = data;
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
|
||||
state->ddr_c = data;
|
||||
}
|
||||
|
||||
CUSTOM_INPUT( arkanoid_68705_input_r )
|
||||
{
|
||||
arkanoid_state *state = (arkanoid_state *)field->port->machine->driver_data;
|
||||
int res = 0;
|
||||
|
||||
/* bit 0x40 of comes from the sticky bit */
|
||||
if (!z80write) res |= 0x01;
|
||||
if (!state->z80write)
|
||||
res |= 0x01;
|
||||
|
||||
/* bit 0x80 comes from a write latch */
|
||||
if (!m68705write) res |= 0x02;
|
||||
if (!state->m68705write)
|
||||
res |= 0x02;
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
CUSTOM_INPUT( arkanoid_input_mux )
|
||||
{
|
||||
arkanoid_state *state = (arkanoid_state *)field->port->machine->driver_data;
|
||||
const char *tag1 = (const char *)param;
|
||||
const char *tag2 = tag1 + strlen(tag1) + 1;
|
||||
return input_port_read(field->port->machine, (arkanoid_paddle_select == 0) ? tag1 : tag2);
|
||||
return input_port_read(field->port->machine, (state->paddle_select == 0) ? tag1 : tag2);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -190,20 +182,19 @@ TO DO (2006.09.12) :
|
||||
*/
|
||||
|
||||
|
||||
#define LOG_F000_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_f000_r - cmd = %02x - val = %02x\n",cpu_get_pc(space->cpu),arkanoid_bootleg_cmd,arkanoid_bootleg_val);
|
||||
#define LOG_F002_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_f002_r - cmd = %02x - val = %02x\n",cpu_get_pc(space->cpu),arkanoid_bootleg_cmd,arkanoid_bootleg_val);
|
||||
#define LOG_D018_W if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_d018_w - data = %02x - cmd = %02x\n",cpu_get_pc(space->cpu),data,arkanoid_bootleg_cmd);
|
||||
#define LOG_D008_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_d008_r - val = %02x\n",cpu_get_pc(space->cpu),arkanoid_bootleg_d008_val);
|
||||
#define LOG_F000_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_f000_r - cmd = %02x - val = %02x\n", cpu_get_pc(space->cpu), state->bootleg_cmd, arkanoid_bootleg_val);
|
||||
#define LOG_F002_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_f002_r - cmd = %02x - val = %02x\n", cpu_get_pc(space->cpu), state->bootleg_cmd, arkanoid_bootleg_val);
|
||||
#define LOG_D018_W if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_d018_w - data = %02x - cmd = %02x\n", cpu_get_pc(space->cpu), data, state->bootleg_cmd);
|
||||
#define LOG_D008_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_d008_r - val = %02x\n", cpu_get_pc(space->cpu), arkanoid_bootleg_d008_val);
|
||||
|
||||
|
||||
static UINT8 arkanoid_bootleg_cmd;
|
||||
|
||||
/* Kludge for some bootlegs that read this address */
|
||||
READ8_HANDLER( arkanoid_bootleg_f000_r )
|
||||
{
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
UINT8 arkanoid_bootleg_val = 0x00;
|
||||
|
||||
switch (arkanoid_bootleg_id)
|
||||
switch (state->bootleg_id)
|
||||
{
|
||||
case ARKANGC: /* There are no reads from 0xf000 in these bootlegs */
|
||||
case ARKBLOCK:
|
||||
@ -211,7 +202,7 @@ READ8_HANDLER( arkanoid_bootleg_f000_r )
|
||||
case ARKBLOC2:
|
||||
case ARKGCBL:
|
||||
case PADDLE2:
|
||||
switch (arkanoid_bootleg_cmd)
|
||||
switch (state->bootleg_cmd)
|
||||
{
|
||||
default:
|
||||
break;
|
||||
@ -219,7 +210,7 @@ READ8_HANDLER( arkanoid_bootleg_f000_r )
|
||||
LOG_F000_R
|
||||
break;
|
||||
case BLOCK2:
|
||||
switch (arkanoid_bootleg_cmd)
|
||||
switch (state->bootleg_cmd)
|
||||
{
|
||||
case 0x05: /* Check 1 */
|
||||
arkanoid_bootleg_val = 0x05;
|
||||
@ -233,7 +224,7 @@ READ8_HANDLER( arkanoid_bootleg_f000_r )
|
||||
LOG_F000_R
|
||||
break;
|
||||
default:
|
||||
logerror("%04x: arkanoid_bootleg_f000_r - cmd = %02x - unknown bootleg !\n",cpu_get_pc(space->cpu),arkanoid_bootleg_cmd);
|
||||
logerror("%04x: arkanoid_bootleg_f000_r - cmd = %02x - unknown bootleg !\n", cpu_get_pc(space->cpu), state->bootleg_cmd);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -243,13 +234,14 @@ READ8_HANDLER( arkanoid_bootleg_f000_r )
|
||||
/* Kludge for some bootlegs that read this address */
|
||||
READ8_HANDLER( arkanoid_bootleg_f002_r )
|
||||
{
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
UINT8 arkanoid_bootleg_val = 0x00;
|
||||
|
||||
switch (arkanoid_bootleg_id)
|
||||
switch (state->bootleg_id)
|
||||
{
|
||||
case ARKANGC:
|
||||
case ARKBLOCK:
|
||||
switch (arkanoid_bootleg_cmd)
|
||||
switch (state->bootleg_cmd)
|
||||
{
|
||||
default:
|
||||
break;
|
||||
@ -258,7 +250,7 @@ READ8_HANDLER( arkanoid_bootleg_f002_r )
|
||||
break;
|
||||
case ARKANGC2: /* There are no reads from 0xf002 in these bootlegs */
|
||||
case BLOCK2:
|
||||
switch (arkanoid_bootleg_cmd)
|
||||
switch (state->bootleg_cmd)
|
||||
{
|
||||
default:
|
||||
break;
|
||||
@ -266,7 +258,7 @@ READ8_HANDLER( arkanoid_bootleg_f002_r )
|
||||
LOG_F002_R
|
||||
break;
|
||||
case ARKBLOC2:
|
||||
switch (arkanoid_bootleg_cmd)
|
||||
switch (state->bootleg_cmd)
|
||||
{
|
||||
default:
|
||||
break;
|
||||
@ -274,7 +266,7 @@ READ8_HANDLER( arkanoid_bootleg_f002_r )
|
||||
LOG_F002_R
|
||||
break;
|
||||
case ARKGCBL:
|
||||
switch (arkanoid_bootleg_cmd)
|
||||
switch (state->bootleg_cmd)
|
||||
{
|
||||
case 0x8a: /* Current level (fixed routine) */
|
||||
arkanoid_bootleg_val = 0xa5;
|
||||
@ -288,7 +280,7 @@ READ8_HANDLER( arkanoid_bootleg_f002_r )
|
||||
LOG_F002_R
|
||||
break;
|
||||
case PADDLE2:
|
||||
switch (arkanoid_bootleg_cmd)
|
||||
switch (state->bootleg_cmd)
|
||||
{
|
||||
case 0x24: /* Avoid bad jump to 0x0066 */
|
||||
arkanoid_bootleg_val = 0x9b;
|
||||
@ -320,7 +312,7 @@ READ8_HANDLER( arkanoid_bootleg_f002_r )
|
||||
LOG_F002_R
|
||||
break;
|
||||
default:
|
||||
logerror("%04x: arkanoid_bootleg_f002_r - cmd = %02x - unknown bootleg !\n",cpu_get_pc(space->cpu),arkanoid_bootleg_cmd);
|
||||
logerror("%04x: arkanoid_bootleg_f002_r - cmd = %02x - unknown bootleg !\n", cpu_get_pc(space->cpu), state->bootleg_cmd);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -330,9 +322,10 @@ READ8_HANDLER( arkanoid_bootleg_f002_r )
|
||||
/* Kludge for some bootlegs that write this address */
|
||||
WRITE8_HANDLER( arkanoid_bootleg_d018_w )
|
||||
{
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
state->bootleg_cmd = 0x00;
|
||||
|
||||
switch (arkanoid_bootleg_id)
|
||||
switch (state->bootleg_id)
|
||||
{
|
||||
case ARKANGC:
|
||||
case ARKBLOCK:
|
||||
@ -340,30 +333,30 @@ WRITE8_HANDLER( arkanoid_bootleg_d018_w )
|
||||
{
|
||||
case 0x36: /* unneeded value : no call 0x2050, unused A and overwritten HL (0x0313 -> 0x0340) */
|
||||
if (cpu_get_pc(space->cpu) == 0x7c47)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x38: /* unneeded value : no call 0x2050, unused A and fixed HL (0x7bd5) */
|
||||
if (cpu_get_pc(space->cpu) == 0x7b87)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x8a: /* unneeded value : no call 0x2050, unused A and overwritten HL (0x7b77 -> 0x7c1c) */
|
||||
if (cpu_get_pc(space->cpu) == 0x9661)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xe3: /* unneeded value : call 0x2050 but fixed A (0x00) and fixed HL (0xed83) */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e3)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xf7: /* unneeded value : 3 * 'NOP' at 0x034f + 2 * 'NOP' at 0x35b */
|
||||
if (cpu_get_pc(space->cpu) == 0x0349)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xff: /* unneeded value : no call 0x2050, unused A and overwritten HL (0x7c4f -> 0x7d31) */
|
||||
if (cpu_get_pc(space->cpu) == 0x9670)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
default:
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
}
|
||||
LOG_D018_W
|
||||
@ -373,40 +366,40 @@ WRITE8_HANDLER( arkanoid_bootleg_d018_w )
|
||||
{
|
||||
case 0x36: /* unneeded value : call 0x2050 but fixed A (0x2d) */
|
||||
if (cpu_get_pc(space->cpu) == 0x7c4c)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x38: /* unneeded value : call 0x2050 but fixed A (0xf3) */
|
||||
if (cpu_get_pc(space->cpu) == 0x7b87)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x88: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e3)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
if (cpu_get_pc(space->cpu) == 0x7c47)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x89: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e5)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x8a: /* unneeded value : call 0x2050 but fixed A (0xa5) */
|
||||
if (cpu_get_pc(space->cpu) == 0x9661)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xc0: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e7)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xe3: /* unneeded value : call 0x2050 but fixed A (0x61) */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e9)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xff: /* unneeded value : call 0x2050 but fixed A (0xe2) */
|
||||
if (cpu_get_pc(space->cpu) == 0x9670)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
default:
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
}
|
||||
LOG_D018_W
|
||||
@ -416,14 +409,14 @@ WRITE8_HANDLER( arkanoid_bootleg_d018_w )
|
||||
{
|
||||
case 0x05: /* Check 1 */
|
||||
if (cpu_get_pc(space->cpu) == 0x0363)
|
||||
arkanoid_bootleg_cmd = 0x05;
|
||||
state->bootleg_cmd = 0x05;
|
||||
break;
|
||||
case 0x0a: /* Check 2 */
|
||||
if (cpu_get_pc(space->cpu) == 0x0372)
|
||||
arkanoid_bootleg_cmd = 0x0a;
|
||||
state->bootleg_cmd = 0x0a;
|
||||
break;
|
||||
default:
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
}
|
||||
LOG_D018_W
|
||||
@ -433,44 +426,44 @@ WRITE8_HANDLER( arkanoid_bootleg_d018_w )
|
||||
{
|
||||
case 0x36: /* unneeded value : call 0x2050 but fixed A (0x2d) */
|
||||
if (cpu_get_pc(space->cpu) == 0x7c4c)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x38: /* unneeded value : call 0x2050 but fixed A (0xf3) */
|
||||
if (cpu_get_pc(space->cpu) == 0x7b87)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x88: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e3)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
if (cpu_get_pc(space->cpu) == 0x7c47)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x89: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e5)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x8a: /* unneeded value : call 0x2050 but unused HL and fixed DE (0x7c1c) */
|
||||
if (cpu_get_pc(space->cpu) == 0x9661)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xc0: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e7)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xe3: /* unneeded value : call 0x2050 but fixed A (0x61) */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e9)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xf7: /* unneeded value : call 0x2050 but never called (check code at 0x0340) */
|
||||
if (cpu_get_pc(space->cpu) == 0x0349)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xff: /* unneeded value : no call 0x2050, unused A and fixed HL (0x7d31) */
|
||||
if (cpu_get_pc(space->cpu) == 0x9670)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
default:
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
}
|
||||
LOG_D018_W
|
||||
@ -480,43 +473,43 @@ WRITE8_HANDLER( arkanoid_bootleg_d018_w )
|
||||
{
|
||||
case 0x36: /* unneeded value : call 0x2050 but fixed A (0x2d) */
|
||||
if (cpu_get_pc(space->cpu) == 0x7c4c)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x38: /* unneeded value : call 0x2050 but fixed A (0xf3) */
|
||||
if (cpu_get_pc(space->cpu) == 0x7b87)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x88: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e3)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
if (cpu_get_pc(space->cpu) == 0x7c47)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
case 0x89: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e5)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x8a: /* call 0x2050 with A read from 0xf002 and wrong HL */
|
||||
if (cpu_get_pc(space->cpu) == 0x9661)
|
||||
arkanoid_bootleg_cmd = data;
|
||||
state->bootleg_cmd = data;
|
||||
break;
|
||||
case 0xc0: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e7)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xe3: /* unneeded value : call 0x2050 but fixed A (0x61) */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e9)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xf7: /* unneeded value : 3 * 'NOP' at 0x034f + 'JR NZ,$035D' at 0x35b */
|
||||
if (cpu_get_pc(space->cpu) == 0x0349)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xff: /* call 0x2050 with A read from 0xf002 and wrong HL */
|
||||
if (cpu_get_pc(space->cpu) == 0x9670)
|
||||
arkanoid_bootleg_cmd = data;
|
||||
state->bootleg_cmd = data;
|
||||
break;
|
||||
default:
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
}
|
||||
LOG_D018_W
|
||||
@ -526,58 +519,58 @@ WRITE8_HANDLER( arkanoid_bootleg_d018_w )
|
||||
{
|
||||
case 0x24: /* A read from 0xf002 (expected to be 0x9b) */
|
||||
if (cpu_get_pc(space->cpu) == 0xbd7a)
|
||||
arkanoid_bootleg_cmd = data;
|
||||
state->bootleg_cmd = data;
|
||||
break;
|
||||
case 0x36: /* call 0x2050 with A read from 0xf002 and wrong HL */
|
||||
if (cpu_get_pc(space->cpu) == 0x7c4c)
|
||||
arkanoid_bootleg_cmd = data;
|
||||
state->bootleg_cmd = data;
|
||||
break;
|
||||
case 0x38: /* call 0x2050 with A read from 0xf002 and wrong HL */
|
||||
if (cpu_get_pc(space->cpu) == 0x7b87)
|
||||
arkanoid_bootleg_cmd = data;
|
||||
state->bootleg_cmd = data;
|
||||
break;
|
||||
case 0x88: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e3)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
if (cpu_get_pc(space->cpu) == 0x7c47)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
case 0x89: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e5)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0x8a: /* call 0x2050 with A read from 0xf002 and wrong HL */
|
||||
if (cpu_get_pc(space->cpu) == 0x9661)
|
||||
arkanoid_bootleg_cmd = data;
|
||||
state->bootleg_cmd = data;
|
||||
break;
|
||||
case 0xc0: /* unneeded value : no read back */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e7)
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
case 0xc3: /* A read from 0xf002 (expected to be 0x1d) */
|
||||
if (cpu_get_pc(space->cpu) == 0xbd8a)
|
||||
arkanoid_bootleg_cmd = data;
|
||||
state->bootleg_cmd = data;
|
||||
break;
|
||||
case 0xe3: /* call 0x2050 with A read from 0xf002 and wrong HL */
|
||||
if (cpu_get_pc(space->cpu) == 0x67e9)
|
||||
arkanoid_bootleg_cmd = data;
|
||||
state->bootleg_cmd = data;
|
||||
break;
|
||||
case 0xf7: /* call 0x2050 with A read from 0xf002 and wrong HL */
|
||||
if (cpu_get_pc(space->cpu) == 0x0349)
|
||||
arkanoid_bootleg_cmd = data;
|
||||
state->bootleg_cmd = data;
|
||||
break;
|
||||
case 0xff: /* call 0x2050 with A read from 0xf002 and wrong HL */
|
||||
if (cpu_get_pc(space->cpu) == 0x9670)
|
||||
arkanoid_bootleg_cmd = data;
|
||||
state->bootleg_cmd = data;
|
||||
break;
|
||||
default:
|
||||
arkanoid_bootleg_cmd = 0x00;
|
||||
state->bootleg_cmd = 0x00;
|
||||
break;
|
||||
}
|
||||
LOG_D018_W
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("%04x: arkanoid_bootleg_d018_w - data = %02x - unknown bootleg !\n",cpu_get_pc(space->cpu),data);
|
||||
logerror("%04x: arkanoid_bootleg_d018_w - data = %02x - unknown bootleg !\n", cpu_get_pc(space->cpu), data);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -585,13 +578,15 @@ WRITE8_HANDLER( arkanoid_bootleg_d018_w )
|
||||
#ifdef UNUSED_CODE
|
||||
READ8_HANDLER( block2_bootleg_f000_r )
|
||||
{
|
||||
return arkanoid_bootleg_cmd;
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
return state->bootleg_cmd;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Kludge for some bootlegs that read this address */
|
||||
READ8_HANDLER( arkanoid_bootleg_d008_r )
|
||||
{
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
UINT8 arkanoid_bootleg_d008_bit[8];
|
||||
UINT8 arkanoid_bootleg_d008_val;
|
||||
UINT8 arkanoid_paddle_value = input_port_read(space->machine, "MUX");
|
||||
@ -599,7 +594,7 @@ READ8_HANDLER( arkanoid_bootleg_d008_r )
|
||||
|
||||
arkanoid_bootleg_d008_bit[4] = arkanoid_bootleg_d008_bit[6] = arkanoid_bootleg_d008_bit[7] = 0; /* untested bits */
|
||||
|
||||
switch (arkanoid_bootleg_id)
|
||||
switch (state->bootleg_id)
|
||||
{
|
||||
case ARKANGC:
|
||||
case ARKBLOCK:
|
||||
@ -649,10 +644,10 @@ READ8_HANDLER( arkanoid_bootleg_d008_r )
|
||||
}
|
||||
|
||||
arkanoid_bootleg_d008_val = 0;
|
||||
for (b=0; b<8; b++)
|
||||
for (b = 0; b < 8; b++)
|
||||
arkanoid_bootleg_d008_val |= (arkanoid_bootleg_d008_bit[b] << b);
|
||||
|
||||
LOG_D008_R
|
||||
|
||||
return arkanoid_bootleg_d008_val;
|
||||
}
|
||||
|
||||
|
@ -9,35 +9,34 @@
|
||||
#include "driver.h"
|
||||
#include "includes/arkanoid.h"
|
||||
|
||||
static UINT8 gfxbank, palettebank;
|
||||
|
||||
static tilemap *bg_tilemap;
|
||||
|
||||
WRITE8_HANDLER( arkanoid_videoram_w )
|
||||
{
|
||||
videoram[offset] = data;
|
||||
tilemap_mark_tile_dirty(bg_tilemap, offset / 2);
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
state->videoram[offset] = data;
|
||||
tilemap_mark_tile_dirty(state->bg_tilemap, offset / 2);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( arkanoid_d008_w )
|
||||
{
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
int bank;
|
||||
|
||||
/* bits 0 and 1 flip X and Y, I don't know which is which */
|
||||
if (flip_screen_x_get(space->machine) != (data & 0x01))
|
||||
{
|
||||
flip_screen_x_set(space->machine, data & 0x01);
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
if (flip_screen_y_get(space->machine) != (data & 0x02))
|
||||
{
|
||||
flip_screen_y_set(space->machine, data & 0x02);
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
/* bit 2 selects the input paddle */
|
||||
arkanoid_paddle_select = data & 0x04;
|
||||
state->paddle_select = data & 0x04;
|
||||
|
||||
/* bit 3 is coin lockout (but not the service coin) */
|
||||
coin_lockout_w(0, !(data & 0x08));
|
||||
@ -49,18 +48,18 @@ WRITE8_HANDLER( arkanoid_d008_w )
|
||||
/* so I don't know which is which. */
|
||||
bank = (data & 0x20) >> 5;
|
||||
|
||||
if (gfxbank != bank)
|
||||
if (state->gfxbank != bank)
|
||||
{
|
||||
gfxbank = bank;
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
state->gfxbank = bank;
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
bank = (data & 0x40) >> 6;
|
||||
|
||||
if (palettebank != bank)
|
||||
if (state->palettebank != bank)
|
||||
{
|
||||
palettebank = bank;
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
state->palettebank = bank;
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
/* BM: bit 7 is suspected to be MCU reset, the evidence for this is that
|
||||
@ -76,23 +75,24 @@ WRITE8_HANDLER( arkanoid_d008_w )
|
||||
/* different hook-up, everything except for bits 0-1 and 7 aren't tested afaik. */
|
||||
WRITE8_HANDLER( tetrsark_d008_w )
|
||||
{
|
||||
arkanoid_state *state = (arkanoid_state *)space->machine->driver_data;
|
||||
int bank;
|
||||
|
||||
/* bits 0 and 1 flip X and Y, I don't know which is which */
|
||||
if (flip_screen_x_get(space->machine) != (data & 0x01))
|
||||
{
|
||||
flip_screen_x_set(space->machine, data & 0x01);
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
if (flip_screen_y_get(space->machine) != (data & 0x02))
|
||||
{
|
||||
flip_screen_y_set(space->machine, data & 0x02);
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
/* bit 2 selects the input paddle? */
|
||||
arkanoid_paddle_select = data & 0x04;
|
||||
state->paddle_select = data & 0x04;
|
||||
|
||||
/* bit 3-4 is unknown? */
|
||||
|
||||
@ -100,18 +100,18 @@ WRITE8_HANDLER( tetrsark_d008_w )
|
||||
/* so I don't know which is which.? */
|
||||
bank = (data & 0x20) >> 5;
|
||||
|
||||
if (gfxbank != bank)
|
||||
if (state->gfxbank != bank)
|
||||
{
|
||||
gfxbank = bank;
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
state->gfxbank = bank;
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
bank = (data & 0x40) >> 6;
|
||||
|
||||
if (palettebank != bank)
|
||||
if (state->palettebank != bank)
|
||||
{
|
||||
palettebank = bank;
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
state->palettebank = bank;
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
/* bit 7 is coin lockout (but not the service coin) */
|
||||
@ -122,45 +122,47 @@ WRITE8_HANDLER( tetrsark_d008_w )
|
||||
|
||||
static TILE_GET_INFO( get_bg_tile_info )
|
||||
{
|
||||
arkanoid_state *state = (arkanoid_state *)machine->driver_data;
|
||||
int offs = tile_index * 2;
|
||||
int code = videoram[offs + 1] + ((videoram[offs] & 0x07) << 8) + 2048 * gfxbank;
|
||||
int color = ((videoram[offs] & 0xf8) >> 3) + 32 * palettebank;
|
||||
int code = state->videoram[offs + 1] + ((state->videoram[offs] & 0x07) << 8) + 2048 * state->gfxbank;
|
||||
int color = ((state->videoram[offs] & 0xf8) >> 3) + 32 * state->palettebank;
|
||||
|
||||
SET_TILE_INFO(0, code, color, 0);
|
||||
}
|
||||
|
||||
VIDEO_START( arkanoid )
|
||||
{
|
||||
bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows,
|
||||
8, 8, 32, 32);
|
||||
arkanoid_state *state = (arkanoid_state *)machine->driver_data;
|
||||
|
||||
state_save_register_global(machine, gfxbank);
|
||||
state_save_register_global(machine, palettebank);
|
||||
state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
|
||||
}
|
||||
|
||||
static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
|
||||
static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
|
||||
{
|
||||
arkanoid_state *state = (arkanoid_state *)machine->driver_data;
|
||||
int offs;
|
||||
|
||||
for (offs = 0;offs < spriteram_size;offs += 4)
|
||||
for (offs = 0; offs < spriteram_size; offs += 4)
|
||||
{
|
||||
int sx,sy,code;
|
||||
int sx, sy, code;
|
||||
|
||||
sx = spriteram[offs];
|
||||
sy = 248 - spriteram[offs + 1];
|
||||
if (flip_screen_x_get(machine)) sx = 248 - sx;
|
||||
if (flip_screen_y_get(machine)) sy = 248 - sy;
|
||||
sx = state->spriteram[offs];
|
||||
sy = 248 - state->spriteram[offs + 1];
|
||||
if (flip_screen_x_get(machine))
|
||||
sx = 248 - sx;
|
||||
if (flip_screen_y_get(machine))
|
||||
sy = 248 - sy;
|
||||
|
||||
code = spriteram[offs + 3] + ((spriteram[offs + 2] & 0x03) << 8) + 1024 * gfxbank;
|
||||
code = state->spriteram[offs + 3] + ((state->spriteram[offs + 2] & 0x03) << 8) + 1024 * state->gfxbank;
|
||||
|
||||
drawgfx_transpen(bitmap,cliprect,machine->gfx[0],
|
||||
2 * code,
|
||||
((spriteram[offs + 2] & 0xf8) >> 3) + 32 * palettebank,
|
||||
((state->spriteram[offs + 2] & 0xf8) >> 3) + 32 * state->palettebank,
|
||||
flip_screen_x_get(machine),flip_screen_y_get(machine),
|
||||
sx,sy + (flip_screen_y_get(machine) ? 8 : -8),0);
|
||||
drawgfx_transpen(bitmap,cliprect,machine->gfx[0],
|
||||
2 * code + 1,
|
||||
((spriteram[offs + 2] & 0xf8) >> 3) + 32 * palettebank,
|
||||
((state->spriteram[offs + 2] & 0xf8) >> 3) + 32 * state->palettebank,
|
||||
flip_screen_x_get(machine),flip_screen_y_get(machine),
|
||||
sx,sy,0);
|
||||
}
|
||||
@ -169,7 +171,9 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta
|
||||
|
||||
VIDEO_UPDATE( arkanoid )
|
||||
{
|
||||
tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
|
||||
arkanoid_state *state = (arkanoid_state *)screen->machine->driver_data;
|
||||
|
||||
tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
|
||||
draw_sprites(screen->machine, bitmap, cliprect);
|
||||
return 0;
|
||||
}
|
||||
|
@ -7,46 +7,44 @@
|
||||
***************************************************************************/
|
||||
|
||||
#include "driver.h"
|
||||
|
||||
static int charbank;
|
||||
static tilemap *bg_tilemap;
|
||||
#include "hexa.h"
|
||||
|
||||
WRITE8_HANDLER( hexa_videoram_w )
|
||||
{
|
||||
videoram[offset] = data;
|
||||
tilemap_mark_tile_dirty(bg_tilemap, offset / 2);
|
||||
hexa_state *state = (hexa_state *)space->machine->driver_data;
|
||||
|
||||
state->videoram[offset] = data;
|
||||
tilemap_mark_tile_dirty(state->bg_tilemap, offset / 2);
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( hexa_d008_w )
|
||||
{
|
||||
UINT8 *RAM = memory_region(space->machine, "maincpu");
|
||||
int bankaddress;
|
||||
hexa_state *state = (hexa_state *)space->machine->driver_data;
|
||||
|
||||
/* bit 0 = flipx (or y?) */
|
||||
if (flip_screen_x_get(space->machine) != (data & 0x01))
|
||||
{
|
||||
flip_screen_x_set(space->machine, data & 0x01);
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
/* bit 1 = flipy (or x?) */
|
||||
if (flip_screen_y_get(space->machine) != (data & 0x02))
|
||||
{
|
||||
flip_screen_y_set(space->machine, data & 0x02);
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
/* bit 2 - 3 unknown */
|
||||
|
||||
/* bit 4 could be the ROM bank selector for 8000-bfff (not sure) */
|
||||
bankaddress = 0x10000 + ((data & 0x10) >> 4) * 0x4000;
|
||||
memory_set_bankptr(space->machine, 1, &RAM[bankaddress]);
|
||||
memory_set_bank(space->machine, 1, ((data & 0x10) >> 4));
|
||||
|
||||
/* bit 5 = char bank */
|
||||
if (charbank != ((data & 0x20) >> 5))
|
||||
if (state->charbank != ((data & 0x20) >> 5))
|
||||
{
|
||||
charbank = (data & 0x20) >> 5;
|
||||
tilemap_mark_all_tiles_dirty(bg_tilemap);
|
||||
state->charbank = (data & 0x20) >> 5;
|
||||
tilemap_mark_all_tiles_dirty(state->bg_tilemap);
|
||||
}
|
||||
|
||||
/* bit 6 - 7 unknown */
|
||||
@ -54,22 +52,25 @@ WRITE8_HANDLER( hexa_d008_w )
|
||||
|
||||
static TILE_GET_INFO( get_bg_tile_info )
|
||||
{
|
||||
hexa_state *state = (hexa_state *)machine->driver_data;
|
||||
int offs = tile_index * 2;
|
||||
int tile = videoram[offs + 1] + ((videoram[offs] & 0x07) << 8) + (charbank << 11);
|
||||
int color = (videoram[offs] & 0xf8) >> 3;
|
||||
int tile = state->videoram[offs + 1] + ((state->videoram[offs] & 0x07) << 8) + (state->charbank << 11);
|
||||
int color = (state->videoram[offs] & 0xf8) >> 3;
|
||||
|
||||
SET_TILE_INFO(0, tile, color, 0);
|
||||
}
|
||||
|
||||
VIDEO_START( hexa )
|
||||
{
|
||||
bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows,
|
||||
8, 8, 32, 32);
|
||||
hexa_state *state = (hexa_state *)machine->driver_data;
|
||||
state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
|
||||
}
|
||||
|
||||
|
||||
VIDEO_UPDATE( hexa )
|
||||
{
|
||||
tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
|
||||
hexa_state *state = (hexa_state *)screen->machine->driver_data;
|
||||
|
||||
tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
|
||||
return 0;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user