From c794900f6f1a693ad32be7a3e940cebdd038a2b9 Mon Sep 17 00:00:00 2001 From: cam900 Date: Sun, 3 Feb 2019 18:22:21 +0900 Subject: [PATCH] c140.cpp : Remove unnecessary arguments in handlers namcona1.cpp : Remove unnecessary handler, Add note --- src/devices/sound/c140.cpp | 4 ++-- src/devices/sound/c140.h | 4 ++-- src/mame/drivers/namcona1.cpp | 24 +++--------------------- src/mame/includes/namcona1.h | 2 -- 4 files changed, 7 insertions(+), 27 deletions(-) diff --git a/src/devices/sound/c140.cpp b/src/devices/sound/c140.cpp index 0d72ac8be24..b5534959230 100644 --- a/src/devices/sound/c140.cpp +++ b/src/devices/sound/c140.cpp @@ -374,14 +374,14 @@ void c140_device::sound_stream_update(sound_stream &stream, stream_sample_t **in } -READ8_MEMBER( c140_device::c140_r ) +u8 c140_device::c140_r(offs_t offset) { offset&=0x1ff; return m_REG[offset]; } -WRITE8_MEMBER( c140_device::c140_w ) +void c140_device::c140_w(offs_t offset, u8 data) { m_stream->update(); diff --git a/src/devices/sound/c140.h b/src/devices/sound/c140.h index cdc84a38fd1..dba89c78089 100644 --- a/src/devices/sound/c140.h +++ b/src/devices/sound/c140.h @@ -32,8 +32,8 @@ public: // configuration void set_bank_type(C140_TYPE bank) { m_banking_type = bank; } - DECLARE_READ8_MEMBER( c140_r ); - DECLARE_WRITE8_MEMBER( c140_w ); + u8 c140_r(offs_t offset); + void c140_w(offs_t offset, u8 data); protected: // device-level overrides diff --git a/src/mame/drivers/namcona1.cpp b/src/mame/drivers/namcona1.cpp index 676acf39850..32086e989ee 100644 --- a/src/mame/drivers/namcona1.cpp +++ b/src/mame/drivers/namcona1.cpp @@ -622,30 +622,12 @@ WRITE16_MEMBER(namcona1_state::na1mcu_shared_w) COMBINE_DATA(&m_workram[offset]); } -READ16_MEMBER(namcona1_state::snd_r) -{ - /* can't use DEVREADWRITE8 for this because it is opposite endianness to the CPU for some reason */ - return m_c140->c140_r(space,offset*2+1) | m_c140->c140_r(space,offset*2)<<8; -} - -WRITE16_MEMBER(namcona1_state::snd_w) -{ - /* can't use DEVREADWRITE8 for this because it is opposite endianness to the CPU for some reason */ - if (ACCESSING_BITS_0_7) - { - m_c140->c140_w(space,(offset*2)+1, data); - } - - if (ACCESSING_BITS_8_15) - { - m_c140->c140_w(space,(offset*2), data>>8); - } -} - void namcona1_state::namcona1_mcu_map(address_map &map) { map(0x000800, 0x000fff).rw(FUNC(namcona1_state::mcu_mailbox_r), FUNC(namcona1_state::mcu_mailbox_w_mcu)); // "Mailslot" communications ports - map(0x001000, 0x001fff).rw(FUNC(namcona1_state::snd_r), FUNC(namcona1_state::snd_w)); // C140-alike sound chip + map(0x001000, 0x001fff).lrw8("c219_rw", + [this](offs_t offset) { return m_c140->c140_r(offset ^ 1)/* need ^ 1 because endian issue */; }, + [this](offs_t offset, u8 data) { m_c140->c140_w(offset ^ 1, data); }); // C140-alike sound chip map(0x002000, 0x002fff).rw(FUNC(namcona1_state::na1mcu_shared_r), FUNC(namcona1_state::na1mcu_shared_w)); // mirror of first page of shared work RAM map(0x003000, 0x00afff).ram(); // there is a 32k RAM chip according to CGFM map(0x200000, 0x27ffff).rw(FUNC(namcona1_state::na1mcu_shared_r), FUNC(namcona1_state::na1mcu_shared_w)); // shared work RAM diff --git a/src/mame/includes/namcona1.h b/src/mame/includes/namcona1.h index 264c91c1fde..9f514d31ac2 100644 --- a/src/mame/includes/namcona1.h +++ b/src/mame/includes/namcona1.h @@ -83,8 +83,6 @@ protected: DECLARE_WRITE16_MEMBER(paletteram_w); DECLARE_READ16_MEMBER(gfxram_r); DECLARE_WRITE16_MEMBER(gfxram_w); - DECLARE_READ16_MEMBER(snd_r); - DECLARE_WRITE16_MEMBER(snd_w); virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);