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(MESS) Instructor 50 : Fixed various regressions (nw)
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@ -2,18 +2,10 @@
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Signetics Intructor 50
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Signetics Intructor 50
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08/04/2010 Skeleton driver.
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2010-04-08 Skeleton driver.
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20/05/2012 Connected digits, system boots. [Robbbert]
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2012-05-20 Connected digits, system boots. [Robbbert]
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20/05/2012 Connected keyboard, system mostly usable. [Robbbert]
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2012-05-20 Connected keyboard, system mostly usable. [Robbbert]
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2013-10-15 Fixed various regressions. [Robbbert]
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The eprom and 128 bytes of ram are in a 2656 chip. There is no
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useful info on this device on the net. It does appear though,
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that it divides the 3.58MHz crystal by 4 for the CPU.
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The system also has 512 bytes of ram in an ordinary ram chip.
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There are no known schematics for this computer. There is a block
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diagram which imparts little.
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From looking at a blurry picture of it, this is what I can determine:
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From looking at a blurry picture of it, this is what I can determine:
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- Left side: 8 toggle switches, with a round red led above each one.
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- Left side: 8 toggle switches, with a round red led above each one.
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@ -39,11 +31,11 @@
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completion of a successful load, HELLO will be displayed.
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completion of a successful load, HELLO will be displayed.
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ToDO:
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ToDO:
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- Keys are mostly correct. It seems the SENS, INT, MON, RST keys are
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- Keys are mostly correct. The SENS, INT, MON, RST keys are
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not in the matrix, but are connected to hardware directly. This needs
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not in the matrix, but are connected to hardware directly. This needs
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to be emulated. (SENS key done)
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to be emulated. (SENS key done)
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- Connect 10 toggle switches and 10 round red leds.
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- Connect 10 toggle switches and 10 round red leds.
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- Hook up the Interrupt Block unit (no info available).
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- Hook up the Interrupt Block unit.
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****************************************************************************/
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****************************************************************************/
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@ -58,11 +50,10 @@ class instruct_state : public driver_device
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{
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{
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public:
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public:
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instruct_state(const machine_config &mconfig, device_type type, const char *tag)
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instruct_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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: driver_device(mconfig, type, tag)
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m_maincpu(*this, "maincpu"),
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, m_maincpu(*this, "maincpu")
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m_p_loram(*this, "loram"),
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, m_p_ram(*this, "mainram")
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m_p_hiram(*this, "hiram"),
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, m_cass(*this, "cassette")
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m_cass(*this, "cassette")
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{ }
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{ }
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DECLARE_READ8_MEMBER(portfc_r);
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DECLARE_READ8_MEMBER(portfc_r);
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@ -74,12 +65,12 @@ public:
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DECLARE_WRITE8_MEMBER(portfa_w);
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DECLARE_WRITE8_MEMBER(portfa_w);
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DECLARE_QUICKLOAD_LOAD_MEMBER( instruct );
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DECLARE_QUICKLOAD_LOAD_MEMBER( instruct );
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INTERRUPT_GEN_MEMBER(t2l_int);
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INTERRUPT_GEN_MEMBER(t2l_int);
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private:
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virtual void machine_reset();
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virtual void machine_reset();
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UINT8 m_digit;
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UINT8 m_digit;
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bool m_valid_digit;
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bool m_valid_digit;
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_maincpu;
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required_shared_ptr<UINT8> m_p_loram;
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required_shared_ptr<UINT8> m_p_ram;
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required_shared_ptr<UINT8> m_p_hiram;
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required_device<cassette_image_device> m_cass;
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required_device<cassette_image_device> m_cass;
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};
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};
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@ -150,10 +141,8 @@ INTERRUPT_GEN_MEMBER( instruct_state::t2l_int )
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static ADDRESS_MAP_START( instruct_mem, AS_PROGRAM, 8, instruct_state )
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static ADDRESS_MAP_START( instruct_mem, AS_PROGRAM, 8, instruct_state )
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0x01ff) AM_RAM AM_SHARE("loram") // 512 bytes onboard ram
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AM_RANGE(0x0000, 0x17ff) AM_RAM AM_SHARE("mainram")
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AM_RANGE(0x0200, 0x177f) AM_RAM // expansion ram needed by quickloads
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AM_RANGE(0x1800, 0x1fff) AM_ROM AM_REGION("roms",0)
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AM_RANGE(0x1780, 0x17ff) AM_RAM // 128 bytes in s2656 chip
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AM_RANGE(0x1800, 0x1fff) AM_RAM AM_SHARE("hiram")
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( instruct_io, AS_IO, 8, instruct_state )
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static ADDRESS_MAP_START( instruct_io, AS_IO, 8, instruct_state )
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@ -221,22 +210,14 @@ INPUT_PORTS_END
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void instruct_state::machine_reset()
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void instruct_state::machine_reset()
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{
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{
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UINT8* rom = memregion("user1")->base();
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m_maincpu->set_state_int(S2650_PC, 0x1800);
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memcpy(m_p_loram, rom, 0x200);
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memcpy(m_p_hiram, rom, 0x800);
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m_maincpu->reset();
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}
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}
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QUICKLOAD_LOAD_MEMBER( instruct_state, instruct )
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QUICKLOAD_LOAD_MEMBER( instruct_state, instruct )
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{
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{
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address_space &space = m_maincpu->space(AS_PROGRAM);
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UINT16 i, exec_addr, quick_length, quick_addr = 0x100, read_;
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int i;
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int quick_addr = 0x100;
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int exec_addr;
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int quick_length;
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UINT8 *quick_data;
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int read_;
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int result = IMAGE_INIT_FAIL;
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int result = IMAGE_INIT_FAIL;
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UINT8 *quick_data;
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quick_length = image.length();
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quick_length = image.length();
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if (quick_length < 0x0104)
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if (quick_length < 0x0104)
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@ -282,13 +263,13 @@ QUICKLOAD_LOAD_MEMBER( instruct_state, instruct )
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else
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else
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{
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{
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for (i = quick_addr; i < read_; i++)
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for (i = quick_addr; i < read_; i++)
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space.write_byte(i, quick_data[i]);
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m_p_ram[i] = quick_data[i];
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/* display a message about the loaded quickload */
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/* display a message about the loaded quickload */
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image.message(" Quickload: size=%04X : exec=%04X",quick_length,exec_addr);
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image.message(" Quickload: size=%04X : exec=%04X",quick_length,exec_addr);
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// Start the quickload
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// Start the quickload
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m_maincpu->set_pc(exec_addr);
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m_maincpu->set_state_int(S2650_PC, exec_addr);
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result = IMAGE_INIT_PASS;
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result = IMAGE_INIT_PASS;
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}
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}
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@ -323,7 +304,7 @@ MACHINE_CONFIG_END
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/* ROM definition */
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/* ROM definition */
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ROM_START( instruct )
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ROM_START( instruct )
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ROM_REGION( 0x0800, "user1", ROMREGION_ERASEFF )
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ROM_REGION( 0x0800, "roms", 0 )
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ROM_LOAD( "instruct.rom", 0x0000, 0x0800, CRC(131715a6) SHA1(4930b87d09046113ab172ba3fb31f5e455068ec7) )
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ROM_LOAD( "instruct.rom", 0x0000, 0x0800, CRC(131715a6) SHA1(4930b87d09046113ab172ba3fb31f5e455068ec7) )
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ROM_END
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ROM_END
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