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https://github.com/holub/mame
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Modernized tms1xxx cpu cores. (nw)
This commit is contained in:
Wilbert Pol
parent
6e5ee7b19e
commit
ddacededb5
File diff suppressed because it is too large
Load Diff
@ -9,28 +9,203 @@ enum {
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};
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struct tms0980_config {
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/* O-output PLA configuration 5bit -> 8/11bit translation */
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UINT16 o_pla[0x20];
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devcb_read8 read_k;
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devcb_write16 write_o; /* tms1270 has 10 O-outputs */
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devcb_write16 write_r;
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#define MCFG_TMS1XXX_OUTPUT_PLA(_pla) \
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tms1xxx_cpu_device::set_output_pla(*device, _pla);
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#define MCFG_TMS1XXX_READ_K(_devcb) \
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tms1xxx_cpu_device::set_read_k(*device, DEVCB2_##_devcb);
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#define MCFG_TMS1XXX_WRITE_O(_devcb) \
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tms1xxx_cpu_device::set_write_o(*device, DEVCB2_##_devcb);
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#define MCFG_TMS1XXX_WRITE_R(_devcb) \
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tms1xxx_cpu_device::set_write_r(*device, DEVCB2_##_devcb);
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class tms1xxx_cpu_device : public cpu_device
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{
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public:
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// construction/destruction
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tms1xxx_cpu_device( const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock
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, const UINT32* decode_table, UINT16 o_mask, UINT16 r_mask, UINT8 pc_size, UINT8 byte_size, UINT8 x_bits
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, int program_addrbus_width, address_map_constructor program, int data_addrbus_width, address_map_constructor data)
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: cpu_device( mconfig, type, name, tag, owner, clock )
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, m_program_config("program", ENDIANNESS_BIG, byte_size > 8 ? 16 : 8, program_addrbus_width, 0, program )
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, m_data_config("data", ENDIANNESS_BIG, 8, data_addrbus_width, 0, data )
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, m_o_mask( o_mask )
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, m_r_mask( r_mask )
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, m_pc_size( pc_size )
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, m_byte_size( byte_size )
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, m_x_bits( x_bits )
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, m_decode_table( decode_table )
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, c_output_pla( NULL )
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, m_read_k( *this )
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, m_write_o( *this )
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, m_write_r( *this )
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{ }
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// static configuration helpers
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template<class _Object> static devcb2_base &set_read_k(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_read_k.set_callback(object); }
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template<class _Object> static devcb2_base &set_write_o(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_write_o.set_callback(object); }
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template<class _Object> static devcb2_base &set_write_r(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_write_r.set_callback(object); }
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static void set_output_pla(device_t &device, const UINT16 *output_pla) { downcast<tms1xxx_cpu_device &>(device).c_output_pla = output_pla; }
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protected:
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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// device_execute_interface overrides
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virtual UINT32 execute_min_cycles() const { return 1; }
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virtual UINT32 execute_max_cycles() const { return 6; }
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virtual UINT32 execute_input_lines() const { return 1; }
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virtual void execute_run();
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_DATA ) ? &m_data_config : NULL ); }
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// device_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
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virtual UINT32 disasm_max_opcode_bytes() const { return 1; }
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void next_pc();
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void set_cki_bus();
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address_space_config m_program_config;
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address_space_config m_data_config;
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UINT8 m_prev_pc; /* previous program counter */
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UINT8 m_prev_pa; /* previous page address register */
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UINT8 m_pc; /* program counter is a 7 bit register on tms0980, 6 bit register on tms1000/1070/1200/1270/1100/1300 */
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UINT8 m_pa; /* page address register is a 4 bit register */
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UINT8 m_sr; /* subroutine return register is a 7 bit register */
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UINT8 m_pb; /* page buffer register is a 4 bit register */
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UINT8 m_a; /* Accumulator is a 4 bit register (?) */
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UINT8 m_x; /* X-register is a 2, 3, or 4 bit register */
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UINT8 m_y; /* Y-register is a 4 bit register */
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UINT8 m_dam; /* DAM register is a 4 bit register */
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UINT8 m_ca; /* Chapter address bit */
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UINT8 m_cb; /* Chapter buffer bit */
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UINT8 m_cs; /* Chapter subroutine bit */
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UINT16 m_r;
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UINT8 m_o;
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UINT8 m_cki_bus; /* CKI bus */
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UINT8 m_p; /* adder p-input */
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UINT8 m_n; /* adder n-input */
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UINT8 m_adder_result; /* adder result */
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UINT8 m_carry_in; /* carry in */
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UINT8 m_status;
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UINT8 m_status_latch;
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UINT8 m_special_status;
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UINT8 m_call_latch;
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UINT8 m_add_latch;
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UINT8 m_branch_latch;
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int m_subcycle;
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UINT8 m_ram_address;
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UINT16 m_ram_data;
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UINT16 m_rom_address;
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UINT16 m_opcode;
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UINT32 m_decode;
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int m_icount;
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UINT16 m_o_mask; /* mask to determine the number of O outputs */
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UINT16 m_r_mask; /* mask to determine the number of R outputs */
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UINT8 m_pc_size; /* how bits in the PC register */
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UINT8 m_byte_size; /* 8 or 9 bit bytes */
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UINT8 m_x_bits; /* determine the number of bits in the X register */
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const UINT32 *m_decode_table;
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address_space *m_program;
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address_space *m_data;
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const UINT16 *c_output_pla;
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devcb2_read8 m_read_k;
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devcb2_write16 m_write_o;
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devcb2_write16 m_write_r;
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};
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class tms0980_cpu_device : public tms1xxx_cpu_device
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{
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public:
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tms0980_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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protected:
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// device_state_interface overrides
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void state_string_export(const device_state_entry &entry, astring &string);
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// device_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
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virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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};
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class tms1000_cpu_device : public tms1xxx_cpu_device
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{
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public:
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tms1000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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tms1000_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 o_mask, UINT16 r_mask);
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protected:
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// device_state_interface overrides
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void state_string_export(const device_state_entry &entry, astring &string);
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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};
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class tms1070_cpu_device : public tms1000_cpu_device
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{
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public:
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tms1070_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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class tms1200_cpu_device : public tms1000_cpu_device
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{
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public:
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tms1200_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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class tms1270_cpu_device : public tms1000_cpu_device
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{
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public:
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tms1270_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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class tms1100_cpu_device : public tms1xxx_cpu_device
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{
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public:
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tms1100_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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tms1100_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 o_mask, UINT16 r_mask);
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protected:
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// device_state_interface overrides
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void state_string_export(const device_state_entry &entry, astring &string);
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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};
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class tms1300_cpu_device : public tms1100_cpu_device
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{
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public:
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tms1300_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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/* 9-bit family */
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DECLARE_LEGACY_CPU_DEVICE(TMS0980, tms0980);
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extern const device_type TMS0980;
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/* 8-bit family */
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DECLARE_LEGACY_CPU_DEVICE(TMS1000, tms1000);
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DECLARE_LEGACY_CPU_DEVICE(TMS1070, tms1070);
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DECLARE_LEGACY_CPU_DEVICE(TMS1100, tms1100);
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DECLARE_LEGACY_CPU_DEVICE(TMS1200, tms1200);
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DECLARE_LEGACY_CPU_DEVICE(TMS1270, tms1270);
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DECLARE_LEGACY_CPU_DEVICE(TMS1300, tms1300);
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extern const device_type TMS1000;
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extern const device_type TMS1070;
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extern const device_type TMS1200;
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extern const device_type TMS1270;
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extern const device_type TMS1100;
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extern const device_type TMS1300;
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extern CPU_DISASSEMBLE( tms0980 );
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extern CPU_DISASSEMBLE( tms1000 );
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extern CPU_DISASSEMBLE( tms1100 );
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#endif /* _TMS0980_H_ */
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@ -182,24 +182,22 @@ void merlin_state::machine_start()
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}
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static const tms0980_config merlin_tms0980_config =
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static const UINT16 merlin_output_pla[0x20] =
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{
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{
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/* O output PLA configuration currently unknown */
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0x01, 0x10, 0x30, 0x70, 0x02, 0x12, 0x32, 0x72,
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0x04, 0x14, 0x34, 0x74, 0x08, 0x18, 0x38, 0x78,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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},
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DEVCB_DRIVER_MEMBER(merlin_state, read_k),
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DEVCB_DRIVER_MEMBER16(merlin_state, write_o),
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DEVCB_DRIVER_MEMBER16(merlin_state, write_r)
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/* O output PLA configuration currently unknown */
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0x01, 0x10, 0x30, 0x70, 0x02, 0x12, 0x32, 0x72,
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0x04, 0x14, 0x34, 0x74, 0x08, 0x18, 0x38, 0x78,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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static MACHINE_CONFIG_START( merlin, merlin_state )
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MCFG_CPU_ADD( "maincpu", TMS1100, 500000 ) /* Clock may be wrong */
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MCFG_CPU_CONFIG( merlin_tms0980_config )
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MCFG_TMS1XXX_OUTPUT_PLA( merlin_output_pla )
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MCFG_TMS1XXX_READ_K( READ8( merlin_state, read_k ) )
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MCFG_TMS1XXX_WRITE_O( WRITE16( merlin_state, write_o ) )
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MCFG_TMS1XXX_WRITE_R( WRITE16( merlin_state, write_r ) )
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MCFG_DEFAULT_LAYOUT(layout_merlin)
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@ -591,18 +591,13 @@ static ADDRESS_MAP_START( microvision_8021_io, AS_IO, 8, microvision_state )
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ADDRESS_MAP_END
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static const tms0980_config microvision_tms0980_config =
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static const UINT16 microvision_output_pla[0x20] =
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{
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{
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/* O output PLA configuration currently unknown */
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0x00, 0x08, 0x04, 0x0C, 0x02, 0x0A, 0x06, 0x0E,
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0x01, 0x09, 0x05, 0x0D, 0x03, 0x0B, 0x07, 0x0F,
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0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00,
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0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00
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},
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DEVCB_DRIVER_MEMBER(microvision_state, tms1100_read_k),
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DEVCB_DRIVER_MEMBER16(microvision_state, tms1100_write_o),
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DEVCB_DRIVER_MEMBER16(microvision_state, tms1100_write_r)
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/* O output PLA configuration currently unknown */
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0x00, 0x08, 0x04, 0x0C, 0x02, 0x0A, 0x06, 0x0E,
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0x01, 0x09, 0x05, 0x0D, 0x03, 0x0B, 0x07, 0x0F,
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0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00,
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0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00
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};
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@ -610,7 +605,10 @@ static MACHINE_CONFIG_START( microvision, microvision_state )
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MCFG_CPU_ADD("maincpu1", I8021, 2000000) // approximately
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MCFG_CPU_IO_MAP( microvision_8021_io )
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MCFG_CPU_ADD("maincpu2", TMS1100, 500000) // most games seem to be running at approximately this speed
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MCFG_CPU_CONFIG( microvision_tms0980_config )
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MCFG_TMS1XXX_OUTPUT_PLA( microvision_output_pla )
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MCFG_TMS1XXX_READ_K( READ8( microvision_state, tms1100_read_k ) )
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MCFG_TMS1XXX_WRITE_O( WRITE16( microvision_state, tms1100_write_o ) )
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MCFG_TMS1XXX_WRITE_R( WRITE16( microvision_state, tms1100_write_r ) )
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MCFG_SCREEN_ADD("screen", LCD)
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MCFG_SCREEN_REFRESH_RATE(60)
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@ -51,24 +51,22 @@ WRITE16_MEMBER(stopthie_state::stopthie_write_r)
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}
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static const tms0980_config stopthie_tms0980_config =
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static const UINT16 stopthie_output_pla[0x20] =
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{
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{
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/* O output PLA configuration currently unknown */
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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},
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DEVCB_DRIVER_MEMBER(stopthie_state, stopthie_read_k),
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DEVCB_DRIVER_MEMBER16(stopthie_state, stopthie_write_o),
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DEVCB_DRIVER_MEMBER16(stopthie_state, stopthie_write_r)
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/* O output PLA configuration currently unknown */
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0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00,
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0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00,
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0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00,
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0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00, 0xFF00,
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};
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static MACHINE_CONFIG_START( stopthie, stopthie_state )
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MCFG_CPU_ADD( "maincpu", TMS0980, 5000000 ) /* Clock is wrong */
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MCFG_CPU_CONFIG( stopthie_tms0980_config )
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MCFG_TMS1XXX_OUTPUT_PLA( stopthie_output_pla )
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MCFG_TMS1XXX_READ_K( READ8( stopthie_state, stopthie_read_k ) )
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MCFG_TMS1XXX_WRITE_O( WRITE16( stopthie_state, stopthie_write_o ) )
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MCFG_TMS1XXX_WRITE_R( WRITE16( stopthie_state, stopthie_write_r ) )
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MCFG_DEFAULT_LAYOUT(layout_stopthie)
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MACHINE_CONFIG_END
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