diff --git a/src/devices/bus/msx_cart/yamaha.cpp b/src/devices/bus/msx_cart/yamaha.cpp index 34c87e88a9e..c03d44837ce 100644 --- a/src/devices/bus/msx_cart/yamaha.cpp +++ b/src/devices/bus/msx_cart/yamaha.cpp @@ -81,7 +81,7 @@ void msx_cart_sfg05_device::device_add_mconfig(machine_config &config) ROM_START( msx_sfg01 ) ROM_REGION(0x4000, "sfg", 0) - ROM_LOAD("sfg01.rom", 0x0, 0x4000, CRC(0995fb36) SHA1(434651305f92aa770a89e40b81125fb22d91603d)) + ROM_LOAD("sfg01.rom", 0x0, 0x4000, CRC(0995fb36) SHA1(434651305f92aa770a89e40b81125fb22d91603d)) // correct label is almost certainly "yamaha__ym2211-22702__48_18_89_b.ic104" though the datecode portion may vary between late 1983 and mid 1984 ROM_END @@ -94,9 +94,9 @@ const tiny_rom_entry *msx_cart_sfg01_device::device_rom_region() const ROM_START( msx_sfg05 ) ROM_REGION(0x8000, "sfg", 0) ROM_SYSTEM_BIOS( 0, "sfg05", "SFG05 (original)" ) - ROMX_LOAD( "sfg05.rom", 0x0, 0x8000, CRC(2425c279) SHA1(d956167e234f60ad916120437120f86fc8c3c321), ROM_BIOS(0) ) + ROMX_LOAD( "sfg05.rom", 0x0, 0x8000, CRC(2425c279) SHA1(d956167e234f60ad916120437120f86fc8c3c321), ROM_BIOS(0) ) // correct label MIGHT be "yamaha__ym2301-23959.ic104" but this needs redump/verification ROM_SYSTEM_BIOS( 1, "sfg05a", "SFG05 (SFG01 upgrade)" ) // SFG01 PCB, Yamaha official upgrade, has YM2151 instead of YM2164 - ROMX_LOAD( "sfg05a.rom", 0x0, 0x8000, CRC(5bc237f8) SHA1(930338f45c08228108c0831cc4a26014c2674718), ROM_BIOS(1) ) + ROMX_LOAD( "sfg05a.rom", 0x0, 0x8000, CRC(5bc237f8) SHA1(930338f45c08228108c0831cc4a26014c2674718), ROM_BIOS(1) ) // this came on a single eprom on a daughterboard on an SFG01 board which had been factory upgraded to SFG05 ROM_END diff --git a/src/mame/audio/pinsnd88.cpp b/src/mame/audio/pinsnd88.cpp index 796174a8548..ebd7b0d9a98 100644 --- a/src/mame/audio/pinsnd88.cpp +++ b/src/mame/audio/pinsnd88.cpp @@ -127,7 +127,7 @@ pinsnd88_device::pinsnd88_device(const machine_config &mconfig, const char *tag, 0 0 0 * * * * * * * * * * * * * RW - 0x0000 - SRAM @U7 0 0 1 0 0 0 x x x x x x x x x * RW - 0x2000 - YM2151 @U16 0 0 1 0 0 1 x x x x x x x x x x x - 0x2400 - open bus (hypothesis: leftover from cvsd_clock_set_w circuit) -0 0 1 0 1 0 x x x x x x x x x x W[1]- 0x2800 - ANALOG SWITCH, input sound and output stereo control; on NARC, latch to respond to main pcb +0 0 1 0 1 0 x x x x x x x x x x W[1]- 0x2800 - ANALOG SWITCH, goes to active low inputs of an ADG201 quad analog switch; on NARC, latch to respond to main pcb 0 0 1 0 1 1 x x x x x x x x x x x - 0x2C00 - open bus (hypothesis: leftover from cvsd_digit_clock_clear_w circuit; on NARC, secondary command_w) 0 0 1 1 0 0 x x x x x x x x x x W - 0x3000 - 7224 DAC write 0 0 1 1 0 1 x x x x x x x x x x R[2]- 0x3400 - Latch Read and de-assert MC68B09E /IRQ diff --git a/src/mame/drivers/8080bw.cpp b/src/mame/drivers/8080bw.cpp index 21be1a32d1d..d5f8ef405f7 100644 --- a/src/mame/drivers/8080bw.cpp +++ b/src/mame/drivers/8080bw.cpp @@ -105,7 +105,7 @@ Capable of running all romsets. * The following Romsets are known, ROUGHLY from oldest to newest: - SV01, SV02, SV03, SV04, SV05, SV06 - undumped (rev 1), If this exists at all this would be the very first Japanese release of space invaders (Andy W may call this 'SV0'?) + SV01, SV02, SV03, SV04, SV05, SV06 - undumped, this has never been seen in the wild and may never have existed. SV01, SV02, SV10, SV04, SV09, SV06 - sisv2 (rev 2) (Andy W calls this 'SV1', and the midway 'invaders' set is based on this romset) SV0H, SV02, SV10, SV04, SV09, SV06 - sisv3 (rev 3) (Andy W calls this 'SV2') SV0H, SV11, SV12, SV04, SV13, SV14 - sisv (rev 4, 5-digit scoring) (Andy W calls this 'SV3') (this set is likely newer than the TV0x sets) diff --git a/src/mame/drivers/circus.cpp b/src/mame/drivers/circus.cpp index 0e9df4e55c6..bad37729922 100644 --- a/src/mame/drivers/circus.cpp +++ b/src/mame/drivers/circus.cpp @@ -442,7 +442,7 @@ ROM_START( circus ) ROM_REGION( 0x0200, "gfx2", 0 ) // clown sprite ROM_LOAD( "9012.14d", 0x0000, 0x0200, CRC(2fde3930) SHA1(a21e2d342f16a39a07edf4bea8d698a52216ecba) ) - ROM_REGION( 0x400, "extra_proms", 0 ) // timing? not used by the emulation, dumped for the circusb bootleg but should match + ROM_REGION( 0x400, "extra_proms", 0 ) // timing? not used by the emulation, dumped for the circusb bootleg but might match ROM_LOAD( "dm74s570-d4.4d", 0x000, 0x200, BAD_DUMP CRC(aad8da33) SHA1(1d60a6b75b94f5be5bad190ef56e9e3da20bf81a) ) ROM_LOAD( "dm74s570-d5.5d", 0x200, 0x200, BAD_DUMP CRC(ed2493fa) SHA1(57ee357b68383b0880bfa385820605bede500747) ) ROM_END diff --git a/src/mame/drivers/fungames.cpp b/src/mame/drivers/fungames.cpp index 4a81f2f8705..c67f17b0ae8 100644 --- a/src/mame/drivers/fungames.cpp +++ b/src/mame/drivers/fungames.cpp @@ -114,7 +114,7 @@ void fungames_state::fungames(machine_config &config) ROM_START( biplane4 ) ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) - ROM_REGION( 0x0400, "roms", ROMREGION_ERASE00 ) + ROM_REGION( 0x0400, "roms", ROMREGION_ERASE00 ) /* 82s115 PROMS */ ROM_LOAD( "biplane.p", 0x0000, 0x0200, CRC(0b3af146) SHA1(de7e4bffd4ca3baf3fe6017609d1b11fa9fc356a) ) ROM_LOAD( "biplane.r", 0x0000, 0x0200, CRC(121eee0c) SHA1(fbdbc4da94dd9dba5903a6df321a9c2319f86dbd) ) ROM_LOAD( "biplane.s", 0x0000, 0x0200, CRC(a57a1c43) SHA1(64d8e609415bc0fe51581bfea2e777106505c761) ) diff --git a/src/mame/drivers/mcr3.cpp b/src/mame/drivers/mcr3.cpp index e43b1770ddf..a155914d3f9 100644 --- a/src/mame/drivers/mcr3.cpp +++ b/src/mame/drivers/mcr3.cpp @@ -1309,7 +1309,7 @@ ROM_START( rampage ) ROM_LOAD( "fg-3_4e_6-30-86.4e", 0x30000, 0x10000, CRC(81e1de40) SHA1(7e7818792845ec3687b3202eeade60a298ef513e) ) ROM_REGION( 0x0001, "sg:pal", 0 ) /* Sounds Good board pal */ - ROM_LOAD( "e36a31axnaxqd.u15.bin", 0x0000, 0x0001, NO_DUMP) /* PAL20L10CNS */ + ROM_LOAD( "e36a31axnaxqd.u15.bin", 0x0000, 0x0001, NO_DUMP) /* PAL20L10CNS, called "SG01R0 PAL" with part number "E36-00803-0009" on the schematics */ ROM_END @@ -1336,7 +1336,7 @@ ROM_START( rampage2 ) ROM_LOAD( "fg-3_4e_6-30-86.4e", 0x30000, 0x10000, CRC(81e1de40) SHA1(7e7818792845ec3687b3202eeade60a298ef513e) ) ROM_REGION( 0x0001, "sg:pal", 0 ) /* Sounds Good board pal */ - ROM_LOAD( "e36a31axnaxqd.u15.bin", 0x0000, 0x0001, NO_DUMP) /* PAL20L10CNS */ + ROM_LOAD( "e36a31axnaxqd.u15.bin", 0x0000, 0x0001, NO_DUMP) /* PAL20L10CNS, called "SG01R0 PAL" with part number "E36-00803-0009" on the schematics */ ROM_END diff --git a/src/mame/drivers/midyunit.cpp b/src/mame/drivers/midyunit.cpp index 4743f605d0d..ee540d3a4e6 100644 --- a/src/mame/drivers/midyunit.cpp +++ b/src/mame/drivers/midyunit.cpp @@ -82,7 +82,7 @@ Notes: Other U* - 27C020 EPROMs -Sound PCB +Sound PCB (see /audio/s11c_bg.cpp) --------- 5766-12702-00 REV. B @@ -105,6 +105,7 @@ Notes: 6809 - clock 2.000MHz [8/4] YM2151 - clock 3.579545MHz 55536 - Harris HC-55536 Continuously Variable Slope Delta Modulator + (some early boards use an HC-55516, later boards use an HC-55536 or HC-55564) 6116 - 2k x8 SRAM U* - 27C010 EPROMs J4 - flat cable connector from main board J8 @@ -287,7 +288,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( trog ) - PORT_START("IN0") + PORT_START("IN0") // Input 0-15 on D0-D15 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1) PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1) PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1) @@ -301,7 +302,7 @@ static INPUT_PORTS_START( trog ) PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P2 Punch") PORT_PLAYER(2) PORT_BIT( 0xe000, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_START("IN1") + PORT_START("IN1") // coin1,coin2,start1,tilt,test,start2,service1,input23-31 on D0-D15 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_START1 ) @@ -319,7 +320,7 @@ static INPUT_PORTS_START( trog ) PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(3) PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P3 Punch") PORT_PLAYER(3) - PORT_START("IN2") + PORT_START("IN2") // input32-input39 on D0-D7; D8-D15 unused PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(4) PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(4) PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(4) @@ -328,7 +329,7 @@ static INPUT_PORTS_START( trog ) PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_START("DSW") + PORT_START("DSW") // DSW1 and DSW2 on D0-D15 PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unused )) PORT_DIPSETTING( 0x0001, DEF_STR( Off )) PORT_DIPSETTING( 0x0000, DEF_STR( On )) diff --git a/src/mame/drivers/redalert.cpp b/src/mame/drivers/redalert.cpp index be1bb4be1ce..01771bcae83 100644 --- a/src/mame/drivers/redalert.cpp +++ b/src/mame/drivers/redalert.cpp @@ -511,8 +511,8 @@ ROM_START( redalert ) ROM_LOAD( "ras3", 0x2000, 0x1000, CRC(20d56f3e) SHA1(5c32ee3365407e6d3f7ab5662e9ecbac437ed4cb) ) ROM_LOAD( "ras4", 0x3000, 0x1000, CRC(130e66db) SHA1(385b8f889fee08fddbb2f75a691af569109eacd1) ) - ROM_REGION( 0x0200, "proms", 0 ) /* color PROM */ - ROM_LOAD( "m-257sc.1a", 0x0000, 0x0200, CRC(b1aca792) SHA1(db37f99b9880cc3c434e2a55a0bbb017d9a72aa3) ) /* 512*8 74S472 or compatible BPROM like a 82s147 */ + ROM_REGION( 0x0200, "proms", 0 ) /* color PROM, on an "M-33 SUB-2" daughterpcb with 8 resistors and a prom, plugged into a 20 pin socket; the actual prom is a TBP18s22N 256x8 prom, but the pcb is silkscreened 'S472' so it can handle either a 256x8 (82s135-style) or 512x8 (82s147-style) prom */ + ROM_LOAD( "m-257sc.1a", 0x0000, 0x0200, CRC(b1aca792) SHA1(db37f99b9880cc3c434e2a55a0bbb017d9a72aa3) ) /* 256x8 data dumped from a 512*8 74S472 or compatible BPROM like a 82s147; note that since this was dumped as the 'wrong' type, A5 is tied low, and board A5 goes to prom A6, likewise BA6->A7, BA7->A8 */ ROM_END diff --git a/src/mame/drivers/votrhv.cpp b/src/mame/drivers/votrhv.cpp index 398de89d918..a0ba05f17aa 100644 --- a/src/mame/drivers/votrhv.cpp +++ b/src/mame/drivers/votrhv.cpp @@ -2,10 +2,10 @@ // copyright-holders:Jonathan Gevaryahu // thanks-to:Kevin Horton /****************************************************************************** -* -* Votrax/Phonic Mirror HandiVolce models HC-110 and HC-120 -* -******************************************************************************/ + * + * Votrax/Phonic Mirror HandiVoice models HC-110 and HC-120 + * + *****************************************************************************/ /* The HC-110 and HC-120 both consist of 3 boards: 1. An 'embedded system' 6800 board with two output latches, one input diff --git a/src/mame/drivers/williams.cpp b/src/mame/drivers/williams.cpp index e552623adea..19bbc0c7b0d 100644 --- a/src/mame/drivers/williams.cpp +++ b/src/mame/drivers/williams.cpp @@ -423,8 +423,9 @@ three ROMs, and a smaller board with lots of ROMs, the CPU, the 6821 PIAs, and the two "Special Chip 2" custom BIT/BLT chips. - Joust 2 has an additional music/speech board that has a - 68B09E CPU, 68B21 PIA, Harris 55564-5 CVSD, and a YM2151. + Joust 2 has an additional D-11298 Williams System 11 background + music/speech board (the older board version from PIN*BOT) + that has a 68B09E CPU, 68B21 PIA, Harris 55564-5 CVSD, and a YM2151. Contact Michael Soderstrom (ichael@geocities.com) if you have any additional information or corrections. diff --git a/src/mame/video/midyunit.cpp b/src/mame/video/midyunit.cpp index e535d74ab75..fe790af872d 100644 --- a/src/mame/video/midyunit.cpp +++ b/src/mame/video/midyunit.cpp @@ -199,16 +199,36 @@ TMS340X0_FROM_SHIFTREG_CB_MEMBER(midyunit_state::from_shiftreg) void midyunit_state::midyunit_control_w(offs_t offset, uint16_t data, uint16_t mem_mask) { /* - * Narc system register + * Narc 'Z-unit' system register, accessed via '/SEL.MISC' being asserted * ------------------ * * | Bit | Use * --+-FEDCBA9876543210-+------------ - * | xxxxxxxx-------- | 7 segment led on CPU board - * | --------xx------ | CMOS page - * | ----------x----- | - OBJ PAL RAM select - * | -----------x---- | - autoerase enable - * | ---------------- | - watchdog + * | xxxxxxxx-------- | 7 segment led on CPU board + * | --------xx------ | CMOS page, selected by feeding the '/SPK.0' D6 and '/SPK.1' D7 through an EP800 PLD @U12 + * | ----------x----- | /OBJ PAL RAM select + * | -----------x---- | /autoerase enable + * | ------------x--- | /bg enable + * | -------------x-- | /bg priority + * | --------------x- | fg scroll 1 + * | ---------------x | fg scroll 0 + * | --------xx----xx | watchdog is triggered on any (state change? rising edge? needs testing, the EP800 @U12 controls this) of these bits, and the EP800 likely also counts pulses the /BLANK bit from the tms34010 + * + */ + /* + * Y-unit system register, accessed via '/SEL.MISC' being asserted ('later' is from the super high impact schematics vs main labels are from the trog schematics) + * ------------------ + * + * | Bit | Use + * --+-FEDCBA9876543210-+------------ + * | OPEN_BUS-------- | upper 8 bits are open bus + * | " " xx------ | CMOS page, selected by feeding the '/SPK.0' (later CBANK1) D6 and '/SPK.1' (later CBANK0) D7 through an EP800 PLD @U12 + * | " " --x----- | /OBJ PAL RAM select + * | " " ---x---- | /autoerase enable + * | " " ----x--- | N/C (later 'EXT') + * | " " -----x-- | /LED + * | " " ------x- | fg scroll 1 (later 'WD.DAT') + * | " " -------x | fg scroll 0 (later 'WD.CLK') * */