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Added save state support to slapstic.

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Added save state support to YM2413.
Modified slapstic code to support address range mirrors.
Cleaned up Rampart driver:
 - simplified rendering code
 - full memory map
 - added save state
This commit is contained in:
Aaron Giles 2008-01-05 19:28:30 +00:00
parent 4b9f336c1f
commit deeb54eab6
16 changed files with 205 additions and 181 deletions
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2
src/emu/sound/2413intf.c
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@ -57,7 +57,7 @@ static void *ym2413_start(int sndindex, int clock, const void *config)
memset(info, 0, sizeof(*info)); memset(info, 0, sizeof(*info));
/* emulator create */ /* emulator create */
info->chip = YM2413Init(clock, rate); info->chip = YM2413Init(clock, rate, sndindex);
if (!info->chip) if (!info->chip)
return NULL; return NULL;

85
src/emu/sound/ym2413.c
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@ -252,6 +252,7 @@ typedef struct {
UINT8 address; /* address register */ UINT8 address; /* address register */
UINT8 status; /* status flag */ UINT8 status; /* status flag */
int index; /* index */
int clock; /* master clock (Hz) */ int clock; /* master clock (Hz) */
int rate; /* sampling rate (Hz) */ int rate; /* sampling rate (Hz) */
double freqbase; /* frequency base */ double freqbase; /* frequency base */
@ -1240,11 +1241,87 @@ static void OPLCloseTable( void )
} }
static void OPLL_init_save(YM2413 *chip)
{
int chipitem = chip->index * 100;
int chnum;
state_save_register_item_array("ym2413", chipitem, chip->instvol_r);
state_save_register_item("ym2413", chipitem, chip->eg_cnt);
state_save_register_item("ym2413", chipitem, chip->eg_timer);
state_save_register_item("ym2413", chipitem, chip->eg_timer_add);
state_save_register_item("ym2413", chipitem, chip->eg_timer_overflow);
state_save_register_item("ym2413", chipitem, chip->rhythm);
state_save_register_item("ym2413", chipitem, chip->lfo_am_cnt);
state_save_register_item("ym2413", chipitem, chip->lfo_am_inc);
state_save_register_item("ym2413", chipitem, chip->lfo_pm_cnt);
state_save_register_item("ym2413", chipitem, chip->lfo_pm_inc);
state_save_register_item("ym2413", chipitem, chip->noise_rng);
state_save_register_item("ym2413", chipitem, chip->noise_p);
state_save_register_item("ym2413", chipitem, chip->noise_f);
state_save_register_item_2d_array("ym2413", chipitem, chip->inst_tab);
state_save_register_item("ym2413", chipitem, chip->address);
state_save_register_item("ym2413", chipitem, chip->status);
for (chnum = 0; chnum < ARRAY_LENGTH(chip->P_CH); chnum++)
{
OPLL_CH *ch = &chip->P_CH[chnum];
int chitem = chipitem + (chnum + 1) * 10;
int slotnum;
state_save_register_item("ym2413", chitem, ch->block_fnum);
state_save_register_item("ym2413", chitem, ch->fc);
state_save_register_item("ym2413", chitem, ch->ksl_base);
state_save_register_item("ym2413", chitem, ch->kcode);
state_save_register_item("ym2413", chitem, ch->sus);
for (slotnum = 0; slotnum < ARRAY_LENGTH(ch->SLOT); slotnum++)
{
OPLL_SLOT *sl = &ch->SLOT[slotnum];
int slitem = chitem + (slotnum + 1);
state_save_register_item("ym2413", slitem, sl->ar);
state_save_register_item("ym2413", slitem, sl->dr);
state_save_register_item("ym2413", slitem, sl->rr);
state_save_register_item("ym2413", slitem, sl->KSR);
state_save_register_item("ym2413", slitem, sl->ksl);
state_save_register_item("ym2413", slitem, sl->ksr);
state_save_register_item("ym2413", slitem, sl->mul);
state_save_register_item("ym2413", slitem, sl->phase);
state_save_register_item("ym2413", slitem, sl->freq);
state_save_register_item("ym2413", slitem, sl->fb_shift);
state_save_register_item_array("ym2413", slitem, sl->op1_out);
state_save_register_item("ym2413", slitem, sl->eg_type);
state_save_register_item("ym2413", slitem, sl->state);
state_save_register_item("ym2413", slitem, sl->TL);
state_save_register_item("ym2413", slitem, sl->TLL);
state_save_register_item("ym2413", slitem, sl->volume);
state_save_register_item("ym2413", slitem, sl->sl);
state_save_register_item("ym2413", slitem, sl->eg_sh_dp);
state_save_register_item("ym2413", slitem, sl->eg_sel_dp);
state_save_register_item("ym2413", slitem, sl->eg_sh_ar);
state_save_register_item("ym2413", slitem, sl->eg_sel_ar);
state_save_register_item("ym2413", slitem, sl->eg_sh_dr);
state_save_register_item("ym2413", slitem, sl->eg_sel_dr);
state_save_register_item("ym2413", slitem, sl->eg_sh_rr);
state_save_register_item("ym2413", slitem, sl->eg_sel_rr);
state_save_register_item("ym2413", slitem, sl->eg_sh_rs);
state_save_register_item("ym2413", slitem, sl->eg_sel_rs);
state_save_register_item("ym2413", slitem, sl->key);
state_save_register_item("ym2413", slitem, sl->AMmask);
state_save_register_item("ym2413", slitem, sl->vib);
state_save_register_item("ym2413", slitem, sl->wavetable);
}
}
}
static void OPLL_initalize(YM2413 *chip) static void OPLL_initalize(YM2413 *chip)
{ {
int i; int i;
OPLL_init_save(chip);
/* frequency base */ /* frequency base */
chip->freqbase = (chip->rate) ? ((double)chip->clock / 72.0) / chip->rate : 0; chip->freqbase = (chip->rate) ? ((double)chip->clock / 72.0) / chip->rate : 0;
#if 0 #if 0
@ -1301,7 +1378,6 @@ static void OPLL_initalize(YM2413 *chip)
chip->eg_timer_add = (1<<EG_SH) * chip->freqbase; chip->eg_timer_add = (1<<EG_SH) * chip->freqbase;
chip->eg_timer_overflow = ( 1 ) * (1<<EG_SH); chip->eg_timer_overflow = ( 1 ) * (1<<EG_SH);
/*logerror("YM2413init eg_timer_add=%8x eg_timer_overflow=%8x\n", chip->eg_timer_add, chip->eg_timer_overflow);*/ /*logerror("YM2413init eg_timer_add=%8x eg_timer_overflow=%8x\n", chip->eg_timer_add, chip->eg_timer_overflow);*/
} }
INLINE void KEY_ON(OPLL_SLOT *SLOT, UINT32 key_set) INLINE void KEY_ON(OPLL_SLOT *SLOT, UINT32 key_set)
@ -1925,7 +2001,7 @@ static void OPLLResetChip(YM2413 *chip)
/* Create one of virtual YM2413 */ /* Create one of virtual YM2413 */
/* 'clock' is chip clock in Hz */ /* 'clock' is chip clock in Hz */
/* 'rate' is sampling rate */ /* 'rate' is sampling rate */
static YM2413 *OPLLCreate(int clock, int rate) static YM2413 *OPLLCreate(int clock, int rate, int index)
{ {
char *ptr; char *ptr;
YM2413 *chip; YM2413 *chip;
@ -1947,6 +2023,7 @@ static YM2413 *OPLLCreate(int clock, int rate)
chip = (YM2413 *)ptr; chip = (YM2413 *)ptr;
chip->index = index;
chip->clock = clock; chip->clock = clock;
chip->rate = rate; chip->rate = rate;
@ -2001,10 +2078,10 @@ static unsigned char OPLLRead(YM2413 *chip,int a)
void * YM2413Init(int clock, int rate) void * YM2413Init(int clock, int rate, int index)
{ {
/* emulator create */ /* emulator create */
return OPLLCreate(clock, rate); return OPLLCreate(clock, rate, index);
} }
void YM2413Shutdown(void *chip) void YM2413Shutdown(void *chip)

2
src/emu/sound/ym2413.h
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@ -27,7 +27,7 @@ typedef INT8 SAMP;
void *YM2413Init(int clock, int rate); void *YM2413Init(int clock, int rate, int index);
void YM2413Shutdown(void *chip); void YM2413Shutdown(void *chip);
void YM2413ResetChip(void *chip); void YM2413ResetChip(void *chip);
void YM2413Write(void *chip, int a, int v); void YM2413Write(void *chip, int a, int v);

11
src/mame/drivers/arcadecl.c
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@ -72,6 +72,9 @@
#include "sound/okim6295.h" #include "sound/okim6295.h"
#define MASTER_CLOCK XTAL_14_31818MHz
/************************************* /*************************************
* *
* Interrupt handling * Interrupt handling
@ -168,7 +171,7 @@ static WRITE16_HANDLER( latch_w )
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 ) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x0fffff) AM_ROM AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x200000, 0x21ffff) AM_READWRITE(MRA16_RAM, rampart_bitmap_w) AM_BASE(&rampart_bitmap) AM_RANGE(0x200000, 0x21ffff) AM_RAM AM_BASE(&rampart_bitmap)
AM_RANGE(0x3c0000, 0x3c07ff) AM_READWRITE(MRA16_RAM, atarigen_expanded_666_paletteram_w) AM_BASE(&paletteram16) AM_RANGE(0x3c0000, 0x3c07ff) AM_READWRITE(MRA16_RAM, atarigen_expanded_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x3e0000, 0x3e07ff) AM_READWRITE(MRA16_RAM, atarimo_0_spriteram_w) AM_BASE(&atarimo_0_spriteram) AM_RANGE(0x3e0000, 0x3e07ff) AM_READWRITE(MRA16_RAM, atarimo_0_spriteram_w) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0x3e0800, 0x3effbf) AM_RAM AM_RANGE(0x3e0800, 0x3effbf) AM_RAM
@ -341,7 +344,7 @@ GFXDECODE_END
static MACHINE_DRIVER_START( arcadecl ) static MACHINE_DRIVER_START( arcadecl )
/* basic machine hardware */ /* basic machine hardware */
MDRV_CPU_ADD(M68000, ATARI_CLOCK_14MHz) MDRV_CPU_ADD(M68000, MASTER_CLOCK)
MDRV_CPU_PROGRAM_MAP(main_map,0) MDRV_CPU_PROGRAM_MAP(main_map,0)
MDRV_CPU_VBLANK_INT(atarigen_video_int_gen,1) MDRV_CPU_VBLANK_INT(atarigen_video_int_gen,1)
@ -357,7 +360,7 @@ static MACHINE_DRIVER_START( arcadecl )
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
/* note: these parameters are from published specs, not derived */ /* note: these parameters are from published specs, not derived */
/* the board uses an SOS-2 chip to generate video signals */ /* the board uses an SOS-2 chip to generate video signals */
MDRV_SCREEN_RAW_PARAMS(ATARI_CLOCK_14MHz/2, 456, 0+4, 336+4, 262, 0, 240) MDRV_SCREEN_RAW_PARAMS(MASTER_CLOCK/2, 456, 0+12, 336+12, 262, 0, 240)
MDRV_VIDEO_START(arcadecl) MDRV_VIDEO_START(arcadecl)
MDRV_VIDEO_UPDATE(arcadecl) MDRV_VIDEO_UPDATE(arcadecl)
@ -365,7 +368,7 @@ static MACHINE_DRIVER_START( arcadecl )
/* sound hardware */ /* sound hardware */
MDRV_SPEAKER_STANDARD_MONO("mono") MDRV_SPEAKER_STANDARD_MONO("mono")
MDRV_SOUND_ADD(OKIM6295, ATARI_CLOCK_14MHz/4/3) MDRV_SOUND_ADD(OKIM6295, MASTER_CLOCK/4/3)
MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7low) MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7low)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_DRIVER_END MACHINE_DRIVER_END

2
src/mame/drivers/atarig1.c
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@ -944,7 +944,7 @@ static void init_g1_common(offs_t slapstic_base, int slapstic, int is_pitfight)
if (slapstic == -1) if (slapstic == -1)
pitfighb_cheap_slapstic_init(); pitfighb_cheap_slapstic_init();
else if (slapstic != 0) else if (slapstic != 0)
atarigen_slapstic_init(0, slapstic_base, slapstic); atarigen_slapstic_init(0, slapstic_base, 0, slapstic);
atarijsa_init(1, 4, 0, 0x8000); atarijsa_init(1, 4, 0, 0x8000);
atarig1_pitfight = is_pitfight; atarig1_pitfight = is_pitfight;

12
src/mame/drivers/atarisy1.c
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@ -2139,7 +2139,7 @@ static DRIVER_INIT( marble )
via_config(0, &via_interface); via_config(0, &via_interface);
atarigen_eeprom_default = NULL; atarigen_eeprom_default = NULL;
atarigen_slapstic_init(0, 0x080000, 103); atarigen_slapstic_init(0, 0x080000, 0, 103);
joystick_type = 0; /* none */ joystick_type = 0; /* none */
trackball_type = 1; /* rotated */ trackball_type = 1; /* rotated */
@ -2151,7 +2151,7 @@ static DRIVER_INIT( peterpak )
via_config(0, &via_interface); via_config(0, &via_interface);
atarigen_eeprom_default = NULL; atarigen_eeprom_default = NULL;
atarigen_slapstic_init(0, 0x080000, 107); atarigen_slapstic_init(0, 0x080000, 0, 107);
joystick_type = 1; /* digital */ joystick_type = 1; /* digital */
trackball_type = 0; /* none */ trackball_type = 0; /* none */
@ -2163,7 +2163,7 @@ static DRIVER_INIT( indytemp )
via_config(0, &via_interface); via_config(0, &via_interface);
atarigen_eeprom_default = NULL; atarigen_eeprom_default = NULL;
atarigen_slapstic_init(0, 0x080000, 105); atarigen_slapstic_init(0, 0x080000, 0, 105);
/* special case for the Indiana Jones slapstic */ /* special case for the Indiana Jones slapstic */
memory_set_opbase_handler(0,indytemp_setopbase); memory_set_opbase_handler(0,indytemp_setopbase);
@ -2178,7 +2178,7 @@ static DRIVER_INIT( roadrunn )
via_config(0, &via_interface); via_config(0, &via_interface);
atarigen_eeprom_default = NULL; atarigen_eeprom_default = NULL;
atarigen_slapstic_init(0, 0x080000, 108); atarigen_slapstic_init(0, 0x080000, 0, 108);
joystick_type = 2; /* analog */ joystick_type = 2; /* analog */
trackball_type = 0; /* none */ trackball_type = 0; /* none */
@ -2190,7 +2190,7 @@ static DRIVER_INIT( roadb109 )
via_config(0, &via_interface); via_config(0, &via_interface);
atarigen_eeprom_default = NULL; atarigen_eeprom_default = NULL;
atarigen_slapstic_init(0, 0x080000, 109); atarigen_slapstic_init(0, 0x080000, 0, 109);
joystick_type = 3; /* pedal */ joystick_type = 3; /* pedal */
trackball_type = 2; /* steering wheel */ trackball_type = 2; /* steering wheel */
@ -2202,7 +2202,7 @@ static DRIVER_INIT( roadb110 )
via_config(0, &via_interface); via_config(0, &via_interface);
atarigen_eeprom_default = NULL; atarigen_eeprom_default = NULL;
atarigen_slapstic_init(0, 0x080000, 110); atarigen_slapstic_init(0, 0x080000, 0, 110);
joystick_type = 3; /* pedal */ joystick_type = 3; /* pedal */
trackball_type = 2; /* steering wheel */ trackball_type = 2; /* steering wheel */

4
src/mame/drivers/cyberbal.c
View File

@ -1006,14 +1006,14 @@ static const UINT16 default_eeprom[] =
static DRIVER_INIT( cyberbal ) static DRIVER_INIT( cyberbal )
{ {
atarigen_eeprom_default = default_eeprom; atarigen_eeprom_default = default_eeprom;
atarigen_slapstic_init(0, 0x018000, 0); atarigen_slapstic_init(0, 0x018000, 0, 0);
} }
static DRIVER_INIT( cyberbt ) static DRIVER_INIT( cyberbt )
{ {
atarigen_eeprom_default = default_eeprom; atarigen_eeprom_default = default_eeprom;
atarigen_slapstic_init(0, 0x018000, 116); atarigen_slapstic_init(0, 0x018000, 0, 116);
} }

2
src/mame/drivers/gauntlet.c
View File

@ -1636,7 +1636,7 @@ ROM_END
static void gauntlet_common_init(int slapstic, int vindctr2) static void gauntlet_common_init(int slapstic, int vindctr2)
{ {
atarigen_eeprom_default = NULL; atarigen_eeprom_default = NULL;
atarigen_slapstic_init(0, 0x038000, slapstic); atarigen_slapstic_init(0, 0x038000, 0, slapstic);
/* swap the top and bottom halves of the main CPU ROM images */ /* swap the top and bottom halves of the main CPU ROM images */
atarigen_swap_mem(memory_region(REGION_CPU1) + 0x000000, memory_region(REGION_CPU1) + 0x008000, 0x8000); atarigen_swap_mem(memory_region(REGION_CPU1) + 0x000000, memory_region(REGION_CPU1) + 0x008000, 0x8000);

102
src/mame/drivers/rampart.c
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@ -13,6 +13,8 @@
Note: Note:
P3 buttons 1 and 2 are mapped twice. THIS IS NOT A BUG! P3 buttons 1 and 2 are mapped twice. THIS IS NOT A BUG!
bp 548,a0==6c0007 && (d0&ffff)!=0,{print d0&ffff; g}
**************************************************************************** ****************************************************************************
Memory map (TBA) Memory map (TBA)
@ -27,6 +29,9 @@
#include "sound/2413intf.h" #include "sound/2413intf.h"
#define MASTER_CLOCK XTAL_14_31818MHz
/************************************* /*************************************
* *
* Interrupt handling * Interrupt handling
@ -126,6 +131,8 @@ static WRITE16_HANDLER( latch_w )
0x1000 == CBANK (color bank -- is it ever set to non-zero?) 0x1000 == CBANK (color bank -- is it ever set to non-zero?)
0x0800 == LETAMODE0 (controls center and left trackballs) 0x0800 == LETAMODE0 (controls center and left trackballs)
0x0400 == LETARES (reset LETA analog control reader) 0x0400 == LETARES (reset LETA analog control reader)
0x0200 == COINCTRL
0x0100 == COINCTRR
0x0020 == PMIX0 (ADPCM mixer level) 0x0020 == PMIX0 (ADPCM mixer level)
0x0010 == /PCMRES (ADPCM reset) 0x0010 == /PCMRES (ADPCM reset)
@ -138,13 +145,19 @@ static WRITE16_HANDLER( latch_w )
{ {
if (data & 0x1000) if (data & 0x1000)
logerror("Color bank set to 1!\n"); logerror("Color bank set to 1!\n");
coin_counter_w(0, (data >> 9) & 1);
coin_counter_w(1, (data >> 8) & 1);
} }
/* lower byte being modified? */ /* lower byte being modified? */
if (ACCESSING_LSB) if (ACCESSING_LSB)
{ {
atarigen_set_ym2413_vol(Machine, ((data >> 1) & 7) * 100 / 7);
atarigen_set_oki6295_vol(Machine, (data & 0x0020) ? 100 : 0); atarigen_set_oki6295_vol(Machine, (data & 0x0020) ? 100 : 0);
if (!(data & 0x0010))
sndti_reset(SOUND_OKIM6295, 0);
atarigen_set_ym2413_vol(Machine, ((data >> 1) & 7) * 100 / 7);
if (!(data & 0x0001))
sndti_reset(SOUND_YM2413, 0);
} }
} }
@ -156,41 +169,31 @@ static WRITE16_HANDLER( latch_w )
* *
*************************************/ *************************************/
static ADDRESS_MAP_START( main_readmem, ADDRESS_SPACE_PROGRAM, 16 ) /* full memory map deduced from schematics and GALs */
AM_RANGE(0x000000, 0x0fffff) AM_READ(MRA16_ROM) static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x140000, 0x147fff) AM_READ(MRA16_ROM) ADDRESS_MAP_FLAGS( AMEF_ABITS(23) )
AM_RANGE(0x200000, 0x21ffff) AM_READ(MRA16_RAM) AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x3c0000, 0x3c07ff) AM_READ(MRA16_RAM) AM_RANGE(0x140000, 0x147fff) AM_MIRROR(0x438000) AM_ROM
AM_RANGE(0x3e0000, 0x3effff) AM_READ(MRA16_RAM) AM_RANGE(0x200000, 0x21ffff) AM_RAM AM_BASE(&rampart_bitmap)
AM_RANGE(0x460000, 0x460001) AM_READ(adpcm_r) AM_RANGE(0x220000, 0x3bffff) AM_WRITENOP /* the code blasts right through this when initializing */
AM_RANGE(0x500000, 0x500fff) AM_READ(atarigen_eeprom_r) AM_RANGE(0x3c0000, 0x3c07ff) AM_MIRROR(0x019800) AM_READWRITE(MRA16_RAM, atarigen_expanded_666_paletteram_w) AM_BASE(&paletteram16)
AM_RANGE(0x640000, 0x640001) AM_READ(input_port_0_word_r) AM_RANGE(0x3e0000, 0x3e07ff) AM_MIRROR(0x010000) AM_READWRITE(MRA16_RAM, atarimo_0_spriteram_w) AM_BASE(&atarimo_0_spriteram)
AM_RANGE(0x640002, 0x640003) AM_READ(input_port_1_word_r) AM_RANGE(0x3e0800, 0x3e3f3f) AM_MIRROR(0x010000) AM_RAM
AM_RANGE(0x6c0000, 0x6c0001) AM_READ(input_port_2_word_r) AM_RANGE(0x3e3f40, 0x3e3f7f) AM_MIRROR(0x010000) AM_READWRITE(MRA16_RAM, atarimo_0_slipram_w) AM_BASE(&atarimo_0_slipram)
AM_RANGE(0x6c0002, 0x6c0003) AM_READ(input_port_3_word_r) AM_RANGE(0x3e3f80, 0x3effff) AM_MIRROR(0x010000) AM_RAM
AM_RANGE(0x6c0004, 0x6c0005) AM_READ(input_port_4_word_r) AM_RANGE(0x460000, 0x460001) AM_MIRROR(0x019ffe) AM_READWRITE(adpcm_r, adpcm_w)
AM_RANGE(0x6c0006, 0x6c0007) AM_READ(input_port_5_word_r) AM_RANGE(0x480000, 0x480003) AM_MIRROR(0x019ffc) AM_WRITE(ym2413_w)
ADDRESS_MAP_END AM_RANGE(0x500000, 0x500fff) AM_MIRROR(0x019000) AM_READWRITE(atarigen_eeprom_r, atarigen_eeprom_w) AM_BASE(&atarigen_eeprom) AM_SIZE(&atarigen_eeprom_size)
AM_RANGE(0x5a6000, 0x5a6001) AM_MIRROR(0x019ffe) AM_WRITE(atarigen_eeprom_enable_w)
AM_RANGE(0x640000, 0x640001) AM_MIRROR(0x019ffe) AM_WRITE(latch_w)
static ADDRESS_MAP_START( main_writemem, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x640000, 0x640001) AM_MIRROR(0x019ffc) AM_READ(input_port_0_word_r)
AM_RANGE(0x000000, 0x0fffff) AM_WRITE(MWA16_ROM) AM_RANGE(0x640002, 0x640003) AM_MIRROR(0x019ffc) AM_READ(input_port_1_word_r)
AM_RANGE(0x140000, 0x147fff) AM_WRITE(MWA16_ROM) AM_RANGE(0x6c0000, 0x6c0001) AM_MIRROR(0x019ff8) AM_READ(input_port_2_word_r)
AM_RANGE(0x200000, 0x21ffff) AM_WRITE(rampart_bitmap_w) AM_BASE(&rampart_bitmap) AM_RANGE(0x6c0002, 0x6c0003) AM_MIRROR(0x019ff8) AM_READ(input_port_3_word_r)
AM_RANGE(0x220000, 0x3bffff) AM_WRITE(MWA16_NOP) /* the code blasts right through this when initializing */ AM_RANGE(0x6c0004, 0x6c0005) AM_MIRROR(0x019ff8) AM_READ(input_port_4_word_r)
AM_RANGE(0x3c0000, 0x3c07ff) AM_WRITE(atarigen_expanded_666_paletteram_w) AM_BASE(&paletteram16) AM_RANGE(0x6c0006, 0x6c0007) AM_MIRROR(0x019ff8) AM_READ(input_port_5_word_r)
AM_RANGE(0x3c0800, 0x3dffff) AM_WRITE(MWA16_NOP) /* the code blasts right through this when initializing */ AM_RANGE(0x726000, 0x726001) AM_MIRROR(0x019ffe) AM_WRITE(watchdog_reset16_w)
AM_RANGE(0x3e0000, 0x3e07ff) AM_WRITE(atarimo_0_spriteram_w) AM_BASE(&atarimo_0_spriteram) AM_RANGE(0x7e6000, 0x7e6001) AM_MIRROR(0x019ffe) AM_WRITE(atarigen_scanline_int_ack_w)
AM_RANGE(0x3e0800, 0x3e3f3f) AM_WRITE(MWA16_RAM)
AM_RANGE(0x3e3f40, 0x3e3f7f) AM_WRITE(atarimo_0_slipram_w) AM_BASE(&atarimo_0_slipram)
AM_RANGE(0x3e3f80, 0x3effff) AM_WRITE(MWA16_RAM)
AM_RANGE(0x460000, 0x460001) AM_WRITE(adpcm_w)
AM_RANGE(0x480000, 0x480003) AM_WRITE(ym2413_w)
AM_RANGE(0x500000, 0x500fff) AM_WRITE(atarigen_eeprom_w) AM_BASE(&atarigen_eeprom) AM_SIZE(&atarigen_eeprom_size)
AM_RANGE(0x5a0000, 0x5affff) AM_WRITE(atarigen_eeprom_enable_w)
AM_RANGE(0x640000, 0x640001) AM_WRITE(latch_w)
AM_RANGE(0x720000, 0x72ffff) AM_WRITE(watchdog_reset16_w)
AM_RANGE(0x7e0000, 0x7effff) AM_WRITE(atarigen_scanline_int_ack_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -203,7 +206,7 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( rampart ) static INPUT_PORTS_START( rampart )
PORT_START PORT_START
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) // alternate button1 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3) // alternate button1
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
@ -221,7 +224,7 @@ static INPUT_PORTS_START( rampart )
PORT_BIT( 0x00f8, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x00f8, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) // alternate button2 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(3) // alternate button2
PORT_SERVICE( 0x0800, IP_ACTIVE_LOW ) PORT_SERVICE( 0x0800, IP_ACTIVE_LOW )
PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
@ -245,7 +248,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( ramprt2p ) static INPUT_PORTS_START( ramprt2p )
PORT_START PORT_START
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) // alternate button1 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3) // alternate button1
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3)
PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Players ) ) PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Players ) )
PORT_DIPSETTING( 0x0000, "2") PORT_DIPSETTING( 0x0000, "2")
@ -265,7 +268,7 @@ static INPUT_PORTS_START( ramprt2p )
PORT_BIT( 0x00f8, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x00f8, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) // alternate button2 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(3) // alternate button2
PORT_SERVICE( 0x0800, IP_ACTIVE_LOW ) PORT_SERVICE( 0x0800, IP_ACTIVE_LOW )
PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
@ -379,12 +382,13 @@ GFXDECODE_END
static MACHINE_DRIVER_START( rampart ) static MACHINE_DRIVER_START( rampart )
/* basic machine hardware */ /* basic machine hardware */
MDRV_CPU_ADD(M68000, ATARI_CLOCK_14MHz/2) MDRV_CPU_ADD(M68000, MASTER_CLOCK/2)
MDRV_CPU_PROGRAM_MAP(main_readmem,main_writemem) MDRV_CPU_PROGRAM_MAP(main_map, 0)
MDRV_CPU_VBLANK_INT(atarigen_video_int_gen,1) MDRV_CPU_VBLANK_INT(atarigen_video_int_gen,1)
MDRV_MACHINE_RESET(rampart) MDRV_MACHINE_RESET(rampart)
MDRV_NVRAM_HANDLER(atarigen) MDRV_NVRAM_HANDLER(atarigen)
MDRV_WATCHDOG_VBLANK_INIT(8)
/* video hardware */ /* video hardware */
MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_UPDATE_BEFORE_VBLANK) MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_UPDATE_BEFORE_VBLANK)
@ -395,7 +399,7 @@ static MACHINE_DRIVER_START( rampart )
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
/* note: these parameters are from published specs, not derived */ /* note: these parameters are from published specs, not derived */
/* the board uses an SOS-2 chip to generate video signals */ /* the board uses an SOS-2 chip to generate video signals */
MDRV_SCREEN_RAW_PARAMS(ATARI_CLOCK_14MHz/2, 456, 0+4, 336+4, 262, 0, 240) MDRV_SCREEN_RAW_PARAMS(MASTER_CLOCK/2, 456, 0+12, 336+12, 262, 0, 240)
MDRV_VIDEO_START(rampart) MDRV_VIDEO_START(rampart)
MDRV_VIDEO_UPDATE(rampart) MDRV_VIDEO_UPDATE(rampart)
@ -403,11 +407,11 @@ static MACHINE_DRIVER_START( rampart )
/* sound hardware */ /* sound hardware */
MDRV_SPEAKER_STANDARD_MONO("mono") MDRV_SPEAKER_STANDARD_MONO("mono")
MDRV_SOUND_ADD(OKIM6295, ATARI_CLOCK_14MHz/4/3) MDRV_SOUND_ADD(OKIM6295, MASTER_CLOCK/4/3)
MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7low) MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7low)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.60) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.60)
MDRV_SOUND_ADD(YM2413, ATARI_CLOCK_14MHz/4) MDRV_SOUND_ADD(YM2413, MASTER_CLOCK/4)
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_DRIVER_END MACHINE_DRIVER_END
@ -531,7 +535,7 @@ static DRIVER_INIT( rampart )
atarigen_eeprom_default = compressed_default_eeprom; atarigen_eeprom_default = compressed_default_eeprom;
memcpy(&memory_region(REGION_CPU1)[0x140000], &memory_region(REGION_CPU1)[0x40000], 0x8000); memcpy(&memory_region(REGION_CPU1)[0x140000], &memory_region(REGION_CPU1)[0x40000], 0x8000);
atarigen_slapstic_init(0, 0x140000, 118); atarigen_slapstic_init(0, 0x140000, 0x438000, 118);
} }
@ -542,6 +546,6 @@ static DRIVER_INIT( rampart )
* *
*************************************/ *************************************/
GAME( 1990, rampart, 0, rampart, rampart, rampart, ROT0, "Atari Games", "Rampart (Trackball)", 0 ) GAME( 1990, rampart, 0, rampart, rampart, rampart, ROT0, "Atari Games", "Rampart (Trackball)", GAME_SUPPORTS_SAVE )
GAME( 1990, ramprt2p, rampart, rampart, ramprt2p, rampart, ROT0, "Atari Games", "Rampart (Joystick)", 0 ) GAME( 1990, ramprt2p, rampart, rampart, ramprt2p, rampart, ROT0, "Atari Games", "Rampart (Joystick)", GAME_SUPPORTS_SAVE )
GAME( 1990, rampartj, rampart, rampart, rampartj, rampart, ROT0, "Atari Games", "Rampart (Japan, Joystick)", 0 ) GAME( 1990, rampartj, rampart, rampart, rampartj, rampart, ROT0, "Atari Games", "Rampart (Japan, Joystick)", GAME_SUPPORTS_SAVE )

2
src/mame/drivers/xybots.c
View File

@ -386,7 +386,7 @@ ROM_END
static DRIVER_INIT( xybots ) static DRIVER_INIT( xybots )
{ {
atarigen_eeprom_default = NULL; atarigen_eeprom_default = NULL;
atarigen_slapstic_init(0, 0x008000, 107); atarigen_slapstic_init(0, 0x008000, 0, 107);
atarijsa_init(1, 2, 1, 0x0100); atarijsa_init(1, 2, 1, 0x0100);
} }

3
src/mame/includes/rampart.h
View File

@ -7,12 +7,9 @@
/*----------- defined in video/rampart.c -----------*/ /*----------- defined in video/rampart.c -----------*/
WRITE16_HANDLER( rampart_bitmap_w );
VIDEO_START( rampart ); VIDEO_START( rampart );
VIDEO_UPDATE( rampart ); VIDEO_UPDATE( rampart );
void rampart_bitmap_init(running_machine *machine, int _xdim, int _ydim);
void rampart_bitmap_render(running_machine *machine, mame_bitmap *bitmap, const rectangle *cliprect); void rampart_bitmap_render(running_machine *machine, mame_bitmap *bitmap, const rectangle *cliprect);
extern UINT16 *rampart_bitmap; extern UINT16 *rampart_bitmap;

24
src/mame/machine/atarigen.c
View File

@ -71,7 +71,7 @@ static UINT8 eeprom_unlocked;
static UINT8 atarigen_slapstic_num; static UINT8 atarigen_slapstic_num;
static UINT16 * atarigen_slapstic; static UINT16 * atarigen_slapstic;
static UINT32 atarigen_slapstic_bank; static UINT8 atarigen_slapstic_bank;
static void * atarigen_slapstic_bank0; static void * atarigen_slapstic_bank0;
static UINT8 sound_cpu_num; static UINT8 sound_cpu_num;
@ -452,29 +452,38 @@ INLINE void update_bank(int bank)
} }
static void slapstic_postload(void)
{
update_bank(slapstic_bank());
}
/*--------------------------------------------------------------- /*---------------------------------------------------------------
atarigen_slapstic_init: Installs memory handlers for the atarigen_slapstic_init: Installs memory handlers for the
slapstic and sets the chip number. slapstic and sets the chip number.
---------------------------------------------------------------*/ ---------------------------------------------------------------*/
void atarigen_slapstic_init(int cpunum, int base, int chipnum) void atarigen_slapstic_init(int cpunum, offs_t base, offs_t mirror, int chipnum)
{ {
/* reset in case we have no state */
atarigen_slapstic_num = chipnum; atarigen_slapstic_num = chipnum;
atarigen_slapstic = NULL; atarigen_slapstic = NULL;
/* if we have a chip, install it */ /* if we have a chip, install it */
if (chipnum) if (chipnum != 0)
{ {
/* initialize the slapstic */ /* initialize the slapstic */
slapstic_init(chipnum); slapstic_init(chipnum);
/* install the memory handlers */ /* install the memory handlers */
atarigen_slapstic = memory_install_read16_handler(cpunum, ADDRESS_SPACE_PROGRAM, base, base + 0x7fff, 0, 0, atarigen_slapstic_r); atarigen_slapstic = memory_install_readwrite16_handler(cpunum, ADDRESS_SPACE_PROGRAM, base, base + 0x7fff, 0, mirror, atarigen_slapstic_r, atarigen_slapstic_w);
atarigen_slapstic = memory_install_write16_handler(cpunum, ADDRESS_SPACE_PROGRAM, base, base + 0x7fff, 0, 0, atarigen_slapstic_w);
/* allocate memory for a copy of bank 0 */ /* allocate memory for a copy of bank 0 */
atarigen_slapstic_bank0 = auto_malloc(0x2000); atarigen_slapstic_bank0 = auto_malloc(0x2000);
memcpy(atarigen_slapstic_bank0, atarigen_slapstic, 0x2000); memcpy(atarigen_slapstic_bank0, atarigen_slapstic, 0x2000);
/* ensure we recopy memory for the bank */
atarigen_slapstic_bank = 0xff;
} }
} }
@ -486,7 +495,7 @@ void atarigen_slapstic_init(int cpunum, int base, int chipnum)
void atarigen_slapstic_reset(void) void atarigen_slapstic_reset(void)
{ {
if (atarigen_slapstic_num) if (atarigen_slapstic_num != 0)
{ {
slapstic_reset(); slapstic_reset();
update_bank(slapstic_bank()); update_bank(slapstic_bank());
@ -1497,4 +1506,7 @@ void atarigen_init_save_state(void)
state_save_register_global(playfield_latch); state_save_register_global(playfield_latch);
state_save_register_global(playfield2_latch); state_save_register_global(playfield2_latch);
/* need a postload to reset the state */
state_save_register_func_postload(slapstic_postload);
} }

10
src/mame/machine/atarigen.h
View File

@ -17,10 +17,10 @@
CONSTANTS CONSTANTS
##########################################################################*/ ##########################################################################*/
#define ATARI_CLOCK_14MHz 14318180 #define ATARI_CLOCK_14MHz XTAL_14_31818MHz
#define ATARI_CLOCK_20MHz 20000000 #define ATARI_CLOCK_20MHz XTAL_20MHz
#define ATARI_CLOCK_32MHz 32000000 #define ATARI_CLOCK_32MHz XTAL_32MHz
#define ATARI_CLOCK_50MHz 50000000 #define ATARI_CLOCK_50MHz XTAL_50MHz
@ -134,7 +134,7 @@ NVRAM_HANDLER( atarigen );
SLAPSTIC HANDLING SLAPSTIC HANDLING
---------------------------------------------------------------*/ ---------------------------------------------------------------*/
void atarigen_slapstic_init(int cpunum, int base, int chipnum); void atarigen_slapstic_init(int cpunum, offs_t base, offs_t mirror, int chipnum);
void atarigen_slapstic_reset(void); void atarigen_slapstic_reset(void);
WRITE16_HANDLER( atarigen_slapstic_w ); WRITE16_HANDLER( atarigen_slapstic_w );

22
src/mame/machine/slapstic.c
View File

@ -252,7 +252,7 @@ struct slapstic_data
* *
*************************************/ *************************************/
enum state_type enum
{ {
DISABLED, DISABLED,
ENABLED, ENABLED,
@ -773,13 +773,13 @@ static const struct slapstic_data *const slapstic_table[] =
* *
*************************************/ *************************************/
static enum state_type state; static UINT8 state;
static INT8 current_bank; static UINT8 current_bank;
static int access_68k; static UINT8 access_68k;
static INT8 alt_bank; static UINT8 alt_bank;
static INT8 bit_bank; static UINT8 bit_bank;
static INT8 add_bank; static UINT8 add_bank;
static UINT8 bit_xor; static UINT8 bit_xor;
static struct slapstic_data slapstic; static struct slapstic_data slapstic;
@ -817,6 +817,14 @@ void slapstic_init(int chip)
/* see if we're 68k or 6502/6809 based */ /* see if we're 68k or 6502/6809 based */
access_68k = (Machine->drv->cpu[0].type != CPU_M6809 && access_68k = (Machine->drv->cpu[0].type != CPU_M6809 &&
Machine->drv->cpu[0].type != CPU_M6502); Machine->drv->cpu[0].type != CPU_M6502);
/* save state */
state_save_register_item("slapstic", 0, state);
state_save_register_item("slapstic", 0, current_bank);
state_save_register_item("slapstic", 0, alt_bank);
state_save_register_item("slapstic", 0, bit_bank);
state_save_register_item("slapstic", 0, add_bank);
state_save_register_item("slapstic", 0, bit_xor);
} }

3
src/mame/video/arcadecl.c
View File

@ -69,9 +69,6 @@ VIDEO_START( arcadecl )
0, /* callback routine for special entries */ 0, /* callback routine for special entries */
}; };
/* initialize the playfield */
rampart_bitmap_init(machine, 43*8, 30*8);
/* initialize the motion objects */ /* initialize the motion objects */
atarimo_init(machine, 0, &modesc); atarimo_init(machine, 0, &modesc);

100
src/mame/video/rampart.c
View File

@ -20,18 +20,6 @@ UINT16 *rampart_bitmap;
/*************************************
*
* Statics
*
*************************************/
static UINT8 *pfdirty;
static mame_bitmap *pfbitmap;
static int xdim, ydim;
/************************************* /*************************************
* *
* Video system start * Video system start
@ -77,14 +65,11 @@ VIDEO_START( rampart )
0, /* callback routine for special entries */ 0, /* callback routine for special entries */
}; };
/* initialize the playfield */
rampart_bitmap_init(machine, 43*8, 30*8);
/* initialize the motion objects */ /* initialize the motion objects */
atarimo_init(machine, 0, &modesc); atarimo_init(machine, 0, &modesc);
/* set the intial scroll offset */ /* set the intial scroll offset */
atarimo_set_xscroll(0, -4); atarimo_set_xscroll(0, -12);
} }
@ -114,8 +99,7 @@ VIDEO_UPDATE( rampart )
for (x = rectlist.rect->min_x; x <= rectlist.rect->max_x; x++) for (x = rectlist.rect->min_x; x <= rectlist.rect->max_x; x++)
if (mo[x]) if (mo[x])
{ {
/* not yet verified /* the PCB supports more complex priorities, but the PAL is not stuffed, so we get the default */
*/
pf[x] = mo[x]; pf[x] = mo[x];
/* erase behind ourselves */ /* erase behind ourselves */
@ -127,55 +111,6 @@ VIDEO_UPDATE( rampart )
/*************************************
*
* Bitmap initialization
*
*************************************/
void rampart_bitmap_init(running_machine *machine, int _xdim, int _ydim)
{
/* set the dimensions */
xdim = _xdim;
ydim = _ydim;
/* allocate dirty map */
pfdirty = auto_malloc(sizeof(pfdirty[0]) * ydim);
memset(pfdirty, 1, sizeof(pfdirty[0]) * ydim);
/* allocate playfield bitmap */
pfbitmap = auto_bitmap_alloc(xdim, ydim, machine->screen[0].format);
}
/*************************************
*
* Bitmap RAM write handler
*
*************************************/
WRITE16_HANDLER( rampart_bitmap_w )
{
int oldword = rampart_bitmap[offset];
int newword = oldword;
int x, y;
COMBINE_DATA(&newword);
if (oldword != newword)
{
rampart_bitmap[offset] = newword;
/* track color usage */
x = offset % 256;
y = offset / 256;
if (x < xdim && y < ydim)
pfdirty[y] = 1;
}
}
/************************************* /*************************************
* *
* Bitmap rendering * Bitmap rendering
@ -187,26 +122,17 @@ void rampart_bitmap_render(running_machine *machine, mame_bitmap *bitmap, const
int x, y; int x, y;
/* update any dirty scanlines */ /* update any dirty scanlines */
for (y = 0; y < ydim; y++) for (y = cliprect->min_y; y <= cliprect->max_y; y++)
if (pfdirty[y]) {
const UINT16 *src = &rampart_bitmap[256 * y];
UINT16 *dst = BITMAP_ADDR16(bitmap, y, 0);
/* regenerate the line */
for (x = cliprect->min_x & ~1; x <= cliprect->max_x; x += 2)
{ {
const UINT16 *src = &rampart_bitmap[256 * y]; int bits = src[(x - 8) / 2];
UINT8 scanline[512]; dst[x + 0] = bits >> 8;
UINT8 *dst = scanline; dst[x + 1] = bits & 0xff;
/* regenerate the line */
for (x = 0; x < xdim / 2; x++)
{
int bits = *src++;
*dst++ = bits >> 8;
*dst++ = bits;
}
pfdirty[y] = 0;
/* draw it */
draw_scanline8(pfbitmap, 0, y, xdim, scanline, machine->pens, -1);
} }
}
/* copy the cached bitmap */
copybitmap(bitmap, pfbitmap, 0, 0, 0, 0, cliprect, TRANSPARENCY_NONE, 0);
} }