From df143446696cee294a6ffd7ea6bc0b09a43d9c02 Mon Sep 17 00:00:00 2001 From: AJR Date: Fri, 15 Nov 2019 15:35:10 -0500 Subject: [PATCH] 65C02 opcode timing and bus usage corrections - BBR and BBS use one or two extra cycles when the branch is taken, like other conditional branches - TRB and TSB perform an extra read of the operand instead of an extra write --- src/devices/cpu/m6502/om65c02.lst | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/src/devices/cpu/m6502/om65c02.lst b/src/devices/cpu/m6502/om65c02.lst index d5428557344..3e414cd7bfd 100644 --- a/src/devices/cpu/m6502/om65c02.lst +++ b/src/devices/cpu/m6502/om65c02.lst @@ -163,6 +163,10 @@ bbr_zpb read(TMP); TMP = read_pc(); if(!(TMP2 & (1 << ((inst_state >> 4) & 7)))) { + read_pc_noinc(); + if(page_changing(PC, int8_t(TMP))) { + read_arg(set_l(PC, PC+int8_t(TMP))); + } PC += int8_t(TMP); } prefetch(); @@ -173,6 +177,10 @@ bbs_zpb read(TMP); TMP = read_pc(); if(TMP2 & (1 << ((inst_state >> 4) & 7))) { + read_pc_noinc(); + if(page_changing(PC, int8_t(TMP))) { + read_arg(set_l(PC, PC+int8_t(TMP))); + } PC += int8_t(TMP); } prefetch(); @@ -709,7 +717,7 @@ trb_aba TMP = read_pc(); TMP = set_h(TMP, read_pc()); TMP2 = read(TMP); - write(TMP, TMP2); + read(TMP); if(A & TMP2) P &= ~F_Z; else @@ -721,7 +729,7 @@ trb_aba trb_zpg TMP = read_pc(); TMP2 = read(TMP); - write(TMP, TMP2); + read(TMP); if(A & TMP2) P &= ~F_Z; else @@ -734,7 +742,7 @@ tsb_aba TMP = read_pc(); TMP = set_h(TMP, read_pc()); TMP2 = read(TMP); - write(TMP, TMP2); + read(TMP); if(A & TMP2) P &= ~F_Z; else @@ -746,7 +754,7 @@ tsb_aba tsb_zpg TMP = read_pc(); TMP2 = read(TMP); - write(TMP, TMP2); + read(TMP); if(A & TMP2) P &= ~F_Z; else