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https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
h8: RTE does not block interrupts
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f8345b810d
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df28e783e1
@ -536,6 +536,13 @@ void h8_device::prefetch_done_noirq()
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m_inst_state = m_IR[0] = m_PIR;
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}
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void h8_device::prefetch_done_notrace()
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{
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prefetch_done();
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if (m_inst_state == STATE_TRACE)
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m_inst_state = m_IR[0] = m_PIR;
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}
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void h8_device::prefetch_done_noirq_notrace()
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{
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m_inst_state = m_IR[0] = m_PIR;
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@ -200,6 +200,7 @@ protected:
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void prefetch_switch(uint32_t pc, uint16_t ir) { m_NPC = pc & 0xffffff; m_PC = pc+2; m_PIR = ir; }
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void prefetch_done();
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void prefetch_done_noirq();
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void prefetch_done_notrace();
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void prefetch_done_noirq_notrace();
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void illegal();
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u16 adc_default(int adc);
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@ -20,9 +20,9 @@ macro prefetch_noirq
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prefetch_start
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prefetch_done_noirq();
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macro prefetch_noirq_notrace
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macro prefetch_notrace
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prefetch_start
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prefetch_done_noirq_notrace();
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prefetch_done_notrace();
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macro bxx_any %cond
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prefetch_start
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@ -1576,7 +1576,7 @@ macro jsr32 %opc %spreg
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internal(1);
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m_PC = m_TMP2;
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update_irq_filter();
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prefetch_noirq_notrace
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prefetch_notrace
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5670 ffff 0 rte - - h
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fetch
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@ -1598,7 +1598,7 @@ macro jsr32 %opc %spreg
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internal(1);
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m_PC = m_TMP2;
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update_irq_filter();
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prefetch_noirq_notrace
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prefetch_notrace
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5700 ffcf 0 trapa imm2 - h
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internal(1);
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