Changes for MAME 0.121u3.

.gitattributes

@@ -565,6 +565,8 @@ src/emu/machine/8237dma.c svneol=native#text/plain
 src/emu/machine/8237dma.h svneol=native#text/plain
 src/emu/machine/8255ppi.c svneol=native#text/plain
 src/emu/machine/8255ppi.h svneol=native#text/plain
+src/emu/machine/8257dma.c svneol=native#text/plain
+src/emu/machine/8257dma.h svneol=native#text/plain
 src/emu/machine/adc083x.c svneol=native#text/plain
 src/emu/machine/adc083x.h svneol=native#text/plain
 src/emu/machine/adc1213x.c svneol=native#text/plain
@@ -1359,6 +1361,7 @@ src/mame/drivers/drgnmst.c svneol=native#text/plain
 src/mame/drivers/dribling.c svneol=native#text/plain
 src/mame/drivers/drmicro.c svneol=native#text/plain
 src/mame/drivers/drtomy.c svneol=native#text/plain
+src/mame/drivers/drw80pkr.c svneol=native#text/plain
 src/mame/drivers/dunhuang.c svneol=native#text/plain
 src/mame/drivers/dwarfd.c svneol=native#text/plain
 src/mame/drivers/dynadice.c svneol=native#text/plain

makefile

@@ -105,9 +105,6 @@ X86_MIPS3_DRC = 1
 # uncomment next line to use DRC PowerPC engine
 X86_PPC_DRC = 1
 
-# uncomment next line to use DRC Voodoo rasterizers
-# X86_VOODOO_DRC = 1
-
 
 
 #-------------------------------------------------
@@ -272,11 +269,6 @@ ifdef PROFILER
 DEFS += -DMAME_PROFILER
 endif
 
-# define VOODOO_DRC if we are building the DRC Voodoo engine
-ifdef X86_VOODOO_DRC
-DEFS += -DVOODOO_DRC
-endif
-
 
 
 #-------------------------------------------------

src/emu/audio/generic.c

@@ -158,5 +158,6 @@ WRITE8_HANDLER( soundlatch4_clear_w ) { latch_clear(3); }
 
 void soundlatch_setclearedvalue(int value)
 {
+	assert_always(mame_get_phase(Machine) == MAME_PHASE_INIT, "Can only call soundlatch_setclearedvalue at init time!");
 	latch_clear_value = value;
 }

src/emu/audit.c

@@ -131,7 +131,7 @@ int audit_samples(core_options *options, const game_driver *gamedrv, audit_recor
 	for (sndnum = 0; sndnum < ARRAY_LENGTH(config.sound); sndnum++)
 		if (config.sound[sndnum].type == SOUND_SAMPLES)
 		{
-			struct Samplesinterface *intf = (struct Samplesinterface *)config.sound[sndnum].config;
+			const struct Samplesinterface *intf = (const struct Samplesinterface *)config.sound[sndnum].config;
 
 			if (intf->samplenames != NULL)
 			{
@@ -156,7 +156,7 @@ int audit_samples(core_options *options, const game_driver *gamedrv, audit_recor
 	for (sndnum = 0; sndnum < ARRAY_LENGTH(config.sound); sndnum++)
 		if (config.sound[sndnum].type == SOUND_SAMPLES)
 		{
-			struct Samplesinterface *intf = (struct Samplesinterface *)config.sound[sndnum].config;
+			const struct Samplesinterface *intf = (const struct Samplesinterface *)config.sound[sndnum].config;
 			const char *sharedname = NULL;
 
 			if (intf->samplenames != NULL)

src/emu/clifront.c

@@ -566,7 +566,7 @@ int cli_info_listsamples(core_options *options, const char *gamename)
 			for (sndnum = 0; sndnum < MAX_SOUND && drv.sound[sndnum].type != SOUND_DUMMY; sndnum++)
 				if (drv.sound[sndnum].type == SOUND_SAMPLES)
 				{
-					const char **samplenames = ((struct Samplesinterface *)drv.sound[sndnum].config)->samplenames;
+					const char *const *samplenames = ((const struct Samplesinterface *)drv.sound[sndnum].config)->samplenames;
 					int sampnum;
 
 					/* if the list is legit, walk it and print the sample info */

src/emu/cpu/adsp2100/2100dasm.c

@@ -1,29 +1,29 @@
 #include "adsp2100.h"
 
-static const char *flag_change[] = { "", "TOGGLE %s ", "RESET %s ", "SET %s " };
+static const char *const flag_change[] = { "", "TOGGLE %s ", "RESET %s ", "SET %s " };
-static const char *mode_change[] = { "", "", "DIS %s ", "ENA %s " };
+static const char *const mode_change[] = { "", "", "DIS %s ", "ENA %s " };
 
-static const char *alu_xop[] = { "AX0", "AX1", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
+static const char *const alu_xop[] = { "AX0", "AX1", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
-static const char *alu_yop[] = { "AY0", "AY1", "AF", "0" };
+static const char *const alu_yop[] = { "AY0", "AY1", "AF", "0" };
-static const char *alu_dst[] = { "AR", "AF", "NONE" };
+static const char *const alu_dst[] = { "AR", "AF", "NONE" };
 
-static const char *mac_xop[] = { "MX0", "MX1", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
+static const char *const mac_xop[] = { "MX0", "MX1", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
-static const char *mac_yop[] = { "MY0", "MY1", "MF", "0" };
+static const char *const mac_yop[] = { "MY0", "MY1", "MF", "0" };
-static const char *mac_dst[] = { "MR", "MF" };
+static const char *const mac_dst[] = { "MR", "MF" };
 
-static const char *shift_xop[] = { "SI", "??", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
+static const char *const shift_xop[] = { "SI", "??", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" };
 
-static const char *reg_grp[][16] =
+static const char *const reg_grp[][16] =
 {
 	{ "AX0", "AX1", "MX0", "MX1", "AY0", "AY1", "MY0", "MY1", "SI", "SE", "AR", "MR0", "MR1", "MR2", "SR0", "SR1" },
 	{ "I0", "I1", "I2", "I3", "M0", "M1", "M2", "M3", "L0", "L1", "L2", "L3", "??", "??", "??", "??" },
 	{ "I4", "I5", "I6", "I7", "M4", "M5", "M6", "M7", "L4", "L5", "L6", "L7", "??", "??", "??", "??" },
 	{ "ASTAT", "MSTAT", "SSTAT", "IMASK", "ICNTL", "CNTR", "SB", "PX", "RX0", "TX0", "RX1", "TX1", "IFC", "OWRCNTR", "??", "??" }
 };
-static const char *dual_xreg[] = { "AX0", "AX1", "MX0", "MX1" };
+static const char *const dual_xreg[] = { "AX0", "AX1", "MX0", "MX1" };
-static const char *dual_yreg[] = { "AY0", "AY1", "MY0", "MY1" };
+static const char *const dual_yreg[] = { "AY0", "AY1", "MY0", "MY1" };
 
-static const char *condition[] =
+static const char *const condition[] =
 {
 	"IF EQ ",
 	"IF NE ",
@@ -43,7 +43,7 @@ static const char *condition[] =
 	""
 };
 
-static const char *do_condition[] =
+static const char *const do_condition[] =
 {
 	"NE",
 	"EQ",
@@ -63,7 +63,7 @@ static const char *do_condition[] =
 	"FOREVER"
 };
 
-static const char *alumac_op[][2] =
+static const char *const alumac_op[][2] =
 {
 	{ "",                            "" },
 	{ "%s = %s * %s (RND)",          "%s = %s * %s (RND)" },
@@ -100,7 +100,7 @@ static const char *alumac_op[][2] =
 	{ "%s = ABS %s",                 "%s = ABS %s" }
 };
 
-static const char *shift_op[] =
+static const char *const shift_op[] =
 {
 	"SR = LSHIFT %s (HI)",
 	"SR = SR OR LSHIFT %s (HI)",
@@ -120,7 +120,7 @@ static const char *shift_op[] =
 	"SB = EXPADJ %s",
 };
 
-static const char *shift_by_op[] =
+static const char *const shift_by_op[] =
 {
 	"SR = LSHIFT %s BY %d (HI)",
 	"SR = SR OR LSHIFT %s BY %d (HI)",
@@ -140,7 +140,7 @@ static const char *shift_by_op[] =
 	"???"
 };
 
-static const char *constants[] =
+static const char *const constants[] =
 {
 	"$0001",
 	"$FFFE",

src/emu/cpu/adsp2100/2100ops.c

@@ -501,7 +501,7 @@ static INT32 rd_stacktop(void)	{ return pc_stack_pop_val(); }
 
 #define READ_REG(grp,reg) ((*rd_reg[grp][reg])())
 
-static INT32 (*rd_reg[4][16])(void) =
+static INT32 (*const rd_reg[4][16])(void) =
 {
 	{
 		rd_ax0, rd_ax1, rd_mx0, rd_mx1, rd_ay0, rd_ay1, rd_my0, rd_my1,

src/emu/cpu/alph8201/8201dasm.c

@@ -15,7 +15,7 @@ typedef unsigned char byte;
 #define FMT(a,b) a, b
 #define PTRS_PER_FORMAT 2
 
-static const char *Formats[] = {
+static const char *const Formats[] = {
 	FMT("0000_0000", "NOP"),			// 00
 	FMT("0000_0001", "RRCA"),			// 01
 	FMT("0000_0010", "RLCA"),			// 02

src/emu/cpu/arm/armdasm.c

@@ -22,7 +22,7 @@ static char *WriteImmediateOperand( char *pBuf, UINT32 opcode )
 static char *WriteDataProcessingOperand( char *pBuf, UINT32 opcode, int printOp0, int printOp1, int printOp2 )
 {
 	/* ccccctttmmmm */
-	static const char *pRegOp[4] = { "LSL","LSR","ASR","ROR" };
+	static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
 
 	if (printOp0)
 		pBuf += sprintf(pBuf,"R%d, ", (opcode>>12)&0xf);
@@ -55,7 +55,7 @@ static char *WriteDataProcessingOperand( char *pBuf, UINT32 opcode, int printOp0
 static char *WriteRegisterOperand1( char *pBuf, UINT32 opcode )
 {
 	/* ccccctttmmmm */
-	static const char *pRegOp[4] = { "LSL","LSR","ASR","ROR" };
+	static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
 
 	pBuf += sprintf(
 		pBuf,
@@ -103,14 +103,14 @@ UINT32 arm_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
 {
 	const char *pBuf0;
 
-	static const char *pConditionCodeTable[16] =
+	static const char *const pConditionCodeTable[16] =
 	{
 		"EQ","NE","CS","CC",
 		"MI","PL","VS","VC",
 		"HI","LS","GE","LT",
 		"GT","LE","","NV"
 	};
-	static const char *pOperation[16] =
+	static const char *const pOperation[16] =
 	{
 		"AND","EOR","SUB","RSB",
 		"ADD","ADC","SBC","RSC",

src/emu/cpu/arm7/arm7dasm.c

@@ -119,7 +119,7 @@ static char *WriteImmediateOperand( char *pBuf, UINT32 opcode )
 static char *WriteDataProcessingOperand( char *pBuf, UINT32 opcode, int printOp0, int printOp1, int printOp2 )
 {
 	/* ccccctttmmmm */
-	static const char *pRegOp[4] = { "LSL","LSR","ASR","ROR" };
+	static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
 
 	if (printOp0)
 		pBuf += sprintf(pBuf,"R%d, ", (opcode>>12)&0xf);
@@ -158,7 +158,7 @@ static char *WriteDataProcessingOperand( char *pBuf, UINT32 opcode, int printOp0
 static char *WriteRegisterOperand1( char *pBuf, UINT32 opcode )
 {
 	/* ccccctttmmmm */
-	static const char *pRegOp[4] = { "LSL","LSR","ASR","ROR" };
+	static const char *const pRegOp[4] = { "LSL","LSR","ASR","ROR" };
 
 	pBuf += sprintf(
 		pBuf,
@@ -202,14 +202,14 @@ UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
 {
 	const char *pBuf0;
 
-	static const char *pConditionCodeTable[16] =
+	static const char *const pConditionCodeTable[16] =
 	{
 		"EQ","NE","CS","CC",
 		"MI","PL","VS","VC",
 		"HI","LS","GE","LT",
 		"GT","LE","","NV"
 	};
-	static const char *pOperation[16] =
+	static const char *const pOperation[16] =
 	{
 		"AND","EOR","SUB","RSB",
 		"ADD","ADC","SBC","RSC",

src/emu/cpu/asap/asapdasm.c

@@ -9,7 +9,7 @@
 #include "asap.h"
 
 
-static const char *reg[32] =
+static const char *const reg[32] =
 {
 	"0",	"r1",	"r2",	"r3",	"r4",	"r5",	"r6",	"r7",
 	"r8",	"r9",	"r10",	"r11",	"r12",	"r13",	"r14",	"r15",
@@ -17,12 +17,12 @@ static const char *reg[32] =
 	"r24",	"r25",	"r26",	"r27",	"r28",	"r29",	"r30",	"r31"
 };
 
-static const char *setcond[2] =
+static const char *const setcond[2] =
 {
 	"  ", ".c"
 };
 
-static const char *condition[16] =
+static const char *const condition[16] =
 {
 	"sp", "mz", "gt", "le", "ge", "lt", "hi", "ls", "cc", "cs", "pl", "mi", "ne", "eq", "vc", "vs"
 };

src/emu/cpu/cop400/cop410.c

@@ -53,7 +53,7 @@ static int LBIops[256];
 
 #include "410ops.c"
 
-static s_opcode cop410_opcode_op33[256]=
+static const s_opcode cop410_opcode_op33[256]=
 {
 	{1, illegal 	},{1, skgbz0	},{1, illegal   },{1, skgbz2	},{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},
 	{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},
@@ -94,7 +94,7 @@ static void cop410_op33(void)
 	(*(cop410_opcode_op33[ROM(PC++)].function))();
 }
 
-static s_opcode cop410_opcode_main[256]=
+static const s_opcode cop410_opcode_main[256]=
 {
 	{1, clra		},{1, skmbz0	},{1, xor		},{1, skmbz2		},{1, xis0		},{1, ld0		},{1, x0		},{1, xds0		},
 	{1, lbi0_9		},{1, lbi0_10	},{1, lbi0_11	},{1, lbi0_12		},{1, lbi0_13	},{1, lbi0_14	},{1, lbi0_15	},{1, lbi0_0	},

src/emu/cpu/cop400/cop420.c

@@ -57,7 +57,7 @@ static int LBIops33[256];
 
 #include "420ops.c"
 
-static s_opcode cop420_opcode_op33[256]=
+static const s_opcode cop420_opcode_op33[256]=
 {
 	{1, inil 		},{1, skgbz0 	},{1, illegal 	},{1, skgbz2 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},
 	{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},{1, illegal 	},
@@ -98,7 +98,7 @@ static void cop420_op33(void)
 	(*(cop420_opcode_op33[ROM(PC++)].function))();
 }
 
-static s_opcode cop420_opcode_main[256]=
+static const s_opcode cop420_opcode_main[256]=
 {
 	{1, clra		},{1, skmbz0	},{1, xor		},{1, skmbz2		},{1, xis0		},{1, ld0		},{1, x0		},{1, xds0		},
 	{1, lbi0_9		},{1, lbi0_10	},{1, lbi0_11	},{1, lbi0_12		},{1, lbi0_13	},{1, lbi0_14	},{1, lbi0_15	},{1, lbi0_0	},

src/emu/cpu/cpu.mak

@@ -1085,9 +1085,10 @@ CPUDEFS += -DHAS_PPC403=$(if $(filter PPC403,$(CPUS)),1,0)
 CPUDEFS += -DHAS_PPC601=$(if $(filter PPC601,$(CPUS)),1,0)
 CPUDEFS += -DHAS_PPC602=$(if $(filter PPC602,$(CPUS)),1,0)
 CPUDEFS += -DHAS_PPC603=$(if $(filter PPC603,$(CPUS)),1,0)
+CPUDEFS += -DHAS_PPC604=$(if $(filter PPC604,$(CPUS)),1,0)
 CPUDEFS += -DHAS_MPC8240=$(if $(filter MPC8240,$(CPUS)),1,0)
 
-ifneq ($(filter PPC403 PPC601 PPC602 PPC603 MPC8240,$(CPUS)),)
+ifneq ($(filter PPC403 PPC601 PPC602 PPC603 PPC604 MPC8240,$(CPUS)),)
 OBJDIRS += $(CPUOBJ)/powerpc
 DBGOBJS += $(CPUOBJ)/powerpc/ppc_dasm.o
 

src/emu/cpu/dsp32/dsp32.c

@@ -458,7 +458,7 @@ INLINE dsp32_regs *FINDCONTEXT(int cpu)
 	return context;
 }
 
-static UINT32 regmap[4][16] =
+static const UINT32 regmap[4][16] =
 {
 	{	/* DSP32 compatible mode */
 		PIO_PAR|LOWER, PIO_PAR|UPPER, PIO_PDR|LOWER, PIO_PDR|UPPER,

src/emu/cpu/dsp32/dsp32dis.c

@@ -22,17 +22,17 @@
     CODE CODE
 ***************************************************************************/
 
-static const char *sizesuffix[] = { "", "e" };
+static const char *const sizesuffix[] = { "", "e" };
-static const char *unarysign[] = { "", "-" };
+static const char *const unarysign[] = { "", "-" };
-static const char *sign[] = { "+", "-" };
+static const char *const sign[] = { "+", "-" };
-static const char *aMvals[] = { "a0", "a1", "a2", "a3", "0.0", "1.0", "Format 4", "Reserved" };
+static const char *const aMvals[] = { "a0", "a1", "a2", "a3", "0.0", "1.0", "Format 4", "Reserved" };
-static const char *memsuffix[] = { "h", "l", "", "e" };
+static const char *const memsuffix[] = { "h", "l", "", "e" };
-static const char *functable[] =
+static const char *const functable[] =
 {
 	"ic", "oc", "float", "int", "round", "ifalt", "ifaeq", "ifagt",
 	"reserved8", "reserved9", "float24", "int24", "ieee", "dsp", "seed", "reservedf"
 };
-static const char *condtable[] =
+static const char *const condtable[] =
 {
 	"false", "true",
 	"pl", "mi",
@@ -67,14 +67,14 @@ static const char *condtable[] =
 	"!?1e", "?1e",
 	"!?1f", "?1f"
 };
-static const char *regname[] =
+static const char *const regname[] =
 {
 	"0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
 	"r8", "r9", "r10", "r11", "r12", "r13", "r14", "pc",
 	"0", "r15", "r16", "r17", "r18", "r19", "-1", "1",
 	"r20", "r21", "dauc", "ioc", "res1c", "r22", "pcsh", "res1f"
 };
-static const char *regnamee[] =
+static const char *const regnamee[] =
 {
 	"0", "r1e", "r2e", "r3e", "r4e", "r5e", "r6e", "r7e",
 	"r8e", "r9e", "r10e", "r11e", "r12e", "r13e", "r14e", "pce",

src/emu/cpu/dsp32/dsp32ops.c

@@ -96,7 +96,7 @@
     FORWARD DECLARATIONS
 ***************************************************************************/
 
-extern void (*dsp32ops[])(void);
+extern void (*const dsp32ops[])(void);
 
 
 
@@ -2534,7 +2534,7 @@ static void d5_seed(void)
     FUNCTION TABLE
 ***************************************************************************/
 
-void (*dsp32ops[])(void) =
+void (*const dsp32ops[])(void) =
 {
 	nop,		goto_t,		goto_pl,	goto_mi,	goto_ne,	goto_eq,	goto_vc,	goto_vs,	/* 00 */
 	goto_cc,	goto_cs,	goto_ge,	goto_lt,	goto_gt,	goto_le,	goto_hi,	goto_ls,

src/emu/cpu/e132xs/32xsdasm.c

@@ -9,7 +9,7 @@
 #include "debugger.h"
 #include "e132xs.h"
 
-static const char *L_REG[] =
+static const char *const L_REG[] =
 {
   "L0",  "L1",  "L2",  "L3",  "L4",  "L5",  "L6",  "L7",  "L8",  "L9",
   "L10", "L11", "L12", "L13", "L14", "L15", "L16", "L17", "L18", "L19",
@@ -20,7 +20,7 @@ static const char *L_REG[] =
   "L60", "L61", "L62", "L63"
 };
 
-static const char *G_REG[] =
+static const char *const G_REG[] =
 {
   "PC",  "SR",  "FER", "G03", "G04", "G05", "G06", "G07", "G08", "G09",
   "G10", "G11", "G12", "G13", "G14", "G15", "G16", "G17", "SP",  "UB",
@@ -28,7 +28,7 @@ static const char *G_REG[] =
   "G30", "G31"
 };
 
-static const char *SETxx[] =
+static const char *const SETxx[] =
 {
   "SETADR",   "Reserved", "SET1",   "SET0",     "SETLE",  "SETGT",  "SETLT",  "SETGE",
   "SETSE",    "SETHT",    "SETST",  "SETHE",    "SETE",   "SETNE",  "SETV",   "SETNV",

src/emu/cpu/e132xs/e132xsop.c

@@ -1842,7 +1842,7 @@ static void hyperstone_opff(UINT16 opcode)
 }
 
 
-static void (*hyperstone_op[0x100])(UINT16 opcode) =
+static void (*const hyperstone_op[0x100])(UINT16 opcode) =
 {
 	hyperstone_op00, hyperstone_op01, hyperstone_op02, hyperstone_op03,
 	hyperstone_op04, hyperstone_op05, hyperstone_op06, hyperstone_op07,

src/emu/cpu/f8/f8dasm.c

@@ -2,7 +2,7 @@
 #include "debugger.h"
 #include "f8.h"
 
-static const char *rname[16] = {
+static const char *const rname[16] = {
 	"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
 	"R8", "J",  "HU", "HL", "KU", "KL", "QU", "QL"
 };

src/emu/cpu/g65816/g65816.c

@@ -102,37 +102,37 @@ static int g65816_readop(UINT32 offset, int size, UINT64 *value)
 	return 1;
 }
 
-extern void (*g65816i_opcodes_M0X0[])(void);
+extern void (*const g65816i_opcodes_M0X0[])(void);
 extern uint g65816i_get_reg_M0X0(int regnum);
 extern void g65816i_set_reg_M0X0(int regnum, uint val);
 extern void g65816i_set_line_M0X0(int line, int state);
 extern int  g65816i_execute_M0X0(int cycles);
 
-extern void (*g65816i_opcodes_M0X1[])(void);
+extern void (*const g65816i_opcodes_M0X1[])(void);
 extern uint g65816i_get_reg_M0X1(int regnum);
 extern void g65816i_set_reg_M0X1(int regnum, uint val);
 extern void g65816i_set_line_M0X1(int line, int state);
 extern int  g65816i_execute_M0X1(int cycles);
 
-extern void (*g65816i_opcodes_M1X0[])(void);
+extern void (*const g65816i_opcodes_M1X0[])(void);
 extern uint g65816i_get_reg_M1X0(int regnum);
 extern void g65816i_set_reg_M1X0(int regnum, uint val);
 extern void g65816i_set_line_M1X0(int line, int state);
 extern int  g65816i_execute_M1X0(int cycles);
 
-extern void (*g65816i_opcodes_M1X1[])(void);
+extern void (*const g65816i_opcodes_M1X1[])(void);
 extern uint g65816i_get_reg_M1X1(int regnum);
 extern void g65816i_set_reg_M1X1(int regnum, uint val);
 extern void g65816i_set_line_M1X1(int line, int state);
 extern int  g65816i_execute_M1X1(int cycles);
 
-extern void (*g65816i_opcodes_E[])(void);
+extern void (*const g65816i_opcodes_E[])(void);
 extern uint g65816i_get_reg_E(int regnum);
 extern void g65816i_set_reg_E(int regnum, uint val);
 extern void g65816i_set_line_E(int line, int state);
 extern int  g65816i_execute_E(int cycles);
 
-void (**g65816i_opcodes[5])(void) =
+void (*const *const g65816i_opcodes[5])(void) =
 {
 	g65816i_opcodes_M0X0,
 	g65816i_opcodes_M0X1,
@@ -141,7 +141,7 @@ void (**g65816i_opcodes[5])(void) =
 	g65816i_opcodes_E
 };
 
-uint (*g65816i_get_reg[5])(int regnum) =
+uint (*const g65816i_get_reg[5])(int regnum) =
 {
 	g65816i_get_reg_M0X0,
 	g65816i_get_reg_M0X1,
@@ -150,7 +150,7 @@ uint (*g65816i_get_reg[5])(int regnum) =
 	g65816i_get_reg_E
 };
 
-void (*g65816i_set_reg[5])(int regnum, uint val) =
+void (*const g65816i_set_reg[5])(int regnum, uint val) =
 {
 	g65816i_set_reg_M0X0,
 	g65816i_set_reg_M0X1,
@@ -159,7 +159,7 @@ void (*g65816i_set_reg[5])(int regnum, uint val) =
 	g65816i_set_reg_E
 };
 
-void (*g65816i_set_line[5])(int line, int state) =
+void (*const g65816i_set_line[5])(int line, int state) =
 {
 	g65816i_set_line_M0X0,
 	g65816i_set_line_M0X1,
@@ -168,7 +168,7 @@ void (*g65816i_set_line[5])(int line, int state) =
 	g65816i_set_line_E
 };
 
-int (*g65816i_execute[5])(int cycles) =
+int (*const g65816i_execute[5])(int cycles) =
 {
 	g65816i_execute_M0X0,
 	g65816i_execute_M0X1,

src/emu/cpu/g65816/g65816cm.h

@@ -89,7 +89,7 @@ typedef struct
 	int (*int_ack)(int); /* Interrupt Acknowledge */
 	read8_handler read_vector;	/* Read vector override */
 	uint stopped;		/* Sets how the CPU is stopped */
-	void (**opcodes)(void);
+	void (*const *opcodes)(void);
 	uint (*get_reg)(int regnum);
 	void (*set_reg)(int regnum, uint val);
 	void (*set_line)(int line, int state);
@@ -101,11 +101,11 @@ extern int g65816_ICount;
 extern uint g65816i_source;
 extern uint g65816i_destination;
 
-extern void (**g65816i_opcodes[])(void);
+extern void (*const *const g65816i_opcodes[])(void);
-extern uint (*g65816i_get_reg[])(int regnum);
+extern uint (*const g65816i_get_reg[])(int regnum);
-extern void (*g65816i_set_reg[])(int regnum, uint val);
+extern void (*const g65816i_set_reg[])(int regnum, uint val);
-extern void (*g65816i_set_line[])(int line, int state);
+extern void (*const g65816i_set_line[])(int line, int state);
-extern int (*g65816i_execute[])(int cycles);
+extern int (*const g65816i_execute[])(int cycles);
 
 #define REGISTER_A		g65816i_cpu.a		/* Accumulator */
 #define REGISTER_B		g65816i_cpu.b		/* Accumulator hi byte */

src/emu/cpu/g65816/g65816ds.c

@@ -63,7 +63,7 @@ enum
   TYA ,  TYX ,  WAI ,  WDM ,  XBA ,  XCE
 };
 
-static const char* g_opnames[] =
+static const char *const g_opnames[] =
 {
  "ADC", "AND", "ASL", "BCC", "BCS", "BEQ", "BIT", "BMI", "BNE", "BPL", "BRA",
  "BRK", "BRL", "BVC", "BVS", "CLC", "CLD", "CLI", "CLV", "CMP", "COP", "CPX",

src/emu/cpu/g65816/g65816op.h

@@ -1954,7 +1954,7 @@ INLINE uint EA_SIY(void)   {return MAKE_UINT_16(read_16_SIY(REGISTER_S + OPER_8_
 #if FLAG_SET_E
 #define OP(CODE, OPERATION) static void g65816i_ ## CODE ## _E(void) {OPERATION;}
 #define O(CODE) g65816i_ ## CODE ## _E
-#define TABLE_OPCODES void (*g65816i_opcodes_E[256])(void)
+#define TABLE_OPCODES void (*const g65816i_opcodes_E[256])(void)
 #define TABLE_FUNCTION(RTYPE, NAME, ARGS)	RTYPE g65816i_ ## NAME ## _E ARGS
 
 #else
@@ -1962,28 +1962,28 @@ INLINE uint EA_SIY(void)   {return MAKE_UINT_16(read_16_SIY(REGISTER_S + OPER_8_
 #if !FLAG_SET_M && !FLAG_SET_X
 #define OP(CODE, OPERATION) static void g65816i_ ## CODE ## _M0X0(void) {OPERATION;}
 #define O(CODE) g65816i_ ## CODE ## _M0X0
-#define TABLE_OPCODES void (*g65816i_opcodes_M0X0[256])(void)
+#define TABLE_OPCODES void (*const g65816i_opcodes_M0X0[256])(void)
 #define TABLE_FUNCTION(RTYPE, NAME, ARGS)	RTYPE g65816i_ ## NAME ## _M0X0 ARGS
 
 #elif !FLAG_SET_M && FLAG_SET_X
 
 #define OP(CODE, OPERATION) static void g65816i_ ## CODE ## _M0X1(void) {OPERATION;}
 #define O(CODE) g65816i_ ## CODE ## _M0X1
-#define TABLE_OPCODES void (*g65816i_opcodes_M0X1[256])(void)
+#define TABLE_OPCODES void (*const g65816i_opcodes_M0X1[256])(void)
 #define TABLE_FUNCTION(RTYPE, NAME, ARGS)	RTYPE g65816i_ ## NAME ## _M0X1 ARGS
 
 #elif FLAG_SET_M && !FLAG_SET_X
 
 #define OP(CODE, OPERATION) static void g65816i_ ## CODE ## _M1X0(void) {OPERATION;}
 #define O(CODE) g65816i_ ## CODE ## _M1X0
-#define TABLE_OPCODES void (*g65816i_opcodes_M1X0[256])(void)
+#define TABLE_OPCODES void (*const g65816i_opcodes_M1X0[256])(void)
 #define TABLE_FUNCTION(RTYPE, NAME, ARGS)	RTYPE g65816i_ ## NAME ## _M1X0 ARGS
 
 #elif FLAG_SET_M && FLAG_SET_X
 
 #define OP(CODE, OPERATION) static void g65816i_ ## CODE ## _M1X1(void) {OPERATION;}
 #define O(CODE) g65816i_ ## CODE ## _M1X1
-#define TABLE_OPCODES void (*g65816i_opcodes_M1X1[256])(void)
+#define TABLE_OPCODES void (*const g65816i_opcodes_M1X1[256])(void)
 #define TABLE_FUNCTION(RTYPE, NAME, ARGS)	RTYPE g65816i_ ## NAME ## _M1X1 ARGS
 
 #endif

src/emu/cpu/h6280/6280dasm.c

@@ -76,7 +76,7 @@ enum opcodes {
 };
 
 
-static const char *token[]=
+static const char *const token[]=
 {
 	/* 6502 opcodes */
 	"adc", "and", "asl", "bcc", "bcs", "beq", "bit", "bmi",

src/emu/cpu/h6280/h6280.c

@@ -213,6 +213,7 @@ static void h6280_reset(void)
 
 	/* timer off by default */
 	h6280.timer_status=0;
+	h6280.timer_load = 128 * 1024;
 
     /* clear pending interrupts */
 	for (i = 0; i < 3; i++)

src/emu/cpu/h83002/h8disasm.c

@@ -11,13 +11,13 @@
 #include "debugger.h"
 #include "h83002.h"
 
-static const char *bit_instr[8] = {"bset", "bnot", "bclr", "btst", "bor", "bxor", "band", "bld"};
+static const char *const bit_instr[8] = {"bset", "bnot", "bclr", "btst", "bor", "bxor", "band", "bld"};
-static const char *bit_instr2[8] = {"bset", "bnot", "bclr", "btst", "bior", "bixor", "biand", "bild"};
+static const char *const bit_instr2[8] = {"bset", "bnot", "bclr", "btst", "bior", "bixor", "biand", "bild"};
-static const char *imm32l_instr[8] = {"mov", "add", "cmp", "sub", "or", "xor", "and", "?"};
+static const char *const imm32l_instr[8] = {"mov", "add", "cmp", "sub", "or", "xor", "and", "?"};
-static const char *branch_instr[16] = {"bt", "bf", "bhi", "bls", "bcc", "bcs", "bne", "beq", "bvc", "bvs", "bpl", "bmi", "bge", "blt", "bgt", "ble"};
+static const char *const branch_instr[16] = {"bt", "bf", "bhi", "bls", "bcc", "bcs", "bne", "beq", "bvc", "bvs", "bpl", "bmi", "bge", "blt", "bgt", "ble"};
-static const char *reg_names32[8] = {"ER0", "ER1", "ER2", "ER3", "ER4", "ER5", "ER6", "SP"};
+static const char *const reg_names32[8] = {"ER0", "ER1", "ER2", "ER3", "ER4", "ER5", "ER6", "SP"};
-static const char *reg_names16[16] = {"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "E0", "E1", "E2", "E3", "E4", "E5", "E6", "E7"};
+static const char *const reg_names16[16] = {"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "E0", "E1", "E2", "E3", "E4", "E5", "E6", "E7"};
-static const char *reg_names8[16] = {"R0H", "R1H", "R2H", "R3H", "R4H", "R5H", "R6H", "R7H","R0L", "R1L", "R2L", "R3L", "R4L", "R5L", "R6L", "R7L"};
+static const char *const reg_names8[16] = {"R0H", "R1H", "R2H", "R3H", "R4H", "R5H", "R6H", "R7H","R0L", "R1L", "R2L", "R3L", "R4L", "R5L", "R6L", "R7L"};
 
 static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom);
 static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom);

src/emu/cpu/hd6309/6309dasm.c

@@ -586,22 +586,22 @@ static const int hd6309_numops[3] =
 	sizeof(hd6309_pg2opcodes) / sizeof(hd6309_pg2opcodes[0])
 };
 
-static const char *hd6309_regs[5] = { "X", "Y", "U", "S", "PC" };
+static const char *const hd6309_regs[5] = { "X", "Y", "U", "S", "PC" };
 
-static const char *hd6309_btwregs[5] = { "CC", "A", "B", "inv" };
+static const char *const hd6309_btwregs[5] = { "CC", "A", "B", "inv" };
 
-static const char *hd6309_teregs[16] =
+static const char *const hd6309_teregs[16] =
 {
 	"D", "X",  "Y",  "U", "S", "PC", "W", "V",
 	"A", "B", "CC", "DP", "0",  "0", "E", "F"
 };
 
-static const char *hd6309_tfmregs[16] = {
+static const char *const hd6309_tfmregs[16] = {
 	  "D",   "X",   "Y",   "U",   "S", "inv", "inv", "inv",
 	"inv", "inv", "inv", "inv", "inv", "inv", "inv", "inv"
 };
 
-static const char *tfm_s[] = { "%s+,%s+", "%s-,%s-", "%s+,%s", "%s,%s+" };
+static const char *const tfm_s[] = { "%s+,%s+", "%s-,%s-", "%s+,%s", "%s,%s+" };
 
 offs_t hd6309_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
 {

src/emu/cpu/hd6309/6309tbl.c

@@ -439,7 +439,7 @@ INLINE void sts_ex( void );
 INLINE void pref10( void );
 INLINE void pref11( void );
 
-static UINT8 flags8i[256]=	 /* increment */
+static const UINT8 flags8i[256]=	 /* increment */
 {
 CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -458,7 +458,7 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
 };
-static UINT8 flags8d[256]= /* decrement */
+static const UINT8 flags8d[256]= /* decrement */
 {
 CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -478,7 +478,7 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
 };
 
-static UINT8 index_cycle_em[256] = {        /* Index Loopup cycle counts, emulated 6809 */
+static const UINT8 index_cycle_em[256] = {        /* Index Loopup cycle counts, emulated 6809 */
 /*           0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7, 0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
 
 /* 0x0X */      1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,    1,
@@ -499,7 +499,7 @@ static UINT8 index_cycle_em[256] = {        /* Index Loopup cycle counts, emulat
 /* 0xFX */      4,    6,   20,    6,    3,    4,    4,    4,    4,    7,    4,    7,    4,    8,    7,   20
 };
 
-static UINT8 index_cycle_na[256] = {         /* Index Loopup cycle counts,
+static const UINT8 index_cycle_na[256] = {         /* Index Loopup cycle counts,
 native 6309 */
 /*       X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, XA, XB, XC, XD, XE, XF */
 
@@ -524,7 +524,7 @@ native 6309 */
 #define IIP0	19			/* Illegal instruction cycle count page 0 */
 #define IIP1	20			/* Illegal instruction cycle count page 01 & 11 */
 
-static UINT8 ccounts_page0_em[256] =    /* Cycle Counts Page zero, Emulated 6809 */
+static const UINT8 ccounts_page0_em[256] =    /* Cycle Counts Page zero, Emulated 6809 */
 {
 /*           0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7, 0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
 /* 0x0X */     6,    6,    6,    6,    6,    6,    6,    6,    6,    6,    6,    6,    6,    6,    3,    6,
@@ -545,7 +545,7 @@ static UINT8 ccounts_page0_em[256] =    /* Cycle Counts Page zero, Emulated 6809
 /* 0xFX */     5,    5,    5,    7,    5,    5,    5,    5,    5,    5,    5,    5,    6,    6,    6,    6
 };
 
-static UINT8 ccounts_page0_na[256] =   /* Cycle Counts Page zero, Native 6309 */
+static const UINT8 ccounts_page0_na[256] =   /* Cycle Counts Page zero, Native 6309 */
 {
 /*           0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7, 0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
 /* 0x0X */     5,    6,    6,    5,    5,    6,    5,    5,    5,    5,    5,    6,    5,    4,    2,    5,
@@ -566,7 +566,7 @@ static UINT8 ccounts_page0_na[256] =   /* Cycle Counts Page zero, Native 6309 */
 /* 0xFX */     4,    4,    4,    5,    4,    4,    4,    4,    4,    4,    4,    4,    5,    5,    5,    5
 };
 
-static UINT8 ccounts_page01_em[256] =    /* Cycle Counts Page 01, Emulated 6809 */
+static const UINT8 ccounts_page01_em[256] =    /* Cycle Counts Page 01, Emulated 6809 */
 {
 /*           0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7, 0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
 /* 0x0X */   IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1,
@@ -587,7 +587,7 @@ static UINT8 ccounts_page01_em[256] =    /* Cycle Counts Page 01, Emulated 6809
 /* 0xFX */   IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1,    9,    9,    7,    7
 };
 
-static UINT8 ccounts_page01_na[256] =   /* Cycle Counts Page 01, Native 6309 */
+static const UINT8 ccounts_page01_na[256] =   /* Cycle Counts Page 01, Native 6309 */
 {
 /*           0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7, 0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
 /* 0x0X */   IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1,
@@ -608,7 +608,7 @@ static UINT8 ccounts_page01_na[256] =   /* Cycle Counts Page 01, Native 6309 */
 /* 0xFX */   IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1,    8,    8,    6,    6
 };
 
-static UINT8 ccounts_page11_em[256] =    /* Cycle Counts Page 11, Emulated 6809 */
+static const UINT8 ccounts_page11_em[256] =    /* Cycle Counts Page 11, Emulated 6809 */
 {
 /*           0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7, 0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
 /* 0x0X */   IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1,
@@ -629,7 +629,7 @@ static UINT8 ccounts_page11_em[256] =    /* Cycle Counts Page 11, Emulated 6809
 /* 0xFX */      6,    6, IIP1, IIP1, IIP1, IIP1,    6,    6, IIP1, IIP1, IIP1,    6, IIP1, IIP1, IIP1, IIP1
 };
 
-static UINT8 ccounts_page11_na[256] =    /* Cycle Counts Page 11, Native 6309 */
+static const UINT8 ccounts_page11_na[256] =    /* Cycle Counts Page 11, Native 6309 */
 {
 /*           0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7, 0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
 /* 0x0X */   IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1, IIP1,
@@ -652,7 +652,7 @@ static UINT8 ccounts_page11_na[256] =    /* Cycle Counts Page 11, Native 6309 */
 
 #ifndef BIG_SWITCH
 
-static void (*hd6309_main[0x100])(void) = {
+static void (*const hd6309_main[0x100])(void) = {
 /*          0xX0,   0xX1,     0xX2,    0xX3,    0xX4,    0xX5,    0xX6,    0xX7,
             0xX8,   0xX9,     0xXA,    0xXB,    0xXC,    0xXD,    0xXE,    0xXF   */
 
@@ -705,7 +705,7 @@ static void (*hd6309_main[0x100])(void) = {
             eorb_ex, adcb_ex, orb_ex,  addb_ex, ldd_ex,  std_ex,  ldu_ex,  stu_ex
 };
 
-static void (*hd6309_page01[0x100])(void) = {
+static void (*const hd6309_page01[0x100])(void) = {
 /*          0xX0,   0xX1,     0xX2,    0xX3,    0xX4,    0xX5,    0xX6,    0xX7,
             0xX8,   0xX9,     0xXA,    0xXB,    0xXC,    0xXD,    0xXE,    0xXF   */
 
@@ -757,7 +757,7 @@ static void (*hd6309_page01[0x100])(void) = {
 /* 0xFX */  IIError, IIError, IIError, IIError, IIError, IIError, IIError, IIError,
 			IIError, IIError, IIError, IIError, ldq_ex,  stq_ex,  lds_ex,  sts_ex
 };
-static void (*hd6309_page11[0x100])(void) = {
+static void (*const hd6309_page11[0x100])(void) = {
 /*          0xX0,   0xX1,     0xX2,    0xX3,    0xX4,    0xX5,    0xX6,    0xX7,
             0xX8,   0xX9,     0xXA,    0xXB,    0xXC,    0xXD,    0xXE,    0xXF   */
 

src/emu/cpu/hd6309/hd6309.c

@@ -277,10 +277,10 @@ static int hd6309_ICount;
 #define SET_FLAGS8I(a)		{CC|=flags8i[(a)&0xff];}
 #define SET_FLAGS8D(a)		{CC|=flags8d[(a)&0xff];}
 
-static UINT8 *cycle_counts_page0;
+static UINT8 const *cycle_counts_page0;
-static UINT8 *cycle_counts_page01;
+static UINT8 const *cycle_counts_page01;
-static UINT8 *cycle_counts_page11;
+static UINT8 const *cycle_counts_page11;
-static UINT8 *index_cycle;
+static UINT8 const *index_cycle;
 
 /* combos */
 #define SET_NZ8(a)			{SET_N8(a);SET_Z(a);}

src/emu/cpu/i386/cycles.h

@@ -337,7 +337,7 @@ typedef struct
 	UINT8 cpu_cycles[X86_NUM_CPUS][2];
 } X86_CYCLE_TABLE;
 
-static X86_CYCLE_TABLE x86_cycle_table[] =
+static const X86_CYCLE_TABLE x86_cycle_table[] =
 {
 	// opcode                     rm/pmode
 	//                            i386         i486         pentium      mediagx

src/emu/cpu/i386/i386dasm.c

@@ -1079,16 +1079,16 @@ static const GROUP_OP group_op_table[] =
 
 
 
-static const char *i386_reg[3][16] =
+static const char *const i386_reg[3][16] =
 {
 	{"ax",  "cx",  "dx",  "bx",  "sp",  "bp",  "si",  "di",  "r8w", "r9w", "r10w","r11w","r12w","r13w","r14w","r15w"},
 	{"eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", "r8d", "r9d", "r10d","r11d","r12d","r13d","r14d","r15d"},
 	{"rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15"}
 };
 
-static const char *i386_reg8[8] = {"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh"};
+static const char *const i386_reg8[8] = {"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh"};
-static const char *i386_reg8rex[16] = {"al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"};
+static const char *const i386_reg8rex[16] = {"al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"};
-static const char *i386_sreg[8] = {"es", "cs", "ss", "ds", "fs", "gs", "???", "???"};
+static const char *const i386_sreg[8] = {"es", "cs", "ss", "ds", "fs", "gs", "???", "???"};
 
 static int address_size;
 static int operand_size;

src/emu/cpu/i8039/8039dasm.c

@@ -29,7 +29,7 @@ typedef unsigned char byte;
 #define FMT(a,b) a, b
 #define PTRS_PER_FORMAT 2
 
-static const char *Formats[] = {
+static const char *const Formats[] = {
 	FMT("00000011dddddddd", "add  a,#$%X"),
 	FMT("01101rrr", "add  a,%R"),
 	FMT("0110000r", "add  a,@%R"),
@@ -148,7 +148,8 @@ static int OpInizialized = 0;
 
 static void InitDasm8039(void)
 {
-	const char *p, **ops;
+	const char *p;
+	const char *const *ops;
 	byte mask, bits;
 	int bit;
 	int i;

src/emu/cpu/i8039/i8039.c

@@ -93,12 +93,12 @@ typedef struct
 	UINT16	A11;
 	UINT8	irq_state, irq_extra_cycles;
 	int		(*irq_callback)(int irqline);
+	UINT8	Old_T1;
 } I8039_Regs;
 
 static I8039_Regs R;
 static int	   i8039_ICount;
 static int    inst_cycles;
-static UINT8 Old_T1;
 
 /* The opcode table now is a combination of cycle counts and function pointers */
 typedef struct {
@@ -106,8 +106,8 @@ typedef struct {
 	void (*function) (void);
 }	s_opcode;
 
-#define POSITIVE_EDGE_T1  (( (int)(T1-Old_T1) > 0) ? 1 : 0)
+#define POSITIVE_EDGE_T1  (( (int)(T1-R.Old_T1) > 0) ? 1 : 0)
-#define NEGATIVE_EDGE_T1  (( (int)(Old_T1-T1) > 0) ? 1 : 0)
+#define NEGATIVE_EDGE_T1  (( (int)(R.Old_T1-T1) > 0) ? 1 : 0)
 
 #define M_Cy	((R.PSW & C_FLAG) >> 7)
 #define M_Cn	(!M_Cy)
@@ -462,7 +462,7 @@ static void sel_mb1(void)	 { R.A11 = 0x800; }
 static void sel_rb0(void)	 { CLR(B_FLAG); regPTR = 0;  }
 static void sel_rb1(void)	 { SET(B_FLAG); regPTR = 24; }
 static void stop_tcnt(void)	 { R.timerON = R.countON = 0; }
-static void strt_cnt(void)	 { R.countON = 1; R.timerON = 0; Old_T1 = test_r(1); }	/* NS990113 */
+static void strt_cnt(void)	 { R.countON = 1; R.timerON = 0; R.Old_T1 = test_r(1); }	/* NS990113 */
 static void strt_t(void)	 { R.timerON = 1; R.countON = 0; R.masterClock = 0; }	/* NS990113 */
 static void swap_a(void)	 { UINT8 i=R.A >> 4; R.A <<= 4; R.A |= i; }
 static void xch_a_r0(void)	 { UINT8 i=R.A; R.A=R0; R0=i; }
@@ -489,7 +489,7 @@ static void xrl_a_r7(void)	 { R.A ^= R7; }
 static void xrl_a_xr0(void)	 { R.A ^= intRAM[R0 & 0x7f]; }
 static void xrl_a_xr1(void)	 { R.A ^= intRAM[R1 & 0x7f]; }
 
-static s_opcode opcode_main[256]=
+static const s_opcode opcode_main[256]=
 {
 	{1, nop 	   },{0, illegal	},{2, outl_bus_a },{2, add_a_n	  },{2, jmp 	   },{1, en_i		},{0, illegal	 },{1, dec_a	  },
 	{2, ins_a_bus  },{2, in_a_p1	},{2, in_a_p2	 },{0, illegal	  },{2, movd_a_p4  },{2, movd_a_p5	},{2, movd_a_p6  },{2, movd_a_p7  },
@@ -558,6 +558,7 @@ static void i8039_init (int index, int clock, const void *config, int (*irqcallb
 	state_save_register_item("i8039", index, R.A11);
 	state_save_register_item("i8039", index, R.irq_state);
 	state_save_register_item("i8039", index, R.irq_extra_cycles);
+	state_save_register_item("i8039", index, R.Old_T1);
 }
 
 /****************************************************************************
@@ -690,7 +691,7 @@ static int i8039_execute(int cycles)
 						i8039_ICount -= count;
 					}
 				}
-				Old_T1 = T1;
+				R.Old_T1 = T1;
 			}
 		}
 

src/emu/cpu/i8051/i8051.c

@@ -456,7 +456,7 @@ static READ32_HANDLER((*hold_eram_iaddr_callback));
 #define R_B		i8051.b
 
 /* # of oscilations each opcode requires*/
-static UINT8 i8051_cycles[] = {
+static const UINT8 i8051_cycles[] = {
 	12,24,24,12,12,12,12,12,12,12,12,12,12,12,12,12,
 	24,24,24,12,12,12,12,12,12,12,12,12,12,12,12,12,
 	24,24,24,12,12,12,12,12,12,12,12,12,12,12,12,12,

src/emu/cpu/i8085/i8085daa.h

@@ -1,4 +1,4 @@
-static UINT16 DAA[2048] = {
+static const UINT16 DAA[2048] = {
   (0x00<<8)   +ZF         +VF      ,
   (0x01<<8)                        ,
   (0x02<<8)                        ,

src/emu/cpu/i86/table186.h

@@ -1,4 +1,4 @@
-static void (*PREFIX186(_instruction)[256])(void) =
+static void (*const PREFIX186(_instruction)[256])(void) =
 {
 	 PREFIX86(_add_br8),           /* 0x00 */
 	 PREFIX86(_add_wr16),          /* 0x01 */

src/emu/cpu/i86/table286.h

@@ -3,7 +3,7 @@
  * at the time the same like table186.h
  */
 
-static void (*PREFIX286(_instruction)[256])(void) =
+static void (*const PREFIX286(_instruction)[256])(void) =
 {
 	 PREFIX86(_add_br8),			/* 0x00 */
 	 PREFIX86(_add_wr16),			/* 0x01 */

src/emu/cpu/i86/table86.h

@@ -1,4 +1,4 @@
-static void (*PREFIX86(_instruction)[256])(void) =
+static void (*const PREFIX86(_instruction)[256])(void) =
 {
 	 PREFIX86(_add_br8),          /* 0x00 */
 	 PREFIX86(_add_wr16),         /* 0x01 */

src/emu/cpu/i86/tablev30.h

@@ -1,7 +1,7 @@
 // special nec instructions missing
 // at the time the same like table186.h
 
-static void (*PREFIXV30(_instruction)[256])(void) =
+static void (*const PREFIXV30(_instruction)[256])(void) =
 {
 	 PREFIX86(_add_br8),           /* 0x00 */
 	 PREFIX86(_add_wr16),          /* 0x01 */

src/emu/cpu/i8x41/i8x41.c

@@ -1282,7 +1282,7 @@ INLINE void xrl_i(void)
  *  Cycle Timings
  ***********************************************************************/
 
-static UINT8 i8x41_cycles[] = {
+static const UINT8 i8x41_cycles[] = {
 	1,1,1,2,2,1,1,1,2,2,2,2,2,2,2,2,
 	1,1,2,2,2,1,2,1,1,1,1,1,1,1,1,1,
 	1,1,1,2,2,1,2,1,1,1,1,1,1,1,1,1,

src/emu/cpu/i960/i960.c

@@ -396,7 +396,7 @@ INLINE void test(UINT32 opcode, int mask)
 
 static const char *i960_get_strflags(void)
 {
-	static const char *conditions[8] =
+	static const char *const conditions[8] =
 	{
 		"no", "g", "e", "ge", "l", "ne", "le", "o"
 	};

src/emu/cpu/i960/i960dis.c

@@ -90,13 +90,13 @@ static const mnemonic_t mnem_reg[100] =
 	{ "ending_code",0 }
 };
 
-static const char *constnames[32] =
+static const char *const constnames[32] =
 {
 	"0x0", "0x1", "0x2", "0x3", "0x4", "0x5", "0x6", "0x7", "0x8", "0x9", "0xa", "0xb", "0xc", "0xd", "0xe", "0xf",
 	"0x10", "0x11", "0x12", "0x13", "0x14", "0x15", "0x16", "0x17", "0x18", "0x19", "0x1a", "0x1b", "0x1c", "0x1d", "0x1e", "0x1f"
 };
 
-static const char *regnames[32] =
+static const char *const regnames[32] =
 {
 	"pfp","sp","rip","r3", "r4","r5","r6","r7", "r8","r9","r10","r11", "r12","r13","r14","r15",
 	"g0","g1","g2","g3", "g4","g5","g6","g7", "g8","g9","g10","g11", "g12","g13","g14","fp",

src/emu/cpu/jaguar/jagdasm.c

@@ -23,7 +23,7 @@
 static const UINT8 convert_zero[32] =
 { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
 
-static const char *condition[32] =
+static const char *const condition[32] =
 {
 	"",
 	"nz,",

src/emu/cpu/jaguar/jaguar.c

@@ -92,7 +92,7 @@ typedef struct
 	int			isdsp;
 	int			op;
 	int			interrupt_cycles;
-	void 		(**table)(void);
+	void 		(*const *table)(void);
 	int 		(*irq_callback)(int irqline);
 	void		(*cpu_interrupt)(void);
 } jaguar_regs;
@@ -197,7 +197,7 @@ static void subqmod_n_rn(void);	/* DSP only */
 static void subqt_n_rn(void);
 static void xor_rn_rn(void);
 
-static void (*gpu_op_table[64])(void) =
+static void (*const gpu_op_table[64])(void) =
 {
 	/* 00-03 */	add_rn_rn,		addc_rn_rn,		addq_n_rn,		addqt_n_rn,
 	/* 04-07 */	sub_rn_rn,		subc_rn_rn,		subq_n_rn,		subqt_n_rn,
@@ -217,7 +217,7 @@ static void (*gpu_op_table[64])(void) =
 	/* 60-63 */	store_rn_r14rn,	store_rn_r15rn,	sat24_rn,		pack_rn
 };
 
-static void (*dsp_op_table[64])(void) =
+static void (*const dsp_op_table[64])(void) =
 {
 	/* 00-03 */	add_rn_rn,		addc_rn_rn,		addq_n_rn,		addqt_n_rn,
 	/* 04-07 */	sub_rn_rn,		subc_rn_rn,		subq_n_rn,		subqt_n_rn,

src/emu/cpu/konami/knmidasm.c

@@ -296,7 +296,7 @@ static unsigned char get_next_byte( void ) {
 }
 
 /* Table for indexed operations */
-static char index_reg[8][3] = {
+static const char index_reg[8][3] = {
 	"?", /* 0 - extended mode */
 	"?", /* 1 */
 	"x", /* 2 */
@@ -308,7 +308,7 @@ static char index_reg[8][3] = {
 };
 
 /* Table for tfr/exg operations */
-static char tfrexg_reg[8][3] = {
+static const char tfrexg_reg[8][3] = {
 	"a", /* 0 */
 	"b", /* 1 */
 	"x", /* 2 */
@@ -320,7 +320,7 @@ static char tfrexg_reg[8][3] = {
 };
 
 /* Table for stack S operations */
-static char stack_reg_s[8][3] = {
+static const char stack_reg_s[8][3] = {
 	"cc",
 	"a",
 	"b",
@@ -332,7 +332,7 @@ static char stack_reg_s[8][3] = {
 };
 
 /* Table for stack U operations */
-static char stack_reg_u[8][3] = {
+static const char stack_reg_u[8][3] = {
 	"cc",
 	"a",
 	"b",
@@ -1585,7 +1585,7 @@ typedef struct {
 	int confirmed;
 } konami_opcode_def;
 
-static konami_opcode_def op_table[256] = {
+static const konami_opcode_def op_table[256] = {
 	/* 00 */	{ illegal, 0 },
 	/* 01 */	{ illegal, 0 },
 	/* 02 */	{ illegal, 0 },

src/emu/cpu/konami/konami.c

@@ -213,7 +213,7 @@ static int konami_ICount=50000;
 #define SET_V8(a,b,r)	CC|=(((a^b^r^(r>>1))&0x80)>>6)
 #define SET_V16(a,b,r)	CC|=(((a^b^r^(r>>1))&0x8000)>>14)
 
-static UINT8 flags8i[256]=	 /* increment */
+static const UINT8 flags8i[256]=	 /* increment */
 {
 CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -232,7 +232,7 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
 };
-static UINT8 flags8d[256]= /* decrement */
+static const UINT8 flags8d[256]= /* decrement */
 {
 CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -332,7 +332,7 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
 }
 
 /* opcode timings */
-static UINT8 cycles1[] =
+static const UINT8 cycles1[] =
 {
 	/*   0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F */
   /*0*/  1, 1, 1, 1, 1, 1, 1, 1, 4, 4, 4, 4, 5, 5, 5, 5,

src/emu/cpu/lh5801/5801dasm.c

@@ -54,7 +54,7 @@ typedef enum {
 	P, S
 } Regs;
 
-static const char *RegNames[]= {
+static const char *const RegNames[]= {
 	0, "A", "XL", "XH", "X", "YL", "YH", "Y", "UL", "UH", "U", "P", "S"
 };
 
@@ -92,7 +92,7 @@ typedef enum {
 	RPV, SPV,// flip flop pv off
 } Ins;
 
-static const char *InsNames[]={
+static const char *const InsNames[]={
 	"ILL", "ILL", 0, "NOP",
 	"LDA", "STA", "LDI", "LDX", "STX",
 	"LDE", "SDE", "LIN", "SIN",

src/emu/cpu/m37710/m37710.c

@@ -70,7 +70,7 @@ uint m37710i_destination;
 
 /* interrupt control mapping */
 
-int m37710_irq_levels[M37710_LINE_MAX] =
+const int m37710_irq_levels[M37710_LINE_MAX] =
 {
 	// maskable
 	0x70,	// ADC
@@ -98,7 +98,7 @@ int m37710_irq_levels[M37710_LINE_MAX] =
 	0,	// reset
 };
 
-static int m37710_irq_vectors[M37710_LINE_MAX] =
+static const int m37710_irq_vectors[M37710_LINE_MAX] =
 {
 	// maskable          C74
 	0xffd6, // A-D converter     c68b
@@ -129,7 +129,7 @@ static int m37710_irq_vectors[M37710_LINE_MAX] =
 // M37710 internal peripherals
 
 #if M37710_DEBUG
-static const char *m37710_rnames[128] =
+static const char *const m37710_rnames[128] =
 {
 	"",
 	"",
@@ -261,7 +261,7 @@ static const char *m37710_rnames[128] =
 	"INT2 IRQ ctrl",
 };
 
-static const char *m37710_tnames[8] =
+static const char *const m37710_tnames[8] =
 {
 	"A0", "A1", "A2", "A3", "A4", "B0", "B1", "B2"
 };
@@ -684,39 +684,39 @@ static WRITE16_HANDLER( m37710_internal_word_w )
 	}
 }
 
-extern void (*m37710i_opcodes_M0X0[])(void);
+extern void (*const m37710i_opcodes_M0X0[])(void);
-extern void (*m37710i_opcodes42_M0X0[])(void);
+extern void (*const m37710i_opcodes42_M0X0[])(void);
-extern void (*m37710i_opcodes89_M0X0[])(void);
+extern void (*const m37710i_opcodes89_M0X0[])(void);
 extern uint m37710i_get_reg_M0X0(int regnum);
 extern void m37710i_set_reg_M0X0(int regnum, uint val);
 extern void m37710i_set_line_M0X0(int line, int state);
 extern int  m37710i_execute_M0X0(int cycles);
 
-extern void (*m37710i_opcodes_M0X1[])(void);
+extern void (*const m37710i_opcodes_M0X1[])(void);
-extern void (*m37710i_opcodes42_M0X1[])(void);
+extern void (*const m37710i_opcodes42_M0X1[])(void);
-extern void (*m37710i_opcodes89_M0X1[])(void);
+extern void (*const m37710i_opcodes89_M0X1[])(void);
 extern uint m37710i_get_reg_M0X1(int regnum);
 extern void m37710i_set_reg_M0X1(int regnum, uint val);
 extern void m37710i_set_line_M0X1(int line, int state);
 extern int  m37710i_execute_M0X1(int cycles);
 
-extern void (*m37710i_opcodes_M1X0[])(void);
+extern void (*const m37710i_opcodes_M1X0[])(void);
-extern void (*m37710i_opcodes42_M1X0[])(void);
+extern void (*const m37710i_opcodes42_M1X0[])(void);
-extern void (*m37710i_opcodes89_M1X0[])(void);
+extern void (*const m37710i_opcodes89_M1X0[])(void);
 extern uint m37710i_get_reg_M1X0(int regnum);
 extern void m37710i_set_reg_M1X0(int regnum, uint val);
 extern void m37710i_set_line_M1X0(int line, int state);
 extern int  m37710i_execute_M1X0(int cycles);
 
-extern void (*m37710i_opcodes_M1X1[])(void);
+extern void (*const m37710i_opcodes_M1X1[])(void);
-extern void (*m37710i_opcodes42_M1X1[])(void);
+extern void (*const m37710i_opcodes42_M1X1[])(void);
-extern void (*m37710i_opcodes89_M1X1[])(void);
+extern void (*const m37710i_opcodes89_M1X1[])(void);
 extern uint m37710i_get_reg_M1X1(int regnum);
 extern void m37710i_set_reg_M1X1(int regnum, uint val);
 extern void m37710i_set_line_M1X1(int line, int state);
 extern int  m37710i_execute_M1X1(int cycles);
 
-void (**m37710i_opcodes[4])(void) =
+void (*const *const m37710i_opcodes[4])(void) =
 {
 	m37710i_opcodes_M0X0,
 	m37710i_opcodes_M0X1,
@@ -724,7 +724,7 @@ void (**m37710i_opcodes[4])(void) =
 	m37710i_opcodes_M1X1,
 };
 
-void (**m37710i_opcodes2[4])(void) =
+void (*const *const m37710i_opcodes2[4])(void) =
 {
 	m37710i_opcodes42_M0X0,
 	m37710i_opcodes42_M0X1,
@@ -732,7 +732,7 @@ void (**m37710i_opcodes2[4])(void) =
 	m37710i_opcodes42_M1X1,
 };
 
-void (**m37710i_opcodes3[4])(void) =
+void (*const *const m37710i_opcodes3[4])(void) =
 {
 	m37710i_opcodes89_M0X0,
 	m37710i_opcodes89_M0X1,
@@ -740,7 +740,7 @@ void (**m37710i_opcodes3[4])(void) =
 	m37710i_opcodes89_M1X1,
 };
 
-uint (*m37710i_get_reg[4])(int regnum) =
+uint (*const m37710i_get_reg[4])(int regnum) =
 {
 	m37710i_get_reg_M0X0,
 	m37710i_get_reg_M0X1,
@@ -748,7 +748,7 @@ uint (*m37710i_get_reg[4])(int regnum) =
 	m37710i_get_reg_M1X1,
 };
 
-void (*m37710i_set_reg[4])(int regnum, uint val) =
+void (*const m37710i_set_reg[4])(int regnum, uint val) =
 {
 	m37710i_set_reg_M0X0,
 	m37710i_set_reg_M0X1,
@@ -756,7 +756,7 @@ void (*m37710i_set_reg[4])(int regnum, uint val) =
 	m37710i_set_reg_M1X1,
 };
 
-void (*m37710i_set_line[4])(int line, int state) =
+void (*const m37710i_set_line[4])(int line, int state) =
 {
 	m37710i_set_line_M0X0,
 	m37710i_set_line_M0X1,
@@ -764,7 +764,7 @@ void (*m37710i_set_line[4])(int line, int state) =
 	m37710i_set_line_M1X1,
 };
 
-int (*m37710i_execute[4])(int cycles) =
+int (*const m37710i_execute[4])(int cycles) =
 {
 	m37710i_execute_M0X0,
 	m37710i_execute_M0X1,

src/emu/cpu/m37710/m37710cm.h

@@ -95,9 +95,9 @@ typedef struct
 	uint irq_level;		/* irq level */
 	int (*int_ack)(int); /* Interrupt Acknowledge */
 	uint stopped;		/* Sets how the CPU is stopped */
-	void (**opcodes)(void);		/* opcodes with no prefix */
+	void (*const *opcodes)(void);		/* opcodes with no prefix */
-	void (**opcodes42)(void);	/* opcodes with 0x42 prefix */
+	void (*const *opcodes42)(void);	/* opcodes with 0x42 prefix */
-	void (**opcodes89)(void);	/* opcodes with 0x89 prefix */
+	void (*const *opcodes89)(void);	/* opcodes with 0x89 prefix */
 	uint (*get_reg)(int regnum);
 	void (*set_reg)(int regnum, uint val);
 	void (*set_line)(int line, int state);
@@ -116,13 +116,13 @@ extern uint m37710i_destination;
 extern uint m37710i_adc_tbl[];
 extern uint m37710i_sbc_tbl[];
 
-extern void (**m37710i_opcodes[])(void);
+extern void (*const *const m37710i_opcodes[])(void);
-extern void (**m37710i_opcodes2[])(void);
+extern void (*const *const m37710i_opcodes2[])(void);
-extern void (**m37710i_opcodes3[])(void);
+extern void (*const *const m37710i_opcodes3[])(void);
-extern uint (*m37710i_get_reg[])(int regnum);
+extern uint (*const m37710i_get_reg[])(int regnum);
-extern void (*m37710i_set_reg[])(int regnum, uint val);
+extern void (*const m37710i_set_reg[])(int regnum, uint val);
-extern void (*m37710i_set_line[])(int line, int state);
+extern void (*const m37710i_set_line[])(int line, int state);
-extern int (*m37710i_execute[])(int cycles);
+extern int (*const m37710i_execute[])(int cycles);
 
 #define REG_A			m37710i_cpu.a		/* Accumulator */
 #define REG_B			m37710i_cpu.b		/* Accumulator hi byte */

src/emu/cpu/m37710/m37710op.h

@@ -2335,36 +2335,36 @@ INLINE uint EA_SIY(void)   {return MAKE_UINT_16(read_16_SIY(REG_S + OPER_8_IMM()
 #if !FLAG_SET_M && !FLAG_SET_X
 #define OP(CODE, OPERATION) static void m37710i_ ## CODE ## _M0X0(void) {OPERATION;}
 #define O(CODE) m37710i_ ## CODE ## _M0X0
-#define TABLE_OPCODES void (*m37710i_opcodes_M0X0[256])(void)
+#define TABLE_OPCODES void (*const m37710i_opcodes_M0X0[256])(void)
-#define TABLE_OPCODES2 void (*m37710i_opcodes42_M0X0[256])(void)
+#define TABLE_OPCODES2 void (*const m37710i_opcodes42_M0X0[256])(void)
-#define TABLE_OPCODES3 void (*m37710i_opcodes89_M0X0[256])(void)
+#define TABLE_OPCODES3 void (*const m37710i_opcodes89_M0X0[256])(void)
 #define TABLE_FUNCTION(RTYPE, NAME, ARGS)	RTYPE m37710i_ ## NAME ## _M0X0 ARGS
 
 #elif !FLAG_SET_M && FLAG_SET_X
 
 #define OP(CODE, OPERATION) static void m37710i_ ## CODE ## _M0X1(void) {OPERATION;}
 #define O(CODE) m37710i_ ## CODE ## _M0X1
-#define TABLE_OPCODES void (*m37710i_opcodes_M0X1[256])(void)
+#define TABLE_OPCODES void (*const m37710i_opcodes_M0X1[256])(void)
-#define TABLE_OPCODES2 void (*m37710i_opcodes42_M0X1[256])(void)
+#define TABLE_OPCODES2 void (*const m37710i_opcodes42_M0X1[256])(void)
-#define TABLE_OPCODES3 void (*m37710i_opcodes89_M0X1[256])(void)
+#define TABLE_OPCODES3 void (*const m37710i_opcodes89_M0X1[256])(void)
 #define TABLE_FUNCTION(RTYPE, NAME, ARGS)	RTYPE m37710i_ ## NAME ## _M0X1 ARGS
 
 #elif FLAG_SET_M && !FLAG_SET_X
 
 #define OP(CODE, OPERATION) static void m37710i_ ## CODE ## _M1X0(void) {OPERATION;}
 #define O(CODE) m37710i_ ## CODE ## _M1X0
-#define TABLE_OPCODES void (*m37710i_opcodes_M1X0[256])(void)
+#define TABLE_OPCODES void (*const m37710i_opcodes_M1X0[256])(void)
-#define TABLE_OPCODES2 void (*m37710i_opcodes42_M1X0[256])(void)
+#define TABLE_OPCODES2 void (*const m37710i_opcodes42_M1X0[256])(void)
-#define TABLE_OPCODES3 void (*m37710i_opcodes89_M1X0[256])(void)
+#define TABLE_OPCODES3 void (*const m37710i_opcodes89_M1X0[256])(void)
 #define TABLE_FUNCTION(RTYPE, NAME, ARGS)	RTYPE m37710i_ ## NAME ## _M1X0 ARGS
 
 #elif FLAG_SET_M && FLAG_SET_X
 
 #define OP(CODE, OPERATION) static void m37710i_ ## CODE ## _M1X1(void) {OPERATION;}
 #define O(CODE) m37710i_ ## CODE ## _M1X1
-#define TABLE_OPCODES void (*m37710i_opcodes_M1X1[256])(void)
+#define TABLE_OPCODES void (*const m37710i_opcodes_M1X1[256])(void)
-#define TABLE_OPCODES2 void (*m37710i_opcodes42_M1X1[256])(void)
+#define TABLE_OPCODES2 void (*const m37710i_opcodes42_M1X1[256])(void)
-#define TABLE_OPCODES3 void (*m37710i_opcodes89_M1X1[256])(void)
+#define TABLE_OPCODES3 void (*const m37710i_opcodes89_M1X1[256])(void)
 #define TABLE_FUNCTION(RTYPE, NAME, ARGS)	RTYPE m37710i_ ## NAME ## _M1X1 ARGS
 
 #endif

src/emu/cpu/m37710/m7700ds.c

@@ -58,7 +58,7 @@ enum
   BBC,   BBS,   TBY,   ANDB,  PUL ,  PSH ,  PLAB,  XAB ,  PHB
 };
 
-static const char* g_opnames[] =
+static const char *const g_opnames[] =
 {
  "ADC", "AND", "ASL", "BCC", "BCS", "BEQ", "BIT", "BMI", "BNE", "BPL", "BRA",
  "BRK", "BRL", "BVC", "BVS", "CLC", "CLD", "CLI", "CLV", "CMP", "COP", "CPX",
@@ -74,7 +74,7 @@ static const char* g_opnames[] =
  "BBC", "BBS", "TBY", "ANDB","PUL", "PSH", "PLB", "XAB", "PHB",
 };
 
-static opcode_struct g_opcodes[256] =
+static const opcode_struct g_opcodes[256] =
 {
 	{BRK, I, SIG }, {ORA, M, DXI }, {UNK, I, SIG }, {ORA, M, S   },
 	{SEB, M, LDM4 }, {ORA, M, D   }, {ASL, M, D   }, {ORA, M, DLI },
@@ -157,7 +157,7 @@ static opcode_struct g_opcodes[256] =
 	{JSR, I, AXI }, {SBC, M, AX  }, {INC, M, AX  }, {SBC, M, ALX }
 };
 
-static opcode_struct g_opcodes_prefix42[256] =
+static const opcode_struct g_opcodes_prefix42[256] =
 {
 	{BRK, I, SIG }, {ORB, M, DXI }, {COP, I, SIG }, {ORB, M, S   },
 	{TSB, M, D   }, {ORB, M, D   }, {ASL, M, D   }, {ORB, M, DLI },
@@ -240,7 +240,7 @@ static opcode_struct g_opcodes_prefix42[256] =
 	{JSR, I, AXI }, {SBCB, M, AX  }, {INC, M, AX  }, {SBCB, M, ALX }
 };
 
-static opcode_struct g_opcodes_prefix89[256] =
+static const opcode_struct g_opcodes_prefix89[256] =
 {
 	{BRK, I, SIG }, {MPY, M, DXI }, {COP, I, SIG }, {MPY, M, S   },
 	{TSB, M, D   }, {MPY, M, D   }, {ASL, M, D   }, {MPY, M, DLI },
@@ -373,7 +373,7 @@ INLINE char* int_16_str(unsigned int val)
 int m7700_disassemble(char* buff, unsigned int pc, unsigned int pb, const UINT8 *oprom, int m_flag, int x_flag)
 {
 	unsigned int instruction;
-	opcode_struct *opcode;
+	const opcode_struct *opcode;
 	char* ptr;
 	int var;
 	signed char varS;

src/emu/cpu/m6502/6502dasm.c

@@ -97,7 +97,7 @@ enum opcodes {
 };
 
 
-static const char *token[]=
+static const char *const token[]=
 {
 	"adc", "and", "asl", "bcc", "bcs", "beq", "bit", "bmi",
 	"bne", "bpl", "m6502_brk", "bvc", "bvs", "clc", "cld", "cli",

src/emu/cpu/m6502/m4510.c

@@ -125,7 +125,7 @@ z:      xxxx address bits a19 .. a16 for memory accesses with a15 1 ?
 
 
 typedef struct {
-	void	(**insn)(void); /* pointer to the function pointer table */
+	void	(*const *insn)(void); /* pointer to the function pointer table */
 	PAIR	ppc;			/* previous program counter */
 	PAIR	pc; 			/* program counter */
 	PAIR	sp; 			/* stack pointer (always 100 - 1FF) */

src/emu/cpu/m6502/m6502.c

@@ -59,7 +59,7 @@
 typedef struct
 {
 	UINT8	subtype;		/* currently selected cpu sub type */
-	void	(**insn)(void); /* pointer to the function pointer table */
+	void	(*const *insn)(void); /* pointer to the function pointer table */
 	PAIR	ppc;			/* previous program counter */
 	PAIR	pc; 			/* program counter */
 	PAIR	sp; 			/* stack pointer (always 100 - 1FF) */
@@ -127,7 +127,7 @@ static m6502_Regs m6502;
  *
  *****************************************************************************/
 
-static void m6502_common_init(int index, int clock, const void *config, int (*irqcallback)(int), UINT8 subtype, void (**insn)(void), const char *type)
+static void m6502_common_init(int index, int clock, const void *config, int (*irqcallback)(int), UINT8 subtype, void (*const *insn)(void), const char *type)
 {
 	memset(&m6502, 0, sizeof(m6502));
 	m6502.irq_callback = irqcallback;

src/emu/cpu/m6502/m6509.c

@@ -62,7 +62,7 @@ addresses take place.
 
 typedef struct {
 	UINT8	subtype;		/* currently selected cpu sub type */
-	void	(**insn)(void); /* pointer to the function pointer table */
+	void	(*const *insn)(void); /* pointer to the function pointer table */
 	PAIR	ppc;			/* previous program counter */
 	/* pc.w.h contains the current page pc_bank.w.h for better speed */
 	PAIR	pc; 			/* program counter */

src/emu/cpu/m6502/t6502.c

@@ -323,7 +323,7 @@ OP(ff) { int tmp; RD_ABX_NP; WB_EA; ISB; WB_EA; } /* 7 ISB ABX */
 
 /* and here's the array of function pointers */
 
-static void (*insn6502[0x100])(void) = {
+static void (*const insn6502[0x100])(void) = {
 	m6502_00,m6502_01,m6502_02,m6502_03,m6502_04,m6502_05,m6502_06,m6502_07,
 	m6502_08,m6502_09,m6502_0a,m6502_0b,m6502_0c,m6502_0d,m6502_0e,m6502_0f,
 	m6502_10,m6502_11,m6502_12,m6502_13,m6502_14,m6502_15,m6502_16,m6502_17,

src/emu/cpu/m6502/t6509.c

@@ -314,7 +314,7 @@ OP(bf) { int tmp; RD_ABY_P; LAX;                } /* 4 LAX ABY page penalty */
 OP(df) { int tmp; RD_ABX_NP; WB_EA; DCP; WB_EA; } /* 7 DCP ABX */
 OP(ff) { int tmp; RD_ABX_NP; WB_EA; ISB; WB_EA; } /* 7 ISB ABX */
 
-static void (*insn6509[0x100])(void) = {
+static void (*const insn6509[0x100])(void) = {
 	m6509_00,m6509_01,m6509_02,m6509_03,m6509_04,m6509_05,m6509_06,m6509_07,
 	m6509_08,m6509_09,m6509_0a,m6509_0b,m6509_0c,m6509_0d,m6509_0e,m6509_0f,
 	m6509_10,m6509_11,m6509_12,m6509_13,m6509_14,m6509_15,m6509_16,m6509_17,

src/emu/cpu/m6502/t65c02.c

@@ -326,7 +326,7 @@ OP(bf) { int tmp; RD_ZPG; BBS(3);                   } /* 5-7 BBS3 ZPG */
 OP(df) { int tmp; RD_ZPG; BBS(5);                   } /* 5-7 BBS5 ZPG */
 OP(ff) { int tmp; RD_ZPG; BBS(7);                   } /* 5-7 BBS7 ZPG */
 
-static void (*insn65c02[0x100])(void) = {
+static void (*const insn65c02[0x100])(void) = {
 	m65c02_00,m65c02_01,m65c02_02,m65c02_03,m65c02_04,m65c02_05,m65c02_06,m65c02_07,
 	m65c02_08,m65c02_09,m65c02_0a,m65c02_0b,m65c02_0c,m65c02_0d,m65c02_0e,m65c02_0f,
 	m65c02_10,m65c02_11,m65c02_12,m65c02_13,m65c02_14,m65c02_15,m65c02_16,m65c02_17,

src/emu/cpu/m6502/t65ce02.c

@@ -326,7 +326,7 @@ OP(df) { int tmp; RD_ZPG; BBS(5); } /* 4 BBS5 ZPG */
 OP(ff) { int tmp; RD_ZPG; BBS(7); } /* 4 BBS7 ZPG */
 
 #ifdef M4510
-static void (*insn4510[0x100])(void) = {
+static void (*const insn4510[0x100])(void) = {
 	m4510_00,m4510_01,m4510_02,m4510_03,m4510_04,m4510_05,m4510_06,m4510_07,
 	m4510_08,m4510_09,m4510_0a,m4510_0b,m4510_0c,m4510_0d,m4510_0e,m4510_0f,
 	m4510_10,m4510_11,m4510_12,m4510_13,m4510_14,m4510_15,m4510_16,m4510_17,
@@ -361,7 +361,7 @@ static void (*insn4510[0x100])(void) = {
 	m4510_f8,m4510_f9,m4510_fa,m4510_fb,m4510_fc,m4510_fd,m4510_fe,m4510_ff
 };
 #else
-static void (*insn65ce02[0x100])(void) = {
+static void (*const insn65ce02[0x100])(void) = {
 	m65ce02_00,m65ce02_01,m65ce02_02,m65ce02_03,m65ce02_04,m65ce02_05,m65ce02_06,m65ce02_07,
 	m65ce02_08,m65ce02_09,m65ce02_0a,m65ce02_0b,m65ce02_0c,m65ce02_0d,m65ce02_0e,m65ce02_0f,
 	m65ce02_10,m65ce02_11,m65ce02_12,m65ce02_13,m65ce02_14,m65ce02_15,m65ce02_16,m65ce02_17,

src/emu/cpu/m6502/t65sc02.c

@@ -43,7 +43,7 @@
  * op    temp     cycles             rdmem   opc  wrmem   ********************/
 OP(63) { BSR;                                             } /* 5? BSR */
 
-static void (*insn65sc02[0x100])(void) = {
+static void (*const insn65sc02[0x100])(void) = {
 	m65c02_00,m65c02_01,m65c02_02,m65c02_03,m65c02_04,m65c02_05,m65c02_06,m65c02_07,
 	m65c02_08,m65c02_09,m65c02_0a,m65c02_0b,m65c02_0c,m65c02_0d,m65c02_0e,m65c02_0f,
 	m65c02_10,m65c02_11,m65c02_12,m65c02_13,m65c02_14,m65c02_15,m65c02_16,m65c02_17,

src/emu/cpu/m6502/tdeco16.c

@@ -393,7 +393,7 @@ OP(bf) { RD_DUM; ILL; }									/* 2 ILL / 5 BBS3 ZPG ?? */
 OP(df) { RD_DUM; ILL; }									/* 2 ILL / 5 BBS5 ZPG ?? */
 OP(ff) { RD_DUM; ILL; }									/* 2 ILL / 5 BBS7 ZPG ?? */
 
-static void (*insndeco16[0x100])(void) = {
+static void (*const insndeco16[0x100])(void) = {
 	deco16_00,deco16_01,deco16_02,deco16_03,deco16_04,deco16_05,deco16_06,deco16_07,
 	deco16_08,deco16_09,deco16_0a,deco16_0b,deco16_0c,deco16_0d,deco16_0e,deco16_0f,
 	deco16_10,deco16_11,deco16_12,deco16_13,deco16_14,deco16_15,deco16_16,deco16_17,

src/emu/cpu/m6502/tn2a03.c

@@ -60,7 +60,7 @@ OP(ed) { int tmp; RD_ABS; SBC_NES;	  } /* 4 SBC ABS */
 OP(7d) { int tmp; RD_ABX_P; ADC_NES;	  } /* 4 ADC ABX page penalty */
 OP(fd) { int tmp; RD_ABX_P; SBC_NES;	  } /* 4 SBC ABX page penalty */
 
-static void (*insn2a03[0x100])(void) = {
+static void (*const insn2a03[0x100])(void) = {
 	m6502_00,m6502_01,m6502_02,m6502_03,m6502_04,m6502_05,m6502_06,m6502_07,
 	m6502_08,m6502_09,m6502_0a,m6502_0b,m6502_0c,m6502_0d,m6502_0e,m6502_0f,
 	m6502_10,m6502_11,m6502_12,m6502_13,m6502_14,m6502_15,m6502_16,m6502_17,
@@ -94,4 +94,3 @@ static void (*insn2a03[0x100])(void) = {
 	m6502_f0,n2a03_f1,m6502_f2,m6502_f3,m6502_f4,n2a03_f5,m6502_f6,m6502_f7,
 	m6502_f8,n2a03_f9,m6502_fa,m6502_fb,m6502_fc,n2a03_fd,m6502_fe,m6502_ff
 };
-

src/emu/cpu/m6800/6800dasm.c

@@ -52,7 +52,7 @@ enum op_names {
 	tstb,	tsx,	txs,	asx1,	asx2,	xgdx,	addx,	adcx
 };
 
-static const char *op_name_str[] = {
+static const char *const op_name_str[] = {
 	"aba",   "abx",   "adca",  "adcb",  "adda",  "addb",  "addd",  "aim",
 	"anda",  "andb",  "asl",   "asla",  "aslb",  "asld",  "asr",   "asra",
 	"asrb",  "bcc",   "bcs",   "beq",   "bge",   "bgt",   "bhi",   "bita",
@@ -79,7 +79,7 @@ static const char *op_name_str[] = {
  * 2    invalid opcode for 1:6800/6802/6808, 2:6801/6803, 4:HD63701
  */
 
-static UINT8 table[0x102][3] = {
+static const UINT8 table[0x102][3] = {
 	{ill, inh,7},{nop, inh,0},{ill, inh,7},{ill, inh,7},/* 00 */
 	{lsrd,inh,1},{asld,inh,1},{tap, inh,0},{tpa, inh,0},
 	{inx, inh,0},{dex, inh,0},{clv, inh,0},{sev, inh,0},

src/emu/cpu/m6800/6800tbl.c

@@ -251,7 +251,7 @@ INLINE void cpx_ix(void);
 static void trap(void);
 #endif
 
-static void (*m6800_insn[0x100])(void) = {
+static void (*const m6800_insn[0x100])(void) = {
 illegal,nop,	illegal,illegal,illegal,illegal,tap,	tpa,
 inx,	dex,	clv,	sev,	clc,	sec,	cli,	sei,
 sba,	cba,	illegal,illegal,illegal,illegal,tab,	tba,
@@ -287,7 +287,7 @@ eorb_ex,adcb_ex,orb_ex, addb_ex,illegal,illegal,ldx_ex, stx_ex
 };
 
 #if (HAS_M6801||HAS_M6803)
-static void (*m6803_insn[0x100])(void) = {
+static void (*const m6803_insn[0x100])(void) = {
 illegal,nop,	illegal,illegal,lsrd,	asld,	tap,	tpa,
 inx,	dex,	clv,	sev,	clc,	sec,	cli,	sei,
 sba,	cba,	illegal,illegal,illegal,illegal,tab,	tba,
@@ -324,7 +324,7 @@ eorb_ex,adcb_ex,orb_ex, addb_ex,ldd_ex, std_ex, ldx_ex, stx_ex
 #endif
 
 #if (HAS_HD63701)
-static void (*hd63701_insn[0x100])(void) = {
+static void (*const hd63701_insn[0x100])(void) = {
 trap	,nop,	trap	,trap	,lsrd,	asld,	tap,	tpa,
 inx,	dex,	clv,	sev,	clc,	sec,	cli,	sei,
 sba,	cba,	undoc1, undoc2, trap	,trap	,tab,	tba,
@@ -361,7 +361,7 @@ eorb_ex,adcb_ex,orb_ex, addb_ex,ldd_ex, std_ex, ldx_ex, stx_ex
 #endif
 
 #if (HAS_NSC8105)
-static void (*nsc8105_insn[0x100])(void) = {
+static void (*const nsc8105_insn[0x100])(void) = {
 illegal,illegal,nop,	illegal,illegal,tap,	illegal,tpa,
 inx,	clv,	dex,	sev,	clc,	cli,	sec,	sei,
 sba,	illegal,cba,	illegal,illegal,tab,	illegal,tba,

src/emu/cpu/m6805/6805dasm.c

@@ -38,7 +38,7 @@ enum op_names {
 	tstx,	txa
 };
 
-static const char *op_name_str[] = {
+static const char *const op_name_str[] = {
 	"adca", "adda", "anda", "asl",  "asla", "aslx", "asr",  "asra",
 	"asrx", "bcc",  "bclr", "bcs",  "beq",  "bhcc", "bhcs", "bhi",
 	"bih",  "bil",  "bita", "bls",  "bmc",  "bmi",  "bms",  "bne",
@@ -120,7 +120,7 @@ static const unsigned char disasm[0x100][2] = {
 };
 
 #if 0
-static char *opcode_strings[0x0100] =
+static const char *const opcode_strings[0x0100] =
 {
 	"brset0", 	"brclr0", 	"brset1", 	"brclr1", 	"brset2", 	"brclr2",	"brset3",	"brclr3",		/*00*/
 	"brset4",	"brclr4",	"brset5",	"brclr5",	"brset6",	"brclr6",	"brset7",	"brclr7",

src/emu/cpu/m6805/m6805.c

@@ -121,7 +121,7 @@ static int m6805_ICount=50000;
 #define SET_H(a,b,r)   CC|=((a^b^r)&0x10)
 #define SET_C8(a)	   CC|=((a&0x100)>>8)
 
-static UINT8 flags8i[256]=	 /* increment */
+static const UINT8 flags8i[256]=	 /* increment */
 {
 0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -140,7 +140,7 @@ static UINT8 flags8i[256]=	 /* increment */
 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,
 0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04
 };
-static UINT8 flags8d[256]= /* decrement */
+static const UINT8 flags8d[256]= /* decrement */
 {
 0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,

src/emu/cpu/m6809/6809dasm.c

@@ -354,9 +354,9 @@ static const int m6809_numops[3] =
 	sizeof(m6809_pg2opcodes) / sizeof(m6809_pg2opcodes[0])
 };
 
-static const char *m6809_regs[5] = { "X", "Y", "U", "S", "PC" };
+static const char *const m6809_regs[5] = { "X", "Y", "U", "S", "PC" };
 
-static const char *m6809_regs_te[16] =
+static const char *const m6809_regs_te[16] =
 {
 	"D", "X",  "Y",  "U",   "S",  "PC", "inv", "inv",
 	"A", "B", "CC", "DP", "inv", "inv", "inv", "inv"

src/emu/cpu/m6809/m6809.c

@@ -258,7 +258,7 @@ static int m6809_ICount;
 #define SET_V8(a,b,r)	CC|=(((a^b^r^(r>>1))&0x80)>>6)
 #define SET_V16(a,b,r)	CC|=(((a^b^r^(r>>1))&0x8000)>>14)
 
-static UINT8 flags8i[256]=	 /* increment */
+static const UINT8 flags8i[256]=	 /* increment */
 {
 CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -277,7 +277,7 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
 CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
 };
-static UINT8 flags8d[256]= /* decrement */
+static const UINT8 flags8d[256]= /* decrement */
 {
 CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -360,7 +360,7 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
 
 #if (!BIG_SWITCH)
 /* timings for 1-byte opcodes */
-static UINT8 cycles1[] =
+static const UINT8 cycles1[] =
 {
 	/*   0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F */
   /*0*/  6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 0, 6, 6, 3, 6,

src/emu/cpu/mc68hc11/hc11dasm.c

@@ -31,7 +31,7 @@ typedef struct {
 	int address_mode;
 } M68HC11_OPCODE;
 
-static M68HC11_OPCODE opcode_table[256] =
+static const M68HC11_OPCODE opcode_table[256] =
 {
 	/* 0x00 - 0x0f */
 	{ "test",			0,						},
@@ -311,7 +311,7 @@ static M68HC11_OPCODE opcode_table[256] =
 /*****************************************************************************/
 
 
-static M68HC11_OPCODE opcode_table_page2[256] =
+static const M68HC11_OPCODE opcode_table_page2[256] =
 {
 	/* 0x00 - 0x0f */
 	{ "?",				0,						},
@@ -591,7 +591,7 @@ static M68HC11_OPCODE opcode_table_page2[256] =
 /*****************************************************************************/
 
 
-static M68HC11_OPCODE opcode_table_page3[256] =
+static const M68HC11_OPCODE opcode_table_page3[256] =
 {
 	/* 0x00 - 0x0f */
 	{ "?",				0,						},
@@ -871,7 +871,7 @@ static M68HC11_OPCODE opcode_table_page3[256] =
 /*****************************************************************************/
 
 
-static M68HC11_OPCODE opcode_table_page4[256] =
+static const M68HC11_OPCODE opcode_table_page4[256] =
 {
 	/* 0x00 - 0x0f */
 	{ "?",				0,						},
@@ -1175,7 +1175,7 @@ static UINT16 fetch16(void)
 	return w;
 }
 
-static UINT32 decode_opcode(UINT32 pc, M68HC11_OPCODE *op_table)
+static UINT32 decode_opcode(UINT32 pc, const M68HC11_OPCODE *op_table)
 {
 	UINT8 imm8, mask;
 	INT8 rel8;

src/emu/cpu/mc68hc11/hc11ops.h

@@ -4,7 +4,7 @@ typedef struct {
 	void (*handler)(void);
 } HC11_OPCODE_LIST;
 
-static HC11_OPCODE_LIST hc11_opcode_list[] =
+static const HC11_OPCODE_LIST hc11_opcode_list[] =
 {
 	/*  page    opcode          handler                     */
 	{	0,		0x1b,			HC11OP(aba)					},

src/emu/cpu/minx/minxd.c

@@ -59,7 +59,7 @@ enum e_operand {
 	OP, OP1
 };
 
-static const char *s_mnemonic[] = {
+static const char *const s_mnemonic[] = {
 	"add", "addc", "and", "bcdd", "bcde", "bcdx", "call", "callc", "callg", "callge", "calll",
 	"callle", "calln", "callnc", "callno", "callnz", "callo", "callp", "callnx0",
 	"callnx1", "callnx2", "callnx3", "callx0", "callx1", "callx2", "callx3", "callz",

src/emu/cpu/minx/minxopce.h

@@ -274,7 +274,7 @@ OP(FD) { INT8 d8 = rdop(); if ( ( regs.E & EXEC_X1 ) ) { CALL( regs.PC + d8 - 1
 OP(FE) { INT8 d8 = rdop(); if ( ( regs.E & EXEC_X2 ) ) { CALL( regs.PC + d8 - 1 ); } }
 OP(FF) { INT8 d8 = rdop(); if ( ( regs.E & EXEC_DZ ) ) { CALL( regs.PC + d8 - 1 ); } }
 
-static void (*insnminx_CE[256])(void) = {
+static void (*const insnminx_CE[256])(void) = {
 	minx_CE_00, minx_CE_01, minx_CE_02, minx_CE_03, minx_CE_04, minx_CE_05, minx_CE_06, minx_CE_07,
 	minx_CE_08, minx_CE_09, minx_CE_0A, minx_CE_0B, minx_CE_0C, minx_CE_0D, minx_CE_0E, minx_CE_0F,
 	minx_CE_10, minx_CE_11, minx_CE_12, minx_CE_13, minx_CE_14, minx_CE_15, minx_CE_16, minx_CE_17,
@@ -309,7 +309,7 @@ static void (*insnminx_CE[256])(void) = {
 	minx_CE_F8, minx_CE_F9, minx_CE_FA, minx_CE_FB, minx_CE_FC, minx_CE_FD, minx_CE_FE, minx_CE_FF
 };
 
-static int insnminx_cycles_CE[256] = {
+static const int insnminx_cycles_CE[256] = {
         1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
         1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
         1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,

src/emu/cpu/minx/minxopcf.h

@@ -274,7 +274,7 @@ OP(FD) { /* illegal instruction? */ }
 OP(FE) { regs.Y = regs.SP; }
 OP(FF) { /* illegal instruction? */ }
 
-static void (*insnminx_CF[256])(void) = {
+static void (*const insnminx_CF[256])(void) = {
 	minx_CF_00, minx_CF_01, minx_CF_02, minx_CF_03, minx_CF_04, minx_CF_05, minx_CF_06, minx_CF_07,
 	minx_CF_08, minx_CF_09, minx_CF_0A, minx_CF_0B, minx_CF_0C, minx_CF_0D, minx_CF_0E, minx_CF_0F,
 	minx_CF_10, minx_CF_11, minx_CF_12, minx_CF_13, minx_CF_14, minx_CF_15, minx_CF_16, minx_CF_17,
@@ -309,7 +309,7 @@ static void (*insnminx_CF[256])(void) = {
 	minx_CF_F8, minx_CF_F9, minx_CF_FA, minx_CF_FB, minx_CF_FC, minx_CF_FD, minx_CF_FE, minx_CF_FF
 };
 
-static int insnminx_cycles_CF[256] = {
+static const int insnminx_cycles_CF[256] = {
         1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
         1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
         1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,

src/emu/cpu/minx/minxops.h

@@ -274,7 +274,7 @@ OP(FD) { UINT16 i = rdop() << 1; JMP( i ); /* PUSH8( regs.F );?? */ }
 OP(FE) { /* illegal operation? */ }
 OP(FF) { }
 
-static void (*insnminx[256])(void) = {
+static void (*const insnminx[256])(void) = {
 	minx_00, minx_01, minx_02, minx_03, minx_04, minx_05, minx_06, minx_07,
 	minx_08, minx_09, minx_0A, minx_0B, minx_0C, minx_0D, minx_0E, minx_0F,
 	minx_10, minx_11, minx_12, minx_13, minx_14, minx_15, minx_16, minx_17,
@@ -309,7 +309,7 @@ static void (*insnminx[256])(void) = {
 	minx_F8, minx_F9, minx_FA, minx_FB, minx_FC, minx_FD, minx_FE, minx_FF
 };
 
-static int insnminx_cycles[256] = {
+static const int insnminx_cycles[256] = {
 	1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
 	1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
 	1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,

src/emu/cpu/mips/dismips.c

@@ -42,9 +42,9 @@ static struct
 
 static UINT8 *filebuf;
 static UINT32 offset;
-static UINT8 order[] = { 0, 1, 2, 3 };
+static const UINT8 order[] = { 0, 1, 2, 3 };
 
-static char *Options[]=
+static const char *const Options[]=
 {
 	"begin", "end", "offset", "order", "format", "cpu", 0
 };

src/emu/cpu/mips/mdrc64.c

@@ -351,7 +351,7 @@ static int compile_store_double_partial(drc_core *drc, compiler_state *compiler,
 
 static const UINT8 nvreg[] = { REG_NV0, REG_NV1, REG_NV2, REG_NV3, REG_NV4, REG_NV5, REG_NV6 };
 
-static const char *x86regname[] = {"rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15"};
+static const char *const x86regname[] = {"rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15"};
 
 
 

src/emu/cpu/mips/mips3.c

@@ -136,7 +136,7 @@ static void ldr_le(UINT32 op);
 static void sdl_le(UINT32 op);
 static void sdr_le(UINT32 op);
 
-static UINT8 fcc_shift[8] = { 23, 25, 26, 27, 28, 29, 30, 31 };
+static const UINT8 fcc_shift[8] = { 23, 25, 26, 27, 28, 29, 30, 31 };
 
 
 

src/emu/cpu/mips/mips3dsm.c

@@ -9,7 +9,7 @@
 #include "cpuintrf.h"
 
 
-static const char *reg[32] =
+static const char *const reg[32] =
 {
 	"0",	"r1",	"r2",	"r3",	"r4",	"r5",	"r6",	"r7",
 	"r8",	"r9",	"r10",	"r11",	"r12",	"r13",	"r14",	"r15",
@@ -18,7 +18,7 @@ static const char *reg[32] =
 };
 
 
-static const char *cpreg[4][32] =
+static const char *const cpreg[4][32] =
 {
 	{
 		"Index","Random","EntryLo0","EntryLo1","Context","PageMask","Wired","Error",
@@ -47,7 +47,7 @@ static const char *cpreg[4][32] =
 };
 
 
-static const char *ccreg[4][32] =
+static const char *const ccreg[4][32] =
 {
 	{
 		"ccr0",	"ccr1",	"ccr2",	"ccr3",	"ccr4",	"ccr5",	"ccr6",	"ccr7",
@@ -148,7 +148,7 @@ static UINT32 dasm_cop0(UINT32 pc, UINT32 op, char *buffer)
 
 static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
 {
-	static const char *format_table[] =
+	static const char *const format_table[] =
 	{
 		"?","?","?","?","?","?","?","?","?","?","?","?","?","?","?","?",
 		"s","d","?","?","w","l","?","?","?","?","?","?","?","?","?","?"
@@ -231,7 +231,7 @@ static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
 
 static UINT32 dasm_cop1x(UINT32 pc, UINT32 op, char *buffer)
 {
-	static const char *format3_table[] =
+	static const char *const format3_table[] =
 	{
 		"s","d","?","?","w","l","?","?"
 	};

src/emu/cpu/mips/mipsdasm.c

@@ -21,7 +21,7 @@ static char *make_signed_hex_str_16( UINT32 value )
 	return s_hex;
 }
 
-static const char *s_cpugenreg[] =
+static const char *const s_cpugenreg[] =
 {
 	"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
 	"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
@@ -29,7 +29,7 @@ static const char *s_cpugenreg[] =
 	"t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra"
 };
 
-static const char *s_cp0genreg[] =
+static const char *const s_cp0genreg[] =
 {
 	"Index", "Random", "EntryLo", "cp0r3", "Context", "cp0r5", "cp0r6", "cp0r7",
 	"BadVAddr", "cp0r9", "EntryHi", "cp0r11", "SR", "Cause", "EPC", "PRId",
@@ -37,7 +37,7 @@ static const char *s_cp0genreg[] =
 	"cp0r24", "cp0r25", "cp0r26", "cp0r27", "cp0r28", "cp0r29", "cp0r30", "cp0r31"
 };
 
-static const char *s_cp1genreg[] =
+static const char *const s_cp1genreg[] =
 {
 	"cp1r0", "cp1r1", "cp1r2", "cp1r3", "cp1r4", "cp1r5", "cp1r6", "cp1r7",
 	"cp1r8", "cp1r9", "cp1r10", "cp1r11", "cp1r12", "cp1r13", "cp1r14", "cp1r15",
@@ -45,7 +45,7 @@ static const char *s_cp1genreg[] =
 	"cp1r23", "cp1r24", "cp1r25", "cp1r26", "cp1r27", "cp1r28", "cp1r29", "cp1r30"
 };
 
-static const char *s_cp1ctlreg[] =
+static const char *const s_cp1ctlreg[] =
 {
 	"cp1cr0", "cp1cr1", "cp1cr2", "cp1cr3", "cp1cr4", "cp1cr5", "cp1cr6", "cp1cr7",
 	"cp1cr8", "cp1cr9", "cp1cr10", "cp1cr11", "cp1cr12", "cp1cr13", "cp1cr14", "cp1cr15",
@@ -53,7 +53,7 @@ static const char *s_cp1ctlreg[] =
 	"cp1cr24", "cp1cr25", "cp1cr26", "cp1cr27", "cp1cr28", "cp1cr29", "cp1cr30", "cp1cr31"
 };
 
-static const char *s_cp2genreg[] =
+static const char *const s_cp2genreg[] =
 {
 	"vxy0", "vz0", "vxy1", "vz1", "vxy2", "vz2", "rgb", "otz",
 	"ir0", "ir1", "ir2", "ir3", "sxy0", "sxy1", "sxy2", "sxyp",
@@ -61,7 +61,7 @@ static const char *s_cp2genreg[] =
 	"mac0", "mac1", "mac2", "mac3", "irgb", "orgb", "lzcs", "lzcr"
 };
 
-static const char *s_cp2ctlreg[] =
+static const char *const s_cp2ctlreg[] =
 {
 	"r11r12", "r13r21", "r22r23", "r31r32", "r33", "trx", "try", "trz",
 	"l11l12", "l13l21", "l22l23", "l31l32", "l33", "rbk", "gbk", "bbk",
@@ -69,27 +69,27 @@ static const char *s_cp2ctlreg[] =
 	"ofx", "ofy", "h", "dqa", "dqb", "zsf3", "zsf4", "flag"
 };
 
-static const char *s_gtesf[] =
+static const char *const s_gtesf[] =
 {
 	"0", "12"
 };
 
-static const char *s_gtemx[] =
+static const char *const s_gtemx[] =
 {
 	"rm", "lm", "cm", "0"
 };
 
-static const char *s_gtev[] =
+static const char *const s_gtev[] =
 {
 	"v0", "v1", "v2", "ir"
 };
 
-static const char *s_gtecv[] =
+static const char *const s_gtecv[] =
 {
 	"tr", "bk", "fc", "0"
 };
 
-static const char *s_gtelm[] =
+static const char *const s_gtelm[] =
 {
 	"0", "1"
 };

src/emu/cpu/mips/psx.c

@@ -62,7 +62,7 @@
 #define CAUSE_CE2 ( 2L << 28 )
 #define CAUSE_BD ( 1L << 31 )
 
-static const char *delayn[] =
+static const char *const delayn[] =
 {
 	"pc", "at", "v0", "v1", "a0", "a1", "a2", "a3",
 	"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
@@ -92,7 +92,7 @@ static mips_cpu_context mipscpu;
 
 static int mips_ICount = 0;
 
-static UINT32 mips_mtc0_writemask[]=
+static const UINT32 mips_mtc0_writemask[]=
 {
 	0xffffffff, /* INDEX */
 	0x00000000, /* RANDOM */
@@ -2513,23 +2513,23 @@ static void docop2( int gteop )
 	UINT16 n_v1;
 	UINT16 n_v2;
 	UINT16 n_v3;
-	const UINT16 **p_n_mx;
+	const UINT16 *const *p_n_mx;
-	const UINT32 **p_n_cv;
+	const UINT32 *const *p_n_cv;
 	static const UINT16 n_zm = 0;
 	static const UINT32 n_zc = 0;
-	static const UINT16 *p_n_vx[] = { &VX0, &VX1, &VX2 };
+	static const UINT16 *const p_n_vx[] = { &VX0, &VX1, &VX2 };
-	static const UINT16 *p_n_vy[] = { &VY0, &VY1, &VY2 };
+	static const UINT16 *const p_n_vy[] = { &VY0, &VY1, &VY2 };
-	static const UINT16 *p_n_vz[] = { &VZ0, &VZ1, &VZ2 };
+	static const UINT16 *const p_n_vz[] = { &VZ0, &VZ1, &VZ2 };
-	static const UINT16 *p_n_rm[] = { &R11, &R12, &R13, &R21, &R22, &R23, &R31, &R32, &R33 };
+	static const UINT16 *const p_n_rm[] = { &R11, &R12, &R13, &R21, &R22, &R23, &R31, &R32, &R33 };
-	static const UINT16 *p_n_lm[] = { &L11, &L12, &L13, &L21, &L22, &L23, &L31, &L32, &L33 };
+	static const UINT16 *const p_n_lm[] = { &L11, &L12, &L13, &L21, &L22, &L23, &L31, &L32, &L33 };
-	static const UINT16 *p_n_cm[] = { &LR1, &LR2, &LR3, &LG1, &LG2, &LG3, &LB1, &LB2, &LB3 };
+	static const UINT16 *const p_n_cm[] = { &LR1, &LR2, &LR3, &LG1, &LG2, &LG3, &LB1, &LB2, &LB3 };
-	static const UINT16 *p_n_zm[] = { &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm };
+	static const UINT16 *const p_n_zm[] = { &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm, &n_zm };
-	static const UINT16 **p_p_n_mx[] = { p_n_rm, p_n_lm, p_n_cm, p_n_zm };
+	static const UINT16 *const *p_p_n_mx[] = { p_n_rm, p_n_lm, p_n_cm, p_n_zm };
-	static const UINT32 *p_n_tr[] = { &TRX, &TRY, &TRZ };
+	static const UINT32 *const p_n_tr[] = { &TRX, &TRY, &TRZ };
-	static const UINT32 *p_n_bk[] = { &RBK, &GBK, &BBK };
+	static const UINT32 *const p_n_bk[] = { &RBK, &GBK, &BBK };
-	static const UINT32 *p_n_fc[] = { &RFC, &GFC, &BFC };
+	static const UINT32 *const p_n_fc[] = { &RFC, &GFC, &BFC };
-	static const UINT32 *p_n_zc[] = { &n_zc, &n_zc, &n_zc };
+	static const UINT32 *const p_n_zc[] = { &n_zc, &n_zc, &n_zc };
-	static const UINT32 **p_p_n_cv[] = { p_n_tr, p_n_bk, p_n_fc, p_n_zc };
+	static const UINT32 *const *p_p_n_cv[] = { p_n_tr, p_n_bk, p_n_fc, p_n_zc };
 
 	switch( GTE_FUNCT( gteop ) )
 	{

src/emu/cpu/mips/r3kdasm.c

@@ -9,7 +9,7 @@
 #include "cpuintrf.h"
 
 
-static const char *reg[32] =
+static const char *const reg[32] =
 {
 	"0",	"r1",	"r2",	"r3",	"r4",	"r5",	"r6",	"r7",
 	"r8",	"r9",	"r10",	"r11",	"r12",	"r13",	"r14",	"r15",
@@ -18,7 +18,7 @@ static const char *reg[32] =
 };
 
 
-static const char *cpreg[4][32] =
+static const char *const cpreg[4][32] =
 {
 	{
 		"Index","Random","EntryLo","cpr3",	"Context",	"cpr5",	"cpr6",	"cpr7",
@@ -47,7 +47,7 @@ static const char *cpreg[4][32] =
 };
 
 
-static const char *ccreg[4][32] =
+static const char *const ccreg[4][32] =
 {
 	{
 		"ccr0",	"ccr1",	"ccr2",	"ccr3",	"ccr4",	"ccr5",	"ccr6",	"ccr7",

src/emu/cpu/nec/nec.c

@@ -1006,7 +1006,7 @@ static offs_t nec_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8
 
 static void nec_init(int index, int clock, const void *config, int (*irqcallback)(int), int type)
 {
-	static const char *names[]={"V20","V30","V33"};
+	static const char *const names[]={"V20","V30","V33"};
 
 	state_save_register_item_array(names[type], index, I.regs.w);
 	state_save_register_item_array(names[type], index, I.sregs);

src/emu/cpu/nec/necdasm.c

@@ -802,9 +802,9 @@ static const GROUP_OP group_op_table[] =
 
 
 
-static const char *nec_reg[8] = { "aw",  "cw",  "dw",  "bw",  "sp",  "bp",  "ix",  "iy" };
+static const char *const nec_reg[8] = { "aw",  "cw",  "dw",  "bw",  "sp",  "bp",  "ix",  "iy" };
-static const char *neg_reg8[8] = { "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh" };
+static const char *const neg_reg8[8] = { "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh" };
-static const char *nec_sreg[8] = { "ds1", "ps", "ss", "ds0", "???", "???", "???", "???" };
+static const char *const nec_sreg[8] = { "ds1", "ps", "ss", "ds0", "???", "???", "???", "???" };
 
 static UINT32 pc;
 static UINT8 modrm;

src/emu/cpu/pic16c5x/16c5xdsm.c

@@ -52,14 +52,14 @@ typedef unsigned short int word;
 #define FMT(a,b) a, b
 #define PTRS_PER_FORMAT 2
 
-static const char *regfile[32] = { "Reg$00 (IND)",    "Reg$01 (TMR)",    "Reg$02 (PCL)",  "Reg$03 (ST)", "Reg$04 (FSR)", "Reg$05 (PTA)", "Reg$06 (PTB)", "Reg$07 (PTC)",
+static const char *const regfile[32] = { "Reg$00 (IND)",    "Reg$01 (TMR)",    "Reg$02 (PCL)",  "Reg$03 (ST)", "Reg$04 (FSR)", "Reg$05 (PTA)", "Reg$06 (PTB)", "Reg$07 (PTC)",
 								 "Reg$08", "Reg$09", "Reg$0A", "Reg$0B", "Reg$0C", "Reg$0D", "Reg$0E", "Reg$0F",
 								 "Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17",
 								 "Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F" };
 
-static const char *dest[2] = { "W", "Reg" };
+static const char *const dest[2] = { "W", "Reg" };
 
-static const char *PIC16C5xFormats[] = {
+static const char *const PIC16C5xFormats[] = {
 	FMT("000000000000", "nop"),
 	FMT("000000000010", "option"),
 	FMT("000000000011", "sleep"),
@@ -113,7 +113,8 @@ static int OpInizialized = 0;
 
 static void InitDasm16C5x(void)
 {
-	const char *p, **ops;
+	const char *p;
+	const char *const *ops;
 	word mask, bits;
 	int bit;
 	int i;

src/emu/cpu/powerpc/drc_ops.c

@@ -295,11 +295,11 @@ static UINT32 recompile_instruction(drc_core *drc, UINT32 pc, UINT32 *opptr)
 	if (opcode != 0) {		// this is a little workaround for VF3
 		switch(opcode >> 26)
 		{
-			case 19:	return optable19[(opcode >> 1) & 0x3ff](drc, opcode);
+			case 19:	return ppc.optable19[(opcode >> 1) & 0x3ff](drc, opcode);
-			case 31:	return optable31[(opcode >> 1) & 0x3ff](drc, opcode);
+			case 31:	return ppc.optable31[(opcode >> 1) & 0x3ff](drc, opcode);
-			case 59:	return optable59[(opcode >> 1) & 0x3ff](drc, opcode);
+			case 59:	return ppc.optable59[(opcode >> 1) & 0x3ff](drc, opcode);
-			case 63:	return optable63[(opcode >> 1) & 0x3ff](drc, opcode);
+			case 63:	return ppc.optable63[(opcode >> 1) & 0x3ff](drc, opcode);
-			default:	return optable[opcode >> 26](drc, opcode);
+			default:	return ppc.optable[opcode >> 26](drc, opcode);
 		}
 	}
 	return RECOMPILE_SUCCESSFUL | RECOMPILE_END_OF_STRING;
@@ -484,7 +484,7 @@ static void append_branch_or_dispatch(drc_core *drc, UINT32 newpc, int cycles)
 
 /*
 // this table translates x86 SF and ZF flags to PPC CR values
-static UINT8 condition_table[4] =
+static const UINT8 condition_table[4] =
 {
     0x4,    // x86 SF == 0, ZF == 0   -->   PPC GT (positive)
     0x2,    // x86 SF == 0, ZF == 1   -->   PPC EQ (zero)

src/emu/cpu/powerpc/drc_ops.h

@@ -1,4 +1,4 @@
-static PPC_OPCODE ppcdrc_opcode_common[] =
+static const PPC_OPCODE ppcdrc_opcode_common[] =
 {
 	/*code  subcode         handler                 */
 	{ 31,	266,			recompile_addx				},

src/emu/cpu/powerpc/ppc.c

@@ -4,7 +4,7 @@
 #include "ppc.h"
 #include "debugger.h"
 
-#if (HAS_PPC603 || HAS_PPC601)
+#if (HAS_PPC603 || HAS_PPC601 || HAS_PPC604)
 void ppc603_exception(int exception);
 #endif
 #if (HAS_PPC602)
@@ -71,7 +71,7 @@ static void ppc403_spu_w(UINT32 a, UINT8 d);
 	if((ppc.msr & 0x2000) == 0){	\
 	}
 
-#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_MPC8240)
+#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_PPC604||HAS_MPC8240)
 static UINT32		ppc_field_xlat[256];
 #endif
 
@@ -249,7 +249,7 @@ typedef struct {
 	FPR	fpr[32];
 	UINT32 sr[16];
 
-#if HAS_PPC603 || HAS_PPC601 || HAS_MPC8240
+#if HAS_PPC603 || HAS_PPC601 || HAS_MPC8240 || HAS_PPC604
 	int is603;
 #endif
 #if HAS_PPC602
@@ -281,6 +281,12 @@ typedef struct {
 	void (*write16_unaligned)(offs_t address, UINT16 data);
 	void (*write32_unaligned)(offs_t address, UINT32 data);
 	void (*write64_unaligned)(offs_t address, UINT64 data);
+
+	void (* optable19[1024])(UINT32);
+	void (* optable31[1024])(UINT32);
+	void (* optable59[1024])(UINT32);
+	void (* optable63[1024])(UINT32);
+	void (* optable[64])(UINT32);
 } PPC_REGS;
 
 
@@ -317,7 +323,7 @@ INLINE int IS_PPC602(void)
 
 INLINE int IS_PPC603(void)
 {
-#if HAS_PPC603 || HAS_PPC601
+#if HAS_PPC603 || HAS_PPC601 || HAS_PPC604
 	return ppc.is603;
 #else
 	return 0;
@@ -480,7 +486,7 @@ INLINE void ppc_set_spr(int spr, UINT32 value)
 		case SPR_PVR:		return;
 	}
 
-#if (HAS_PPC603 || HAS_PPC602 || HAS_PPC601)
+#if (HAS_PPC603 || HAS_PPC602 || HAS_PPC601 || HAS_PPC604)
 	if(IS_PPC602() || IS_PPC603()) {
 		switch(spr)
 		{
@@ -492,7 +498,7 @@ INLINE void ppc_set_spr(int spr, UINT32 value)
 					if (IS_PPC602())
 						ppc602_exception(EXCEPTION_DECREMENTER);
 #endif
-#if HAS_PPC603 || HAS_PPC601
+#if HAS_PPC603 || HAS_PPC601 || HAS_PPC604
 					if (IS_PPC603())
 						ppc603_exception(EXCEPTION_DECREMENTER);
 #endif
@@ -691,7 +697,7 @@ INLINE UINT32 ppc_get_spr(int spr)
 	}
 #endif
 
-#if (HAS_PPC603 || HAS_PPC602 || HAS_PPC601)
+#if (HAS_PPC603 || HAS_PPC602 || HAS_PPC601 || HAS_PPC604)
 	if (IS_PPC603() || IS_PPC602())
 	{
 		switch (spr)
@@ -817,12 +823,6 @@ INLINE void ppc_exception(int exception_type)
 
 /***********************************************************************/
 
-static void (* optable19[1024])(UINT32);
-static void (* optable31[1024])(UINT32);
-static void (* optable59[1024])(UINT32);
-static void (* optable63[1024])(UINT32);
-static void (* optable[64])(UINT32);
-
 #include "ppc_mem.c"
 
 #if (HAS_PPC403)
@@ -833,7 +833,7 @@ static void (* optable[64])(UINT32);
 #include "ppc602.c"
 #endif
 
-#if (HAS_PPC603 || HAS_PPC601 || HAS_MPC8240)
+#if (HAS_PPC603 || HAS_PPC601 || HAS_MPC8240 || HAS_PPC604)
 #include "ppc603.c"
 #endif
 
@@ -851,13 +851,13 @@ void ppc_init(void)
 	memset(&ppc, 0, sizeof(ppc));
 
 	for( i=0; i < 64; i++ ) {
-		optable[i] = ppc_invalid;
+		ppc.optable[i] = ppc_invalid;
 	}
 	for( i=0; i < 1024; i++ ) {
-		optable19[i] = ppc_invalid;
+		ppc.optable19[i] = ppc_invalid;
-		optable31[i] = ppc_invalid;
+		ppc.optable31[i] = ppc_invalid;
-		optable59[i] = ppc_invalid;
+		ppc.optable59[i] = ppc_invalid;
-		optable63[i] = ppc_invalid;
+		ppc.optable63[i] = ppc_invalid;
 	}
 
 	/* Fill the opcode tables */
@@ -866,11 +866,11 @@ void ppc_init(void)
 		switch(ppc_opcode_common[i].code)
 		{
 			case 19:
-				optable19[ppc_opcode_common[i].subcode] = ppc_opcode_common[i].handler;
+				ppc.optable19[ppc_opcode_common[i].subcode] = ppc_opcode_common[i].handler;
 				break;
 
 			case 31:
-				optable31[ppc_opcode_common[i].subcode] = ppc_opcode_common[i].handler;
+				ppc.optable31[ppc_opcode_common[i].subcode] = ppc_opcode_common[i].handler;
 				break;
 
 			case 59:
@@ -878,7 +878,7 @@ void ppc_init(void)
 				break;
 
 			default:
-				optable[ppc_opcode_common[i].code] = ppc_opcode_common[i].handler;
+				ppc.optable[ppc_opcode_common[i].code] = ppc_opcode_common[i].handler;
 		}
 
 	}
@@ -908,18 +908,18 @@ static void ppc403_init(int index, int clock, const void *_config, int (*irqcall
 	ppc_init();
 
 	/* PPC403 specific opcodes */
-	optable31[454] = ppc_dccci;
+	ppc.optable31[454] = ppc_dccci;
-	optable31[486] = ppc_dcread;
+	ppc.optable31[486] = ppc_dcread;
-	optable31[262] = ppc_icbt;
+	ppc.optable31[262] = ppc_icbt;
-	optable31[966] = ppc_iccci;
+	ppc.optable31[966] = ppc_iccci;
-	optable31[998] = ppc_icread;
+	ppc.optable31[998] = ppc_icread;
-	optable31[323] = ppc_mfdcr;
+	ppc.optable31[323] = ppc_mfdcr;
-	optable31[451] = ppc_mtdcr;
+	ppc.optable31[451] = ppc_mtdcr;
-	optable31[131] = ppc_wrtee;
+	ppc.optable31[131] = ppc_wrtee;
-	optable31[163] = ppc_wrteei;
+	ppc.optable31[163] = ppc_wrteei;
 
 	// !!! why is rfci here !!!
-	optable19[51] = ppc_rfci;
+	ppc.optable19[51] = ppc_rfci;
 
 	ppc.spu.rx_timer = timer_alloc(ppc403_spu_rx_callback, NULL);
 	ppc.spu.tx_timer = timer_alloc(ppc403_spu_tx_callback, NULL);
@@ -957,78 +957,80 @@ static void ppc603_init(int index, int clock, const void *_config, int (*irqcall
 
 	ppc_init() ;
 
-	optable[48] = ppc_lfs;
+	ppc.optable[48] = ppc_lfs;
-	optable[49] = ppc_lfsu;
+	ppc.optable[49] = ppc_lfsu;
-	optable[50] = ppc_lfd;
+	ppc.optable[50] = ppc_lfd;
-	optable[51] = ppc_lfdu;
+	ppc.optable[51] = ppc_lfdu;
-	optable[52] = ppc_stfs;
+	ppc.optable[52] = ppc_stfs;
-	optable[53] = ppc_stfsu;
+	ppc.optable[53] = ppc_stfsu;
-	optable[54] = ppc_stfd;
+	ppc.optable[54] = ppc_stfd;
-	optable[55] = ppc_stfdu;
+	ppc.optable[55] = ppc_stfdu;
-	optable31[631] = ppc_lfdux;
+	ppc.optable31[631] = ppc_lfdux;
-	optable31[599] = ppc_lfdx;
+	ppc.optable31[599] = ppc_lfdx;
-	optable31[567] = ppc_lfsux;
+	ppc.optable31[567] = ppc_lfsux;
-	optable31[535] = ppc_lfsx;
+	ppc.optable31[535] = ppc_lfsx;
-	optable31[595] = ppc_mfsr;
+	ppc.optable31[595] = ppc_mfsr;
-	optable31[659] = ppc_mfsrin;
+	ppc.optable31[659] = ppc_mfsrin;
-	optable31[371] = ppc_mftb;
+	ppc.optable31[371] = ppc_mftb;
-	optable31[210] = ppc_mtsr;
+	ppc.optable31[210] = ppc_mtsr;
-	optable31[242] = ppc_mtsrin;
+	ppc.optable31[242] = ppc_mtsrin;
-	optable31[758] = ppc_dcba;
+	ppc.optable31[758] = ppc_dcba;
-	optable31[759] = ppc_stfdux;
+	ppc.optable31[759] = ppc_stfdux;
-	optable31[727] = ppc_stfdx;
+	ppc.optable31[727] = ppc_stfdx;
-	optable31[983] = ppc_stfiwx;
+	ppc.optable31[983] = ppc_stfiwx;
-	optable31[695] = ppc_stfsux;
+	ppc.optable31[695] = ppc_stfsux;
-	optable31[663] = ppc_stfsx;
+	ppc.optable31[663] = ppc_stfsx;
-	optable31[370] = ppc_tlbia;
+	ppc.optable31[370] = ppc_tlbia;
-	optable31[306] = ppc_tlbie;
+	ppc.optable31[306] = ppc_tlbie;
-	optable31[566] = ppc_tlbsync;
+	ppc.optable31[566] = ppc_tlbsync;
-	optable31[310] = ppc_eciwx;
+	ppc.optable31[310] = ppc_eciwx;
-	optable31[438] = ppc_ecowx;
+	ppc.optable31[438] = ppc_ecowx;
 
-	optable63[264] = ppc_fabsx;
+	ppc.optable63[264] = ppc_fabsx;
-	optable63[21] = ppc_faddx;
+	ppc.optable63[21] = ppc_faddx;
-	optable63[32] = ppc_fcmpo;
+	ppc.optable63[32] = ppc_fcmpo;
-	optable63[0] = ppc_fcmpu;
+	ppc.optable63[0] = ppc_fcmpu;
-	optable63[14] = ppc_fctiwx;
+	ppc.optable63[14] = ppc_fctiwx;
-	optable63[15] = ppc_fctiwzx;
+	ppc.optable63[15] = ppc_fctiwzx;
-	optable63[18] = ppc_fdivx;
+	ppc.optable63[18] = ppc_fdivx;
-	optable63[72] = ppc_fmrx;
+	ppc.optable63[72] = ppc_fmrx;
-	optable63[136] = ppc_fnabsx;
+	ppc.optable63[136] = ppc_fnabsx;
-	optable63[40] = ppc_fnegx;
+	ppc.optable63[40] = ppc_fnegx;
-	optable63[12] = ppc_frspx;
+	ppc.optable63[12] = ppc_frspx;
-	optable63[26] = ppc_frsqrtex;
+	ppc.optable63[26] = ppc_frsqrtex;
-	optable63[22] = ppc_fsqrtx;
+	ppc.optable63[22] = ppc_fsqrtx;
-	optable63[20] = ppc_fsubx;
+	ppc.optable63[20] = ppc_fsubx;
-	optable63[583] = ppc_mffsx;
+	ppc.optable63[583] = ppc_mffsx;
-	optable63[70] = ppc_mtfsb0x;
+	ppc.optable63[70] = ppc_mtfsb0x;
-	optable63[38] = ppc_mtfsb1x;
+	ppc.optable63[38] = ppc_mtfsb1x;
-	optable63[711] = ppc_mtfsfx;
+	ppc.optable63[711] = ppc_mtfsfx;
-	optable63[134] = ppc_mtfsfix;
+	ppc.optable63[134] = ppc_mtfsfix;
-	optable63[64] = ppc_mcrfs;
+	ppc.optable63[64] = ppc_mcrfs;
 
-	optable59[21] = ppc_faddsx;
+	ppc.optable59[21] = ppc_faddsx;
-	optable59[18] = ppc_fdivsx;
+	ppc.optable59[18] = ppc_fdivsx;
-	optable59[24] = ppc_fresx;
+	ppc.optable59[24] = ppc_fresx;
-	optable59[22] = ppc_fsqrtsx;
+	ppc.optable59[22] = ppc_fsqrtsx;
-	optable59[20] = ppc_fsubsx;
+	ppc.optable59[20] = ppc_fsubsx;
 
 	for(i = 0; i < 32; i++)
 	{
-		optable63[i * 32 | 29] = ppc_fmaddx;
+		ppc.optable63[i * 32 | 29] = ppc_fmaddx;
-		optable63[i * 32 | 28] = ppc_fmsubx;
+		ppc.optable63[i * 32 | 28] = ppc_fmsubx;
-		optable63[i * 32 | 25] = ppc_fmulx;
+		ppc.optable63[i * 32 | 25] = ppc_fmulx;
-		optable63[i * 32 | 31] = ppc_fnmaddx;
+		ppc.optable63[i * 32 | 31] = ppc_fnmaddx;
-		optable63[i * 32 | 30] = ppc_fnmsubx;
+		ppc.optable63[i * 32 | 30] = ppc_fnmsubx;
-		optable63[i * 32 | 23] = ppc_fselx;
+		ppc.optable63[i * 32 | 23] = ppc_fselx;
 
-		optable59[i * 32 | 29] = ppc_fmaddsx;
+		ppc.optable59[i * 32 | 29] = ppc_fmaddsx;
-		optable59[i * 32 | 28] = ppc_fmsubsx;
+		ppc.optable59[i * 32 | 28] = ppc_fmsubsx;
-		optable59[i * 32 | 25] = ppc_fmulsx;
+		ppc.optable59[i * 32 | 25] = ppc_fmulsx;
-		optable59[i * 32 | 31] = ppc_fnmaddsx;
+		ppc.optable59[i * 32 | 31] = ppc_fnmaddsx;
-		optable59[i * 32 | 30] = ppc_fnmsubsx;
+		ppc.optable59[i * 32 | 30] = ppc_fnmsubsx;
 	}
 
+	ppc.optable31[978] = ppc_tlbld;
+
 	for(i = 0; i < 256; i++)
 	{
 		ppc_field_xlat[i] =
@@ -1099,76 +1101,76 @@ static void ppc602_init(int index, int clock, const void *_config, int (*irqcall
 
 	ppc_init() ;
 
-	optable[48] = ppc_lfs;
+	ppc.optable[48] = ppc_lfs;
-	optable[49] = ppc_lfsu;
+	ppc.optable[49] = ppc_lfsu;
-	optable[50] = ppc_lfd;
+	ppc.optable[50] = ppc_lfd;
-	optable[51] = ppc_lfdu;
+	ppc.optable[51] = ppc_lfdu;
-	optable[52] = ppc_stfs;
+	ppc.optable[52] = ppc_stfs;
-	optable[53] = ppc_stfsu;
+	ppc.optable[53] = ppc_stfsu;
-	optable[54] = ppc_stfd;
+	ppc.optable[54] = ppc_stfd;
-	optable[55] = ppc_stfdu;
+	ppc.optable[55] = ppc_stfdu;
-	optable31[631] = ppc_lfdux;
+	ppc.optable31[631] = ppc_lfdux;
-	optable31[599] = ppc_lfdx;
+	ppc.optable31[599] = ppc_lfdx;
-	optable31[567] = ppc_lfsux;
+	ppc.optable31[567] = ppc_lfsux;
-	optable31[535] = ppc_lfsx;
+	ppc.optable31[535] = ppc_lfsx;
-	optable31[595] = ppc_mfsr;
+	ppc.optable31[595] = ppc_mfsr;
-	optable31[659] = ppc_mfsrin;
+	ppc.optable31[659] = ppc_mfsrin;
-	optable31[371] = ppc_mftb;
+	ppc.optable31[371] = ppc_mftb;
-	optable31[210] = ppc_mtsr;
+	ppc.optable31[210] = ppc_mtsr;
-	optable31[242] = ppc_mtsrin;
+	ppc.optable31[242] = ppc_mtsrin;
-	optable31[758] = ppc_dcba;
+	ppc.optable31[758] = ppc_dcba;
-	optable31[759] = ppc_stfdux;
+	ppc.optable31[759] = ppc_stfdux;
-	optable31[727] = ppc_stfdx;
+	ppc.optable31[727] = ppc_stfdx;
-	optable31[983] = ppc_stfiwx;
+	ppc.optable31[983] = ppc_stfiwx;
-	optable31[695] = ppc_stfsux;
+	ppc.optable31[695] = ppc_stfsux;
-	optable31[663] = ppc_stfsx;
+	ppc.optable31[663] = ppc_stfsx;
-	optable31[370] = ppc_tlbia;
+	ppc.optable31[370] = ppc_tlbia;
-	optable31[306] = ppc_tlbie;
+	ppc.optable31[306] = ppc_tlbie;
-	optable31[566] = ppc_tlbsync;
+	ppc.optable31[566] = ppc_tlbsync;
-	optable31[310] = ppc_eciwx;
+	ppc.optable31[310] = ppc_eciwx;
-	optable31[438] = ppc_ecowx;
+	ppc.optable31[438] = ppc_ecowx;
 
-	optable63[264] = ppc_fabsx;
+	ppc.optable63[264] = ppc_fabsx;
-	optable63[21] = ppc_faddx;
+	ppc.optable63[21] = ppc_faddx;
-	optable63[32] = ppc_fcmpo;
+	ppc.optable63[32] = ppc_fcmpo;
-	optable63[0] = ppc_fcmpu;
+	ppc.optable63[0] = ppc_fcmpu;
-	optable63[14] = ppc_fctiwx;
+	ppc.optable63[14] = ppc_fctiwx;
-	optable63[15] = ppc_fctiwzx;
+	ppc.optable63[15] = ppc_fctiwzx;
-	optable63[18] = ppc_fdivx;
+	ppc.optable63[18] = ppc_fdivx;
-	optable63[72] = ppc_fmrx;
+	ppc.optable63[72] = ppc_fmrx;
-	optable63[136] = ppc_fnabsx;
+	ppc.optable63[136] = ppc_fnabsx;
-	optable63[40] = ppc_fnegx;
+	ppc.optable63[40] = ppc_fnegx;
-	optable63[12] = ppc_frspx;
+	ppc.optable63[12] = ppc_frspx;
-	optable63[26] = ppc_frsqrtex;
+	ppc.optable63[26] = ppc_frsqrtex;
-	optable63[22] = ppc_fsqrtx;
+	ppc.optable63[22] = ppc_fsqrtx;
-	optable63[20] = ppc_fsubx;
+	ppc.optable63[20] = ppc_fsubx;
-	optable63[583] = ppc_mffsx;
+	ppc.optable63[583] = ppc_mffsx;
-	optable63[70] = ppc_mtfsb0x;
+	ppc.optable63[70] = ppc_mtfsb0x;
-	optable63[38] = ppc_mtfsb1x;
+	ppc.optable63[38] = ppc_mtfsb1x;
-	optable63[711] = ppc_mtfsfx;
+	ppc.optable63[711] = ppc_mtfsfx;
-	optable63[134] = ppc_mtfsfix;
+	ppc.optable63[134] = ppc_mtfsfix;
-	optable63[64] = ppc_mcrfs;
+	ppc.optable63[64] = ppc_mcrfs;
 
-	optable59[21] = ppc_faddsx;
+	ppc.optable59[21] = ppc_faddsx;
-	optable59[18] = ppc_fdivsx;
+	ppc.optable59[18] = ppc_fdivsx;
-	optable59[24] = ppc_fresx;
+	ppc.optable59[24] = ppc_fresx;
-	optable59[22] = ppc_fsqrtsx;
+	ppc.optable59[22] = ppc_fsqrtsx;
-	optable59[20] = ppc_fsubsx;
+	ppc.optable59[20] = ppc_fsubsx;
 
 	for(i = 0; i < 32; i++)
 	{
-		optable63[i * 32 | 29] = ppc_fmaddx;
+		ppc.optable63[i * 32 | 29] = ppc_fmaddx;
-		optable63[i * 32 | 28] = ppc_fmsubx;
+		ppc.optable63[i * 32 | 28] = ppc_fmsubx;
-		optable63[i * 32 | 25] = ppc_fmulx;
+		ppc.optable63[i * 32 | 25] = ppc_fmulx;
-		optable63[i * 32 | 31] = ppc_fnmaddx;
+		ppc.optable63[i * 32 | 31] = ppc_fnmaddx;
-		optable63[i * 32 | 30] = ppc_fnmsubx;
+		ppc.optable63[i * 32 | 30] = ppc_fnmsubx;
-		optable63[i * 32 | 23] = ppc_fselx;
+		ppc.optable63[i * 32 | 23] = ppc_fselx;
 
-		optable59[i * 32 | 29] = ppc_fmaddsx;
+		ppc.optable59[i * 32 | 29] = ppc_fmaddsx;
-		optable59[i * 32 | 28] = ppc_fmsubsx;
+		ppc.optable59[i * 32 | 28] = ppc_fmsubsx;
-		optable59[i * 32 | 25] = ppc_fmulsx;
+		ppc.optable59[i * 32 | 25] = ppc_fmulsx;
-		optable59[i * 32 | 31] = ppc_fnmaddsx;
+		ppc.optable59[i * 32 | 31] = ppc_fnmaddsx;
-		optable59[i * 32 | 30] = ppc_fnmsubsx;
+		ppc.optable59[i * 32 | 30] = ppc_fnmsubsx;
 	}
 
 	for(i = 0; i < 256; i++)
@@ -1185,10 +1187,10 @@ static void ppc602_init(int index, int clock, const void *_config, int (*irqcall
 	}
 
 	// PPC602 specific opcodes
-	optable31[596] = ppc_esa;
+	ppc.optable31[596] = ppc_esa;
-	optable31[628] = ppc_dsa;
+	ppc.optable31[628] = ppc_dsa;
-	optable31[1010] = ppc_tlbli;
+	ppc.optable31[1010] = ppc_tlbli;
-	optable31[978] = ppc_tlbld;
+	ppc.optable31[978] = ppc_tlbld;
 
 	ppc.is602 = 1;
 
@@ -1243,76 +1245,76 @@ static void mpc8240_init(int index, int clock, const void *_config, int (*irqcal
 
 	ppc_init();
 
-	optable[48] = ppc_lfs;
+	ppc.optable[48] = ppc_lfs;
-	optable[49] = ppc_lfsu;
+	ppc.optable[49] = ppc_lfsu;
-	optable[50] = ppc_lfd;
+	ppc.optable[50] = ppc_lfd;
-	optable[51] = ppc_lfdu;
+	ppc.optable[51] = ppc_lfdu;
-	optable[52] = ppc_stfs;
+	ppc.optable[52] = ppc_stfs;
-	optable[53] = ppc_stfsu;
+	ppc.optable[53] = ppc_stfsu;
-	optable[54] = ppc_stfd;
+	ppc.optable[54] = ppc_stfd;
-	optable[55] = ppc_stfdu;
+	ppc.optable[55] = ppc_stfdu;
-	optable31[631] = ppc_lfdux;
+	ppc.optable31[631] = ppc_lfdux;
-	optable31[599] = ppc_lfdx;
+	ppc.optable31[599] = ppc_lfdx;
-	optable31[567] = ppc_lfsux;
+	ppc.optable31[567] = ppc_lfsux;
-	optable31[535] = ppc_lfsx;
+	ppc.optable31[535] = ppc_lfsx;
-	optable31[595] = ppc_mfsr;
+	ppc.optable31[595] = ppc_mfsr;
-	optable31[659] = ppc_mfsrin;
+	ppc.optable31[659] = ppc_mfsrin;
-	optable31[371] = ppc_mftb;
+	ppc.optable31[371] = ppc_mftb;
-	optable31[210] = ppc_mtsr;
+	ppc.optable31[210] = ppc_mtsr;
-	optable31[242] = ppc_mtsrin;
+	ppc.optable31[242] = ppc_mtsrin;
-	optable31[758] = ppc_dcba;
+	ppc.optable31[758] = ppc_dcba;
-	optable31[759] = ppc_stfdux;
+	ppc.optable31[759] = ppc_stfdux;
-	optable31[727] = ppc_stfdx;
+	ppc.optable31[727] = ppc_stfdx;
-	optable31[983] = ppc_stfiwx;
+	ppc.optable31[983] = ppc_stfiwx;
-	optable31[695] = ppc_stfsux;
+	ppc.optable31[695] = ppc_stfsux;
-	optable31[663] = ppc_stfsx;
+	ppc.optable31[663] = ppc_stfsx;
-	optable31[370] = ppc_tlbia;
+	ppc.optable31[370] = ppc_tlbia;
-	optable31[306] = ppc_tlbie;
+	ppc.optable31[306] = ppc_tlbie;
-	optable31[566] = ppc_tlbsync;
+	ppc.optable31[566] = ppc_tlbsync;
-	optable31[310] = ppc_eciwx;
+	ppc.optable31[310] = ppc_eciwx;
-	optable31[438] = ppc_ecowx;
+	ppc.optable31[438] = ppc_ecowx;
 
-	optable63[264] = ppc_fabsx;
+	ppc.optable63[264] = ppc_fabsx;
-	optable63[21] = ppc_faddx;
+	ppc.optable63[21] = ppc_faddx;
-	optable63[32] = ppc_fcmpo;
+	ppc.optable63[32] = ppc_fcmpo;
-	optable63[0] = ppc_fcmpu;
+	ppc.optable63[0] = ppc_fcmpu;
-	optable63[14] = ppc_fctiwx;
+	ppc.optable63[14] = ppc_fctiwx;
-	optable63[15] = ppc_fctiwzx;
+	ppc.optable63[15] = ppc_fctiwzx;
-	optable63[18] = ppc_fdivx;
+	ppc.optable63[18] = ppc_fdivx;
-	optable63[72] = ppc_fmrx;
+	ppc.optable63[72] = ppc_fmrx;
-	optable63[136] = ppc_fnabsx;
+	ppc.optable63[136] = ppc_fnabsx;
-	optable63[40] = ppc_fnegx;
+	ppc.optable63[40] = ppc_fnegx;
-	optable63[12] = ppc_frspx;
+	ppc.optable63[12] = ppc_frspx;
-	optable63[26] = ppc_frsqrtex;
+	ppc.optable63[26] = ppc_frsqrtex;
-	optable63[22] = ppc_fsqrtx;
+	ppc.optable63[22] = ppc_fsqrtx;
-	optable63[20] = ppc_fsubx;
+	ppc.optable63[20] = ppc_fsubx;
-	optable63[583] = ppc_mffsx;
+	ppc.optable63[583] = ppc_mffsx;
-	optable63[70] = ppc_mtfsb0x;
+	ppc.optable63[70] = ppc_mtfsb0x;
-	optable63[38] = ppc_mtfsb1x;
+	ppc.optable63[38] = ppc_mtfsb1x;
-	optable63[711] = ppc_mtfsfx;
+	ppc.optable63[711] = ppc_mtfsfx;
-	optable63[134] = ppc_mtfsfix;
+	ppc.optable63[134] = ppc_mtfsfix;
-	optable63[64] = ppc_mcrfs;
+	ppc.optable63[64] = ppc_mcrfs;
 
-	optable59[21] = ppc_faddsx;
+	ppc.optable59[21] = ppc_faddsx;
-	optable59[18] = ppc_fdivsx;
+	ppc.optable59[18] = ppc_fdivsx;
-	optable59[24] = ppc_fresx;
+	ppc.optable59[24] = ppc_fresx;
-	optable59[22] = ppc_fsqrtsx;
+	ppc.optable59[22] = ppc_fsqrtsx;
-	optable59[20] = ppc_fsubsx;
+	ppc.optable59[20] = ppc_fsubsx;
 
 	for(i = 0; i < 32; i++)
 	{
-		optable63[i * 32 | 29] = ppc_fmaddx;
+		ppc.optable63[i * 32 | 29] = ppc_fmaddx;
-		optable63[i * 32 | 28] = ppc_fmsubx;
+		ppc.optable63[i * 32 | 28] = ppc_fmsubx;
-		optable63[i * 32 | 25] = ppc_fmulx;
+		ppc.optable63[i * 32 | 25] = ppc_fmulx;
-		optable63[i * 32 | 31] = ppc_fnmaddx;
+		ppc.optable63[i * 32 | 31] = ppc_fnmaddx;
-		optable63[i * 32 | 30] = ppc_fnmsubx;
+		ppc.optable63[i * 32 | 30] = ppc_fnmsubx;
-		optable63[i * 32 | 23] = ppc_fselx;
+		ppc.optable63[i * 32 | 23] = ppc_fselx;
 
-		optable59[i * 32 | 29] = ppc_fmaddsx;
+		ppc.optable59[i * 32 | 29] = ppc_fmaddsx;
-		optable59[i * 32 | 28] = ppc_fmsubsx;
+		ppc.optable59[i * 32 | 28] = ppc_fmsubsx;
-		optable59[i * 32 | 25] = ppc_fmulsx;
+		ppc.optable59[i * 32 | 25] = ppc_fmulsx;
-		optable59[i * 32 | 31] = ppc_fnmaddsx;
+		ppc.optable59[i * 32 | 31] = ppc_fnmaddsx;
-		optable59[i * 32 | 30] = ppc_fnmsubsx;
+		ppc.optable59[i * 32 | 30] = ppc_fnmsubsx;
 	}
 
 	for(i = 0; i < 256; i++)
@@ -1329,8 +1331,8 @@ static void mpc8240_init(int index, int clock, const void *_config, int (*irqcal
 	}
 
 	// MPC8240 specific opcodes
-	optable31[978] = mpc8240_tlbld;
+	ppc.optable31[978] = mpc8240_tlbld;
-	optable31[1010] = mpc8240_tlbli;
+	ppc.optable31[1010] = mpc8240_tlbli;
 
 	ppc.is603 = 1;
 
@@ -1374,76 +1376,76 @@ static void ppc601_init(int index, int clock, const void *_config, int (*irqcall
 
 	ppc_init() ;
 
-	optable[48] = ppc_lfs;
+	ppc.optable[48] = ppc_lfs;
-	optable[49] = ppc_lfsu;
+	ppc.optable[49] = ppc_lfsu;
-	optable[50] = ppc_lfd;
+	ppc.optable[50] = ppc_lfd;
-	optable[51] = ppc_lfdu;
+	ppc.optable[51] = ppc_lfdu;
-	optable[52] = ppc_stfs;
+	ppc.optable[52] = ppc_stfs;
-	optable[53] = ppc_stfsu;
+	ppc.optable[53] = ppc_stfsu;
-	optable[54] = ppc_stfd;
+	ppc.optable[54] = ppc_stfd;
-	optable[55] = ppc_stfdu;
+	ppc.optable[55] = ppc_stfdu;
-	optable31[631] = ppc_lfdux;
+	ppc.optable31[631] = ppc_lfdux;
-	optable31[599] = ppc_lfdx;
+	ppc.optable31[599] = ppc_lfdx;
-	optable31[567] = ppc_lfsux;
+	ppc.optable31[567] = ppc_lfsux;
-	optable31[535] = ppc_lfsx;
+	ppc.optable31[535] = ppc_lfsx;
-	optable31[595] = ppc_mfsr;
+	ppc.optable31[595] = ppc_mfsr;
-	optable31[659] = ppc_mfsrin;
+	ppc.optable31[659] = ppc_mfsrin;
-	optable31[371] = ppc_mftb;
+	ppc.optable31[371] = ppc_mftb;
-	optable31[210] = ppc_mtsr;
+	ppc.optable31[210] = ppc_mtsr;
-	optable31[242] = ppc_mtsrin;
+	ppc.optable31[242] = ppc_mtsrin;
-	optable31[758] = ppc_dcba;
+	ppc.optable31[758] = ppc_dcba;
-	optable31[759] = ppc_stfdux;
+	ppc.optable31[759] = ppc_stfdux;
-	optable31[727] = ppc_stfdx;
+	ppc.optable31[727] = ppc_stfdx;
-	optable31[983] = ppc_stfiwx;
+	ppc.optable31[983] = ppc_stfiwx;
-	optable31[695] = ppc_stfsux;
+	ppc.optable31[695] = ppc_stfsux;
-	optable31[663] = ppc_stfsx;
+	ppc.optable31[663] = ppc_stfsx;
-	optable31[370] = ppc_tlbia;
+	ppc.optable31[370] = ppc_tlbia;
-	optable31[306] = ppc_tlbie;
+	ppc.optable31[306] = ppc_tlbie;
-	optable31[566] = ppc_tlbsync;
+	ppc.optable31[566] = ppc_tlbsync;
-	optable31[310] = ppc_eciwx;
+	ppc.optable31[310] = ppc_eciwx;
-	optable31[438] = ppc_ecowx;
+	ppc.optable31[438] = ppc_ecowx;
 
-	optable63[264] = ppc_fabsx;
+	ppc.optable63[264] = ppc_fabsx;
-	optable63[21] = ppc_faddx;
+	ppc.optable63[21] = ppc_faddx;
-	optable63[32] = ppc_fcmpo;
+	ppc.optable63[32] = ppc_fcmpo;
-	optable63[0] = ppc_fcmpu;
+	ppc.optable63[0] = ppc_fcmpu;
-	optable63[14] = ppc_fctiwx;
+	ppc.optable63[14] = ppc_fctiwx;
-	optable63[15] = ppc_fctiwzx;
+	ppc.optable63[15] = ppc_fctiwzx;
-	optable63[18] = ppc_fdivx;
+	ppc.optable63[18] = ppc_fdivx;
-	optable63[72] = ppc_fmrx;
+	ppc.optable63[72] = ppc_fmrx;
-	optable63[136] = ppc_fnabsx;
+	ppc.optable63[136] = ppc_fnabsx;
-	optable63[40] = ppc_fnegx;
+	ppc.optable63[40] = ppc_fnegx;
-	optable63[12] = ppc_frspx;
+	ppc.optable63[12] = ppc_frspx;
-	optable63[26] = ppc_frsqrtex;
+	ppc.optable63[26] = ppc_frsqrtex;
-	optable63[22] = ppc_fsqrtx;
+	ppc.optable63[22] = ppc_fsqrtx;
-	optable63[20] = ppc_fsubx;
+	ppc.optable63[20] = ppc_fsubx;
-	optable63[583] = ppc_mffsx;
+	ppc.optable63[583] = ppc_mffsx;
-	optable63[70] = ppc_mtfsb0x;
+	ppc.optable63[70] = ppc_mtfsb0x;
-	optable63[38] = ppc_mtfsb1x;
+	ppc.optable63[38] = ppc_mtfsb1x;
-	optable63[711] = ppc_mtfsfx;
+	ppc.optable63[711] = ppc_mtfsfx;
-	optable63[134] = ppc_mtfsfix;
+	ppc.optable63[134] = ppc_mtfsfix;
-	optable63[64] = ppc_mcrfs;
+	ppc.optable63[64] = ppc_mcrfs;
 
-	optable59[21] = ppc_faddsx;
+	ppc.optable59[21] = ppc_faddsx;
-	optable59[18] = ppc_fdivsx;
+	ppc.optable59[18] = ppc_fdivsx;
-	optable59[24] = ppc_fresx;
+	ppc.optable59[24] = ppc_fresx;
-	optable59[22] = ppc_fsqrtsx;
+	ppc.optable59[22] = ppc_fsqrtsx;
-	optable59[20] = ppc_fsubsx;
+	ppc.optable59[20] = ppc_fsubsx;
 
 	for(i = 0; i < 32; i++)
 	{
-		optable63[i * 32 | 29] = ppc_fmaddx;
+		ppc.optable63[i * 32 | 29] = ppc_fmaddx;
-		optable63[i * 32 | 28] = ppc_fmsubx;
+		ppc.optable63[i * 32 | 28] = ppc_fmsubx;
-		optable63[i * 32 | 25] = ppc_fmulx;
+		ppc.optable63[i * 32 | 25] = ppc_fmulx;
-		optable63[i * 32 | 31] = ppc_fnmaddx;
+		ppc.optable63[i * 32 | 31] = ppc_fnmaddx;
-		optable63[i * 32 | 30] = ppc_fnmsubx;
+		ppc.optable63[i * 32 | 30] = ppc_fnmsubx;
-		optable63[i * 32 | 23] = ppc_fselx;
+		ppc.optable63[i * 32 | 23] = ppc_fselx;
 
-		optable59[i * 32 | 29] = ppc_fmaddsx;
+		ppc.optable59[i * 32 | 29] = ppc_fmaddsx;
-		optable59[i * 32 | 28] = ppc_fmsubsx;
+		ppc.optable59[i * 32 | 28] = ppc_fmsubsx;
-		optable59[i * 32 | 25] = ppc_fmulsx;
+		ppc.optable59[i * 32 | 25] = ppc_fmulsx;
-		optable59[i * 32 | 31] = ppc_fnmaddsx;
+		ppc.optable59[i * 32 | 31] = ppc_fnmaddsx;
-		optable59[i * 32 | 30] = ppc_fnmsubsx;
+		ppc.optable59[i * 32 | 30] = ppc_fnmsubsx;
 	}
 
 	for(i = 0; i < 256; i++)
@@ -1493,6 +1495,136 @@ static void ppc601_exit(void)
 }
 #endif
 
+#if (HAS_PPC604)
+static void ppc604_init(int index, int clock, const void *_config, int (*irqcallback)(int))
+{
+	const ppc_config *config = _config;
+	float multiplier;
+	int i ;
+
+	ppc_init() ;
+
+	ppc.optable[48] = ppc_lfs;
+	ppc.optable[49] = ppc_lfsu;
+	ppc.optable[50] = ppc_lfd;
+	ppc.optable[51] = ppc_lfdu;
+	ppc.optable[52] = ppc_stfs;
+	ppc.optable[53] = ppc_stfsu;
+	ppc.optable[54] = ppc_stfd;
+	ppc.optable[55] = ppc_stfdu;
+	ppc.optable31[631] = ppc_lfdux;
+	ppc.optable31[599] = ppc_lfdx;
+	ppc.optable31[567] = ppc_lfsux;
+	ppc.optable31[535] = ppc_lfsx;
+	ppc.optable31[595] = ppc_mfsr;
+	ppc.optable31[659] = ppc_mfsrin;
+	ppc.optable31[371] = ppc_mftb;
+	ppc.optable31[210] = ppc_mtsr;
+	ppc.optable31[242] = ppc_mtsrin;
+	ppc.optable31[758] = ppc_dcba;
+	ppc.optable31[759] = ppc_stfdux;
+	ppc.optable31[727] = ppc_stfdx;
+	ppc.optable31[983] = ppc_stfiwx;
+	ppc.optable31[695] = ppc_stfsux;
+	ppc.optable31[663] = ppc_stfsx;
+	ppc.optable31[370] = ppc_tlbia;
+	ppc.optable31[306] = ppc_tlbie;
+	ppc.optable31[566] = ppc_tlbsync;
+	ppc.optable31[310] = ppc_eciwx;
+	ppc.optable31[438] = ppc_ecowx;
+
+	ppc.optable63[264] = ppc_fabsx;
+	ppc.optable63[21] = ppc_faddx;
+	ppc.optable63[32] = ppc_fcmpo;
+	ppc.optable63[0] = ppc_fcmpu;
+	ppc.optable63[14] = ppc_fctiwx;
+	ppc.optable63[15] = ppc_fctiwzx;
+	ppc.optable63[18] = ppc_fdivx;
+	ppc.optable63[72] = ppc_fmrx;
+	ppc.optable63[136] = ppc_fnabsx;
+	ppc.optable63[40] = ppc_fnegx;
+	ppc.optable63[12] = ppc_frspx;
+	ppc.optable63[26] = ppc_frsqrtex;
+	ppc.optable63[22] = ppc_fsqrtx;
+	ppc.optable63[20] = ppc_fsubx;
+	ppc.optable63[583] = ppc_mffsx;
+	ppc.optable63[70] = ppc_mtfsb0x;
+	ppc.optable63[38] = ppc_mtfsb1x;
+	ppc.optable63[711] = ppc_mtfsfx;
+	ppc.optable63[134] = ppc_mtfsfix;
+	ppc.optable63[64] = ppc_mcrfs;
+
+	ppc.optable59[21] = ppc_faddsx;
+	ppc.optable59[18] = ppc_fdivsx;
+	ppc.optable59[24] = ppc_fresx;
+	ppc.optable59[22] = ppc_fsqrtsx;
+	ppc.optable59[20] = ppc_fsubsx;
+
+	for(i = 0; i < 32; i++)
+	{
+		ppc.optable63[i * 32 | 29] = ppc_fmaddx;
+		ppc.optable63[i * 32 | 28] = ppc_fmsubx;
+		ppc.optable63[i * 32 | 25] = ppc_fmulx;
+		ppc.optable63[i * 32 | 31] = ppc_fnmaddx;
+		ppc.optable63[i * 32 | 30] = ppc_fnmsubx;
+		ppc.optable63[i * 32 | 23] = ppc_fselx;
+
+		ppc.optable59[i * 32 | 29] = ppc_fmaddsx;
+		ppc.optable59[i * 32 | 28] = ppc_fmsubsx;
+		ppc.optable59[i * 32 | 25] = ppc_fmulsx;
+		ppc.optable59[i * 32 | 31] = ppc_fnmaddsx;
+		ppc.optable59[i * 32 | 30] = ppc_fnmsubsx;
+	}
+
+	ppc.optable31[978] = ppc_tlbld;
+
+	for(i = 0; i < 256; i++)
+	{
+		ppc_field_xlat[i] =
+			((i & 0x80) ? 0xF0000000 : 0) |
+			((i & 0x40) ? 0x0F000000 : 0) |
+			((i & 0x20) ? 0x00F00000 : 0) |
+			((i & 0x10) ? 0x000F0000 : 0) |
+			((i & 0x08) ? 0x0000F000 : 0) |
+			((i & 0x04) ? 0x00000F00 : 0) |
+			((i & 0x02) ? 0x000000F0 : 0) |
+			((i & 0x01) ? 0x0000000F : 0);
+	}
+
+	ppc.is603 = 1;
+
+	ppc.read8 = program_read_byte_64be;
+	ppc.read16 = program_read_word_64be;
+	ppc.read32 = program_read_dword_64be;
+	ppc.read64 = program_read_qword_64be;
+	ppc.write8 = program_write_byte_64be;
+	ppc.write16 = program_write_word_64be;
+	ppc.write32 = program_write_dword_64be;
+	ppc.write64 = program_write_qword_64be;
+	ppc.read16_unaligned = ppc_read16_unaligned;
+	ppc.read32_unaligned = ppc_read32_unaligned;
+	ppc.read64_unaligned = ppc_read64_unaligned;
+	ppc.write16_unaligned = ppc_write16_unaligned;
+	ppc.write32_unaligned = ppc_write32_unaligned;
+	ppc.write64_unaligned = ppc_write64_unaligned;
+
+	ppc.irq_callback = irqcallback;
+
+	ppc.pvr = config->pvr;
+
+	multiplier = (float)((config->bus_frequency_multiplier >> 4) & 0xf) +
+				 (float)(config->bus_frequency_multiplier & 0xf) / 10.0f;
+	bus_freq_multiplier = (int)(multiplier * 2);
+
+	ppc.hid1 = 0;
+}
+
+static void ppc604_exit(void)
+{
+
+}
+#endif
+
 
 
 static void ppc_get_context(void *dst)
@@ -1936,3 +2068,48 @@ void ppc601_get_info(UINT32 state, cpuinfo *info)
 	}
 }
 #endif
+
+/* PPC604 */
+
+#if (HAS_PPC604)
+static void ppc604_set_info(UINT32 state, cpuinfo *info)
+{
+	if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 5)
+	{
+		ppc603_set_irq_line(state-CPUINFO_INT_INPUT_STATE, info->i);
+		return;
+	}
+	switch(state)
+	{
+		default:										ppc_set_info(state, info);				break;
+	}
+}
+
+void ppc604_get_info(UINT32 state, cpuinfo *info)
+{
+	switch(state)
+	{
+		/* --- the following bits of info are returned as 64-bit signed integers --- */
+		case CPUINFO_INT_INPUT_LINES:					info->i = 5;							break;
+		case CPUINFO_INT_ENDIANNESS:					info->i = CPU_IS_BE;					break;
+
+		case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM:	info->i = 64;					break;
+		case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32;					break;
+
+		/* --- the following bits of info are returned as pointers to data or functions --- */
+		case CPUINFO_PTR_SET_INFO:						info->setinfo = ppc604_set_info;		break;
+		case CPUINFO_PTR_INIT:							info->init = ppc604_init;				break;
+		case CPUINFO_PTR_RESET:							info->reset = ppc603_reset;				break;
+		case CPUINFO_PTR_EXIT:							info->exit = ppc604_exit;				break;
+		case CPUINFO_PTR_EXECUTE:						info->execute = ppc603_execute;			break;
+		case CPUINFO_PTR_READ:							info->read = ppc_read;					break;
+		case CPUINFO_PTR_WRITE:							info->write = ppc_write;				break;
+		case CPUINFO_PTR_READOP:						info->readop = ppc_readop;				break;
+
+		/* --- the following bits of info are returned as NULL-terminated strings --- */
+		case CPUINFO_STR_NAME:							strcpy(info->s, "PPC604");				break;
+
+		default:										ppc_get_info(state, info);				break;
+	}
+}
+#endif

src/emu/cpu/powerpc/ppc.h

@@ -360,6 +360,10 @@ void mpc8240_get_info(UINT32 state, cpuinfo *info);
 void ppc601_get_info(UINT32 state, cpuinfo *info);
 #endif
 
+#if (HAS_PPC604)
+void ppc604_get_info(UINT32 state, cpuinfo *info);
+#endif
+
 #ifdef MAME_DEBUG
 extern offs_t ppc_dasm_one(char *buffer, offs_t pc, UINT32 op);
 #endif

src/emu/cpu/powerpc/ppc403.c

@@ -184,11 +184,11 @@ static int ppc403_execute(int cycles)
 
 		switch(opcode >> 26)
 		{
-			case 19:	optable19[(opcode >> 1) & 0x3ff](opcode); break;
+			case 19:	ppc.optable19[(opcode >> 1) & 0x3ff](opcode); break;
-			case 31:	optable31[(opcode >> 1) & 0x3ff](opcode); break;
+			case 31:	ppc.optable31[(opcode >> 1) & 0x3ff](opcode); break;
-			case 59:	optable59[(opcode >> 1) & 0x3ff](opcode); break;
+			case 59:	ppc.optable59[(opcode >> 1) & 0x3ff](opcode); break;
-			case 63:	optable63[(opcode >> 1) & 0x3ff](opcode); break;
+			case 63:	ppc.optable63[(opcode >> 1) & 0x3ff](opcode); break;
-			default:	optable[opcode >> 26](opcode); break;
+			default:	ppc.optable[opcode >> 26](opcode); break;
 		}
 
 		ppc_icount--;

src/emu/cpu/powerpc/ppc602.c

@@ -264,11 +264,11 @@ static int ppc602_execute(int cycles)
 		ppc.npc = ppc.pc + 4;
 		switch(opcode >> 26)
 		{
-			case 19:	optable19[(opcode >> 1) & 0x3ff](opcode); break;
+			case 19:	ppc.optable19[(opcode >> 1) & 0x3ff](opcode); break;
-			case 31:	optable31[(opcode >> 1) & 0x3ff](opcode); break;
+			case 31:	ppc.optable31[(opcode >> 1) & 0x3ff](opcode); break;
-			case 59:	optable59[(opcode >> 1) & 0x3ff](opcode); break;
+			case 59:	ppc.optable59[(opcode >> 1) & 0x3ff](opcode); break;
-			case 63:	optable63[(opcode >> 1) & 0x3ff](opcode); break;
+			case 63:	ppc.optable63[(opcode >> 1) & 0x3ff](opcode); break;
-			default:	optable[opcode >> 26](opcode); break;
+			default:	ppc.optable[opcode >> 26](opcode); break;
 		}
 
 		ppc_icount--;

src/emu/cpu/powerpc/ppc603.c

@@ -272,11 +272,11 @@ static int ppc603_execute(int cycles)
 		ppc.npc = ppc.pc + 4;
 		switch(opcode >> 26)
 		{
-			case 19:	optable19[(opcode >> 1) & 0x3ff](opcode); break;
+			case 19:	ppc.optable19[(opcode >> 1) & 0x3ff](opcode); break;
-			case 31:	optable31[(opcode >> 1) & 0x3ff](opcode); break;
+			case 31:	ppc.optable31[(opcode >> 1) & 0x3ff](opcode); break;
-			case 59:	optable59[(opcode >> 1) & 0x3ff](opcode); break;
+			case 59:	ppc.optable59[(opcode >> 1) & 0x3ff](opcode); break;
-			case 63:	optable63[(opcode >> 1) & 0x3ff](opcode); break;
+			case 63:	ppc.optable63[(opcode >> 1) & 0x3ff](opcode); break;
-			default:	optable[opcode >> 26](opcode); break;
+			default:	ppc.optable[opcode >> 26](opcode); break;
 		}
 
 		ppc_icount--;

src/emu/cpu/powerpc/ppc_dasm.c

@@ -208,7 +208,7 @@ typedef struct
  * and print instructions.
  */
 
-static IDESCR itab[] =
+static const IDESCR itab[] =
 {
     { "add",    D_OP(31)|D_XO(266), M_RT|M_RA|M_RB|M_OE|M_RC,   F_RT_RA_RB,     FL_OE|FL_RC },
     { "addc",   D_OP(31)|D_XO(10),  M_RT|M_RA|M_RB|M_OE|M_RC,   F_RT_RA_RB,     FL_OE|FL_RC },
@@ -423,7 +423,7 @@ static IDESCR itab[] =
  * Use an index of BI&3 into this table to obtain the CR field bit name.
  */
 
-static char crbit[][4] = { "lt", "gt", "eq", "so" };
+static const char *const crbit[4] = { "lt", "gt", "eq", "so" };
 
 
 /*

src/emu/cpu/powerpc/ppcdrc.c

@@ -20,7 +20,7 @@
 static void ppcdrc603_init(int index, int clock, const void *_config, int (*irqcallback)(int));
 static void ppcdrc603_exit(void);
 #endif
-#if (HAS_PPC601 || HAS_PPC603 || HAS_MPC8240)
+#if (HAS_PPC601 || HAS_PPC603 || HAS_MPC8240 || HAS_PPC604)
 static void ppcdrc603_reset(void);
 static int ppcdrc603_execute(int cycles);
 static void ppcdrc603_set_irq_line(int irqline, int state);
@@ -102,7 +102,7 @@ static void ppcdrc_entrygen(drc_core *drc);
 	if((ppc.msr & 0x2000) == 0){	\
 	}
 
-#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_MPC8240)
+#if (HAS_PPC601||HAS_PPC602||HAS_PPC603||HAS_PPC604||HAS_MPC8240)
 static UINT32		ppc_field_xlat[256];
 #endif
 
@@ -317,6 +317,12 @@ typedef struct {
 
 	/* saved ESP when entering entry point */
 	UINT32 host_esp;
+
+	UINT32 (* optable19[1024])(drc_core *, UINT32);
+	UINT32 (* optable31[1024])(drc_core *, UINT32);
+	UINT32 (* optable59[1024])(drc_core *, UINT32);
+	UINT32 (* optable63[1024])(drc_core *, UINT32);
+	UINT32 (* optable[64])(drc_core *, UINT32);
 } PPC_REGS;
 
 
@@ -522,7 +528,7 @@ INLINE void ppc_set_spr(int spr, UINT32 value)
 		case SPR_PVR:		return;
 	}
 
-#if (HAS_PPC603 || HAS_PPC602 || HAS_PPC601)
+#if (HAS_PPC603 || HAS_PPC602 || HAS_PPC601 || HAS_PPC604)
 	if(ppc.is603 || ppc.is602) {
 		switch(spr)
 		{
@@ -735,7 +741,7 @@ INLINE UINT32 ppc_get_spr(int spr)
 	}
 #endif
 
-#if (HAS_PPC603 || HAS_PPC602 || HAS_PPC601)
+#if (HAS_PPC603 || HAS_PPC602 || HAS_PPC601 || HAS_PPC604)
 	if (ppc.is603 || ppc.is602)
 	{
 		switch (spr)
@@ -861,12 +867,6 @@ static void log_code(drc_core *drc)
 
 /***********************************************************************/
 
-static UINT32 (* optable19[1024])(drc_core *, UINT32);
-static UINT32 (* optable31[1024])(drc_core *, UINT32);
-static UINT32 (* optable59[1024])(drc_core *, UINT32);
-static UINT32 (* optable63[1024])(drc_core *, UINT32);
-static UINT32 (* optable[64])(drc_core *, UINT32);
-
 #include "ppc_mem.c"
 
 #if (HAS_PPC403)
@@ -1007,13 +1007,13 @@ static void ppc_init(void)
 	int i,j;
 
 	for( i=0; i < 64; i++ ) {
-		optable[i] = recompile_invalid;
+		ppc.optable[i] = recompile_invalid;
 	}
 	for( i=0; i < 1024; i++ ) {
-		optable19[i] = recompile_invalid;
+		ppc.optable19[i] = recompile_invalid;
-		optable31[i] = recompile_invalid;
+		ppc.optable31[i] = recompile_invalid;
-		optable59[i] = recompile_invalid;
+		ppc.optable59[i] = recompile_invalid;
-		optable63[i] = recompile_invalid;
+		ppc.optable63[i] = recompile_invalid;
 	}
 
 	/* Fill the opcode tables */
@@ -1022,11 +1022,11 @@ static void ppc_init(void)
 		switch(ppcdrc_opcode_common[i].code)
 		{
 			case 19:
-				optable19[ppcdrc_opcode_common[i].subcode] = ppcdrc_opcode_common[i].handler;
+				ppc.optable19[ppcdrc_opcode_common[i].subcode] = ppcdrc_opcode_common[i].handler;
 				break;
 
 			case 31:
-				optable31[ppcdrc_opcode_common[i].subcode] = ppcdrc_opcode_common[i].handler;
+				ppc.optable31[ppcdrc_opcode_common[i].subcode] = ppcdrc_opcode_common[i].handler;
 				break;
 
 			case 59:
@@ -1034,7 +1034,7 @@ static void ppc_init(void)
 				break;
 
 			default:
-				optable[ppcdrc_opcode_common[i].code] = ppcdrc_opcode_common[i].handler;
+				ppc.optable[ppcdrc_opcode_common[i].code] = ppcdrc_opcode_common[i].handler;
 		}
 
 	}
@@ -1063,16 +1063,16 @@ static void ppcdrc403_init(int index, int clock, const void *_config, int (*irqc
 	ppcdrc_init();
 
 	/* PPC403 specific opcodes */
-	optable31[454] = recompile_dccci;
+	ppc.optable31[454] = recompile_dccci;
-	optable31[486] = recompile_dcread;
+	ppc.optable31[486] = recompile_dcread;
-	optable31[262] = recompile_icbt;
+	ppc.optable31[262] = recompile_icbt;
-	optable31[966] = recompile_iccci;
+	ppc.optable31[966] = recompile_iccci;
-	optable31[998] = recompile_icread;
+	ppc.optable31[998] = recompile_icread;
-	optable31[323] = recompile_mfdcr;
+	ppc.optable31[323] = recompile_mfdcr;
-	optable31[451] = recompile_mtdcr;
+	ppc.optable31[451] = recompile_mtdcr;
-	optable31[131] = recompile_wrtee;
+	ppc.optable31[131] = recompile_wrtee;
-	optable31[163] = recompile_wrteei;
+	ppc.optable31[163] = recompile_wrteei;
-	optable19[51] = recompile_rfci;
+	ppc.optable19[51] = recompile_rfci;
 
 	ppc.spu.rx_timer = timer_alloc(ppc403_spu_rx_callback, NULL);
 	ppc.spu.tx_timer = timer_alloc(ppc403_spu_tx_callback, NULL);
@@ -1208,78 +1208,80 @@ static void ppcdrc603_init(int index, int clock, const void *_config, int (*irqc
 	ppc_init();
 	ppcdrc_init();
 
-	optable[48] = recompile_lfs;
+	ppc.optable[48] = recompile_lfs;
-	optable[49] = recompile_lfsu;
+	ppc.optable[49] = recompile_lfsu;
-	optable[50] = recompile_lfd;
+	ppc.optable[50] = recompile_lfd;
-	optable[51] = recompile_lfdu;
+	ppc.optable[51] = recompile_lfdu;
-	optable[52] = recompile_stfs;
+	ppc.optable[52] = recompile_stfs;
-	optable[53] = recompile_stfsu;
+	ppc.optable[53] = recompile_stfsu;
-	optable[54] = recompile_stfd;
+	ppc.optable[54] = recompile_stfd;
-	optable[55] = recompile_stfdu;
+	ppc.optable[55] = recompile_stfdu;
-	optable31[631] = recompile_lfdux;
+	ppc.optable31[631] = recompile_lfdux;
-	optable31[599] = recompile_lfdx;
+	ppc.optable31[599] = recompile_lfdx;
-	optable31[567] = recompile_lfsux;
+	ppc.optable31[567] = recompile_lfsux;
-	optable31[535] = recompile_lfsx;
+	ppc.optable31[535] = recompile_lfsx;
-	optable31[595] = recompile_mfsr;
+	ppc.optable31[595] = recompile_mfsr;
-	optable31[659] = recompile_mfsrin;
+	ppc.optable31[659] = recompile_mfsrin;
-	optable31[371] = recompile_mftb;
+	ppc.optable31[371] = recompile_mftb;
-	optable31[210] = recompile_mtsr;
+	ppc.optable31[210] = recompile_mtsr;
-	optable31[242] = recompile_mtsrin;
+	ppc.optable31[242] = recompile_mtsrin;
-	optable31[758] = recompile_dcba;
+	ppc.optable31[758] = recompile_dcba;
-	optable31[759] = recompile_stfdux;
+	ppc.optable31[759] = recompile_stfdux;
-	optable31[727] = recompile_stfdx;
+	ppc.optable31[727] = recompile_stfdx;
-	optable31[983] = recompile_stfiwx;
+	ppc.optable31[983] = recompile_stfiwx;
-	optable31[695] = recompile_stfsux;
+	ppc.optable31[695] = recompile_stfsux;
-	optable31[663] = recompile_stfsx;
+	ppc.optable31[663] = recompile_stfsx;
-	optable31[370] = recompile_tlbia;
+	ppc.optable31[370] = recompile_tlbia;
-	optable31[306] = recompile_tlbie;
+	ppc.optable31[306] = recompile_tlbie;
-	optable31[566] = recompile_tlbsync;
+	ppc.optable31[566] = recompile_tlbsync;
-	optable31[310] = recompile_eciwx;
+	ppc.optable31[310] = recompile_eciwx;
-	optable31[438] = recompile_ecowx;
+	ppc.optable31[438] = recompile_ecowx;
 
-	optable63[264] = recompile_fabsx;
+	ppc.optable63[264] = recompile_fabsx;
-	optable63[21] = recompile_faddx;
+	ppc.optable63[21] = recompile_faddx;
-	optable63[32] = recompile_fcmpo;
+	ppc.optable63[32] = recompile_fcmpo;
-	optable63[0] = recompile_fcmpu;
+	ppc.optable63[0] = recompile_fcmpu;
-	optable63[14] = recompile_fctiwx;
+	ppc.optable63[14] = recompile_fctiwx;
-	optable63[15] = recompile_fctiwzx;
+	ppc.optable63[15] = recompile_fctiwzx;
-	optable63[18] = recompile_fdivx;
+	ppc.optable63[18] = recompile_fdivx;
-	optable63[72] = recompile_fmrx;
+	ppc.optable63[72] = recompile_fmrx;
-	optable63[136] = recompile_fnabsx;
+	ppc.optable63[136] = recompile_fnabsx;
-	optable63[40] = recompile_fnegx;
+	ppc.optable63[40] = recompile_fnegx;
-	optable63[12] = recompile_frspx;
+	ppc.optable63[12] = recompile_frspx;
-	optable63[26] = recompile_frsqrtex;
+	ppc.optable63[26] = recompile_frsqrtex;
-	optable63[22] = recompile_fsqrtx;
+	ppc.optable63[22] = recompile_fsqrtx;
-	optable63[20] = recompile_fsubx;
+	ppc.optable63[20] = recompile_fsubx;
-	optable63[583] = recompile_mffsx;
+	ppc.optable63[583] = recompile_mffsx;
-	optable63[70] = recompile_mtfsb0x;
+	ppc.optable63[70] = recompile_mtfsb0x;
-	optable63[38] = recompile_mtfsb1x;
+	ppc.optable63[38] = recompile_mtfsb1x;
-	optable63[711] = recompile_mtfsfx;
+	ppc.optable63[711] = recompile_mtfsfx;
-	optable63[134] = recompile_mtfsfix;
+	ppc.optable63[134] = recompile_mtfsfix;
-	optable63[64] = recompile_mcrfs;
+	ppc.optable63[64] = recompile_mcrfs;
 
-	optable59[21] = recompile_faddsx;
+	ppc.optable59[21] = recompile_faddsx;
-	optable59[18] = recompile_fdivsx;
+	ppc.optable59[18] = recompile_fdivsx;
-	optable59[24] = recompile_fresx;
+	ppc.optable59[24] = recompile_fresx;
-	optable59[22] = recompile_fsqrtsx;
+	ppc.optable59[22] = recompile_fsqrtsx;
-	optable59[20] = recompile_fsubsx;
+	ppc.optable59[20] = recompile_fsubsx;
 
 	for(i = 0; i < 32; i++)
 	{
-		optable63[i * 32 | 29] = recompile_fmaddx;
+		ppc.optable63[i * 32 | 29] = recompile_fmaddx;
-		optable63[i * 32 | 28] = recompile_fmsubx;
+		ppc.optable63[i * 32 | 28] = recompile_fmsubx;
-		optable63[i * 32 | 25] = recompile_fmulx;
+		ppc.optable63[i * 32 | 25] = recompile_fmulx;
-		optable63[i * 32 | 31] = recompile_fnmaddx;
+		ppc.optable63[i * 32 | 31] = recompile_fnmaddx;
-		optable63[i * 32 | 30] = recompile_fnmsubx;
+		ppc.optable63[i * 32 | 30] = recompile_fnmsubx;
-		optable63[i * 32 | 23] = recompile_fselx;
+		ppc.optable63[i * 32 | 23] = recompile_fselx;
 
-		optable59[i * 32 | 29] = recompile_fmaddsx;
+		ppc.optable59[i * 32 | 29] = recompile_fmaddsx;
-		optable59[i * 32 | 28] = recompile_fmsubsx;
+		ppc.optable59[i * 32 | 28] = recompile_fmsubsx;
-		optable59[i * 32 | 25] = recompile_fmulsx;
+		ppc.optable59[i * 32 | 25] = recompile_fmulsx;
-		optable59[i * 32 | 31] = recompile_fnmaddsx;
+		ppc.optable59[i * 32 | 31] = recompile_fnmaddsx;
-		optable59[i * 32 | 30] = recompile_fnmsubsx;
+		ppc.optable59[i * 32 | 30] = recompile_fnmsubsx;
 	}
 
+	ppc.optable31[978] = recompile_tlbld;
+
 	for(i = 0; i < 256; i++)
 	{
 		ppc_field_xlat[i] =
@@ -1343,7 +1345,7 @@ static void ppcdrc603_exit(void)
 }
 #endif
 
-#if (HAS_PPC601 || HAS_PPC603 || HAS_MPC8240)
+#if (HAS_PPC601 || HAS_PPC603 || HAS_MPC8240 || HAS_PPC604)
 static void ppcdrc603_reset(void)
 {
 	ppc.pc = ppc.npc = 0xfff00100;
@@ -1407,76 +1409,76 @@ static void ppcdrc602_init(int index, int clock, const void *_config, int (*irqc
 	ppc_init();
 	ppcdrc_init();
 
-	optable[48] = recompile_lfs;
+	ppc.optable[48] = recompile_lfs;
-	optable[49] = recompile_lfsu;
+	ppc.optable[49] = recompile_lfsu;
-	optable[50] = recompile_lfd;
+	ppc.optable[50] = recompile_lfd;
-	optable[51] = recompile_lfdu;
+	ppc.optable[51] = recompile_lfdu;
-	optable[52] = recompile_stfs;
+	ppc.optable[52] = recompile_stfs;
-	optable[53] = recompile_stfsu;
+	ppc.optable[53] = recompile_stfsu;
-	optable[54] = recompile_stfd;
+	ppc.optable[54] = recompile_stfd;
-	optable[55] = recompile_stfdu;
+	ppc.optable[55] = recompile_stfdu;
-	optable31[631] = recompile_lfdux;
+	ppc.optable31[631] = recompile_lfdux;
-	optable31[599] = recompile_lfdx;
+	ppc.optable31[599] = recompile_lfdx;
-	optable31[567] = recompile_lfsux;
+	ppc.optable31[567] = recompile_lfsux;
-	optable31[535] = recompile_lfsx;
+	ppc.optable31[535] = recompile_lfsx;
-	optable31[595] = recompile_mfsr;
+	ppc.optable31[595] = recompile_mfsr;
-	optable31[659] = recompile_mfsrin;
+	ppc.optable31[659] = recompile_mfsrin;
-	optable31[371] = recompile_mftb;
+	ppc.optable31[371] = recompile_mftb;
-	optable31[210] = recompile_mtsr;
+	ppc.optable31[210] = recompile_mtsr;
-	optable31[242] = recompile_mtsrin;
+	ppc.optable31[242] = recompile_mtsrin;
-	optable31[758] = recompile_dcba;
+	ppc.optable31[758] = recompile_dcba;
-	optable31[759] = recompile_stfdux;
+	ppc.optable31[759] = recompile_stfdux;
-	optable31[727] = recompile_stfdx;
+	ppc.optable31[727] = recompile_stfdx;
-	optable31[983] = recompile_stfiwx;
+	ppc.optable31[983] = recompile_stfiwx;
-	optable31[695] = recompile_stfsux;
+	ppc.optable31[695] = recompile_stfsux;
-	optable31[663] = recompile_stfsx;
+	ppc.optable31[663] = recompile_stfsx;
-	optable31[370] = recompile_tlbia;
+	ppc.optable31[370] = recompile_tlbia;
-	optable31[306] = recompile_tlbie;
+	ppc.optable31[306] = recompile_tlbie;
-	optable31[566] = recompile_tlbsync;
+	ppc.optable31[566] = recompile_tlbsync;
-	optable31[310] = recompile_eciwx;
+	ppc.optable31[310] = recompile_eciwx;
-	optable31[438] = recompile_ecowx;
+	ppc.optable31[438] = recompile_ecowx;
 
-	optable63[264] = recompile_fabsx;
+	ppc.optable63[264] = recompile_fabsx;
-	optable63[21] = recompile_faddx;
+	ppc.optable63[21] = recompile_faddx;
-	optable63[32] = recompile_fcmpo;
+	ppc.optable63[32] = recompile_fcmpo;
-	optable63[0] = recompile_fcmpu;
+	ppc.optable63[0] = recompile_fcmpu;
-	optable63[14] = recompile_fctiwx;
+	ppc.optable63[14] = recompile_fctiwx;
-	optable63[15] = recompile_fctiwzx;
+	ppc.optable63[15] = recompile_fctiwzx;
-	optable63[18] = recompile_fdivx;
+	ppc.optable63[18] = recompile_fdivx;
-	optable63[72] = recompile_fmrx;
+	ppc.optable63[72] = recompile_fmrx;
-	optable63[136] = recompile_fnabsx;
+	ppc.optable63[136] = recompile_fnabsx;
-	optable63[40] = recompile_fnegx;
+	ppc.optable63[40] = recompile_fnegx;
-	optable63[12] = recompile_frspx;
+	ppc.optable63[12] = recompile_frspx;
-	optable63[26] = recompile_frsqrtex;
+	ppc.optable63[26] = recompile_frsqrtex;
-	optable63[22] = recompile_fsqrtx;
+	ppc.optable63[22] = recompile_fsqrtx;
-	optable63[20] = recompile_fsubx;
+	ppc.optable63[20] = recompile_fsubx;
-	optable63[583] = recompile_mffsx;
+	ppc.optable63[583] = recompile_mffsx;
-	optable63[70] = recompile_mtfsb0x;
+	ppc.optable63[70] = recompile_mtfsb0x;
-	optable63[38] = recompile_mtfsb1x;
+	ppc.optable63[38] = recompile_mtfsb1x;
-	optable63[711] = recompile_mtfsfx;
+	ppc.optable63[711] = recompile_mtfsfx;
-	optable63[134] = recompile_mtfsfix;
+	ppc.optable63[134] = recompile_mtfsfix;
-	optable63[64] = recompile_mcrfs;
+	ppc.optable63[64] = recompile_mcrfs;
 
-	optable59[21] = recompile_faddsx;
+	ppc.optable59[21] = recompile_faddsx;
-	optable59[18] = recompile_fdivsx;
+	ppc.optable59[18] = recompile_fdivsx;
-	optable59[24] = recompile_fresx;
+	ppc.optable59[24] = recompile_fresx;
-	optable59[22] = recompile_fsqrtsx;
+	ppc.optable59[22] = recompile_fsqrtsx;
-	optable59[20] = recompile_fsubsx;
+	ppc.optable59[20] = recompile_fsubsx;
 
 	for(i = 0; i < 32; i++)
 	{
-		optable63[i * 32 | 29] = recompile_fmaddx;
+		ppc.optable63[i * 32 | 29] = recompile_fmaddx;
-		optable63[i * 32 | 28] = recompile_fmsubx;
+		ppc.optable63[i * 32 | 28] = recompile_fmsubx;
-		optable63[i * 32 | 25] = recompile_fmulx;
+		ppc.optable63[i * 32 | 25] = recompile_fmulx;
-		optable63[i * 32 | 31] = recompile_fnmaddx;
+		ppc.optable63[i * 32 | 31] = recompile_fnmaddx;
-		optable63[i * 32 | 30] = recompile_fnmsubx;
+		ppc.optable63[i * 32 | 30] = recompile_fnmsubx;
-		optable63[i * 32 | 23] = recompile_fselx;
+		ppc.optable63[i * 32 | 23] = recompile_fselx;
 
-		optable59[i * 32 | 29] = recompile_fmaddsx;
+		ppc.optable59[i * 32 | 29] = recompile_fmaddsx;
-		optable59[i * 32 | 28] = recompile_fmsubsx;
+		ppc.optable59[i * 32 | 28] = recompile_fmsubsx;
-		optable59[i * 32 | 25] = recompile_fmulsx;
+		ppc.optable59[i * 32 | 25] = recompile_fmulsx;
-		optable59[i * 32 | 31] = recompile_fnmaddsx;
+		ppc.optable59[i * 32 | 31] = recompile_fnmaddsx;
-		optable59[i * 32 | 30] = recompile_fnmsubsx;
+		ppc.optable59[i * 32 | 30] = recompile_fnmsubsx;
 	}
 
 	for(i = 0; i < 256; i++)
@@ -1493,10 +1495,10 @@ static void ppcdrc602_init(int index, int clock, const void *_config, int (*irqc
 	}
 
 	// PPC602 specific opcodes
-	optable31[596] = recompile_esa;
+	ppc.optable31[596] = recompile_esa;
-	optable31[628] = recompile_dsa;
+	ppc.optable31[628] = recompile_dsa;
-	optable31[1010] = recompile_tlbli;
+	ppc.optable31[1010] = recompile_tlbli;
-	optable31[978] = recompile_tlbld;
+	ppc.optable31[978] = recompile_tlbld;
 
 	ppc.is603 = 0;
 	ppc.is602 = 1;
@@ -1597,76 +1599,76 @@ static void mpc8240drc_init(int index, int clock, const void *_config, int (*irq
 	ppc_init();
 	ppcdrc_init();
 
-	optable[48] = recompile_lfs;
+	ppc.optable[48] = recompile_lfs;
-	optable[49] = recompile_lfsu;
+	ppc.optable[49] = recompile_lfsu;
-	optable[50] = recompile_lfd;
+	ppc.optable[50] = recompile_lfd;
-	optable[51] = recompile_lfdu;
+	ppc.optable[51] = recompile_lfdu;
-	optable[52] = recompile_stfs;
+	ppc.optable[52] = recompile_stfs;
-	optable[53] = recompile_stfsu;
+	ppc.optable[53] = recompile_stfsu;
-	optable[54] = recompile_stfd;
+	ppc.optable[54] = recompile_stfd;
-	optable[55] = recompile_stfdu;
+	ppc.optable[55] = recompile_stfdu;
-	optable31[631] = recompile_lfdux;
+	ppc.optable31[631] = recompile_lfdux;
-	optable31[599] = recompile_lfdx;
+	ppc.optable31[599] = recompile_lfdx;
-	optable31[567] = recompile_lfsux;
+	ppc.optable31[567] = recompile_lfsux;
-	optable31[535] = recompile_lfsx;
+	ppc.optable31[535] = recompile_lfsx;
-	optable31[595] = recompile_mfsr;
+	ppc.optable31[595] = recompile_mfsr;
-	optable31[659] = recompile_mfsrin;
+	ppc.optable31[659] = recompile_mfsrin;
-	optable31[371] = recompile_mftb;
+	ppc.optable31[371] = recompile_mftb;
-	optable31[210] = recompile_mtsr;
+	ppc.optable31[210] = recompile_mtsr;
-	optable31[242] = recompile_mtsrin;
+	ppc.optable31[242] = recompile_mtsrin;
-	optable31[758] = recompile_dcba;
+	ppc.optable31[758] = recompile_dcba;
-	optable31[759] = recompile_stfdux;
+	ppc.optable31[759] = recompile_stfdux;
-	optable31[727] = recompile_stfdx;
+	ppc.optable31[727] = recompile_stfdx;
-	optable31[983] = recompile_stfiwx;
+	ppc.optable31[983] = recompile_stfiwx;
-	optable31[695] = recompile_stfsux;
+	ppc.optable31[695] = recompile_stfsux;
-	optable31[663] = recompile_stfsx;
+	ppc.optable31[663] = recompile_stfsx;
-	optable31[370] = recompile_tlbia;
+	ppc.optable31[370] = recompile_tlbia;
-	optable31[306] = recompile_tlbie;
+	ppc.optable31[306] = recompile_tlbie;
-	optable31[566] = recompile_tlbsync;
+	ppc.optable31[566] = recompile_tlbsync;
-	optable31[310] = recompile_eciwx;
+	ppc.optable31[310] = recompile_eciwx;
-	optable31[438] = recompile_ecowx;
+	ppc.optable31[438] = recompile_ecowx;
 
-	optable63[264] = recompile_fabsx;
+	ppc.optable63[264] = recompile_fabsx;
-	optable63[21] = recompile_faddx;
+	ppc.optable63[21] = recompile_faddx;
-	optable63[32] = recompile_fcmpo;
+	ppc.optable63[32] = recompile_fcmpo;
-	optable63[0] = recompile_fcmpu;
+	ppc.optable63[0] = recompile_fcmpu;
-	optable63[14] = recompile_fctiwx;
+	ppc.optable63[14] = recompile_fctiwx;
-	optable63[15] = recompile_fctiwzx;
+	ppc.optable63[15] = recompile_fctiwzx;
-	optable63[18] = recompile_fdivx;
+	ppc.optable63[18] = recompile_fdivx;
-	optable63[72] = recompile_fmrx;
+	ppc.optable63[72] = recompile_fmrx;
-	optable63[136] = recompile_fnabsx;
+	ppc.optable63[136] = recompile_fnabsx;
-	optable63[40] = recompile_fnegx;
+	ppc.optable63[40] = recompile_fnegx;
-	optable63[12] = recompile_frspx;
+	ppc.optable63[12] = recompile_frspx;
-	optable63[26] = recompile_frsqrtex;
+	ppc.optable63[26] = recompile_frsqrtex;
-	optable63[22] = recompile_fsqrtx;
+	ppc.optable63[22] = recompile_fsqrtx;
-	optable63[20] = recompile_fsubx;
+	ppc.optable63[20] = recompile_fsubx;
-	optable63[583] = recompile_mffsx;
+	ppc.optable63[583] = recompile_mffsx;
-	optable63[70] = recompile_mtfsb0x;
+	ppc.optable63[70] = recompile_mtfsb0x;
-	optable63[38] = recompile_mtfsb1x;
+	ppc.optable63[38] = recompile_mtfsb1x;
-	optable63[711] = recompile_mtfsfx;
+	ppc.optable63[711] = recompile_mtfsfx;
-	optable63[134] = recompile_mtfsfix;
+	ppc.optable63[134] = recompile_mtfsfix;
-	optable63[64] = recompile_mcrfs;
+	ppc.optable63[64] = recompile_mcrfs;
 
-	optable59[21] = recompile_faddsx;
+	ppc.optable59[21] = recompile_faddsx;
-	optable59[18] = recompile_fdivsx;
+	ppc.optable59[18] = recompile_fdivsx;
-	optable59[24] = recompile_fresx;
+	ppc.optable59[24] = recompile_fresx;
-	optable59[22] = recompile_fsqrtsx;
+	ppc.optable59[22] = recompile_fsqrtsx;
-	optable59[20] = recompile_fsubsx;
+	ppc.optable59[20] = recompile_fsubsx;
 
 	for(i = 0; i < 32; i++)
 	{
-		optable63[i * 32 | 29] = recompile_fmaddx;
+		ppc.optable63[i * 32 | 29] = recompile_fmaddx;
-		optable63[i * 32 | 28] = recompile_fmsubx;
+		ppc.optable63[i * 32 | 28] = recompile_fmsubx;
-		optable63[i * 32 | 25] = recompile_fmulx;
+		ppc.optable63[i * 32 | 25] = recompile_fmulx;
-		optable63[i * 32 | 31] = recompile_fnmaddx;
+		ppc.optable63[i * 32 | 31] = recompile_fnmaddx;
-		optable63[i * 32 | 30] = recompile_fnmsubx;
+		ppc.optable63[i * 32 | 30] = recompile_fnmsubx;
-		optable63[i * 32 | 23] = recompile_fselx;
+		ppc.optable63[i * 32 | 23] = recompile_fselx;
 
-		optable59[i * 32 | 29] = recompile_fmaddsx;
+		ppc.optable59[i * 32 | 29] = recompile_fmaddsx;
-		optable59[i * 32 | 28] = recompile_fmsubsx;
+		ppc.optable59[i * 32 | 28] = recompile_fmsubsx;
-		optable59[i * 32 | 25] = recompile_fmulsx;
+		ppc.optable59[i * 32 | 25] = recompile_fmulsx;
-		optable59[i * 32 | 31] = recompile_fnmaddsx;
+		ppc.optable59[i * 32 | 31] = recompile_fnmaddsx;
-		optable59[i * 32 | 30] = recompile_fnmsubsx;
+		ppc.optable59[i * 32 | 30] = recompile_fnmsubsx;
 	}
 
 	for(i = 0; i < 256; i++)
@@ -1683,8 +1685,8 @@ static void mpc8240drc_init(int index, int clock, const void *_config, int (*irq
 	}
 
 	// MPC8240 specific opcodes
-	optable31[978] = recompile_tlbld;
+	ppc.optable31[978] = recompile_tlbld;
-	optable31[1010] = recompile_tlbli;
+	ppc.optable31[1010] = recompile_tlbli;
 
 	ppc.is603 = 1;
 
@@ -1730,76 +1732,76 @@ static void ppc601drc_init(int index, int clock, const void *_config, int (*irqc
 	ppc_init();
 	ppcdrc_init();
 
-	optable[48] = recompile_lfs;
+	ppc.optable[48] = recompile_lfs;
-	optable[49] = recompile_lfsu;
+	ppc.optable[49] = recompile_lfsu;
-	optable[50] = recompile_lfd;
+	ppc.optable[50] = recompile_lfd;
-	optable[51] = recompile_lfdu;
+	ppc.optable[51] = recompile_lfdu;
-	optable[52] = recompile_stfs;
+	ppc.optable[52] = recompile_stfs;
-	optable[53] = recompile_stfsu;
+	ppc.optable[53] = recompile_stfsu;
-	optable[54] = recompile_stfd;
+	ppc.optable[54] = recompile_stfd;
-	optable[55] = recompile_stfdu;
+	ppc.optable[55] = recompile_stfdu;
-	optable31[631] = recompile_lfdux;
+	ppc.optable31[631] = recompile_lfdux;
-	optable31[599] = recompile_lfdx;
+	ppc.optable31[599] = recompile_lfdx;
-	optable31[567] = recompile_lfsux;
+	ppc.optable31[567] = recompile_lfsux;
-	optable31[535] = recompile_lfsx;
+	ppc.optable31[535] = recompile_lfsx;
-	optable31[595] = recompile_mfsr;
+	ppc.optable31[595] = recompile_mfsr;
-	optable31[659] = recompile_mfsrin;
+	ppc.optable31[659] = recompile_mfsrin;
-	optable31[371] = recompile_mftb;
+	ppc.optable31[371] = recompile_mftb;
-	optable31[210] = recompile_mtsr;
+	ppc.optable31[210] = recompile_mtsr;
-	optable31[242] = recompile_mtsrin;
+	ppc.optable31[242] = recompile_mtsrin;
-	optable31[758] = recompile_dcba;
+	ppc.optable31[758] = recompile_dcba;
-	optable31[759] = recompile_stfdux;
+	ppc.optable31[759] = recompile_stfdux;
-	optable31[727] = recompile_stfdx;
+	ppc.optable31[727] = recompile_stfdx;
-	optable31[983] = recompile_stfiwx;
+	ppc.optable31[983] = recompile_stfiwx;
-	optable31[695] = recompile_stfsux;
+	ppc.optable31[695] = recompile_stfsux;
-	optable31[663] = recompile_stfsx;
+	ppc.optable31[663] = recompile_stfsx;
-	optable31[370] = recompile_tlbia;
+	ppc.optable31[370] = recompile_tlbia;
-	optable31[306] = recompile_tlbie;
+	ppc.optable31[306] = recompile_tlbie;
-	optable31[566] = recompile_tlbsync;
+	ppc.optable31[566] = recompile_tlbsync;
-	optable31[310] = recompile_eciwx;
+	ppc.optable31[310] = recompile_eciwx;
-	optable31[438] = recompile_ecowx;
+	ppc.optable31[438] = recompile_ecowx;
 
-	optable63[264] = recompile_fabsx;
+	ppc.optable63[264] = recompile_fabsx;
-	optable63[21] = recompile_faddx;
+	ppc.optable63[21] = recompile_faddx;
-	optable63[32] = recompile_fcmpo;
+	ppc.optable63[32] = recompile_fcmpo;
-	optable63[0] = recompile_fcmpu;
+	ppc.optable63[0] = recompile_fcmpu;
-	optable63[14] = recompile_fctiwx;
+	ppc.optable63[14] = recompile_fctiwx;
-	optable63[15] = recompile_fctiwzx;
+	ppc.optable63[15] = recompile_fctiwzx;
-	optable63[18] = recompile_fdivx;
+	ppc.optable63[18] = recompile_fdivx;
-	optable63[72] = recompile_fmrx;
+	ppc.optable63[72] = recompile_fmrx;
-	optable63[136] = recompile_fnabsx;
+	ppc.optable63[136] = recompile_fnabsx;
-	optable63[40] = recompile_fnegx;
+	ppc.optable63[40] = recompile_fnegx;
-	optable63[12] = recompile_frspx;
+	ppc.optable63[12] = recompile_frspx;
-	optable63[26] = recompile_frsqrtex;
+	ppc.optable63[26] = recompile_frsqrtex;
-	optable63[22] = recompile_fsqrtx;
+	ppc.optable63[22] = recompile_fsqrtx;
-	optable63[20] = recompile_fsubx;
+	ppc.optable63[20] = recompile_fsubx;
-	optable63[583] = recompile_mffsx;
+	ppc.optable63[583] = recompile_mffsx;
-	optable63[70] = recompile_mtfsb0x;
+	ppc.optable63[70] = recompile_mtfsb0x;
-	optable63[38] = recompile_mtfsb1x;
+	ppc.optable63[38] = recompile_mtfsb1x;
-	optable63[711] = recompile_mtfsfx;
+	ppc.optable63[711] = recompile_mtfsfx;
-	optable63[134] = recompile_mtfsfix;
+	ppc.optable63[134] = recompile_mtfsfix;
-	optable63[64] = recompile_mcrfs;
+	ppc.optable63[64] = recompile_mcrfs;
 
-	optable59[21] = recompile_faddsx;
+	ppc.optable59[21] = recompile_faddsx;
-	optable59[18] = recompile_fdivsx;
+	ppc.optable59[18] = recompile_fdivsx;
-	optable59[24] = recompile_fresx;
+	ppc.optable59[24] = recompile_fresx;
-	optable59[22] = recompile_fsqrtsx;
+	ppc.optable59[22] = recompile_fsqrtsx;
-	optable59[20] = recompile_fsubsx;
+	ppc.optable59[20] = recompile_fsubsx;
 
 	for(i = 0; i < 32; i++)
 	{
-		optable63[i * 32 | 29] = recompile_fmaddx;
+		ppc.optable63[i * 32 | 29] = recompile_fmaddx;
-		optable63[i * 32 | 28] = recompile_fmsubx;
+		ppc.optable63[i * 32 | 28] = recompile_fmsubx;
-		optable63[i * 32 | 25] = recompile_fmulx;
+		ppc.optable63[i * 32 | 25] = recompile_fmulx;
-		optable63[i * 32 | 31] = recompile_fnmaddx;
+		ppc.optable63[i * 32 | 31] = recompile_fnmaddx;
-		optable63[i * 32 | 30] = recompile_fnmsubx;
+		ppc.optable63[i * 32 | 30] = recompile_fnmsubx;
-		optable63[i * 32 | 23] = recompile_fselx;
+		ppc.optable63[i * 32 | 23] = recompile_fselx;
 
-		optable59[i * 32 | 29] = recompile_fmaddsx;
+		ppc.optable59[i * 32 | 29] = recompile_fmaddsx;
-		optable59[i * 32 | 28] = recompile_fmsubsx;
+		ppc.optable59[i * 32 | 28] = recompile_fmsubsx;
-		optable59[i * 32 | 25] = recompile_fmulsx;
+		ppc.optable59[i * 32 | 25] = recompile_fmulsx;
-		optable59[i * 32 | 31] = recompile_fnmaddsx;
+		ppc.optable59[i * 32 | 31] = recompile_fnmaddsx;
-		optable59[i * 32 | 30] = recompile_fnmsubsx;
+		ppc.optable59[i * 32 | 30] = recompile_fnmsubsx;
 	}
 
 	for(i = 0; i < 256; i++)
@@ -1866,6 +1868,139 @@ static void ppc601drc_exit(void)
 #endif
 
 
+#if (HAS_PPC604)
+static void ppc604drc_init(int index, int clock, const void *_config, int (*irqcallback)(int))
+{
+	float multiplier;
+	const ppc_config *config = _config;
+	int i;
+
+	ppc_init();
+	ppcdrc_init();
+
+	ppc.optable[48] = recompile_lfs;
+	ppc.optable[49] = recompile_lfsu;
+	ppc.optable[50] = recompile_lfd;
+	ppc.optable[51] = recompile_lfdu;
+	ppc.optable[52] = recompile_stfs;
+	ppc.optable[53] = recompile_stfsu;
+	ppc.optable[54] = recompile_stfd;
+	ppc.optable[55] = recompile_stfdu;
+	ppc.optable31[631] = recompile_lfdux;
+	ppc.optable31[599] = recompile_lfdx;
+	ppc.optable31[567] = recompile_lfsux;
+	ppc.optable31[535] = recompile_lfsx;
+	ppc.optable31[595] = recompile_mfsr;
+	ppc.optable31[659] = recompile_mfsrin;
+	ppc.optable31[371] = recompile_mftb;
+	ppc.optable31[210] = recompile_mtsr;
+	ppc.optable31[242] = recompile_mtsrin;
+	ppc.optable31[758] = recompile_dcba;
+	ppc.optable31[759] = recompile_stfdux;
+	ppc.optable31[727] = recompile_stfdx;
+	ppc.optable31[983] = recompile_stfiwx;
+	ppc.optable31[695] = recompile_stfsux;
+	ppc.optable31[663] = recompile_stfsx;
+	ppc.optable31[370] = recompile_tlbia;
+	ppc.optable31[306] = recompile_tlbie;
+	ppc.optable31[566] = recompile_tlbsync;
+	ppc.optable31[310] = recompile_eciwx;
+	ppc.optable31[438] = recompile_ecowx;
+
+	ppc.optable63[264] = recompile_fabsx;
+	ppc.optable63[21] = recompile_faddx;
+	ppc.optable63[32] = recompile_fcmpo;
+	ppc.optable63[0] = recompile_fcmpu;
+	ppc.optable63[14] = recompile_fctiwx;
+	ppc.optable63[15] = recompile_fctiwzx;
+	ppc.optable63[18] = recompile_fdivx;
+	ppc.optable63[72] = recompile_fmrx;
+	ppc.optable63[136] = recompile_fnabsx;
+	ppc.optable63[40] = recompile_fnegx;
+	ppc.optable63[12] = recompile_frspx;
+	ppc.optable63[26] = recompile_frsqrtex;
+	ppc.optable63[22] = recompile_fsqrtx;
+	ppc.optable63[20] = recompile_fsubx;
+	ppc.optable63[583] = recompile_mffsx;
+	ppc.optable63[70] = recompile_mtfsb0x;
+	ppc.optable63[38] = recompile_mtfsb1x;
+	ppc.optable63[711] = recompile_mtfsfx;
+	ppc.optable63[134] = recompile_mtfsfix;
+	ppc.optable63[64] = recompile_mcrfs;
+
+	ppc.optable59[21] = recompile_faddsx;
+	ppc.optable59[18] = recompile_fdivsx;
+	ppc.optable59[24] = recompile_fresx;
+	ppc.optable59[22] = recompile_fsqrtsx;
+	ppc.optable59[20] = recompile_fsubsx;
+
+	for(i = 0; i < 32; i++)
+	{
+		ppc.optable63[i * 32 | 29] = recompile_fmaddx;
+		ppc.optable63[i * 32 | 28] = recompile_fmsubx;
+		ppc.optable63[i * 32 | 25] = recompile_fmulx;
+		ppc.optable63[i * 32 | 31] = recompile_fnmaddx;
+		ppc.optable63[i * 32 | 30] = recompile_fnmsubx;
+		ppc.optable63[i * 32 | 23] = recompile_fselx;
+
+		ppc.optable59[i * 32 | 29] = recompile_fmaddsx;
+		ppc.optable59[i * 32 | 28] = recompile_fmsubsx;
+		ppc.optable59[i * 32 | 25] = recompile_fmulsx;
+		ppc.optable59[i * 32 | 31] = recompile_fnmaddsx;
+		ppc.optable59[i * 32 | 30] = recompile_fnmsubsx;
+	}
+
+	ppc.optable31[978] = recompile_tlbld;
+
+	for(i = 0; i < 256; i++)
+	{
+		ppc_field_xlat[i] =
+			((i & 0x80) ? 0xF0000000 : 0) |
+			((i & 0x40) ? 0x0F000000 : 0) |
+			((i & 0x20) ? 0x00F00000 : 0) |
+			((i & 0x10) ? 0x000F0000 : 0) |
+			((i & 0x08) ? 0x0000F000 : 0) |
+			((i & 0x04) ? 0x00000F00 : 0) |
+			((i & 0x02) ? 0x000000F0 : 0) |
+			((i & 0x01) ? 0x0000000F : 0);
+	}
+
+	ppc.is603 = 1;
+
+	ppc.read8 = program_read_byte_64be;
+	ppc.read16 = program_read_word_64be;
+	ppc.read32 = program_read_dword_64be;
+	ppc.read64 = program_read_qword_64be;
+	ppc.write8 = program_write_byte_64be;
+	ppc.write16 = program_write_word_64be;
+	ppc.write32 = program_write_dword_64be;
+	ppc.write64 = program_write_qword_64be;
+	ppc.read16_unaligned = ppc_read16_unaligned;
+	ppc.read32_unaligned = ppc_read32_unaligned;
+	ppc.read64_unaligned = ppc_read64_unaligned;
+	ppc.write16_unaligned = ppc_write16_unaligned;
+	ppc.write32_unaligned = ppc_write32_unaligned;
+	ppc.write64_unaligned = ppc_write64_unaligned;
+
+	ppc.irq_callback = irqcallback;
+
+	ppc.pvr = config->pvr;
+
+	multiplier = (float)((config->bus_frequency_multiplier >> 4) & 0xf) +
+				 (float)(config->bus_frequency_multiplier & 0xf) / 10.0f;
+	bus_freq_multiplier = (int)(multiplier * 2);
+}
+
+static void ppc604drc_exit(void)
+{
+#if LOG_CODE
+	//if (symfile) fclose(symfile);
+#endif
+	drc_exit(ppc.drc);
+}
+#endif
+
+
 static void ppc_get_context(void *dst)
 {
 	/* copy the context */
@@ -2300,3 +2435,48 @@ void ppc601_get_info(UINT32 state, cpuinfo *info)
 	}
 }
 #endif
+
+/* PPC604 */
+
+#if (HAS_PPC604)
+static void ppc604_set_info(UINT32 state, cpuinfo *info)
+{
+	if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 5)
+	{
+		ppcdrc603_set_irq_line(state-CPUINFO_INT_INPUT_STATE, info->i);
+		return;
+	}
+	switch(state)
+	{
+		default:										ppc_set_info(state, info);				break;
+	}
+}
+
+void ppc604_get_info(UINT32 state, cpuinfo *info)
+{
+	switch(state)
+	{
+		/* --- the following bits of info are returned as 64-bit signed integers --- */
+		case CPUINFO_INT_INPUT_LINES:					info->i = 5;							break;
+		case CPUINFO_INT_ENDIANNESS:					info->i = CPU_IS_BE;					break;
+
+		case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM:	info->i = 64;					break;
+		case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 32;					break;
+
+		/* --- the following bits of info are returned as pointers to data or functions --- */
+		case CPUINFO_PTR_SET_INFO:						info->setinfo = ppc604_set_info;		break;
+		case CPUINFO_PTR_INIT:							info->init = ppc604drc_init;			break;
+		case CPUINFO_PTR_RESET:							info->reset = ppcdrc603_reset;			break;
+		case CPUINFO_PTR_EXIT:							info->exit = ppc604drc_exit;			break;
+		case CPUINFO_PTR_EXECUTE:						info->execute = ppcdrc603_execute;		break;
+		case CPUINFO_PTR_READ:							info->read = ppc_read;					break;
+		case CPUINFO_PTR_WRITE:							info->write = ppc_write;				break;
+		case CPUINFO_PTR_READOP:						info->readop = ppc_readop;				break;
+
+		/* --- the following bits of info are returned as NULL-terminated strings --- */
+		case CPUINFO_STR_NAME:							strcpy(info->s, "PPC604");				break;
+
+		default:										ppc_get_info(state, info);				break;
+	}
+}
+#endif

src/emu/cpu/rsp/rsp_dasm.c

@@ -7,7 +7,7 @@
 #include "cpuintrf.h"
 #include <stdarg.h>
 
-static const char *reg[32] =
+static const char *const reg[32] =
 {
 	"0",	"r1",	"r2",	"r3",	"r4",	"r5",	"r6",	"r7",
 	"r8",	"r9",	"r10",	"r11",	"r12",	"r13",	"r14",	"r15",
@@ -15,7 +15,7 @@ static const char *reg[32] =
 	"r24",	"r25",	"r26",	"r27",	"r28",	"r29",	"r30",	"r31"
 };
 
-static const char *vreg[32] =
+static const char *const vreg[32] =
 {
 	" v0", " v1", " v2", " v3", " v4", " v5", " v6", " v7",
 	" v8", " v9", "v10", "v11", "v12", "v13", "v14", "v15",
@@ -23,7 +23,7 @@ static const char *vreg[32] =
 	"v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31"
 };
 
-static const char *cop0_regs[32] =
+static const char *const cop0_regs[32] =
 {
 	"SP_MEM_ADDR",  "SP_DRAM_ADDR",    "SP_RD_LEN",    "SP_WR_LEN",
 	"SP_STATUS",    "SP_DMA_FULL",     "SP_DMA_BUSY",  "SP_SEMAPHORE",
@@ -35,13 +35,13 @@ static const char *cop0_regs[32] =
 	"???",          "???",             "???",          "???"
 };
 
-static const char *element[16] =
+static const char *const element[16] =
 {
 	"",           "[???]",      "[00224466]", "[11335577]", "[00004444]", "[11115555]", "[22226666]", "[33337777]",
 	"[00000000]", "[11111111]", "[22222222]", "[33333333]", "[44444444]", "[55555555]", "[66666666]", "[77777777]"
 };
 
-static const char *element2[16] =
+static const char *const element2[16] =
 {
 	"01234567", "????????", "00224466", "11335577", "00004444", "11115555", "22226666", "33337777",
 	"00000000", "11111111", "22222222", "33333333", "44444444", "55555555", "66666666", "77777777"

src/emu/cpu/s2650/2650dasm.c

@@ -21,7 +21,7 @@ static offs_t pcbase;
 #define MNEMO   1
 
 /* handy table to build relative offsets from HR (holding register) */
-static int rel[0x100] = {
+static const int rel[0x100] = {
 	  0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,
 	 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
 	 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
@@ -65,7 +65,7 @@ static char *IMM(int pc)
 }
 
 #if MNEMO
-static	char cc[4] = { 'z', 'p', 'm', 'a' };
+static const char cc[4] = { 'z', 'p', 'm', 'a' };
 
 /* format an immediate for PSL */
 static char *IMM_PSL(int pc)
@@ -136,7 +136,7 @@ static char *IMM_PSU(int pc)
 	return buff;
 }
 #else
-static	char cc[4] = { '0', '1', '2', '3' };
+static const char cc[4] = { '0', '1', '2', '3' };
 #define IMM_PSL IMM
 #define IMM_PSU IMM
 #endif

src/emu/cpu/s2650/s2650.c

@@ -200,7 +200,7 @@ INLINE UINT8 ARG(void)
  * handy table to build PC relative offsets
  * from HR (holding register)
  ***************************************************************/
-static	int 	S2650_relative[0x100] =
+static const int S2650_relative[0x100] =
 {
 	  0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,
 	 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,

src/emu/cpu/saturn/saturnds.c

@@ -44,13 +44,13 @@ static int set=1;
 #define W "W"
 #define A "A"
 
-static const char *adr_b[]=
+static const char *const adr_b[]=
 { P, WP, XS, X, S, M, B, W };
 
-static const char *adr_af[]=
+static const char *const adr_af[]=
 { P, WP, XS, X, S, M, B, W, 0, 0, 0, 0, 0, 0, 0, A };
 
-static const char *adr_a[]=
+static const char *const adr_a[]=
 { P, WP, XS, X, S, M, B, W };
 
 static const char number_2_hex[]=
@@ -587,7 +587,7 @@ static const char *field_2_string(int adr_enum)
 	return 0;
 }
 
-static OPCODE opcodes[][0x10]= {
+static const OPCODE opcodes[][0x10]= {
 	{
 		// first digit
 		{ Opcode0 },
@@ -1261,7 +1261,7 @@ unsigned saturn_dasm(char *dst, offs_t pc, const UINT8 *oprom, const UINT8 *opra
 	int cont=1; // operation still not complete disassembled
 	char bin[10]; int binsize=0; // protocollizing fetched nibbles
 	char number[17];
-	OPCODE *level=opcodes[0]; //pointer to current digit
+	const OPCODE *level=opcodes[0]; //pointer to current digit
 	int op; // currently fetched nibble
 	int	pos = 0;
 

src/emu/cpu/sh2/sh2dasm.c

@@ -7,7 +7,7 @@
 #define Rn ((opcode >> 8) & 15)
 #define Rm ((opcode >> 4) & 15)
 
-static const char *regname[16] = {
+static const char *const regname[16] = {
 	"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
 	"R8", "R9", "R10","R11","R12","R13","R14","SP"
 };

src/emu/cpu/sh4/sh4dasm.c

@@ -7,7 +7,7 @@
 #define Rn ((opcode >> 8) & 15)
 #define Rm ((opcode >> 4) & 15)
 
-static const char *regname[16] = {
+static const char *const regname[16] = {
 	"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
 	"R8", "R9", "R10","R11","R12","R13","R14","SP"
 };