From df435f870159c4ad05eb3d9a87a368b38e32c3bd Mon Sep 17 00:00:00 2001 From: Aaron Giles Date: Wed, 19 Aug 2009 08:49:01 +0000 Subject: [PATCH] Attempt to define an I64FMT string that can be used for printf'ing 64-bit integers. This is defined to be "I64" on MSVC and recent mingw compilers, and "ll" for all others. Updated all instances of 64-bit prints to use the new macro. --- src/emu/cpu/mcs51/mcs51.c | 4 ++-- src/emu/cpu/sh2/sh2comn.c | 2 +- src/emu/cpu/tms57002/tmsmake.c | 3 ++- src/emu/machine/pit8253.c | 2 +- src/emu/sound/discrete.c | 2 +- src/mame/drivers/model3.c | 2 +- src/mame/machine/dc.c | 18 +++++++++--------- src/mame/machine/naomibd.c | 10 +++++----- src/mame/video/dc.c | 12 ++++++------ src/osd/osdcomm.h | 7 +++++++ 10 files changed, 35 insertions(+), 27 deletions(-) diff --git a/src/emu/cpu/mcs51/mcs51.c b/src/emu/cpu/mcs51/mcs51.c index 2d735f26d44..08a4d66ec2f 100644 --- a/src/emu/cpu/mcs51/mcs51.c +++ b/src/emu/cpu/mcs51/mcs51.c @@ -2025,7 +2025,7 @@ static void mcs51_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 dat case ADDR_SCON: break; default: - LOG(("mcs51 '%s': attemping to write to an invalid/non-implemented SFR address: %zx at 0x%04x, data=%x\n", mcs51_state->device->tag, offset,PC,data)); + LOG(("mcs51 '%s': attemping to write to an invalid/non-implemented SFR address: %x at 0x%04x, data=%x\n", mcs51_state->device->tag, offset,PC,data)); /* no write in this case according to manual */ return; } @@ -2065,7 +2065,7 @@ static UINT8 mcs51_sfr_read(mcs51_state_t *mcs51_state, size_t offset) return memory_read_byte_8le(mcs51_state->data, (size_t) offset | 0x100); /* Illegal or non-implemented sfr */ default: - LOG(("mcs51 '%s': attemping to read an invalid/non-implemented SFR address: %zx at 0x%04x\n", mcs51_state->device->tag, offset,PC)); + LOG(("mcs51 '%s': attemping to read an invalid/non-implemented SFR address: %x at 0x%04x\n", mcs51_state->device->tag, offset,PC)); /* according to the manual, the read may return random bits */ return 0xff; } diff --git a/src/emu/cpu/sh2/sh2comn.c b/src/emu/cpu/sh2/sh2comn.c index 691e62dbe4d..441c03d9eca 100644 --- a/src/emu/cpu/sh2/sh2comn.c +++ b/src/emu/cpu/sh2/sh2comn.c @@ -386,7 +386,7 @@ WRITE32_HANDLER( sh2_internal_w ) { INT64 a = sh2->m[0x45] | ((UINT64)(sh2->m[0x44]) << 32); INT64 b = (INT32)sh2->m[0x40]; - LOG(("SH2 '%s' div+mod %lld/%lld\n", sh2->device->tag, a, b)); + LOG(("SH2 '%s' div+mod %" I64FMT "d/%" I64FMT "d\n", sh2->device->tag, a, b)); if (b) { INT64 q = a / b; diff --git a/src/emu/cpu/tms57002/tmsmake.c b/src/emu/cpu/tms57002/tmsmake.c index 1298ca1a49e..9e4bdbd2820 100644 --- a/src/emu/cpu/tms57002/tmsmake.c +++ b/src/emu/cpu/tms57002/tmsmake.c @@ -4,6 +4,7 @@ #include #include #include +#include "osdcomm.h" enum { I_POST = 0x00000001, @@ -742,7 +743,7 @@ static void cintrp_expand(char **p, int s, int e, const int *cv) }; char r[256]; - sprintf(r, "tms57002_macc_to_output_%d%s(s, 0x%016llxULL, 0x%016llxULL)", cv[IxSFMO], cv[IxMOVM] ? "s" : "", rounding[cv[IxRND]], rmask[cv[IxRND]]); + sprintf(r, "tms57002_macc_to_output_%d%s(s, 0x%016" I64FMT "xULL, 0x%016" I64FMT "xULL)", cv[IxSFMO], cv[IxMOVM] ? "s" : "", rounding[cv[IxRND]], rmask[cv[IxRND]]); scs(p, r); break; } diff --git a/src/emu/machine/pit8253.c b/src/emu/machine/pit8253.c index 30d22cc36fa..b3529ec7712 100644 --- a/src/emu/machine/pit8253.c +++ b/src/emu/machine/pit8253.c @@ -640,7 +640,7 @@ static void update(const device_config *device, struct pit8253_timer *timer) attotime elapsed_time = attotime_sub(now,timer->last_updated); INT64 elapsed_cycles = attotime_to_double(elapsed_time) * timer->clockin; - LOG1(("pit8253: update(): timer %d, %lld elapsed_cycles\n", timer->index, elapsed_cycles)); + LOG1(("pit8253: update(): timer %d, %" I64FMT "d elapsed_cycles\n", timer->index, elapsed_cycles)); if ( timer->clockin ) { diff --git a/src/emu/sound/discrete.c b/src/emu/sound/discrete.c index a922c45a606..3c18495ddf8 100644 --- a/src/emu/sound/discrete.c +++ b/src/emu/sound/discrete.c @@ -608,7 +608,7 @@ static STREAM_UPDATE( discrete_stream_update ) /* Dump any csv logs */ for (outputnum = 0; outputnum < info->num_csvlogs; outputnum++) { - fprintf(info->disc_csv_file[outputnum], "%lld", ++info->sample_num); + fprintf(info->disc_csv_file[outputnum], "%" I64FMT "d", ++info->sample_num); for (nodenum = 0; nodenum < info->csvlog_node[outputnum]->active_inputs; nodenum++) { fprintf(info->disc_csv_file[outputnum], ", %f", *info->csvlog_node[outputnum]->input[nodenum]); diff --git a/src/mame/drivers/model3.c b/src/mame/drivers/model3.c index 1f26c204680..b013f48bc39 100644 --- a/src/mame/drivers/model3.c +++ b/src/mame/drivers/model3.c @@ -1564,7 +1564,7 @@ static WRITE64_HANDLER( model3_sys_w ) } else { - logerror("Unknown 0x18/8 write %llx mask %llx\n", data, mem_mask); + logerror("Unknown 0x18/8 write %" I64FMT "x mask %" I64FMT"x\n", data, mem_mask); } break; case 0x08/8: diff --git a/src/mame/machine/dc.c b/src/mame/machine/dc.c index ad4e1cc95d5..322cd08dcd4 100644 --- a/src/mame/machine/dc.c +++ b/src/mame/machine/dc.c @@ -426,7 +426,7 @@ READ64_HANDLER( dc_sysctrl_r ) #if DEBUG_SYSCTRL if ((reg != 0x40) && (reg != 0x41) && (reg != 0x42) && (reg != 0x23) && (reg > 2)) // filter out IRQ status reads { - mame_printf_verbose("SYSCTRL: [%08x] read %x @ %x (reg %x: %s), mask %llx (PC=%x)\n", 0x5f6800+reg*4, dc_sysctrl_regs[reg], offset, reg, sysctrl_names[reg], mem_mask, cpu_get_pc(space->cpu)); + mame_printf_verbose("SYSCTRL: [%08x] read %x @ %x (reg %x: %s), mask %" I64FMT "x (PC=%x)\n", 0x5f6800+reg*4, dc_sysctrl_regs[reg], offset, reg, sysctrl_names[reg], mem_mask, cpu_get_pc(space->cpu)); } #endif @@ -512,7 +512,7 @@ WRITE64_HANDLER( dc_sysctrl_w ) #if DEBUG_SYSCTRL if ((reg != 0x40) && (reg != 0x42) && (reg > 2)) // filter out IRQ acks and ch2 dma { - mame_printf_verbose("SYSCTRL: write %llx to %x (reg %x), mask %llx\n", data>>shift, offset, reg, /*sysctrl_names[reg],*/ mem_mask); + mame_printf_verbose("SYSCTRL: write %" I64FMT "x to %x (reg %x), mask %" I64FMT "x\n", data>>shift, offset, reg, /*sysctrl_names[reg],*/ mem_mask); } #endif } @@ -549,7 +549,7 @@ WRITE64_HANDLER( dc_maple_w ) old = maple_regs[reg]; #if DEBUG_MAPLE_REGS - mame_printf_verbose("MAPLE: [%08x=%x] write %llx to %x (reg %x: %s), mask %llx\n", 0x5f6c00+reg*4, dat, data >> shift, offset, reg, maple_names[reg], mem_mask); + mame_printf_verbose("MAPLE: [%08x=%x] write %" I64FMT "x to %x (reg %x: %s), mask %" I64FMT "x\n", 0x5f6c00+reg*4, dat, data >> shift, offset, reg, maple_names[reg], mem_mask); #endif maple_regs[reg] = dat; // 5f6c00+reg*4=dat @@ -912,7 +912,7 @@ WRITE64_HANDLER( dc_gdrom_w ) off=offset << 1; } - mame_printf_verbose("GDROM: [%08x=%x]write %llx to %x, mask %llx\n", 0x5f7000+off*4, dat, data, offset, mem_mask); + mame_printf_verbose("GDROM: [%08x=%x]write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x5f7000+off*4, dat, data, offset, mem_mask); } READ64_HANDLER( dc_g1_ctrl_r ) @@ -939,7 +939,7 @@ WRITE64_HANDLER( dc_g1_ctrl_w ) old = g1bus_regs[reg]; g1bus_regs[reg] = dat; // 5f7400+reg*4=dat - mame_printf_verbose("G1CTRL: [%08x=%x] write %llx to %x, mask %llx\n", 0x5f7400+reg*4, dat, data, offset, mem_mask); + mame_printf_verbose("G1CTRL: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x5f7400+reg*4, dat, data, offset, mem_mask); switch (reg) { case SB_GDST: @@ -1107,7 +1107,7 @@ WRITE64_HANDLER( dc_modem_w ) reg = decode_reg32_64(space->machine, offset, mem_mask, &shift); dat = (UINT32)(data >> shift); - mame_printf_verbose("MODEM: [%08x=%x] write %llx to %x, mask %llx\n", 0x600000+reg*4, dat, data, offset, mem_mask); + mame_printf_verbose("MODEM: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x600000+reg*4, dat, data, offset, mem_mask); } READ64_HANDLER( dc_rtc_r ) @@ -1148,7 +1148,7 @@ WRITE64_HANDLER( dc_rtc_w ) dc_rtcregister[RTC3] &= 1; break; } - mame_printf_verbose("RTC: [%08x=%x] write %llx to %x, mask %llx\n", 0x710000 + reg*4, dat, data, offset, mem_mask); + mame_printf_verbose("RTC: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x710000 + reg*4, dat, data, offset, mem_mask); } static TIMER_CALLBACK(dc_rtc_increment) @@ -1185,7 +1185,7 @@ READ64_DEVICE_HANDLER( dc_aica_reg_r ) /*reg = */decode_reg32_64(device->machine, offset, mem_mask, &shift); -// mame_printf_verbose("AICA REG: [%08x] read %llx, mask %llx\n", 0x700000+reg*4, (UINT64)offset, mem_mask); +// mame_printf_verbose("AICA REG: [%08x] read %" I64FMT "x, mask %" I64FMT "x\n", 0x700000+reg*4, (UINT64)offset, mem_mask); return (UINT64) aica_r(device, offset*2, 0xffff)<>32)&0xffff) : (mem_mask & 0xffff)); -// mame_printf_verbose("AICA REG: [%08x=%x] write %llx to %x, mask %llx\n", 0x700000+reg*4, dat, data, offset, mem_mask); +// mame_printf_verbose("AICA REG: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x700000+reg*4, dat, data, offset, mem_mask); } READ32_DEVICE_HANDLER( dc_arm_aica_r ) diff --git a/src/mame/machine/naomibd.c b/src/mame/machine/naomibd.c index 8fbb8cf0f77..20d42c49c49 100644 --- a/src/mame/machine/naomibd.c +++ b/src/mame/machine/naomibd.c @@ -360,7 +360,7 @@ READ64_DEVICE_HANDLER( naomibd_r ) // AW board is different, shouldn't ever be read if (v->type == AW_ROM_BOARD) { - mame_printf_debug("AW_ROM_BOARD read @ %x mask %llx\n", offset, mem_mask); + mame_printf_debug("AW_ROM_BOARD read @ %x mask %" I64FMT "x\n", offset, mem_mask); return U64(0xffffffffffffffff); } @@ -450,7 +450,7 @@ READ64_DEVICE_HANDLER( naomibd_r ) } else { - //mame_printf_verbose("%s:ROM: read mask %llx @ %x\n", cpuexec_describe_context(machine), mem_mask, offset); + //mame_printf_verbose("%s:ROM: read mask %" I64FMT "x @ %x\n", cpuexec_describe_context(machine), mem_mask, offset); } return U64(0xffffffffffffffff); @@ -464,7 +464,7 @@ WRITE64_DEVICE_HANDLER( naomibd_w ) // AW board if (v->type == AW_ROM_BOARD) { - //printf("AW: %llx to ROM board @ %x (mask %llx)\n", data, offset, mem_mask); + //printf("AW: %" I64FMT "x to ROM board @ %x (mask %" I64FMT "x)\n", data, offset, mem_mask); switch (offset) { @@ -540,7 +540,7 @@ WRITE64_DEVICE_HANDLER( naomibd_w ) break; default: - logerror("AW: unhandled %llx to ROM board @ %x (mask %llx)\n", data, offset, mem_mask); + logerror("AW: unhandled %" I64FMT "x to ROM board @ %x (mask %" I64FMT "x)\n", data, offset, mem_mask); break; } @@ -709,7 +709,7 @@ WRITE64_DEVICE_HANDLER( naomibd_w ) } break; default: - mame_printf_verbose("%s: ROM: write %llx to %x, mask %llx\n", cpuexec_describe_context(device->machine), data, offset, mem_mask); + mame_printf_verbose("%s: ROM: write %" I64FMT "x to %x, mask %" I64FMT "x\n", cpuexec_describe_context(device->machine), data, offset, mem_mask); break; } } diff --git a/src/mame/video/dc.c b/src/mame/video/dc.c index aed94434a5e..c26cf3b624c 100644 --- a/src/mame/video/dc.c +++ b/src/mame/video/dc.c @@ -888,7 +888,7 @@ READ64_HANDLER( pvr_ctrl_r ) reg = decode_reg_64(offset, mem_mask, &shift); #if DEBUG_PVRCTRL - mame_printf_verbose("PVRCTRL: [%08x] read %x @ %x (reg %x), mask %llx (PC=%x)\n", 0x5f7c00+reg*4, pvrctrl_regs[reg], offset, reg, mem_mask, cpu_get_pc(space->cpu)); + mame_printf_verbose("PVRCTRL: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f7c00+reg*4, pvrctrl_regs[reg], offset, reg, mem_mask, cpu_get_pc(space->cpu)); #endif return (UINT64)pvrctrl_regs[reg] << shift; @@ -969,7 +969,7 @@ WRITE64_HANDLER( pvr_ctrl_w ) } #if DEBUG_PVRCTRL - mame_printf_verbose("PVRCTRL: [%08x=%x] write %llx to %x (reg %x), mask %llx\n", 0x5f7c00+reg*4, dat, data>>shift, offset, reg, mem_mask); + mame_printf_verbose("PVRCTRL: [%08x=%x] write %" I64FMT "x to %x (reg %x), mask %" I64FMT "x\n", 0x5f7c00+reg*4, dat, data>>shift, offset, reg, mem_mask); #endif // pvrctrl_regs[reg] |= dat; @@ -993,7 +993,7 @@ READ64_HANDLER( pvr_ta_r ) #if DEBUG_PVRTA_REGS if (reg != 0x43) - mame_printf_verbose("PVRTA: [%08x] read %x @ %x (reg %x), mask %llx (PC=%x)\n", 0x5f8000+reg*4, pvrta_regs[reg], offset, reg, mem_mask, cpu_get_pc(space->cpu)); + mame_printf_verbose("PVRTA: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f8000+reg*4, pvrta_regs[reg], offset, reg, mem_mask, cpu_get_pc(space->cpu)); #endif return (UINT64)pvrta_regs[reg] << shift; } @@ -1207,7 +1207,7 @@ WRITE64_HANDLER( pvr_ta_w ) #if DEBUG_PVRTA_REGS if ((reg != 0x14) && (reg != 0x15)) - mame_printf_verbose("PVRTA: [%08x=%x] write %llx to %x (reg %x %x), mask %llx\n", 0x5f8000+reg*4, dat, data>>shift, offset, reg, (reg*4)+0x8000, mem_mask); + mame_printf_verbose("PVRTA: [%08x=%x] write %" I64FMT "x to %x (reg %x %x), mask %" I64FMT "x\n", 0x5f8000+reg*4, dat, data>>shift, offset, reg, (reg*4)+0x8000, mem_mask); #endif } static void process_ta_fifo(running_machine* machine) @@ -1524,7 +1524,7 @@ WRITE64_HANDLER( ta_fifo_poly_w ) tafifo_buff[state_ta.tafifo_pos]=(UINT32)data; tafifo_buff[state_ta.tafifo_pos+1]=(UINT32)(data >> 32); #if DEBUG_FIFO_POLY - mame_printf_debug("ta_fifo_poly_w: Unmapped write64 %08x = %llx -> %08x %08x\n", 0x10000000+offset*8, data, tafifo_buff[state_ta.tafifo_pos], tafifo_buff[state_ta.tafifo_pos+1]); + mame_printf_debug("ta_fifo_poly_w: Unmapped write64 %08x = %" I64FMT "x -> %08x %08x\n", 0x10000000+offset*8, data, tafifo_buff[state_ta.tafifo_pos], tafifo_buff[state_ta.tafifo_pos+1]); #endif state_ta.tafifo_pos += 2; } @@ -1550,7 +1550,7 @@ WRITE64_HANDLER( ta_fifo_yuv_w ) reg = decode_reg_64(offset, mem_mask, &shift); dat = (UINT32)(data >> shift); - mame_printf_verbose("YUV FIFO: [%08x=%x] write %llx to %x, mask %llx\n", 0x10800000+reg*4, dat, data, offset, mem_mask); + mame_printf_verbose("YUV FIFO: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x10800000+reg*4, dat, data, offset, mem_mask); } /* test video start */ diff --git a/src/osd/osdcomm.h b/src/osd/osdcomm.h index 82566a73f2d..d55af081a50 100644 --- a/src/osd/osdcomm.h +++ b/src/osd/osdcomm.h @@ -158,6 +158,13 @@ __extension__ typedef signed long long INT64; #define S64(val) val #endif +/* MINGW has adopted the MSVC formatting for 64-bit ints as of gcc 4.4 */ +#if (defined(__MINGW32__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4))) || defined(_MSVC_VER) +#define I64FMT "I64" +#else +#define I64FMT "ll" +#endif + /* Highly useful macro for compile-time knowledge of an array size */ #define ARRAY_LENGTH(x) (sizeof(x) / sizeof(x[0]))