8086 MOV sreg behavior confirmed on hardware, no longer a guess (nw)

This commit is contained in:
Alex W. Jackson 2014-04-07 03:16:44 +00:00
parent 413b39e83b
commit df7969f1d7

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@ -1354,8 +1354,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x8c: // i_mov_wsreg case 0x8c: // i_mov_wsreg
m_modrm = fetch(); m_modrm = fetch();
PutRMWord(m_sregs[(m_modrm & 0x18) >> 3]); // guess: ignore bit 5 PutRMWord(m_sregs[(m_modrm & 0x18) >> 3]); // confirmed on hw: modrm bit 5 ignored
if(m_modrm & 0x20) logerror("%s: %06x: Mov Sreg - Invalid register\n", tag(), pc());
CLKM(MOV_RS,MOV_MS); CLKM(MOV_RS,MOV_MS);
break; break;
@ -1369,25 +1368,8 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x8e: // i_mov_sregw case 0x8e: // i_mov_sregw
m_modrm = fetch(); m_modrm = fetch();
m_src = GetRMWord(); m_src = GetRMWord();
m_sregs[(m_modrm & 0x18) >> 3] = m_src; // confirmed on hw: modrm bit 5 ignored
CLKM(MOV_SR,MOV_SM); CLKM(MOV_SR,MOV_SM);
switch (m_modrm & 0x38)
{
case 0x00: /* mov es,ew */
m_sregs[ES] = m_src;
break;
case 0x08: /* mov cs,ew */
m_sregs[CS] = m_src;
break;
case 0x10: /* mov ss,ew */
m_sregs[SS] = m_src;
m_no_interrupt = 1;
break;
case 0x18: /* mov ds,ew */
m_sregs[DS] = m_src;
break;
default:
logerror("%s: %06x: Mov Sreg - Invalid register\n", tag(), pc());
}
break; break;
case 0x8f: // i_popw case 0x8f: // i_popw