From dfbefcfd78a62ba1dbf97d77660f8668de6bebc8 Mon Sep 17 00:00:00 2001
From: AJR <ajrhacker@users.noreply.github.com>
Date: Sat, 26 Jan 2019 15:45:13 -0500
Subject: [PATCH] np600: Map a few I/O registers (nw)

---
 src/devices/bus/isa/np600.cpp | 15 +++++++++++++++
 src/devices/bus/isa/np600.h   |  3 +++
 2 files changed, 18 insertions(+)

diff --git a/src/devices/bus/isa/np600.cpp b/src/devices/bus/isa/np600.cpp
index 1adbd9bc12f..064c1d40191 100644
--- a/src/devices/bus/isa/np600.cpp
+++ b/src/devices/bus/isa/np600.cpp
@@ -10,6 +10,7 @@
 #include "np600.h"
 
 #include "cpu/i86/i186.h"
+#include "machine/74259.h"
 //#include "machine/i82586.h"
 
 DEFINE_DEVICE_TYPE(NP600A3, np600a3_device, "np600a3", "InterLan NP600A-3 Intelligent Protocol Processor")
@@ -25,16 +26,30 @@ void np600a3_device::device_start()
 {
 }
 
+u16 np600a3_device::status_r()
+{
+	return 0;
+}
+
 void np600a3_device::mem_map(address_map &map)
 {
 	map(0x00000, 0x7ffff).ram(); // GM71256-12 x16
 	map(0xfc000, 0xfffff).rom().region("npcpu", 0);
 }
 
+void np600a3_device::io_map(address_map &map)
+{
+	map(0x0070, 0x007f).w("latch70", FUNC(ls259_device::write_a0));
+	map(0x0080, 0x0081).r(FUNC(np600a3_device::status_r));
+}
+
 void np600a3_device::device_add_mconfig(machine_config &config)
 {
 	I80186(config, m_npcpu, 16_MHz_XTAL);
 	m_npcpu->set_addrmap(AS_PROGRAM, &np600a3_device::mem_map);
+	m_npcpu->set_addrmap(AS_IO, &np600a3_device::io_map);
+
+	LS259(config, "latch70"); // U28
 
 	//I82586(config, "enet", 20_MHz_XTAL);
 }
diff --git a/src/devices/bus/isa/np600.h b/src/devices/bus/isa/np600.h
index 3b39b5a0c61..7831d804922 100644
--- a/src/devices/bus/isa/np600.h
+++ b/src/devices/bus/isa/np600.h
@@ -26,7 +26,10 @@ protected:
 	virtual const tiny_rom_entry *device_rom_region() const override;
 
 private:
+	u16 status_r();
+
 	void mem_map(address_map &map);
+	void io_map(address_map &map);
 
 	required_device<cpu_device> m_npcpu;
 };