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Gave the dealem expansion board it's own file and derived class

Browse Source 
(mpu4dealem.c) because it's a unique expansion, no point in having all
that stuff in the main state.  The standard video board it's own state class too, and moved specifics to that, plus converted the scn2674 video chip to be a device (new files there too) again reducing the amount of junk in the base mpu4 state.  From Haze (nw)
This commit is contained in:
Scott Stone 2012-08-03 19:59:35 +00:00
parent 40c79602b6
commit e069b8424b
9 changed files with 1403 additions and 1129 deletions
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3
.gitattributes vendored
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@ -2755,6 +2755,7 @@ src/mame/drivers/mpoker.c svneol=native#text/plain
src/mame/drivers/mpu2.c svneol=native#text/plain
src/mame/drivers/mpu3.c svneol=native#text/plain
src/mame/drivers/mpu4.c svneol=native#text/plain
src/mame/drivers/mpu4dealem.c svneol=native#text/plain
src/mame/drivers/mpu4hw.c svneol=native#text/plain
src/mame/drivers/mpu4plasma.c svneol=native#text/plain
src/mame/drivers/mpu4sw.c svneol=native#text/plain
@ -4995,6 +4996,8 @@ src/mame/video/rungun.c svneol=native#text/plain
src/mame/video/sauro.c svneol=native#text/plain
src/mame/video/sbasketb.c svneol=native#text/plain
src/mame/video/sbugger.c svneol=native#text/plain
src/mame/video/scn2674.c svneol=native#text/plain
src/mame/video/scn2674.h svneol=native#text/plain
src/mame/video/scotrsht.c svneol=native#text/plain
src/mame/video/sderby.c svneol=native#text/plain
src/mame/video/sega16sp.c svneol=native#text/plain

387
src/mame/drivers/mpu4dealem.c Normal file
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@ -0,0 +1,387 @@
/* Deal 'Em */
/* Deal 'Em was designed as an enhanced gamecard, to fit into various existing MPU4 cabinets
It's an unoffical addon, and does all its work through the existing 6809 CPU.
Although given unofficial status, Barcrest's patent on the MPU4 Video hardware (GB1596363) describes
the Deal 'Em board design, rather than the one they ultimately used, suggesting some sort of licensing deal. */
// - Deal 'Em lockouts vary on certain cabinets (normally connected to AUX2, but not there?)
// - Deal 'Em has bad tiles (apostrophe, logo, bottom corner), black should actually be transparent
// to give black on green.
#include "emu.h"
#include "includes/mpu4.h"
#include "video/resnet.h"
#include "video/mc6845.h"
class mpu4dealem_state : public mpu4_state
{
public:
mpu4dealem_state(const machine_config &mconfig, device_type type, const char *tag)
: mpu4_state(mconfig, type, tag),
m_dealem_videoram(*this, "dealem_videoram")
{
}
optional_shared_ptr<UINT8> m_dealem_videoram;
};
static const gfx_layout dealemcharlayout =
{
8,8,
RGN_FRAC(1,1),
4,
{ 0, 1, 2, 3 },
{ 3*4, 2*4, 1*4, 0*4, 7*4, 6*4, 5*4, 4*4 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
32*8
};
static GFXDECODE_START( dealem )
GFXDECODE_ENTRY( "gfx1", 0x0000, dealemcharlayout, 0, 32 )
GFXDECODE_END
/***************************************************************************
Convert the color PROMs into a more useable format.
The palette PROM is connected to the RGB output this way:
Red: 1K Bit 0
470R
220R
Green: 1K Bit 3
470R
220R
Blue: 470R
220R Bit 7
Everything is also tied to a 1K pulldown resistor
***************************************************************************/
static PALETTE_INIT( dealem )
{
const UINT8 *color_prom = machine.root_device().memregion("proms")->base();
int i, len;
static const int resistances_rg[3] = { 1000, 470, 220 };
static const int resistances_b [2] = { 470, 220 };
double weights_r[3], weights_g[3], weights_b[2];
compute_resistor_weights(0, 255, -1.0,
3, resistances_rg, weights_r, 1000, 0,
3, resistances_rg, weights_g, 1000, 0,
2, resistances_b, weights_b, 1000, 0);
len = machine.root_device().memregion("proms")->bytes();
for (i = 0; i < len; i++)
{
int bit0,bit1,bit2,r,g,b;
/* red component */
bit0 = BIT(*color_prom,0);
bit1 = BIT(*color_prom,1);
bit2 = BIT(*color_prom,2);
r = combine_3_weights(weights_r, bit0, bit1, bit2);
/* green component */
bit0 = BIT(*color_prom,3);
bit1 = BIT(*color_prom,4);
bit2 = BIT(*color_prom,5);
g = combine_3_weights(weights_g, bit0, bit1, bit2);
/* blue component */
bit0 = BIT(*color_prom,6);
bit1 = BIT(*color_prom,7);
b = combine_2_weights(weights_b, bit0, bit1);
palette_set_color(machine,i,MAKE_RGB(r,g,b));
color_prom++;
}
}
static SCREEN_UPDATE_IND16(dealem)
{
mpu4dealem_state *state = screen.machine().driver_data<mpu4dealem_state>();
int x,y;
int count = 0;
for (y = 0; y < 32; y++)
{
for (x = 0; x < 40; x++)
{
int tile = state->m_dealem_videoram[count + 0x1000] | (state->m_dealem_videoram[count] << 8);
count++;
drawgfx_opaque(bitmap,cliprect,screen.machine().gfx[0],tile,0,0,0,x * 8,y * 8);
}
}
return 0;
}
static WRITE_LINE_DEVICE_HANDLER( dealem_vsync_changed )
{
cputag_set_input_line(device->machine(), "maincpu", INPUT_LINE_NMI, state);
}
/*************************************
*
* Machine driver
*
*************************************/
static const mc6845_interface hd6845_intf =
{
"screen", /* screen we are acting on */
8, /* number of pixels per video memory address */
NULL, /* before pixel update callback */
NULL, /* row update callback */
NULL, /* after pixel update callback */
DEVCB_NULL, /* callback for display state changes */
DEVCB_NULL, /* callback for cursor state changes */
DEVCB_NULL, /* HSYNC callback */
DEVCB_LINE(dealem_vsync_changed), /* VSYNC callback */
NULL /* update address callback */
};
static ADDRESS_MAP_START( dealem_memmap, AS_PROGRAM, 8, mpu4dealem_state )
AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0x0800, 0x0800) AM_DEVWRITE("crtc", mc6845_device, address_w)
AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
/* AM_RANGE(0x08e0, 0x08e7) AM_READWRITE_LEGACY(68681_duart_r,68681_duart_w) */ //Runs hoppers
AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("ptm_ic2", ptm6840_device, read, write)/* PTM6840 IC2 */
AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_device, read, write) /* PIA6821 IC3 */
AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_device, read, write) /* PIA6821 IC4 */
AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_device, read, write) /* PIA6821 IC5 */
AM_RANGE(0x0d00, 0x0d03) AM_DEVREADWRITE("pia_ic6", pia6821_device, read, write) /* PIA6821 IC6 */
AM_RANGE(0x0e00, 0x0e03) AM_DEVREADWRITE("pia_ic7", pia6821_device, read, write) /* PIA6821 IC7 */
AM_RANGE(0x0f00, 0x0f03) AM_DEVREADWRITE("pia_ic8", pia6821_device, read, write) /* PIA6821 IC8 */
AM_RANGE(0x1000, 0x2fff) AM_RAM AM_SHARE("dealem_videoram")
AM_RANGE(0x8000, 0xffff) AM_ROM AM_WRITENOP/* 64k paged ROM (4 pages) */
ADDRESS_MAP_END
static MACHINE_RESET( dealem_vid )
{
mpu4_state *state = machine.driver_data<mpu4_state>();
state->m_vfd->reset(); //for debug ports only
mpu4_stepper_reset(state);
state->m_lamp_strobe = 0;
state->m_lamp_strobe2 = 0;
state->m_led_strobe = 0;
state->m_IC23GC = 0;
state->m_IC23GB = 0;
state->m_IC23GA = 0;
state->m_IC23G1 = 1;
state->m_IC23G2A = 0;
state->m_IC23G2B = 0;
state->m_prot_col = 0;
state->m_chr_counter = 0;
state->m_chr_value = 0;
}
/* machine driver for Zenitone Deal 'Em board */
static MACHINE_CONFIG_START( dealem, mpu4dealem_state )
MCFG_MACHINE_START(mod2) /* main mpu4 board initialisation */
MCFG_MACHINE_RESET(dealem_vid)
MCFG_CPU_ADD("maincpu", M6809, MPU4_MASTER_CLOCK/4)
MCFG_CPU_PROGRAM_MAP(dealem_memmap)
MCFG_FRAGMENT_ADD(mpu4_common)
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("ay8913",AY8913, MPU4_MASTER_CLOCK/4)
MCFG_SOUND_CONFIG(ay8910_config)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MCFG_NVRAM_ADD_0FILL("nvram")
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_SIZE((54+1)*8, (32+1)*8) /* Taken from 6845 init, registers 00 & 04. Normally programmed with (value-1) */
MCFG_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 31*8-1) /* Taken from 6845 init, registers 01 & 06 */
MCFG_SCREEN_REFRESH_RATE(56) /* Measured accurately from the flip-flop, but 6845 handles this */
MCFG_SCREEN_UPDATE_STATIC(dealem)
MCFG_GFXDECODE(dealem)
MCFG_PALETTE_LENGTH(32)
MCFG_PALETTE_INIT(dealem)
MCFG_MC6845_ADD("crtc", HD6845, MPU4_MASTER_CLOCK / 4 / 8, hd6845_intf) /* HD68B45 */
MACHINE_CONFIG_END
static INPUT_PORTS_START( dealem )
PORT_START("ORANGE1")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("ORANGE2")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_COIN5) PORT_NAME("20p Token")PORT_IMPULSE(5)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p") PORT_CONDITION("DIL1",0x0f,EQUALS,0x04)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p") PORT_CONDITION("DIL1",0x0f,EQUALS,0x05)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p") PORT_CONDITION("DIL1",0x0f,EQUALS,0x06)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p") PORT_CONDITION("DIL1",0x0f,EQUALS,0x07)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p") PORT_CONDITION("DIL1",0x0f,EQUALS,0x08)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p") PORT_CONDITION("DIL1",0x0f,EQUALS,0x09)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("BLACK1")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_BUTTON5) PORT_NAME("Gamble")
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_START2) PORT_NAME("Pontoon")
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Hi-Lo") PORT_CONDITION("DIL1",0x0f,EQUALS,0x01)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Hi-Lo") PORT_CONDITION("DIL1",0x0f,EQUALS,0x09)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Hi-Lo") PORT_CONDITION("DIL1",0x0f,EQUALS,0x03)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Hi-Lo") PORT_CONDITION("DIL1",0x0f,EQUALS,0x04)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Hi-Lo") PORT_CONDITION("DIL1",0x0f,EQUALS,0x05)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Hi-Lo") PORT_CONDITION("DIL1",0x0f,EQUALS,0x06)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Hi-Lo") PORT_CONDITION("DIL1",0x0f,EQUALS,0x07)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Hi-Lo") PORT_CONDITION("DIL1",0x0f,EQUALS,0x08)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_SERVICE) PORT_NAME("Test Button") PORT_CODE(KEYCODE_W)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_SERVICE) PORT_NAME("Refill Key") PORT_CODE(KEYCODE_R) PORT_TOGGLE
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_INTERLOCK) PORT_NAME("Rear Door") PORT_CODE(KEYCODE_Q) PORT_TOGGLE
PORT_START("BLACK2")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Hi-Lo") PORT_CONDITION("DIL1",0x0f,EQUALS,0x00)
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Hi-Lo") PORT_CONDITION("DIL1",0x0f,EQUALS,0x02)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_BUTTON6) PORT_NAME("Twist")
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_BUTTON3) PORT_NAME("Lo")
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_NAME("Hi")
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_BUTTON7) PORT_NAME("Stick")
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_NAME("Collect")
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_BUTTON4) PORT_NAME("Deal")
PORT_START("DIL1")
PORT_DIPNAME( 0x0f, 0x00, "Cabinet Set Up Mode" ) PORT_DIPLOCATION("DIL1:01,02,03,04")
PORT_DIPSETTING( 0x00, "Stop The Clock" )
PORT_DIPSETTING( 0x01, "Hit the Top" )
PORT_DIPSETTING( 0x02, "Way In" )
PORT_DIPSETTING( 0x03, "Smash and Grab" )
PORT_DIPSETTING( 0x04, "Ready Steady Go-1" )
PORT_DIPSETTING( 0x05, "Ready Steady Go-2" )
PORT_DIPSETTING( 0x06, "Top Gears-1" )
PORT_DIPSETTING( 0x07, "Top Gears-2" )
PORT_DIPSETTING( 0x08, "Nifty Fifty" )
PORT_DIPSETTING( 0x09, "Super Tubes" )
PORT_DIPNAME( 0x70, 0x00, "Target Payout Percentage" ) PORT_DIPLOCATION("DIL1:05,06,07")
PORT_DIPSETTING( 0x00, "72%" )
PORT_DIPSETTING( 0x10, "74%" )
PORT_DIPSETTING( 0x20, "76%" )
PORT_DIPSETTING( 0x30, "78%" )
PORT_DIPSETTING( 0x40, "80%" )
PORT_DIPSETTING( 0x50, "82%" )
PORT_DIPSETTING( 0x60, "84%" )
PORT_DIPSETTING( 0x70, "86%" )
PORT_DIPNAME( 0x80, 0x00, "Display Switch Settings on Monitor" ) PORT_DIPLOCATION("DIL1:08")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("DIL2")
PORT_DIPNAME( 0x01, 0x00, "Payout Limit" ) PORT_DIPLOCATION("DIL2:01")
PORT_DIPSETTING( 0x00, "200p (All Cash)")
PORT_DIPSETTING( 0x01, "200p (Cash)+400p (Token)")
PORT_DIPNAME( 0x02, 0x00, "10p Payout Priority" ) PORT_DIPLOCATION("DIL2:02")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x00, "Clear Credits and bank at power on?" ) PORT_DIPLOCATION("DIL2:03")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x04, DEF_STR( Yes ) )
PORT_DIPNAME( 0x08, 0x00, "50p Payout Solenoid fitted?" ) PORT_DIPLOCATION("DIL2:04")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x08, DEF_STR( Yes ) )
PORT_DIPNAME( 0x10, 0x00, "100p Payout Solenoid fitted?" ) PORT_DIPLOCATION("DIL2:05")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x10, DEF_STR( Yes ) )
PORT_DIPNAME( 0x20, 0x00, "Coin alarms active?" ) PORT_DIPLOCATION("DIL2:06")
PORT_DIPSETTING( 0x20, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
PORT_DIPNAME( 0x40, 0x00, "Price of Play" ) PORT_DIPLOCATION("DIL2:07")
PORT_DIPSETTING( 0x00, "10p 1 Game" )
PORT_DIPSETTING( 0x40, "10p 2 Games" )
PORT_DIPNAME( 0x80, 0x00, "Coin Entry" ) PORT_DIPLOCATION("DIL2:08")
PORT_DIPSETTING( 0x00, "Multi" )
PORT_DIPSETTING( 0x80, DEF_STR(Single))
PORT_START("AUX1")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("AUX2")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_SPECIAL)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_SPECIAL)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_SPECIAL)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_SPECIAL)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p")PORT_IMPULSE(5) PORT_CONDITION("DIL1",0x0f,EQUALS,0x00)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p")PORT_IMPULSE(5) PORT_CONDITION("DIL1",0x0f,EQUALS,0x01)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p")PORT_IMPULSE(5) PORT_CONDITION("DIL1",0x0f,EQUALS,0x02)
PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("10p")PORT_IMPULSE(5) PORT_CONDITION("DIL1",0x0f,EQUALS,0x03)
PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_COIN2) PORT_NAME("20p")PORT_IMPULSE(5)
PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_COIN3) PORT_NAME("50p")PORT_IMPULSE(5)
PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_COIN4) PORT_NAME("100p")PORT_IMPULSE(5)
INPUT_PORTS_END
ROM_START( v4dealem )
ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 )
ROM_LOAD( "zenndlem.u6", 0x8000, 0x8000, CRC(571e5c05) SHA1(89b4c331407a04eae34bb187b036791e0a671533) )
ROM_REGION( 0x10000, "gfx1", 0 )
ROM_LOAD( "zenndlem.u24", 0x0000, 0x10000, CRC(3a1950c4) SHA1(7138346d4e8b3cffbd9751b4d7ebd367b9ad8da9) ) /* text layer */
ROM_REGION( 0x020, "proms", 0 )
ROM_LOAD( "zenndlem.u22", 0x000, 0x020, CRC(29988304) SHA1(42f61b8f9e1ee96b65db3b70833eb2f6e7a6ae0a) )
ROM_REGION( 0x200, "plds", 0 )
ROM_LOAD( "zenndlem.u10", 0x000, 0x104, CRC(e3103c05) SHA1(91b7be75c5fb37025039ab54b484e46a033969b5) )
ROM_END
/*Deal 'Em was a conversion kit designed to make early MPU4 machines into video games by replacing the top glass
and reel assembly with this kit and a supplied monitor. This explains why the cabinet switch alters lamp data and buttons.
The original Deal 'Em ran on Summit Coin hardware, and was made by someone else.
Two further different releases were made, running on the Barcrest MPU4 Video, rather than this one. These are Deal 'Em Again and Deal 'Em 2000*/
GAME( 1987,v4dealem, 0, dealem, dealem, 0, ROT0, "Zenitone","Deal 'Em (MPU4 Conversion Kit, v7.0)",GAME_IMPERFECT_GRAPHICS )

1
src/mame/drivers/mpu4plasma.c
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@ -30,7 +30,6 @@ public:
{
}
};

2
src/mame/drivers/mpu4sw.c
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@ -3,7 +3,7 @@
/* many sets have the BARCREST or BWG string at FFE0 replaced with other things
such at 'FATHER CHRISTMAS' are these hacked / bootlegs requiring special hw?
sets with 'D' in the ident code are Datapak sets, and play without a datapak connected
sets with 'D' in the ident code are Datapak sets, and do not play without a datapak connected
sets with 'Y' seem to require the % key to be set
*/

1171
src/mame/drivers/mpu4vid.c
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File diff suppressed because it is too large Load Diff

97
src/mame/includes/mpu4.h
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@ -24,7 +24,6 @@
#endif
#define LOGSTUFF(x) do { if (MPU4VIDVERBOSE) logerror x; } while (0)
#define LOG2674(x) do { if (MPU4VIDVERBOSE) logerror x; } while (0)
@ -47,7 +46,6 @@
static const UINT8 reel_mux_table[8]= {0,4,2,6,1,5,3,7};//include 7, although I don't think it's used, this is basically a wire swap
static const UINT8 reel_mux_table7[8]= {3,1,5,6,4,2,0,7};
static const UINT8 vsync_table[4] = {3,1,5,7}; //Video related
static const UINT8 bwb_chr_table_common[10]= {0x00,0x04,0x04,0x0c,0x0c,0x1c,0x14,0x2c,0x5c,0x2c};
@ -90,22 +88,6 @@ struct bwb_chr_table//dynamically populated table for BwB protection
UINT8 response;
};
/* Video stuff - see mpu4drvr.c */
struct ef9369_t
{
UINT32 addr;
UINT16 clut[16]; /* 13-bits - a marking bit and a 444 color */
};
struct bt471_t
{
UINT8 address;
UINT8 addr_cnt;
UINT8 pixmask;
UINT8 command;
rgb_t color;
};
class mpu4_state : public driver_device
{
@ -119,10 +101,7 @@ public:
m_pia5(*this, "pia_ic5"),
m_pia6(*this, "pia_ic6"),
m_pia7(*this, "pia_ic7"),
m_pia8(*this, "pia_ic8"),
m_vid_vidram(*this, "vid_vidram"),
m_vid_mainram(*this, "vid_mainram"),
m_dealem_videoram(*this, "dealem_videoram")
m_pia8(*this, "pia_ic8")
{ }
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
@ -195,79 +174,7 @@ public:
int m_t3h;
mpu4_chr_table* m_current_chr_table;
const bwb_chr_table* m_bwb_chr_table1;
//Video
UINT8 m_m6840_irq_state;
UINT8 m_m6850_irq_state;
UINT8 m_scn2674_irq_state;
UINT8 m_m68k_m6809_line;
UINT8 m_m6809_m68k_line;
UINT8 m_m68k_acia_cts;
UINT8 m_m6809_acia_cts;
UINT8 m_m6809_acia_rts;
UINT8 m_m6809_acia_dcd;
int m_gfx_index;
optional_shared_ptr<UINT16> m_vid_vidram;
optional_shared_ptr<UINT16> m_vid_mainram;
// UINT8 m_scn2674_IR[16];
UINT8 m_scn2674_IR_pointer;
UINT8 m_scn2674_screen1_l;
UINT8 m_scn2674_screen1_h;
UINT8 m_scn2674_cursor_l;
UINT8 m_scn2674_cursor_h;
UINT8 m_scn2674_screen2_l;
UINT8 m_scn2674_screen2_h;
UINT8 m_scn2674_irq_register;
UINT8 m_scn2674_status_register;
UINT8 m_scn2674_irq_mask;
UINT8 m_scn2674_gfx_enabled;
UINT8 m_scn2674_display_enabled;
UINT8 m_scn2674_display_enabled_field;
UINT8 m_scn2674_display_enabled_scanline;
UINT8 m_scn2674_cursor_enabled;
UINT8 m_IR0_scn2674_double_ht_wd;
UINT8 m_IR0_scn2674_scanline_per_char_row;
UINT8 m_IR0_scn2674_sync_select;
UINT8 m_IR0_scn2674_buffer_mode_select;
UINT8 m_IR1_scn2674_interlace_enable;
UINT8 m_IR1_scn2674_equalizing_constant;
UINT8 m_IR2_scn2674_row_table;
UINT8 m_IR2_scn2674_horz_sync_width;
UINT8 m_IR2_scn2674_horz_back_porch;
UINT8 m_IR3_scn2674_vert_front_porch;
UINT8 m_IR3_scn2674_vert_back_porch;
UINT8 m_IR4_scn2674_rows_per_screen;
UINT8 m_IR4_scn2674_character_blink_rate_divisor;
UINT8 m_IR5_scn2674_character_per_row;
UINT8 m_IR6_scn2674_cursor_first_scanline;
UINT8 m_IR6_scn2674_cursor_last_scanline;
UINT8 m_IR7_scn2674_cursor_underline_position;
UINT8 m_IR7_scn2674_cursor_rate_divisor;
UINT8 m_IR7_scn2674_cursor_blink;
UINT8 m_IR7_scn2674_vsync_width;
UINT8 m_IR8_scn2674_display_buffer_first_address_LSB;
UINT8 m_IR9_scn2674_display_buffer_first_address_MSB;
UINT8 m_IR9_scn2674_display_buffer_last_address;
UINT8 m_IR10_scn2674_display_pointer_address_lower;
UINT8 m_IR11_scn2674_display_pointer_address_upper;
UINT8 m_IR11_scn2674_reset_scanline_counter_on_scrollup;
UINT8 m_IR11_scn2674_reset_scanline_counter_on_scrolldown;
UINT8 m_IR12_scn2674_scroll_start;
UINT8 m_IR12_scn2674_split_register_1;
UINT8 m_IR13_scn2674_scroll_end;
UINT8 m_IR13_scn2674_split_register_2;
UINT8 m_IR14_scn2674_scroll_lines;
UINT8 m_IR14_scn2674_double_1;
UINT8 m_IR14_scn2674_double_2;
UINT8 m_scn2674_horz_front_porch;
UINT8 m_scn2674_spl1;
UINT8 m_scn2674_spl2;
UINT8 m_scn2674_dbl1;
INT8 m_cur[2];
optional_shared_ptr<UINT8> m_dealem_videoram;
int m_rowcounter;
int m_linecounter;
struct ef9369_t m_pal;
struct bt471_t m_bt471;
DECLARE_WRITE8_MEMBER(bankswitch_w);
DECLARE_READ8_MEMBER(bankswitch_r);
DECLARE_WRITE8_MEMBER(bankset_w);

2
src/mame/mame.mak
View File

@ -508,7 +508,9 @@ $(MAMEOBJ)/barcrest.a: \
$(DRIVERS)/mpu3.o \
$(DRIVERS)/mpu4hw.o $(DRIVERS)/mpu4sw.o $(DRIVERS)/mpu4.o \
$(DRIVERS)/mpu4plasma.o \
$(DRIVERS)/mpu4dealem.o \
$(DRIVERS)/mpu4vid.o \
$(VIDEO)/scn2674.o \
$(DRIVERS)/mpu5hw.o $(DRIVERS)/mpu5.o \
$(VIDEO)/awpvid.o \
$(MACHINE)/meters.o \

758
src/mame/video/scn2674.c Normal file
View File

@ -0,0 +1,758 @@
/*
SCN2674 - Advanced Video Display Controller (AVDC) (Video Chip)
This is a somewhat terrible implementation and should probably just be rewritten from scratch
it is currently used by mpu4vid.c and still quite heavily tied to the behavior of that.
I don't know if the timing bugs with those games comes from this, or emulation of the other
MPU4 devices tho because even some of the non-video games seem laggy and prone to failure.
-- currently expects (from the host driver)
decoded gfx in regions 0,1,2,3 in various formats (normal, double height etc.)
eventually the chip should just handle this without the need to decode anything
a callback function for when the irqs are changed / updated
a call from the video start from your video start function
a call to the scanline function each scanline
a call to the video draw (with ram pointer) from a screen update function
video to be on the primary screen
this could all be simplified / changed, the chip can actually be hooked up in various ways
including working on a per scanline basis with almost no ram
*/
#include "emu.h"
#include "scn2674.h"
const device_type SCN2674_VIDEO = &device_creator<scn2674_device>;
static void default_scn2674_callback(running_machine &machine)
{
// logerror("no scn2674_callback\n");
}
scn2674_device::scn2674_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SCN2674_VIDEO, "scn2674_device", tag, owner, clock)
{
m_interrupt_callback = default_scn2674_callback;
}
void scn2674_device::device_start()
{
}
void scn2674_device::device_reset()
{
m_scn2674_IR_pointer= 0;
m_scn2674_screen1_l= 0;
m_scn2674_screen1_h= 0;
m_scn2674_cursor_l= 0;
m_scn2674_cursor_h= 0;
m_scn2674_screen2_l= 0;
m_scn2674_screen2_h= 0;
m_scn2674_irq_register= 0;
m_scn2674_status_register= 0;
m_scn2674_irq_mask= 0;
m_scn2674_gfx_enabled= 0;
m_scn2674_display_enabled= 0;
m_scn2674_display_enabled_field= 0;
m_scn2674_display_enabled_scanline= 0;
m_scn2674_cursor_enabled= 0;
m_IR0_scn2674_double_ht_wd= 0;
m_IR0_scn2674_scanline_per_char_row= 0;
m_IR0_scn2674_sync_select= 0;
m_IR0_scn2674_buffer_mode_select= 0;
m_IR1_scn2674_interlace_enable= 0;
m_IR1_scn2674_equalizing_constant= 0;
m_IR2_scn2674_row_table= 0;
m_IR2_scn2674_horz_sync_width= 0;
m_IR2_scn2674_horz_back_porch= 0;
m_IR3_scn2674_vert_front_porch= 0;
m_IR3_scn2674_vert_back_porch= 0;
m_IR4_scn2674_rows_per_screen= 0;
m_IR4_scn2674_character_blink_rate_divisor= 0;
m_IR5_scn2674_character_per_row= 0;
m_IR6_scn2674_cursor_first_scanline= 0;
m_IR6_scn2674_cursor_last_scanline= 0;
m_IR7_scn2674_cursor_underline_position= 0;
m_IR7_scn2674_cursor_rate_divisor= 0;
m_IR7_scn2674_cursor_blink= 0;
m_IR7_scn2674_vsync_width= 0;
m_IR8_scn2674_display_buffer_first_address_LSB= 0;
m_IR9_scn2674_display_buffer_first_address_MSB= 0;
m_IR9_scn2674_display_buffer_last_address= 0;
m_IR10_scn2674_display_pointer_address_lower= 0;
m_IR11_scn2674_display_pointer_address_upper= 0;
m_IR11_scn2674_reset_scanline_counter_on_scrollup= 0;
m_IR11_scn2674_reset_scanline_counter_on_scrolldown= 0;
m_IR12_scn2674_scroll_start= 0;
m_IR12_scn2674_split_register_1= 0;
m_IR13_scn2674_scroll_end= 0;
m_IR13_scn2674_split_register_2= 0;
m_IR14_scn2674_scroll_lines= 0;
m_IR14_scn2674_double_1= 0;
m_IR14_scn2674_double_2= 0;
m_scn2674_horz_front_porch= 0;
m_scn2674_spl1= 0;
m_scn2674_spl2= 0;
m_scn2674_dbl1= 0;
m_rowcounter= 0;
m_linecounter= 0;
m_scn2674_irq_state= 0;
}
void scn2674_device::set_irq_update_callback(device_t &device, s2574_interrupt_callback_func callback)
{
scn2674_device &dev = downcast<scn2674_device &>(device);
dev.m_interrupt_callback = callback;
}
// 15 Initialization Registers (8-bit each)
void scn2674_device::scn2674_write_init_regs(UINT8 data)
{
LOG2674(("scn2674_write_init_regs %02x %02x\n",m_scn2674_IR_pointer,data));
// m_scn2674_IR[m_scn2674_IR_pointer]=data;
switch ( m_scn2674_IR_pointer) /* display some debug info, set mame specific variables */
{
case 0:
m_IR0_scn2674_double_ht_wd = (data & 0x80)>>7;
m_IR0_scn2674_scanline_per_char_row = ((data & 0x78)>>3) + 1;
m_IR0_scn2674_sync_select = (data&0x04)>>2;
m_IR0_scn2674_buffer_mode_select = (data&0x03);
LOG2674(("IR0 - Double Ht Wd %02x\n",m_IR0_scn2674_double_ht_wd));//affects IR14 as well
LOG2674(("IR0 - Scanlines per Character Row %02x\n",m_IR0_scn2674_scanline_per_char_row));//value+1 = scanlines
if (m_IR0_scn2674_scanline_per_char_row != 8)
{
popmessage("Row size change, contact MAMEDEV");
}
LOG2674(("IR0 - Sync Select %02x\n",m_IR0_scn2674_sync_select));//1 = csync
LOG2674(("IR0 - Buffer Mode Select %02x\n",m_IR0_scn2674_buffer_mode_select)); //0 independent 1 transparent 2 shared 3 row
break;
case 1:
m_IR1_scn2674_interlace_enable = (data&0x80)>>7;
m_IR1_scn2674_equalizing_constant = (data&0x7f)+1;
LOG2674(("IR1 - Interlace Enable %02x\n",m_IR1_scn2674_interlace_enable));
LOG2674(("IR1 - Equalizing Constant %02i CCLKs\n",m_IR1_scn2674_equalizing_constant));
break;
case 2:
m_IR2_scn2674_row_table = (data&0x80)>>7;
m_IR2_scn2674_horz_sync_width = (((data&0x78)>>3)*2) + 2;
m_IR2_scn2674_horz_back_porch = ((data&0x07)*4) - 1;
LOG2674(("IR2 - Row Table %02x\n",m_IR2_scn2674_row_table));
LOG2674(("IR2 - Horizontal Sync Width %02i CCLKs\n",m_IR2_scn2674_horz_sync_width));
LOG2674(("IR2 - Horizontal Back Porch %02i CCLKs\n",m_IR2_scn2674_horz_back_porch));
break;
case 3:
m_IR3_scn2674_vert_front_porch = (((data&0xe0)>>5) * 4)+4 ;
m_IR3_scn2674_vert_back_porch = ((data&0x1f) * 2) + 4;
LOG2674(("IR3 - Vertical Front Porch %02i Lines\n",m_IR3_scn2674_vert_front_porch));
LOG2674(("IR3 - Vertical Back Porch %02i Lines\n",m_IR3_scn2674_vert_back_porch));
break;
case 4:
m_IR4_scn2674_rows_per_screen = (data&0x7f) + 1;
m_IR4_scn2674_character_blink_rate_divisor = ((data & 0x80)>>7 ? 128:64);
LOG2674(("IR4 - Rows Per Screen %02i\n",m_IR4_scn2674_rows_per_screen));
LOG2674(("IR4 - Character Blink Rate = 1/%02i\n",m_IR4_scn2674_character_blink_rate_divisor));
break;
case 5:
/* IR5 - Active Characters Per Row
cccc cccc
c = Characters Per Row */
m_IR5_scn2674_character_per_row = data + 1;
LOG2674(("IR5 - Active Characters Per Row %02i\n",m_IR5_scn2674_character_per_row));
break;
case 6:
m_IR6_scn2674_cursor_last_scanline = (data & 0x0f);
m_IR6_scn2674_cursor_first_scanline = (data & 0xf0)>>4;
LOG2674(("IR6 - First Line of Cursor %02x\n",m_IR6_scn2674_cursor_first_scanline));
LOG2674(("IR6 - Last Line of Cursor %02x\n",m_IR6_scn2674_cursor_last_scanline));
break;
case 7:
m_IR7_scn2674_cursor_underline_position = (data & 0x0f);
m_IR7_scn2674_cursor_rate_divisor = ((data & 0x10)>>4 ? 64:32);
m_IR7_scn2674_cursor_blink = (data & 0x20)>>5;
m_IR7_scn2674_vsync_width = vsync_table[(data & 0xC0)>>6];
LOG2674(("IR7 - Underline Position %02x\n",m_IR7_scn2674_cursor_underline_position));
LOG2674(("IR7 - Cursor rate 1/%02i\n",m_IR7_scn2674_cursor_rate_divisor));
LOG2674(("IR7 - Cursor blink %02x\n",m_IR7_scn2674_cursor_blink));
LOG2674(("IR7 - Vsync Width %02i Lines\n",m_IR7_scn2674_vsync_width));
break;
case 8:
m_IR8_scn2674_display_buffer_first_address_LSB = data;
LOG2674(("IR8 - Display Buffer First Address LSB %02x\n",m_IR8_scn2674_display_buffer_first_address_LSB));
break;
case 9:
m_IR9_scn2674_display_buffer_first_address_MSB = data & 0x0f;
m_IR9_scn2674_display_buffer_last_address = (data & 0xf0)>>4;
LOG2674(("IR9 - Display Buffer First Address MSB %02x\n",m_IR9_scn2674_display_buffer_first_address_MSB));
LOG2674(("IR9 - Display Buffer Last Address %02x\n",m_IR9_scn2674_display_buffer_last_address));
break;
case 10:
m_IR10_scn2674_display_pointer_address_lower = data;
LOG2674(("IR10 - Display Pointer Address Lower %02x\n",m_IR10_scn2674_display_pointer_address_lower));
break;
case 11:
m_IR11_scn2674_display_pointer_address_upper= data&0x3f;
m_IR11_scn2674_reset_scanline_counter_on_scrollup= (data&0x40 >> 6);
m_IR11_scn2674_reset_scanline_counter_on_scrolldown= (data&0x80 >> 7);
LOG2674(("IR11 - Display Pointer Address Lower %02x\n",m_IR11_scn2674_display_pointer_address_upper));
LOG2674(("IR11 - Reset Scanline Counter on Scroll Up %02x\n",m_IR11_scn2674_reset_scanline_counter_on_scrollup));
LOG2674(("IR11 - Reset Scanline Counter on Scroll Down %02x\n",m_IR11_scn2674_reset_scanline_counter_on_scrolldown));
break;
case 12:
m_IR12_scn2674_scroll_start = (data & 0x80)>>7;
m_IR12_scn2674_split_register_1 = (data & 0x7f);
LOG2674(("IR12 - Scroll Start %02x\n",m_IR12_scn2674_scroll_start));
LOG2674(("IR12 - Split Register 1 %02x\n",m_IR12_scn2674_split_register_1));
break;
case 13:
m_IR13_scn2674_scroll_end = (data & 0x80)>>7;
m_IR13_scn2674_split_register_2 = (data & 0x7f);
LOG2674(("IR13 - Scroll End %02x\n",m_IR13_scn2674_scroll_end));
LOG2674(("IR13 - Split Register 2 %02x\n",m_IR13_scn2674_split_register_2));
break;
case 14:
m_IR14_scn2674_scroll_lines = (data & 0x0f);
if (!m_IR0_scn2674_double_ht_wd)
{
m_IR14_scn2674_double_2 = (data & 0x30)>>4;
LOG2674(("IR14 - Double 2 %02x\n",m_IR14_scn2674_double_2));
}
//0 normal, 1, double width, 2, double width and double tops 3, double width and double bottoms
//1 affects SSR1, 2 affects SSR2
//If Double Height enabled in IR0, Screen start 1 upper (bits 7 and 6)replace Double 1, and Double 2 is unused
m_IR14_scn2674_double_1 = (data & 0xc0)>>6;
LOG2674(("IR14 - Double 1 %02x\n",m_IR14_scn2674_double_1));
LOG2674(("IR14 - Scroll Lines %02i\n",m_IR14_scn2674_scroll_lines));
break;
case 15: /* not valid! */
break;
}
m_scn2674_horz_front_porch = 2*(m_IR1_scn2674_equalizing_constant) + 3*(m_IR2_scn2674_horz_sync_width)-(m_IR5_scn2674_character_per_row) - m_IR2_scn2674_horz_back_porch;
LOG2674(("Horizontal Front Porch %02x CCLKs\n",m_scn2674_horz_front_porch));
m_scn2674_IR_pointer++;
if (m_scn2674_IR_pointer>14)m_scn2674_IR_pointer=14;
}
void scn2674_device::scn2674_write_command(running_machine &machine, UINT8 data)
{
UINT8 operand;
int i;
LOG2674(("scn2674_write_command %02x\n",data));
if (data==0x00)
{
/* master reset, configures registers */
LOG2674(("master reset\n"));
m_scn2674_IR_pointer=0;
m_scn2674_irq_register = 0x00;
m_scn2674_status_register = 0x20;//RDFLG activated
m_linecounter =0;
m_rowcounter =0;
m_scn2674_irq_mask = 0x00;
m_scn2674_gfx_enabled = 0;
m_scn2674_display_enabled = 0;
m_scn2674_cursor_enabled = 0;
m_IR2_scn2674_row_table = 0;
}
if ((data&0xf0)==0x10)
{
/* set IR pointer */
operand = data & 0x0f;
LOG2674(("set IR pointer %02x\n",operand));
m_scn2674_IR_pointer=operand;
}
/* ANY COMBINATION OF THESE ARE POSSIBLE */
if ((data&0xe3)==0x22)
{
/* Disable GFX */
LOG2674(("disable GFX %02x\n",data));
m_scn2674_gfx_enabled = 0;
}
if ((data&0xe3)==0x23)
{
/* Enable GFX */
LOG2674(("enable GFX %02x\n",data));
m_scn2674_gfx_enabled = 1;
}
if ((data&0xe9)==0x28)
{
/* Display off */
operand = data & 0x04;
m_scn2674_display_enabled = 0;
if (operand)
LOG2674(("display OFF - float DADD bus %02x\n",data));
else
LOG2674(("display OFF - no float DADD bus %02x\n",data));
}
if ((data&0xe9)==0x29)
{
/* Display on */
operand = data & 0x04;
if (operand)
{
m_scn2674_display_enabled_field = 1;
LOG2674(("display ON - next field %02x\n",data));
}
else
{
m_scn2674_display_enabled_scanline = 1;
LOG2674(("display ON - next scanline %02x\n",data));
}
}
if ((data&0xf1)==0x30)
{
/* Cursor Off */
LOG2674(("cursor off %02x\n",data));
m_scn2674_cursor_enabled = 0;
}
if ((data&0xf1)==0x31)
{
/* Cursor On */
LOG2674(("cursor on %02x\n",data));
m_scn2674_cursor_enabled = 1;
}
/* END */
if ((data&0xe0)==0x40)
{
/* Reset Interrupt / Status bit */
operand = data & 0x1f;
LOG2674(("reset interrupt / status bit %02x\n",operand));
m_scn2674_irq_register &= ~(data & 0x1f);
m_scn2674_status_register &= ~(data & 0x1f);
LOG2674(("IRQ Status after reset\n"));
LOG2674(("Split 2 IRQ: %d Active\n",(m_scn2674_irq_register>>0)&1));
LOG2674(("Ready IRQ: %d Active\n",(m_scn2674_irq_register>>1)&1));
LOG2674(("Split 1 IRQ: %d Active\n",(m_scn2674_irq_register>>2)&1));
LOG2674(("Line Zero IRQ: %d Active\n",(m_scn2674_irq_register>>3)&1));
LOG2674(("V-Blank IRQ: %d Active\n",(m_scn2674_irq_register>>4)&1));
m_scn2674_irq_state = 0;
for (i = 0; i < 5; i++)
{
if ((m_scn2674_irq_register>>i&1)&(m_scn2674_irq_mask>>i&1))
{
m_scn2674_irq_state = 1;
}
}
m_interrupt_callback(machine);
}
if ((data&0xe0)==0x80)
{
/* Disable Interrupt mask*/
operand = data & 0x1f;
m_scn2674_irq_mask &= ~(operand);
LOG2674(("IRQ Mask after disable %x\n",operand));
LOG2674(("Split 2 IRQ: %d Unmasked\n",(m_scn2674_irq_mask>>0)&1));
LOG2674(("Ready IRQ: %d Unmasked\n",(m_scn2674_irq_mask>>1)&1));
LOG2674(("Split 1 IRQ: %d Unmasked\n",(m_scn2674_irq_mask>>2)&1));
LOG2674(("Line Zero IRQ: %d Unmasked\n",(m_scn2674_irq_mask>>3)&1));
LOG2674(("V-Blank IRQ: %d Unmasked\n",(m_scn2674_irq_mask>>4)&1));
}
if ((data&0xe0)==0x60)
{
/* Enable Interrupt mask*/
operand = data & 0x1f;
m_scn2674_irq_mask |= (data & 0x1f);
LOG2674(("IRQ Mask after enable %x\n",operand));
LOG2674(("Split 2 IRQ: %d Unmasked\n",(m_scn2674_irq_mask>>0)&1));
LOG2674(("Ready IRQ: %d Unmasked\n",(m_scn2674_irq_mask>>1)&1));
LOG2674(("Split 1 IRQ: %d Unmasked\n",(m_scn2674_irq_mask>>2)&1));
LOG2674(("Line Zero IRQ: %d Unmasked\n",(m_scn2674_irq_mask>>3)&1));
LOG2674(("V-Blank IRQ: %d Unmasked\n",(m_scn2674_irq_mask>>4)&1));
}
/* Delayed Commands */
/* These set 0x20 in status register when done */
if (data == 0xa4)
{
/* read at pointer address */
LOG2674(("DELAYED read at pointer address %02x\n",data));
}
if (data == 0xa2)
{
/* write at pointer address */
LOG2674(("DELAYED write at pointer address %02x\n",data));
}
if (data == 0xa9)
{
/* increase cursor address */
LOG2674(("DELAYED increase cursor address %02x\n",data));
}
if (data == 0xac)
{
/* read at cursor address */
LOG2674(("DELAYED read at cursor address %02x\n",data));
}
if (data == 0xaa)
{
/* write at cursor address */
LOG2674(("DELAYED write at cursor address %02x\n",data));
}
if (data == 0xad)
{
/* read at cursor address + increment */
LOG2674(("DELAYED read at cursor address+increment %02x\n",data));
}
if (data == 0xab)
{
/* write at cursor address + increment */
LOG2674(("DELAYED write at cursor address+increment %02x\n",data));
}
if (data == 0xbb)
{
/* write from cursor address to pointer address */
LOG2674(("DELAYED write from cursor address to pointer address %02x\n",data));
}
if (data == 0xbd)
{
/* read from cursor address to pointer address */
LOG2674(("DELAYED read from cursor address to pointer address %02x\n",data));
}
}
READ16_MEMBER( scn2674_device::mpu4_vid_scn2674_r )
{
/*
Offset: Purpose
0 Interrupt Register
1 Status Register
2 Screen Start 1 Lower Register
3 Screen Start 1 Upper Register
4 Cursor Address Lower Register
5 Cursor Address Upper Register
6 Screen Start 2 Lower Register
7 Screen Start 2 Upper Register
*/
switch (offset)
{
/* Status / Irq Register
--RV ZSRs
6+7 -- = ALWAYS 0
5 R = RDFLG (Status Register Only)
4 V = Vblank
3 Z = Line Zero
2 S = Split 1
1 R = Ready
0 s = Split 2
*/
case 0:
LOG2674(("Read Irq Register %02x %06x\n",m_scn2674_irq_register,cpu_get_pc(&space.device())));
return m_scn2674_irq_register;
case 1:
LOG2674(("Read Status Register %02X %06x\n",m_scn2674_status_register,cpu_get_pc(&space.device())));
return m_scn2674_status_register;
case 2: LOG2674(("Read Screen1_l Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_screen1_l;
case 3: LOG2674(("Read Screen1_h Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_screen1_h;
case 4: LOG2674(("Read Cursor_l Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_cursor_l;
case 5: LOG2674(("Read Cursor_h Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_cursor_h;
case 6: LOG2674(("Read Screen2_l Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_screen2_l;
case 7: LOG2674(("Read Screen2_h Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_screen2_h;
}
return 0xffff;
}
WRITE16_MEMBER( scn2674_device::mpu4_vid_scn2674_w )
{
/*
Offset: Purpose
0 Initialization Registers
1 Command Register
2 Screen Start 1 Lower Register
3 Screen Start 1 Upper Register
4 Cursor Address Lower Register
5 Cursor Address Upper Register
6 Screen Start 2 Lower Register
7 Screen Start 2 Upper Register
*/
data &=0x00ff; /* it's an 8-bit chip on a 16-bit board, feel the cheapness. */
switch (offset)
{
case 0:
scn2674_write_init_regs(data);
break;
case 1:
scn2674_write_command(space.machine(), data);
break;
case 2: m_scn2674_screen1_l = data; break;
case 3:
m_scn2674_screen1_h = (data&0x3f);//uppermost two bytes not part of register
m_scn2674_dbl1=(data & 0xc0)>>6;
if (m_IR0_scn2674_double_ht_wd)
{
m_IR14_scn2674_double_1 = m_scn2674_dbl1;
LOG2674(("IR14 - Double 1 overridden %02x\n",m_IR14_scn2674_double_1));
}
break;
case 4: m_scn2674_cursor_l = data; break;
case 5: m_scn2674_cursor_h = data; break;
case 6: m_scn2674_screen2_l = data; break;
case 7:
m_scn2674_screen2_h = (data&0x3f);
m_scn2674_spl1 = (data & 0x40);
m_scn2674_spl2 = (data & 0x80);
break;
break;
}
}
void scn2674_device::scn2674_line(running_machine &machine)
{
if (m_linecounter==0)/* Ready - this triggers for the first scanline of the screen */
{
m_scn2674_status_register |= 0x02;
if (m_scn2674_irq_mask&0x02)
{
LOG2674(("SCN2674 Ready\n"));
m_scn2674_irq_state = 1;
m_scn2674_irq_register |= 0x02;
m_interrupt_callback(machine);
}
}
// should be triggered at the start of each ROW (line zero for that row)
if (( m_linecounter%8 == 0)&& (m_linecounter < 297) )
{
m_scn2674_status_register |= 0x08;
if (m_scn2674_irq_mask&0x08)
{
LOG2674(("SCN2674 Line Zero\n"));
m_scn2674_irq_state = 1;
m_scn2674_irq_register |= 0x08;
m_interrupt_callback(machine);
}
m_rowcounter = ((m_rowcounter+1)% 37);//Not currently used
}
// this is ROWS not scanlines!!
if ((m_linecounter == m_IR12_scn2674_split_register_1*8)&&(m_linecounter != 0))
/* Split Screen 1 */
{
if (m_scn2674_spl1)
{
popmessage("Split screen 1 address shift required, contact MAMEDEV");
}
m_scn2674_status_register |= 0x04;
if (m_scn2674_irq_mask&0x04)
{
machine.primary_screen->update_partial(m_linecounter);
m_scn2674_irq_register |= 0x04;
LOG2674(("SCN2674 Split Screen 1\n"));
m_scn2674_irq_state = 1;
m_interrupt_callback(machine);
// machine.primary_screen->update_partial(m_linecounter);
}
}
// this is in ROWS not scanlines!!!
if ((m_linecounter == m_IR13_scn2674_split_register_2*8)&&(m_linecounter != 0))
/* Split Screen 2 */
{
if (m_scn2674_spl2)
{
popmessage("Split screen 2 address shift required, contact MAMEDEV");
}
m_scn2674_status_register |= 0x01;
if (m_scn2674_irq_mask&0x01)
{
machine.primary_screen->update_partial(m_linecounter);
LOG2674(("SCN2674 Split Screen 2 irq\n"));
m_scn2674_irq_state = 1;
m_scn2674_irq_register |= 0x01;
m_interrupt_callback(machine);
//machine.primary_screen->update_partial(m_linecounter);
}
}
if (m_linecounter==296)//front porch
{
m_scn2674_status_register |= 0x10;
if (m_scn2674_irq_mask&0x10)
{
LOG2674(("vblank irq\n"));
m_scn2674_irq_state = 1;
m_scn2674_irq_register |= 0x10;
m_interrupt_callback(machine);
}
}
}
// scanline timer
void scn2674_device::scn2674_do_scanline(running_machine &machine, int scanline)
{
//This represents the scanline counter in the SCN2674. Note that we ignore the horizontal blanking
if (((m_scn2674_display_enabled_scanline) || (m_scn2674_display_enabled_field && (m_IR1_scn2674_interlace_enable == 0)))&&(!m_scn2674_display_enabled))
{
m_scn2674_display_enabled = 1;
m_scn2674_display_enabled_scanline = 0;
m_scn2674_display_enabled_field = 0;
}
if (m_scn2674_display_enabled)
{
m_linecounter = scanline;
}
else
{
m_linecounter =297;//hold the counter in the vsync point, it's not clear whether this is done or not
}
scn2674_line(machine);
// timer.machine().scheduler().synchronize();
}
////// screen update
template<class _BitmapClass>
void scn2674_device::scn2574_draw_common( running_machine &machine, _BitmapClass &bitmap, const rectangle &cliprect, UINT16* vid_mainram )
{
int x, y/*, count = 0*/;
/* this is in main ram.. i think it must transfer it out of here??? */
/* count = 0x0018b6/2; - crmaze count = 0x004950/2; - turnover */
/* we're in row table mode...thats why */
for(y = 0; y < m_IR4_scn2674_rows_per_screen; y++)
{
int screen2_base = (m_scn2674_screen2_h << 8) | m_scn2674_screen2_l;
UINT16 rowbase = (vid_mainram[1+screen2_base+(y*2)]<<8)|vid_mainram[screen2_base+(y*2)];
int dbl_size=0;
int gfxregion = 0;
if (m_IR0_scn2674_double_ht_wd)
{
dbl_size = (rowbase & 0xc000)>>14; /* ONLY if double size is enabled.. otherwise it can address more chars given more RAM */
}
if (dbl_size&2)
{
gfxregion = 1;
}
for(x = 0; x < m_IR5_scn2674_character_per_row; x++)
{
UINT16 tiledat;
UINT16 attr;
tiledat = vid_mainram[(rowbase+x)&0x7fff];
attr = tiledat >>12;
if (attr)
drawgfx_opaque(bitmap,cliprect,machine.gfx[gfxregion],tiledat,0,0,0,(x*8),(y*8));
}
if (dbl_size&2)
{
y++;/* skip a row? */
}
}
}
void scn2674_device::scn2574_draw( running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, UINT16* vid_mainram )
{ scn2574_draw_common(machine, bitmap, cliprect, vid_mainram); }
void scn2674_device::scn2574_draw( running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT16* vid_mainram )
{ scn2574_draw_common(machine, bitmap, cliprect, vid_mainram); }
void scn2674_device::init_stuff()
{
// from video start
m_scn2674_IR_pointer = 0;
}

111
src/mame/video/scn2674.h Normal file
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#define S674VERBOSE 0
#define LOG2674(x) do { if (S674VERBOSE) logerror x; } while (0)
typedef void (*s2574_interrupt_callback_func)(running_machine &machine);
static const UINT8 vsync_table[4] = {3,1,5,7}; //Video related
class scn2674_device : public device_t
{
public:
scn2674_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
static void set_irq_update_callback(device_t &device, s2574_interrupt_callback_func callback);
// int m_gfx_index;
DECLARE_READ16_MEMBER( mpu4_vid_scn2674_r );
DECLARE_WRITE16_MEMBER( mpu4_vid_scn2674_w );
UINT8 get_irq_state( void )
{
return m_scn2674_irq_state;
}
void scn2574_draw(running_machine &machine, bitmap_ind16 &bitmap, const rectangle &cliprect, UINT16* vid_mainram);
void scn2574_draw(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT16* vid_mainram);
void init_stuff();
void scn2674_do_scanline(running_machine &machine, int scanline);
protected:
virtual void device_start();
virtual void device_reset();
s2574_interrupt_callback_func m_interrupt_callback;
UINT8 m_scn2674_IR_pointer;
UINT8 m_scn2674_screen1_l;
UINT8 m_scn2674_screen1_h;
UINT8 m_scn2674_cursor_l;
UINT8 m_scn2674_cursor_h;
UINT8 m_scn2674_screen2_l;
UINT8 m_scn2674_screen2_h;
UINT8 m_scn2674_irq_register;
UINT8 m_scn2674_status_register;
UINT8 m_scn2674_irq_mask;
UINT8 m_scn2674_gfx_enabled;
UINT8 m_scn2674_display_enabled;
UINT8 m_scn2674_display_enabled_field;
UINT8 m_scn2674_display_enabled_scanline;
UINT8 m_scn2674_cursor_enabled;
UINT8 m_IR0_scn2674_double_ht_wd;
UINT8 m_IR0_scn2674_scanline_per_char_row;
UINT8 m_IR0_scn2674_sync_select;
UINT8 m_IR0_scn2674_buffer_mode_select;
UINT8 m_IR1_scn2674_interlace_enable;
UINT8 m_IR1_scn2674_equalizing_constant;
UINT8 m_IR2_scn2674_row_table;
UINT8 m_IR2_scn2674_horz_sync_width;
UINT8 m_IR2_scn2674_horz_back_porch;
UINT8 m_IR3_scn2674_vert_front_porch;
UINT8 m_IR3_scn2674_vert_back_porch;
UINT8 m_IR4_scn2674_rows_per_screen;
UINT8 m_IR4_scn2674_character_blink_rate_divisor;
UINT8 m_IR5_scn2674_character_per_row;
UINT8 m_IR6_scn2674_cursor_first_scanline;
UINT8 m_IR6_scn2674_cursor_last_scanline;
UINT8 m_IR7_scn2674_cursor_underline_position;
UINT8 m_IR7_scn2674_cursor_rate_divisor;
UINT8 m_IR7_scn2674_cursor_blink;
UINT8 m_IR7_scn2674_vsync_width;
UINT8 m_IR8_scn2674_display_buffer_first_address_LSB;
UINT8 m_IR9_scn2674_display_buffer_first_address_MSB;
UINT8 m_IR9_scn2674_display_buffer_last_address;
UINT8 m_IR10_scn2674_display_pointer_address_lower;
UINT8 m_IR11_scn2674_display_pointer_address_upper;
UINT8 m_IR11_scn2674_reset_scanline_counter_on_scrollup;
UINT8 m_IR11_scn2674_reset_scanline_counter_on_scrolldown;
UINT8 m_IR12_scn2674_scroll_start;
UINT8 m_IR12_scn2674_split_register_1;
UINT8 m_IR13_scn2674_scroll_end;
UINT8 m_IR13_scn2674_split_register_2;
UINT8 m_IR14_scn2674_scroll_lines;
UINT8 m_IR14_scn2674_double_1;
UINT8 m_IR14_scn2674_double_2;
UINT8 m_scn2674_horz_front_porch;
UINT8 m_scn2674_spl1;
UINT8 m_scn2674_spl2;
UINT8 m_scn2674_dbl1;
int m_rowcounter;
int m_linecounter;
UINT8 m_scn2674_irq_state;
void scn2674_write_init_regs(UINT8 data);
void scn2674_write_command(running_machine &machine, UINT8 data);
void scn2674_line(running_machine &machine);
template<class _BitmapClass>
void scn2574_draw_common( running_machine &machine, _BitmapClass &bitmap, const rectangle &cliprect, UINT16* vid_mainram );
private:
};
extern const device_type SCN2674_VIDEO;