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XT IDE interface [Phill Harvey-Smith]
This commit is contained in:
Miodrag Milanovic
parent
d49c45817d
commit
e0ce5c477c
2
.gitattributes
vendored
2
.gitattributes
vendored
@ -7232,6 +7232,8 @@ src/mess/machine/isa_ibm_mfc.c svneol=native#text/plain
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src/mess/machine/isa_ibm_mfc.h svneol=native#text/plain
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src/mess/machine/isa_ide.c svneol=native#text/plain
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src/mess/machine/isa_ide.h svneol=native#text/plain
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src/mess/machine/isa_ide8.c svneol=native#text/plain
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src/mess/machine/isa_ide8.h svneol=native#text/plain
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src/mess/machine/isa_ide_cd.c svneol=native#text/plain
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src/mess/machine/isa_ide_cd.h svneol=native#text/plain
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src/mess/machine/isa_mpu401.c svneol=native#text/plain
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@ -264,6 +264,7 @@ XT U44 IBM.bin: IBM 5160 PC/XT Bank-selection decoding ROM (256x4 bit). Not mapp
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#include "machine/isa_gblaster.h"
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#include "machine/isa_hdc.h"
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#include "machine/isa_sblaster.h"
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#include "machine/isa_ide8.h"
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#include "machine/3c503.h"
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#include "video/isa_cga.h"
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#include "video/isa_ega.h"
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@ -330,6 +331,7 @@ static SLOT_INTERFACE_START(ibm_isa8_cards)
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SLOT_INTERFACE("mpu401", ISA8_MPU401)
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SLOT_INTERFACE("lpt", ISA8_LPT)
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SLOT_INTERFACE("ibm_mfc", ISA8_IBM_MFC)
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SLOT_INTERFACE("isa_ide8", ISA8_IDE)
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SLOT_INTERFACE_END
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static MACHINE_CONFIG_START( ibm5150, ibmpc_state )
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245
src/mess/machine/isa_ide8.c
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245
src/mess/machine/isa_ide8.c
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@ -0,0 +1,245 @@
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/***************************************************************************
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ISA 8 bit IDE controller
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As implemented by the Vintage computer forums XT-IDE controller.
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Card has jumpers for I/O base address, and ROM base address, for the time
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being we'll emulate an I/O base of 0x300 and a ROM base of 0xC8000.
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If the I/O address is changed then the ROM will need to be patched.
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The opensource bios is available from :
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http://code.google.com/p/xtideuniversalbios/
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The data high register is connected to a pair of latches that have the MSB of
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the 16 bit data word latched into so that 16 bit IO may be performmed, this
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involves the following :
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A Data read will read the data register first, and obtain the bottom 8 bits
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of the data word, the top 8 bits will be latched at the same time these are
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then read from the latch to the processor.
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A data write will first write the top 8 bits to the latch, and then the bottom
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8 bits to the normal data register, this will also transfer the top 8 bits to
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the drive.
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IDE Register XTIDE rev 1 rev 2 or modded rev 1
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Data (XTIDE Data Low) 0 0
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Error (in), Features (out) 1 8
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Sector Count 2 2
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Sector Number,
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LBA bits 0...7,
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LBA48 bits 24...31 3 10
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Low Cylinder,
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LBA bits 8...15,
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LBA48 bits 32...39 4 4
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High Cylinder,
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LBA bits 16...23,
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LBA48 bits 40...47 5 12
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Drive and Head Select,
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LBA28 bits 24...27 6 6
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Status (in), Command (out) 7 14
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XTIDE Data High 8 1
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Alternative Status (in),
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Device Control (out) 14 7
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***************************************************************************/
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#include "emu.h"
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#include "machine/isa_ide8.h"
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#include "machine/idectrl.h"
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#include "imagedev/harddriv.h"
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static READ8_DEVICE_HANDLER( ide8_r )
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{
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ide_controller_device *ide = (ide_controller_device *) device;
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isa8_ide_device *ide8_d = downcast<isa8_ide_device *>(device->owner());
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UINT8 result = 0;
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if(offset == 0)
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{
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// Data register transfer low byte and latch high
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result=ide->ide_controller_read(0, (offset & 0x07), 1);
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ide8_d->set_latch_in(ide->ide_controller_read(0, (offset & 0x07), 1));
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}
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else if((offset > 0) && (offset < 8))
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result=ide->ide_controller_read(0, (offset & 0x07), 1);
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else if(offset == 8)
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result=ide8_d->get_latch_in();
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else if(offset == 14)
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result=ide->ide_controller_read(1, (offset & 0x07), 1);
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// logerror("%s ide8_r: offset=%d, result=%2X\n",device->machine().describe_context(),offset,result);
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return result;
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}
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static WRITE8_DEVICE_HANDLER( ide8_w )
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{
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ide_controller_device *ide = (ide_controller_device *) device;
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isa8_ide_device *ide8_d = downcast<isa8_ide_device *>(device->owner());
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// logerror("%s ide8_w: offset=%d, data=%2X\n",device->machine().describe_context(),offset,data);
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if(offset == 0)
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{
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// Data register transfer low byte and latched high
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ide->ide_controller_write(0, (offset & 7), 1, data);
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ide->ide_controller_write(0, (offset & 7), 1, ide8_d->get_latch_out());
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}
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else if((offset > 0) && (offset < 8))
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ide->ide_controller_write(0, (offset & 7), 1, data);
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else if(offset == 8)
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ide8_d->set_latch_out(data);
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else if(offset == 14)
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ide->ide_controller_write(1, (offset & 7), 1, data);
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}
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WRITE_LINE_MEMBER(isa8_ide_device::ide_interrupt)
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{
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switch(irq)
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{
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case 0x02 : m_isa->irq2_w(state); break;
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case 0x03 : m_isa->irq3_w(state); break;
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case 0x04 : m_isa->irq4_w(state); break;
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case 0x05 : m_isa->irq5_w(state); break;
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case 0x07 : m_isa->irq7_w(state); break;
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default : ;
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}
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}
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static MACHINE_CONFIG_FRAGMENT( ide8_config )
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MCFG_IDE_CONTROLLER_ADD("ide", ide_image_devices, "hdd", "hdd", false)
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MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE(DEVICE_SELF, isa8_ide_device, ide_interrupt))
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MACHINE_CONFIG_END
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static INPUT_PORTS_START( ide8_port )
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PORT_START("BIOS_BASE")
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PORT_DIPNAME( 0x0F, 0x02, "XT-IDE ROM base segment")
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PORT_DIPSETTING( 0x00, "C000" )
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PORT_DIPSETTING( 0x01, "C400" )
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PORT_DIPSETTING( 0x02, "C800" )
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PORT_DIPSETTING( 0x03, "CC00" )
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PORT_DIPSETTING( 0x04, "D000" )
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PORT_DIPSETTING( 0x05, "D400" )
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PORT_DIPSETTING( 0x06, "D800" )
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PORT_DIPSETTING( 0x07, "DC00" )
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PORT_DIPSETTING( 0x08, "E000" )
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PORT_DIPSETTING( 0x09, "E400" )
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PORT_DIPSETTING( 0x0A, "E800" )
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PORT_DIPSETTING( 0x0B, "EC00" )
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PORT_DIPSETTING( 0x0C, "F000" )
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PORT_DIPSETTING( 0x0D, "F400" )
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PORT_DIPSETTING( 0x0E, "F800" )
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PORT_DIPSETTING( 0x0F, "FC00" )
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PORT_START("IO_ADDRESS")
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PORT_DIPNAME( 0x0F, 0x08, "XT-IDE I/O address")
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PORT_DIPSETTING( 0x00, "200" )
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PORT_DIPSETTING( 0x01, "220" )
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PORT_DIPSETTING( 0x02, "240" )
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PORT_DIPSETTING( 0x03, "260" )
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PORT_DIPSETTING( 0x04, "280" )
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PORT_DIPSETTING( 0x05, "2A0" )
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PORT_DIPSETTING( 0x06, "2C0" )
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PORT_DIPSETTING( 0x07, "2E0" )
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PORT_DIPSETTING( 0x08, "300" )
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PORT_DIPSETTING( 0x09, "320" )
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PORT_DIPSETTING( 0x0A, "340" )
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PORT_DIPSETTING( 0x0B, "360" )
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PORT_DIPSETTING( 0x0C, "380" )
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PORT_DIPSETTING( 0x0D, "3A0" )
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PORT_DIPSETTING( 0x0E, "3C0" )
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PORT_DIPSETTING( 0x0F, "3E0" )
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PORT_START("IRQ")
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PORT_DIPNAME( 0x07, 0x05, "XT-IDE IRQ")
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PORT_DIPSETTING( 0x02, "IRQ 2" )
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PORT_DIPSETTING( 0x03, "IRQ 3" )
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PORT_DIPSETTING( 0x04, "IRQ 4" )
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PORT_DIPSETTING( 0x05, "IRQ 5" )
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PORT_DIPSETTING( 0x07, "IRQ 7" )
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INPUT_PORTS_END
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ROM_START( ide8 )
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ROM_REGION(0x04000,"ide8", 0)
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// XT-IDE universal bios from : http://code.google.com/p/xtideuniversalbios/
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ROM_LOAD("ide_xtl.bin", 0x00000, 0x03800, CRC(68801d16) SHA1(f3f5bed385d00ac444d85f492c879aa68a864160))
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ROM_END
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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const device_type ISA8_IDE = &device_creator<isa8_ide_device>;
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//-------------------------------------------------
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// machine_config_additions - device-specific
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// machine configurations
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//-------------------------------------------------
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machine_config_constructor isa8_ide_device::device_mconfig_additions() const
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{
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return MACHINE_CONFIG_NAME( ide8_config );
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}
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//-------------------------------------------------
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// input_ports - device-specific input ports
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//-------------------------------------------------
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ioport_constructor isa8_ide_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME( ide8_port );
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}
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//-------------------------------------------------
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// rom_region - device-specific ROM region
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//-------------------------------------------------
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const rom_entry *isa8_ide_device::device_rom_region() const
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{
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return ROM_NAME( ide8 );
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}
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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//-------------------------------------------------
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// isa8_ide_device - constructor
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//-------------------------------------------------
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isa8_ide_device::isa8_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: device_t(mconfig, ISA8_IDE, "XT-IDE Fixed Drive Adapter", tag, owner, clock),
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device_isa8_card_interface( mconfig, *this )
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{
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void isa8_ide_device::device_start()
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{
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set_isa_device();
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void isa8_ide_device::device_reset()
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{
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int base_address = ((ioport("BIOS_BASE")->read() & 0x0F) * 16 * 1024) + 0xC0000;
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int io_address = ((ioport("IO_ADDRESS")->read() & 0x0F) * 0x20) + 0x200;
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irq = (ioport("IRQ")->read() & 0x07);
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m_isa->install_rom(this, base_address, base_address + (16*1024) -1 , 0, 0, "ide8", "ide8");
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m_isa->install_device(subdevice("ide"), io_address, io_address+15, 0, 0, FUNC(ide8_r), FUNC(ide8_w) );
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//logerror("isa8_ide_device::device_reset(), bios_base=0x%5X to 0x%5X, I/O=0x%3X, IRQ=%d\n",base_address,base_address + (16*1024) -1 ,io_address,irq);
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}
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58
src/mess/machine/isa_ide8.h
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58
src/mess/machine/isa_ide8.h
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@ -0,0 +1,58 @@
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#pragma once
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#ifndef __ISA_IDE8_H__
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#define __ISA_IDE8_H__
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#include "emu.h"
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#include "machine/isa.h"
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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// ======================> isa16_ide_device
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class isa8_ide_device : public device_t,
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public device_isa8_card_interface
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{
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public:
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// construction/destruction
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isa8_ide_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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// optional information overrides
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virtual machine_config_constructor device_mconfig_additions() const;
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virtual ioport_constructor device_input_ports() const;
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virtual const rom_entry *device_rom_region() const;
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//bool is_primary() { return m_is_primary; }
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DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
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UINT8 get_latch_in() { return data_high_in; }
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void set_latch_in(UINT8 new_latch) { data_high_in=new_latch; }
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UINT8 get_latch_out() { return data_high_out; }
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void set_latch_out(UINT8 new_latch) { data_high_out=new_latch; }
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protected:
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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virtual void device_config_complete() { m_shortname = "isa_ide8"; }
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private:
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// internal state
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// bool m_is_primary;
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// Interupt request
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UINT8 irq;
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// Data latch for high byte in and out
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UINT8 data_high_in;
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UINT8 data_high_out;
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};
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// device type definition
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extern const device_type ISA8_IDE;
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#endif /* __ISA_IDE_H__ */
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@ -1517,6 +1517,7 @@ $(MESSOBJ)/pcshare.a: \
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$(MESS_MACHINE)/isa_stereo_fx.o \
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$(MESS_MACHINE)/isa_ssi2001.o \
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$(MESS_MACHINE)/isa_ide.o \
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$(MESS_MACHINE)/isa_ide8.o \
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$(MESS_MACHINE)/isa_ide_cd.o\
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$(MESS_MACHINE)/isa_aha1542.o \
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$(MESS_VIDEO)/isa_cga.o \
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