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m6801: Attempt at cleaning up internal registers (nw)

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- Split "HD6301" and "HD63701" devices into several different types (functionally identical now, but won't be compatible once accuracy improves)
- Split the all-in-one m6801_io_r and m6801_io_w handlers into separate handlers for each register; use m() instead of rw() to map these for now
- Make all port direction registers write-only
- Delete the "unused" NOP mapping from $0020 to $007F in the MC6803 internal map (datasheets make clear that external accesses can be made here)

mc10.cpp: Remove a bizarre and seemingly useless DDR hack for an unused port (nw)

psion.cpp: Correct CPU types and clocks
This commit is contained in:
AJR 2020-03-12 22:05:32 -04:00
parent 703e40e593
commit e10fc0f95d
34 changed files with 719 additions and 633 deletions
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2
src/devices/bus/adamnet/ddp.cpp
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@ -52,7 +52,7 @@ const tiny_rom_entry *adam_digital_data_pack_device::device_rom_region() const
void adam_digital_data_pack_device::adam_ddp_mem(address_map &map)
{
map(0x0000, 0x001f).rw(M6801_TAG, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x0400, 0x07ff).ram();
map(0xf800, 0xffff).rom().region(M6801_TAG, 0);

2
src/devices/bus/adamnet/fdc.cpp
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@ -79,7 +79,7 @@ const tiny_rom_entry *adam_fdc_device::device_rom_region() const
void adam_fdc_device::adam_fdc_mem(address_map &map)
{
map(0x0000, 0x001f).rw(M6801_TAG, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x0400, 0x07ff).ram().writeonly().share("ram");
map(0x0800, 0x0800).mirror(0x3ff).r(WD2793_TAG, FUNC(wd2793_device::status_r));

2
src/devices/bus/adamnet/kb.cpp
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@ -52,7 +52,7 @@ const tiny_rom_entry *adam_keyboard_device::device_rom_region() const
void adam_keyboard_device::adam_kb_mem(address_map &map)
{
map(0x0000, 0x001f).rw(M6801_TAG, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf800, 0xffff).rom().region(M6801_TAG, 0);
}

2
src/devices/bus/adamnet/printer.cpp
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@ -52,7 +52,7 @@ const tiny_rom_entry *adam_printer_device::device_rom_region() const
void adam_printer_device::adam_prn_mem(address_map &map)
{
map(0x0000, 0x001f).rw(M6801_TAG, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf800, 0xffff).rom().region(M6801_TAG, 0);
}

2
src/devices/bus/adamnet/spi.cpp
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@ -44,7 +44,7 @@ const tiny_rom_entry *adam_spi_device::device_rom_region() const
void adam_spi_device::adam_spi_mem(address_map &map)
{
map(0x0000, 0x001f).rw(m_maincpu, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(m_maincpu, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf800, 0xffff).rom().region("m6801", 0);
}

906
src/devices/cpu/m6800/m6801.cpp
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File diff suppressed because it is too large Load Diff

148
src/devices/cpu/m6800/m6801.h
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@ -56,10 +56,10 @@ public:
auto out_sc2_cb() { return m_out_sc2_func.bind(); }
auto out_ser_tx_cb() { return m_out_sertx_func.bind(); }
DECLARE_READ8_MEMBER( m6801_io_r );
DECLARE_WRITE8_MEMBER( m6801_io_w );
void m6801_io(address_map &map); // FIXME: privatize this
void m6801_clock_serial();
protected:
m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal = address_map_constructor());
@ -76,6 +76,49 @@ protected:
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
void p1_ddr_w(uint8_t data);
uint8_t p1_data_r();
void p1_data_w(uint8_t data);
void p2_ddr_w(uint8_t data);
uint8_t p2_data_r();
void p2_data_w(uint8_t data);
void p3_ddr_w(uint8_t data);
uint8_t p3_data_r();
void p3_data_w(uint8_t data);
uint8_t p3_csr_r();
void p3_csr_w(uint8_t data);
void p4_ddr_w(uint8_t data);
uint8_t p4_data_r();
void p4_data_w(uint8_t data);
public: // FIXME: psion.cpp accesses this
uint8_t tcsr_r();
void tcsr_w(uint8_t data);
protected:
uint8_t ch_r();
uint8_t cl_r();
void ch_w(uint8_t data);
void cl_w(uint8_t data);
uint8_t ocrh_r();
uint8_t ocrl_r();
void ocrh_w(uint8_t data);
void ocrl_w(uint8_t data);
uint8_t icrh_r();
uint8_t icrl_r();
uint8_t sci_rmcr_r();
void sci_rmcr_w(uint8_t data);
uint8_t sci_trcsr_r();
void sci_trcsr_w(uint8_t data);
uint8_t sci_rdr_r();
void sci_tdr_w(uint8_t data);
public: // FIXME: psion.cpp accesses this
uint8_t rcr_r();
protected:
void rcr_w(uint8_t data);
uint8_t ff_r();
void m6803_mem(address_map &map);
devcb_read8::array<4> m_in_port_func;
@ -159,31 +202,40 @@ protected:
class hd6301_cpu_device : public m6801_cpu_device
{
public:
hd6301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
class hd63701_cpu_device : public m6801_cpu_device
{
public:
hd63701_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void TAKE_TRAP() override;
};
// DP-40 package: HD6303RP, HD63A03RP, HD63B03RP,
// FP-54 package: HD6303RF, HD63A03RF, HD63B03RF,
// CG-40 package: HD6303RCG, HD63A03RCG, HD63B03RCG,
// DP-40 package: HD6301V1P, HD63A01V1P, HD63B01V1P
// FP-54 package: HD6301V1F, HD63A01V1F, HD63B01V1F
// CG-40 package: HD6301V1CG, HD63A01V1CG, HD63B01V1CG
// CP-52 package: HD6301V1CP, HD63A01V1CP, HD63B01V1CP
// CP-44 package: HD6301V1L, HD63A01V1L, HD63B01V1L
// Not fully emulated yet
class hd6301v1_cpu_device : public hd6301_cpu_device
{
public:
hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// DC-40 package: HD63701V0C, HD63A701V0C, HD63B701V0C
// Not fully emulated yet
class hd63701v0_cpu_device : public hd6301_cpu_device
{
public:
hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// DP-40 package: HD6303RP, HD63A03RP, HD63B03RP
// FP-54 package: HD6303RF, HD63A03RF, HD63B03RF
// CG-40 package: HD6303RCG, HD63A03RCG, HD63B03RCG
// Not fully emulated yet
class hd6303r_cpu_device : public hd6301_cpu_device
{
@ -192,23 +244,71 @@ public:
};
class hd6301x_cpu_device : public hd6301_cpu_device
{
protected:
hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
};
// DP-64S package: HD6301X0P, HD63A01X0P, HD63B01X0P
// FP-80 package: HD6301X0F, HD63A01X0F, HD63B01X0F
// CP-68 package: HD6301X0CP, HD63A01X0CP, HD63B01X0CP
// Not fully emulated yet
class hd6301x0_cpu_device : public hd6301x_cpu_device
{
public:
hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// DC-64S package: HD63701X0C, HD63A701X0C, HD63B701X0C
// Not fully emulated yet
class hd63701x0_cpu_device : public hd6301x_cpu_device
{
public:
hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// DP-64S package: HD6303XP, HD63A03XP, HD63B03XP
// FP-80 package: HD6303XF, HD63A03XF, HD63B03XF
// CP-68 package: HD6303XCP, HD63A03XCP, HD63B03XCP
// Not fully emulated yet
class hd6303x_cpu_device : public hd6301_cpu_device
class hd6303x_cpu_device : public hd6301x_cpu_device
{
public:
hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// DP-64S package: HD6301Y0P, HD63A01Y0P, HD63B01Y0P, HD63C01Y0P
// FP-64 package: HD6301Y0F, HD63A01Y0F, HD63B01Y0F, HD63C01Y0F
// FP-64A package: HD6301Y0H, HD63A01Y0H, HD63B01Y0H, HD63C01Y0H
// CP-68 package: HD6301Y0CP, HD63A01Y0CP, HD63B01Y0CP, HD63C01Y0CP
// Not fully emulated yet
class hd6301y0_cpu_device : public hd6301x_cpu_device
{
public:
hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// DC-64S package: HD63701Y0C, HD63A701Y0C, HD63B701Y0C, HD63C701Y0C
// Not fully emulated yet
class hd63701y0_cpu_device : public hd6301x_cpu_device
{
public:
hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// DP-64S package: HD6303YP, HD63A03YP, HD63B03YP, HD63C03YP
// FP-64 package: HD6303YF, HD63A03YF, HD63B03YF, HD63C03YF
// FP-64A package: HD6303YH, HD63A03YH, HD63B03YH, HD63C03YH
// CP-68 package: HD6303YCP, HD63A03YCP, HD63B03YCP, HD63C03YCP
// Not fully emulated yet
class hd6303y_cpu_device : public hd6301_cpu_device
class hd6303y_cpu_device : public hd6301x_cpu_device
{
public:
hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -218,8 +318,12 @@ public:
DECLARE_DEVICE_TYPE(M6801, m6801_cpu_device)
DECLARE_DEVICE_TYPE(M6803, m6803_cpu_device)
DECLARE_DEVICE_TYPE(M6803E, m6803e_cpu_device)
DECLARE_DEVICE_TYPE(HD6301, hd6301_cpu_device)
DECLARE_DEVICE_TYPE(HD63701, hd63701_cpu_device)
DECLARE_DEVICE_TYPE(HD6301V1, hd6301v1_cpu_device)
DECLARE_DEVICE_TYPE(HD6301X0, hd6301x0_cpu_device)
DECLARE_DEVICE_TYPE(HD6301Y0, hd6301y0_cpu_device)
DECLARE_DEVICE_TYPE(HD63701V0, hd63701v0_cpu_device)
DECLARE_DEVICE_TYPE(HD63701X0, hd63701x0_cpu_device)
DECLARE_DEVICE_TYPE(HD63701Y0, hd63701y0_cpu_device)
DECLARE_DEVICE_TYPE(HD6303R, hd6303r_cpu_device)
DECLARE_DEVICE_TYPE(HD6303X, hd6303x_cpu_device)
DECLARE_DEVICE_TYPE(HD6303Y, hd6303y_cpu_device)

38
src/devices/machine/mpu401.cpp
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@ -59,7 +59,7 @@
void mpu401_device::mpu401_map(address_map &map)
{
map(0x0000, 0x001f).rw(FUNC(mpu401_device::regs_mode2_r), FUNC(mpu401_device::regs_mode2_w));
map(0x0000, 0x001f).m(m_ourcpu, FUNC(m6801_cpu_device::m6801_io));
map(0x0020, 0x0021).rw(FUNC(mpu401_device::asic_r), FUNC(mpu401_device::asic_w));
map(0x0080, 0x00ff).ram(); // on-chip RAM
map(0x0800, 0x0fff).ram(); // external RAM
@ -153,42 +153,6 @@ void mpu401_device::device_timer(emu_timer &timer, device_timer_id tid, int para
m_ourcpu->m6801_clock_serial();
}
READ8_MEMBER(mpu401_device::regs_mode2_r)
{
switch (offset)
{
case 4:
case 5:
case 6:
case 7:
case 0xf:
// logerror("MPU401: read @ unk %x %s\n", offset, machine().describe_context());
break;
default:
return m_ourcpu->m6801_io_r(space, offset);
}
return 0xff;
}
WRITE8_MEMBER(mpu401_device::regs_mode2_w)
{
switch (offset)
{
case 4:
case 5:
case 6:
case 7:
case 0xf:
// logerror("MPU401: %02x @ unk %x %s\n", data, offset, machine().describe_context());
break;
default:
return m_ourcpu->m6801_io_w(space, offset, data);
}
}
READ8_MEMBER(mpu401_device::port1_r)
{
return 0xff;

2
src/devices/machine/mpu401.h
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@ -34,8 +34,6 @@ protected:
private:
DECLARE_WRITE_LINE_MEMBER(midi_rx_w);
DECLARE_READ8_MEMBER(regs_mode2_r);
DECLARE_WRITE8_MEMBER(regs_mode2_w);
DECLARE_READ8_MEMBER(asic_r);
DECLARE_WRITE8_MEMBER(asic_w);
DECLARE_READ8_MEMBER(port1_r);

2
src/mame/drivers/adam.cpp
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@ -884,7 +884,7 @@ void adam_state::adam_io(address_map &map)
void adam_state::m6801_mem(address_map &map)
{
map(0x0000, 0x001f).rw(m_netcpu, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(m_netcpu, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf800, 0xffff).rom().region(M6801_TAG, 0);
}

2
src/mame/drivers/apricotp.cpp
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@ -574,7 +574,7 @@ void fp_state::fp(machine_config &config)
m_maincpu->set_addrmap(AS_IO, &fp_state::fp_io);
m_maincpu->set_irq_acknowledge_callback(I8259A_TAG, FUNC(pic8259_device::inta_cb));
HD6301(config, m_soundcpu, 2000000);
HD6301V1(config, m_soundcpu, 2000000);
m_soundcpu->set_addrmap(AS_PROGRAM, &fp_state::sound_mem);
m_soundcpu->set_disable();

4
src/mame/drivers/atarist.cpp
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@ -1206,7 +1206,7 @@ WRITE16_MEMBER( stbook_state::lcd_control_w )
void st_state::ikbd_map(address_map &map)
{
map(0x0000, 0x001f).rw(HD6301V1_TAG, FUNC(hd6301_cpu_device::m6801_io_r), FUNC(hd6301_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(HD6301V1_TAG, FUNC(hd6301_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf000, 0xffff).rom().region(HD6301V1_TAG, 0);
}
@ -2052,7 +2052,7 @@ void st_state::common(machine_config &config)
void st_state::keyboard(machine_config &config)
{
hd6301_cpu_device &ikbd(HD6301(config, HD6301V1_TAG, Y2/8));
hd6301v1_cpu_device &ikbd(HD6301V1(config, HD6301V1_TAG, Y2/8));
ikbd.set_addrmap(AS_PROGRAM, &st_state::ikbd_map);
ikbd.in_p1_cb().set(FUNC(st_state::ikbd_port1_r));
ikbd.in_p2_cb().set(FUNC(st_state::ikbd_port2_r));

4
src/mame/drivers/baraduke.cpp
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@ -184,7 +184,7 @@ READ8_MEMBER(baraduke_state::soundkludge_r)
void baraduke_state::mcu_map(address_map &map)
{
map(0x0000, 0x001f).rw("mcu", FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));/* internal registers */
map(0x0000, 0x001f).m("mcu", FUNC(hd63701v0_cpu_device::m6801_io));/* internal registers */
map(0x0080, 0x00ff).ram(); /* built in RAM */
map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); /* PSG device, shared RAM */
map(0x1105, 0x1105).r(FUNC(baraduke_state::soundkludge_r)); /* cures speech */
@ -369,7 +369,7 @@ void baraduke_state::baraduke(machine_config &config)
MC6809E(config, m_maincpu, XTAL(49'152'000)/32); // 68A09E
m_maincpu->set_addrmap(AS_PROGRAM, &baraduke_state::baraduke_map);
HD63701(config, m_mcu, XTAL(49'152'000)/8);
HD63701V0(config, m_mcu, XTAL(49'152'000)/8);
m_mcu->set_addrmap(AS_PROGRAM, &baraduke_state::mcu_map);
m_mcu->in_p1_cb().set(FUNC(baraduke_state::inputport_r)); /* input ports read */
m_mcu->out_p1_cb().set(FUNC(baraduke_state::inputport_select_w)); /* input port select */

2
src/mame/drivers/canon_s80.cpp
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@ -42,7 +42,7 @@ void canons80_state::canons80_map(address_map &map)
void canons80_state::canons80(machine_config &config)
{
/* basic machine hardware */
hd6301_cpu_device &maincpu(HD6301(config, "maincpu", 5000000)); /* hd63a01xop 5 MHz guessed: TODO: check on PCB */
hd6301x0_cpu_device &maincpu(HD6301X0(config, "maincpu", 5000000)); /* hd63a01xop 5 MHz guessed: TODO: check on PCB */
maincpu.set_addrmap(AS_PROGRAM, &canons80_state::canons80_map);
}

2
src/mame/drivers/ddragon.cpp
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@ -948,7 +948,7 @@ void ddragon_state::ddragon(machine_config &config)
m_maincpu->set_addrmap(AS_PROGRAM, &ddragon_state::ddragon_map);
TIMER(config, "scantimer").configure_scanline(FUNC(ddragon_state::ddragon_scanline), "screen", 0, 1);
HD63701(config, m_subcpu, MAIN_CLOCK / 2); /* HD63701YOP, 6 MHz / 4 internally */
HD63701Y0(config, m_subcpu, MAIN_CLOCK / 2); /* HD63701YOP, 6 MHz / 4 internally */
m_subcpu->set_addrmap(AS_PROGRAM, &ddragon_state::sub_map);
MC6809(config, m_soundcpu, MAIN_CLOCK / 2); /* HD68A09P, 6 MHz / 4 internally */

8
src/mame/drivers/hx20.cpp
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@ -527,7 +527,7 @@ WRITE8_MEMBER( hx20_state::slave_p4_w )
void hx20_state::hx20_mem(address_map &map)
{
map(0x0000, 0x001f).rw(m_maincpu, FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6301v1_cpu_device::m6801_io));
map(0x0020, 0x0020).w(FUNC(hx20_state::ksc_w));
map(0x0022, 0x0022).r(FUNC(hx20_state::krtn07_r));
map(0x0026, 0x0026).w(FUNC(hx20_state::lcd_cs_w));
@ -549,7 +549,7 @@ void hx20_state::hx20_mem(address_map &map)
void hx20_state::hx20_sub_mem(address_map &map)
{
map(0x0000, 0x001f).rw(m_subcpu, FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(m_subcpu, FUNC(hd6301v1_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf000, 0xffff).rom().region(HD6301V1_SLAVE_TAG, 0);
}
@ -886,7 +886,7 @@ void hx20_state::machine_start()
void hx20_state::hx20(machine_config &config)
{
// basic machine hardware
HD63701(config, m_maincpu, 2.4576_MHz_XTAL);
HD6301V1(config, m_maincpu, 2.4576_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &hx20_state::hx20_mem);
m_maincpu->in_p1_cb().set(FUNC(hx20_state::main_p1_r));
m_maincpu->out_p1_cb().set(FUNC(hx20_state::main_p1_w));
@ -895,7 +895,7 @@ void hx20_state::hx20(machine_config &config)
// Port 3 = A0-A7, D0-D7
// Port 4 = A8-A15
HD63701(config, m_subcpu, 2.4576_MHz_XTAL);
HD6301V1(config, m_subcpu, 2.4576_MHz_XTAL);
m_subcpu->set_addrmap(AS_PROGRAM, &hx20_state::hx20_sub_mem);
m_subcpu->in_p1_cb().set(FUNC(hx20_state::slave_p1_r));
m_subcpu->out_p1_cb().set(FUNC(hx20_state::slave_p1_w));

2
src/mame/drivers/korgdss1.cpp
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@ -405,7 +405,7 @@ void korg_dssmsrk_state::msrk_io_map(address_map &map)
void korg_dss1_state::cpu2_map(address_map &map)
{
map(0x0000, 0x001f).rw(m_cpu2, FUNC(hd6303x_cpu_device::m6801_io_r), FUNC(hd6303x_cpu_device::m6801_io_w)); // FIXME: internalize this
map(0x0000, 0x001f).m(m_cpu2, FUNC(hd6303x_cpu_device::m6801_io)); // FIXME: internalize this
map(0x0015, 0x0015).r(FUNC(korg_dss1_state::cpu2_p5_r));
map(0x0017, 0x0017).w(FUNC(korg_dss1_state::ad_select_w));
map(0x0040, 0x00ff).ram(); // FIXME: internalize this

4
src/mame/drivers/mc10.cpp
View File

@ -286,8 +286,8 @@ void mc10_state::driver_start()
save_item(NAME(m_pr_counter));
//for alice32 force port4 DDR to 0xff at startup
if (!strcmp(machine().system().name, "alice32") || !strcmp(machine().system().name, "alice90"))
m_maincpu->m6801_io_w(prg, 0x05, 0xff);
//if (!strcmp(machine().system().name, "alice32") || !strcmp(machine().system().name, "alice90"))
//m_maincpu->m6801_io_w(prg, 0x05, 0xff);
}

4
src/mame/drivers/namcos1.cpp
View File

@ -433,7 +433,7 @@ void namcos1_state::sound_map(address_map &map)
void namcos1_state::mcu_map(address_map &map)
{
map(0x0000, 0x001f).rw(m_mcu, FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(m_mcu, FUNC(hd63701v0_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram(); /* built in RAM */
map(0x1000, 0x1003).r(FUNC(namcos1_state::dsw_r));
map(0x1400, 0x1400).portr("CONTROL0");
@ -1015,7 +1015,7 @@ void namcos1_state::ns1(machine_config &config)
MC6809E(config, m_audiocpu, XTAL(49'152'000)/32);
m_audiocpu->set_addrmap(AS_PROGRAM, &namcos1_state::sound_map);
HD63701(config, m_mcu, XTAL(49'152'000)/8);
HD63701V0(config, m_mcu, XTAL(49'152'000)/8);
m_mcu->set_addrmap(AS_PROGRAM, &namcos1_state::mcu_map);
m_mcu->in_p1_cb().set_ioport("COIN");
m_mcu->out_p1_cb().set(FUNC(namcos1_state::coin_w));

4
src/mame/drivers/namcos86.cpp
View File

@ -420,7 +420,7 @@ void namcos86_state::wndrmomo_cpu2_map(address_map &map)
void namcos86_state::common_mcu_map(address_map &map)
{
map(0x0000, 0x001f).rw("mcu", FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m("mcu", FUNC(hd63701v0_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w));
map(0x1400, 0x1fff).ram();
@ -1057,7 +1057,7 @@ void namcos86_state::hopmappy(machine_config &config)
m_cpu2->set_addrmap(AS_PROGRAM, &namcos86_state::hopmappy_cpu2_map);
m_cpu2->set_vblank_int("screen", FUNC(namcos86_state::irq0_line_assert));
HD63701(config, m_mcu, XTAL(49'152'000)/8); /* or compatible 6808 with extra instructions */
HD63701V0(config, m_mcu, XTAL(49'152'000)/8); /* or compatible 6808 with extra instructions */
m_mcu->set_addrmap(AS_PROGRAM, &namcos86_state::hopmappy_mcu_map);
m_mcu->in_p1_cb().set_ioport("IN2");
m_mcu->in_p2_cb().set_constant(0xff); /* leds won't work otherwise */

2
src/mame/drivers/novag_supremo.cpp
View File

@ -78,7 +78,7 @@ void supremo_state::machine_start()
void supremo_state::main_map(address_map &map)
{
map(0x0000, 0x000e).rw(m_maincpu, FUNC(hd6303y_cpu_device::m6801_io_r), FUNC(hd6303y_cpu_device::m6801_io_w));
map(0x0000, 0x000e).m(m_maincpu, FUNC(hd6303y_cpu_device::m6801_io));
map(0x0040, 0x013f).ram(); // internal
map(0x4000, 0x47ff).ram();
map(0x8000, 0xffff).rom();

4
src/mame/drivers/pacland.cpp
View File

@ -280,7 +280,7 @@ void pacland_state::main_map(address_map &map)
void pacland_state::mcu_map(address_map &map)
{
map(0x0000, 0x001f).rw(m_mcu, FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(m_mcu, FUNC(hd63701v0_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); /* PSG device, shared RAM */
map(0x2000, 0x3fff).w("watchdog", FUNC(watchdog_timer_device::reset_w)); /* watchdog? */
@ -419,7 +419,7 @@ void pacland_state::pacland(machine_config &config)
MC6809E(config, m_maincpu, XTAL(49'152'000)/32); /* 1.536 MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &pacland_state::main_map);
HD63701(config, m_mcu, XTAL(49'152'000)/8); /* 6.144 MHz? */
HD63701V0(config, m_mcu, XTAL(49'152'000)/8); /* 6.144 MHz? */
m_mcu->set_addrmap(AS_PROGRAM, &pacland_state::mcu_map);
m_mcu->in_p1_cb().set_ioport("IN2");
m_mcu->out_p1_cb().set(FUNC(pacland_state::coin_w));

163
src/mame/drivers/psion.cpp
View File

@ -64,74 +64,81 @@ void psion_state::update_banks()
membank("rombank")->set_entry(m_rom_bank);
}
WRITE8_MEMBER( psion_state::hd63701_int_reg_w )
void psion_state::port2_ddr_w(uint8_t data)
{
switch (offset)
{
case 0x01:
m_port2_ddr = data;
break;
case 0x03:
/* datapack i/o data bus */
m_pack1->data_w(data & m_port2_ddr);
m_pack2->data_w(data & m_port2_ddr);
break;
case 0x08:
m_tcsr_value = data;
break;
case 0x15:
/* read-only */
break;
case 0x16:
m_port6_ddr = data;
break;
case 0x17:
/*
datapack control lines
x--- ---- slot on/off
-x-- ---- slot 3
--x- ---- slot 2
---x ---- slot 1
---- x--- output enable
---- -x-- program line
---- --x- reset line
---- ---x clock line
*/
m_port6 = (data & m_port6_ddr) | (m_port6 & ~m_port6_ddr);
m_pack1->control_w((m_port6 & 0x8f) | (m_port6 & 0x10));
m_pack2->control_w((m_port6 & 0x8f) | ((m_port6 & 0x20) >> 1));
break;
}
m_maincpu->m6801_io_w(space, offset, data);
m_port2_ddr = data;
}
READ8_MEMBER( psion_state::hd63701_int_reg_r )
void psion_state::port2_w(uint8_t data)
{
switch (offset)
{
case 0x03:
/* datapack i/o data bus */
return (m_pack1->data_r() | m_pack2->data_r()) & (~m_port2_ddr);
case 0x14:
return (m_maincpu->m6801_io_r(space, offset)&0x7f) | (m_stby_pwr<<7);
case 0x15:
/*
x--- ---- ON key active high
-xxx xx-- keys matrix active low
---- --x- pulse
---- ---x battery status
*/
return kb_read() | ioport("BATTERY")->read() | ioport("ON")->read() | (m_kb_counter == 0x7ff)<<1 | m_pulse<<1;
case 0x17:
/* datapack control lines */
return (m_pack1->control_r() | (m_pack2->control_r() & 0x8f)) | ((m_pack2->control_r() & 0x10)<<1);
case 0x08:
m_maincpu->m6801_io_w(space, offset, m_tcsr_value);
default:
return m_maincpu->m6801_io_r(space, offset);
}
/* datapack i/o data bus */
m_pack1->data_w(data & m_port2_ddr);
m_pack2->data_w(data & m_port2_ddr);
}
uint8_t psion_state::port2_r()
{
/* datapack i/o data bus */
return (m_pack1->data_r() | m_pack2->data_r()) & (~m_port2_ddr);
}
void psion_state::tcsr_w(uint8_t data)
{
m_tcsr_value = data;
m_maincpu->tcsr_w(data);
}
uint8_t psion_state::tcsr_r()
{
if (!machine().side_effects_disabled())
m_maincpu->tcsr_w(m_tcsr_value);
return m_maincpu->tcsr_r();
}
uint8_t psion_state::rcp5c_r()
{
return (m_maincpu->rcr_r()&0x7f) | (m_stby_pwr<<7);
}
uint8_t psion_state::port5_r()
{
/*
x--- ---- ON key active high
-xxx xx-- keys matrix active low
---- --x- pulse
---- ---x battery status
*/
return kb_read() | ioport("BATTERY")->read() | ioport("ON")->read() | (m_kb_counter == 0x7ff)<<1 | m_pulse<<1;
}
void psion_state::port6_ddr_w(uint8_t data)
{
m_port6_ddr = data;
}
void psion_state::port6_w(uint8_t data)
{
/*
datapack control lines
x--- ---- slot on/off
-x-- ---- slot 3
--x- ---- slot 2
---x ---- slot 1
---- x--- output enable
---- -x-- program line
---- --x- reset line
---- ---x clock line
*/
m_port6 = (data & m_port6_ddr) | (m_port6 & ~m_port6_ddr);
m_pack1->control_w((m_port6 & 0x8f) | (m_port6 & 0x10));
m_pack2->control_w((m_port6 & 0x8f) | ((m_port6 & 0x20) >> 1));
}
uint8_t psion_state::port6_r()
{
/* datapack control lines */
return (m_pack1->control_r() | (m_pack2->control_r() & 0x8f)) | ((m_pack2->control_r() & 0x10)<<1);
}
/* Read/Write common */
@ -248,9 +255,22 @@ READ8_MEMBER( psion1_state::switchoff_r )
return 0;
}
void psion_state::psion_int_reg(address_map &map)
{
// FIXME: this should all be made internal to the CPU device
map(0x0000, 0x001f).m(m_maincpu, FUNC(hd6301x_cpu_device::m6801_io));
map(0x0001, 0x0001).w(FUNC(psion_state::port2_ddr_w));
map(0x0003, 0x0003).rw(FUNC(psion_state::port2_r), FUNC(psion_state::port2_w));
map(0x0008, 0x0008).rw(FUNC(psion_state::tcsr_r), FUNC(psion_state::tcsr_w));
map(0x0014, 0x0014).r(FUNC(psion_state::rcp5c_r));
map(0x0015, 0x0015).r(FUNC(psion_state::port5_r)).nopw();
map(0x0016, 0x0016).w(FUNC(psion_state::port6_ddr_w));
map(0x0017, 0x0017).rw(FUNC(psion_state::port6_r), FUNC(psion_state::port6_w));
}
void psion1_state::psion1_mem(address_map &map)
{
map(0x0000, 0x001f).rw(FUNC(psion1_state::hd63701_int_reg_r), FUNC(psion1_state::hd63701_int_reg_w));
psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x2000, 0x2001).mirror(0x07fe).rw(m_lcdc, FUNC(hd44780_device::read), FUNC(hd44780_device::write));
map(0x2800, 0x2800).r(FUNC(psion1_state::reset_kb_counter_r));
@ -263,7 +283,7 @@ void psion1_state::psion1_mem(address_map &map)
void psion_state::psioncm_mem(address_map &map)
{
map.unmap_value_low();
map(0x0000, 0x001f).rw(FUNC(psion_state::hd63701_int_reg_r), FUNC(psion_state::hd63701_int_reg_w));
psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w));
map(0x2000, 0x3fff).ram().share("ram");
@ -273,7 +293,7 @@ void psion_state::psioncm_mem(address_map &map)
void psion_state::psionla_mem(address_map &map)
{
map.unmap_value_low();
map(0x0000, 0x001f).rw(FUNC(psion_state::hd63701_int_reg_r), FUNC(psion_state::hd63701_int_reg_w));
psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w));
map(0x0400, 0x5fff).ram().share("ram");
@ -283,7 +303,7 @@ void psion_state::psionla_mem(address_map &map)
void psion_state::psionp350_mem(address_map &map)
{
map.unmap_value_low();
map(0x0000, 0x001f).rw(FUNC(psion_state::hd63701_int_reg_r), FUNC(psion_state::hd63701_int_reg_w));
psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w));
map(0x0400, 0x3fff).ram().share("ram");
@ -294,7 +314,7 @@ void psion_state::psionp350_mem(address_map &map)
void psion_state::psionlam_mem(address_map &map)
{
map.unmap_value_low();
map(0x0000, 0x001f).rw(FUNC(psion_state::hd63701_int_reg_r), FUNC(psion_state::hd63701_int_reg_w));
psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w));
map(0x0400, 0x7fff).ram().share("ram");
@ -305,7 +325,7 @@ void psion_state::psionlam_mem(address_map &map)
void psion_state::psionlz_mem(address_map &map)
{
map.unmap_value_low();
map(0x0000, 0x001f).rw(FUNC(psion_state::hd63701_int_reg_r), FUNC(psion_state::hd63701_int_reg_w));
psion_int_reg(map);
map(0x0040, 0x00ff).ram().share("sys_register");
map(0x0100, 0x03ff).rw(FUNC(psion_state::io_r), FUNC(psion_state::io_w));
map(0x0400, 0x3fff).ram().share("ram");
@ -571,7 +591,7 @@ GFXDECODE_END
void psion_state::psion_2lines(machine_config &config)
{
/* basic machine hardware */
HD63701(config, m_maincpu, 980000); // should be HD6303 at 0.98MHz
HD6303X(config, m_maincpu, 3.6864_MHz_XTAL); // internal operating frequency is 0.9216 MHz
/* video hardware */
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD));
@ -620,6 +640,7 @@ void psion_state::psion_4lines(machine_config &config)
void psion1_state::psion1(machine_config &config)
{
psion_2lines(config);
HD6301X0(config.replace(), m_maincpu, 3.6864_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &psion1_state::psion1_mem);
subdevice<timer_device>("nmi_timer")->set_start_delay(attotime::from_seconds(1));

2
src/mame/drivers/rvoice.cpp
View File

@ -363,7 +363,7 @@ void rvoice_state::null_kbd_put(u8 data)
void rvoice_state::rvoicepc(machine_config &config)
{
/* basic machine hardware */
HD63701(config, m_maincpu, XTAL(7'372'800));
HD63701Y0(config, m_maincpu, XTAL(7'372'800));
m_maincpu->set_addrmap(AS_PROGRAM, &rvoice_state::hd63701_main_mem);
//hd63701_cpu_device &playercpu(HD63701(config "playercpu", XTAL(7'372'800))); // not dumped yet

4
src/mame/drivers/skykid.cpp
View File

@ -124,7 +124,7 @@ void skykid_state::skykid_map(address_map &map)
void skykid_state::mcu_map(address_map &map)
{
map(0x0000, 0x001f).rw(m_mcu, FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(m_mcu, FUNC(hd63701v0_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w)); /* PSG device, shared RAM */
map(0x2000, 0x3fff).w("watchdog", FUNC(watchdog_timer_device::reset_w)); /* watchdog? */
@ -427,7 +427,7 @@ void skykid_state::skykid(machine_config &config)
MC6809E(config, m_maincpu, XTAL(49'152'000)/32);
m_maincpu->set_addrmap(AS_PROGRAM, &skykid_state::skykid_map);
HD63701(config, m_mcu, XTAL(49'152'000)/8); /* or compatible 6808 with extra instructions */
HD63701V0(config, m_mcu, XTAL(49'152'000)/8); /* or compatible 6808 with extra instructions */
m_mcu->set_addrmap(AS_PROGRAM, &skykid_state::mcu_map);
m_mcu->in_p1_cb().set(FUNC(skykid_state::inputport_r)); /* input ports read */
m_mcu->out_p1_cb().set(FUNC(skykid_state::inputport_select_w)); /* input port select */

4
src/mame/drivers/tceptor.cpp
View File

@ -178,7 +178,7 @@ void tceptor_state::m68k_map(address_map &map)
void tceptor_state::mcu_map(address_map &map)
{
map(0x0000, 0x001f).rw("mcu", FUNC(hd63701_cpu_device::m6801_io_r), FUNC(hd63701_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m("mcu", FUNC(hd63701v0_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0x1000, 0x13ff).rw(m_cus30, FUNC(namco_cus30_device::namcos1_cus30_r), FUNC(namco_cus30_device::namcos1_cus30_w));
map(0x1400, 0x154d).ram();
@ -328,7 +328,7 @@ void tceptor_state::tceptor(machine_config &config)
M68000(config, m_subcpu, XTAL(49'152'000)/4);
m_subcpu->set_addrmap(AS_PROGRAM, &tceptor_state::m68k_map);
HD63701(config, m_mcu, XTAL(49'152'000)/8); // or compatible 6808 with extra instructions
HD63701V0(config, m_mcu, XTAL(49'152'000)/8); // or compatible 6808 with extra instructions
m_mcu->set_addrmap(AS_PROGRAM, &tceptor_state::mcu_map);
config.set_maximum_quantum(attotime::from_hz(6000));

2
src/mame/includes/baraduke.h
View File

@ -64,7 +64,7 @@ protected:
required_shared_ptr<uint8_t> m_videoram;
required_shared_ptr<uint8_t> m_textram;
required_device<cpu_device> m_maincpu;
required_device<hd63701_cpu_device> m_mcu;
required_device<hd63701v0_cpu_device> m_mcu;
required_device<namco_cus30_device> m_cus30;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;

4
src/mame/includes/hx20.h
View File

@ -54,8 +54,8 @@ public:
void cm6127(machine_config &config);
private:
required_device<hd63701_cpu_device> m_maincpu;
required_device<hd63701_cpu_device> m_subcpu;
required_device<hd6301v1_cpu_device> m_maincpu;
required_device<hd6301v1_cpu_device> m_subcpu;
required_device<mc146818_device> m_rtc;
required_device_array<upd7227_device, 6> m_lcdc;
required_device<speaker_sound_device> m_speaker;

2
src/mame/includes/namcos1.h
View File

@ -76,7 +76,7 @@ private:
required_device<mc6809e_device> m_maincpu;
required_device<mc6809e_device> m_subcpu;
required_device<mc6809e_device> m_audiocpu;
required_device<hd63701_cpu_device> m_mcu;
required_device<hd63701v0_cpu_device> m_mcu;
required_device<namco_c116_device> m_c116;
required_device<namco_c117_device> m_c117;
required_device<namco_c123tmap_device> m_c123tmap;

2
src/mame/includes/namcos86.h
View File

@ -93,7 +93,7 @@ private:
required_device<cpu_device> m_cpu1;
required_device<cpu_device> m_cpu2;
required_device<hd63701_cpu_device> m_mcu;
required_device<hd63701v0_cpu_device> m_mcu;
required_device<watchdog_timer_device> m_watchdog;
required_device<namco_cus30_device> m_cus30;
required_device<gfxdecode_device> m_gfxdecode;

2
src/mame/includes/pacland.h
View File

@ -30,7 +30,7 @@ public:
{ }
required_device<cpu_device> m_maincpu;
required_device<hd63701_cpu_device> m_mcu;
required_device<hd63701v0_cpu_device> m_mcu;
required_device<namco_cus30_device> m_cus30;
required_device<gfxdecode_device> m_gfxdecode;
required_device<screen_device> m_screen;

15
src/mame/includes/psion.h
View File

@ -50,7 +50,7 @@ public:
DECLARE_INPUT_CHANGED_MEMBER(psion_on);
protected:
required_device<hd63701_cpu_device> m_maincpu;
required_device<hd6301x_cpu_device> m_maincpu;
required_device<hd44780_device> m_lcdc;
required_device<beep_device> m_beep;
required_device<datapack_device> m_pack1;
@ -85,8 +85,16 @@ protected:
uint8_t kb_read();
void update_banks();
DECLARE_WRITE8_MEMBER( hd63701_int_reg_w );
DECLARE_READ8_MEMBER( hd63701_int_reg_r );
void port2_ddr_w(uint8_t data);
void port2_w(uint8_t data);
uint8_t port2_r();
void tcsr_w(uint8_t data);
uint8_t tcsr_r();
uint8_t rcp5c_r();
uint8_t port5_r();
void port6_ddr_w(uint8_t data);
void port6_w(uint8_t data);
uint8_t port6_r();
void io_rw(address_space &space, uint16_t offset);
DECLARE_WRITE8_MEMBER( io_w );
DECLARE_READ8_MEMBER( io_r );
@ -94,6 +102,7 @@ protected:
TIMER_DEVICE_CALLBACK_MEMBER(nmi_timer);
HD44780_PIXEL_UPDATE(lz_pixel_update);
void psion_int_reg(address_map &map);
void psioncm_mem(address_map &map);
void psionla_mem(address_map &map);
void psionlam_mem(address_map &map);

2
src/mame/includes/skykid.h
View File

@ -63,7 +63,7 @@ private:
required_shared_ptr<uint8_t> m_textram;
required_shared_ptr<uint8_t> m_spriteram;
required_device<cpu_device> m_maincpu;
required_device<hd63701_cpu_device> m_mcu;
required_device<hd63701v0_cpu_device> m_mcu;
required_device<namco_cus30_device> m_cus30;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;

2
src/mame/machine/eispc_kb.cpp
View File

@ -406,7 +406,7 @@ ioport_constructor eispc_keyboard_device::device_input_ports() const
void eispc_keyboard_device::eispc_kb_mem(address_map &map)
{
map(0x0000, 0x001f).rw(M6801_TAG, FUNC(m6801_cpu_device::m6801_io_r), FUNC(m6801_cpu_device::m6801_io_w));
map(0x0000, 0x001f).m(M6801_TAG, FUNC(m6801_cpu_device::m6801_io));
map(0x0080, 0x00ff).ram();
map(0xf800, 0xffff).rom().region(M6801_TAG, 0);
}